A Single-phase Bidirectional Rectifier With
Power Factor Correction
Bor-Ren Lin Member IEEE and Zong-Liang Hung
Abstract- A single-phase rectifier based on the conventional
two-level full-bridge rectifier and one AC power switch is
proposed. The voltage stress of the full-bridge rectifier is equal to
the DC bus voltage, but AC power switch has a voltage rating of
half DC-link voltage. The control signals of the rectifier switches
are derived , from the voltage balance compensator, current
controller and detected operation region of mains voltage. A novel
PWM control scheme is proposed to draw a clean sinusoidal line
current with high power factor. Three-level P W M pattern is
generated on the AC terminal of the adopted rectifier converter by
using the proposed control scheme. To verifi the proposed
operation strategy, performance characteristics are provided by
the computer simulations.
Index Terms-Power
of power factor correction and reversible power flow. The
pulsewidth modulation (PWM) control scheme is proposed to
generate a multilevel voltage waveform on the AC side of
adopted rectifier and draw a sinusoidal line current. To control
the AC source current, the hysteresis current controller is
adopted in the inner loop control. A voltage balance
compensator is added to the line current command so as to
maintain the neutral point voltage in the desired reference
voltage. A proportional integral controller is employed in the
outer loop control to maintain the constant DC-link voltage. To
verify the validity of the proposed control strategy, the
computer simulations are provided and discussed.
factor correction, PWM rectifier.
L
INTRODUCTION
0
wing to power converters widely used in the industry
products, serious power pollution is produced in the
distributionnetwork. High current harmonics, low power factor
(0.5-0.9) and high pulsating current generated from the diode
rectifiers (nonlinear loads) are the main power pollution. One of
the most important issues of the power electronic designer is the
reduction of current or voltage harmonics created by the
converters. Passive filter is often used to improve the power
quality for its simple circuit configuration. Main drawbacks of
this configuration are bulk passive elements, fixed
compensation characteristics and series or parallel resonance.
Active single-phase [ 1-41and three-phase [5-101 rectifiers have
been proposed to draw a nearly sinusoidal line current. For high
voltage or high current applications, power semiconductors
with high voltage or high current stress are generallyrequired in
the conventional two-level rectifiers. The series or parallel
connections of power semiconductors can achieve high voltage
or high current applications. Multilevel scheme provides a
greater number of advantages over the conventional schemes
especially for high power or medium voltage applications
[l l-151. The advantages of multilevel converters over the
two-level convertersare improved voltage waveform on the AC
side, smaller filter size, lower switching loss, lower
electromagnetic interferenceand lower acousticnoise. However,
this scheme can be easily applied to medium and low power
applications.
This paper presents a single-phase rectifier with the function
Bor-Ren Lin and Zong-Liaug Hung are with the Electrical En&eering
Department,National Yunlin Univmity of Science and Technology,Yunlin
640, Taiwan, ROC (e-mail:linbr@pine.yuntech.edu.tw)
IEEE Catalogue No. 01CH37239
0-7803-71
01- I / 01 / $1 0.00 0 2001 IEEE.
@)
Fig. 1 Conventionalfull-bridge rectifier (a) circuit configuration
(b) PWM waveform on the AC side.
II. SYSTEM DESCRIPTION
Fig. 1 shows a conventional two-level full-bridge rectifier
and its PWM waveform. Power switches are controlled to
generate a two-level voltage waveform on the AC side in each
half cycle of line frequency. In the positive mains voltage,
voltage levels v, and 0 are generated. On the other hand, voltage
levels -v, and 0 are achieved in the negative half cycle. Because
the multilevel voltage approaches the sinusoidal signal closer
than the two-level voltage waveform. A three-level PWM
rectifier as shown in Fig. 2 is employed to achieve power factor
correction. The power circuit of the adopted rectifier is
constructed by adding an AC power switch to the conventional
111-bridge rectifier. The AC power switch is built with two
unidirectional power switches connected in series. The neutral
point voltage on the DC-link is controlledby AC power switch S
to adjust the neutral point current io. If the average neutral point
current io,m in one line frequency is zero, then the neutral point
voltage is equal to half DC-link voltage, i.e. vl=vz=vJ2. By the
appropriate control, five different voltage levels, v,, vJ2, 0,
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4 2 , -vo, are generated on the AC terminal of the adopted
rectifier. Power switches TI-T4 have a voltage rating of v, and
AC power switchShave a voltage rating of vd2 which is a lower
cost device than switches TI-T4.
L
L
The voltage vab generated by the rectifier can be expressed as
(7)
vab = vao -vbo .
Substituting( 5 ) and (6) into (7), voltage v d is given as
L
L
L
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Table 1 Valid switching states and the corresponding voltage
vab.
(b)
Fig. 2 Proposed three-level PWM rectifier (a) circuit
configuration(b) PWM waveform on the AC side.
-
Fig. 3 Simplified circuit of the adopted rectifier.
III. OPERATION PRINCIPLE
To achieve a clean sinusoidal line current with low current
distortion and low total harmonic distortion (THD) of P W M
waveform, power devices of the adopted rectifier are switched
on or offaccordingto the line currenterror and the sign of mains
voltage. The voltage v d generated by the rectifier depends on
the switching states of the power switches. Some constraints of
power switches are defined so as to avoid the power switches in
each rectifier leg conducting at the same time
TI +T2 +S=I,
(1)
T3+ T4=1,
(2)
where Ti (or S) =1 if switch Ti (or S) is on, or Ti (or S)=O if
switch Ti (or S) is off, i=l, 2, 3, 4. The equivalent switching
functionin each rectifier leg is shown in Fig. 3 and defined as
1 if T1 (or 01)is turned on
1={
if Sisturnedon
,
- 1 if T 2 (or 0 2 ) is turned on
fa= 0
1 if T3 (or 0 3 ) is turned on
fb
- 1 if T 4 (or 0 4 )is turned on
(3)
(4)
The relationshipsbetween the equivalent switching functionsf,
and& and the voltages v, and vb, are given as
If capacitor voltages V I and vz are equal, i.e. AFO, then there are
five different voltage levels, v,, vd2,0, -vd2, -vo, on the voltage
vd as shown in Table 1. The valid switching states of power
switches and the corresponding voltages on the AC side of
rectifier are shown in Table 1. There are six valid switching
states in the adopted rectifier. Two switching states of power
switches generate voltage vab=o. By the combinations of power
switches, five different voltage levels are generated by the
rectifier. The switching states of the rectifier and the
corresponding equivalent circuits are shown in Fig. 4.
In the first operation mode, power switches TI and T4 are
turned on to achieve voltage vo on the ac side. Positive line
current charges both capacitorvoltages vI and v3 Line currentis
decreasedbecause the boost inductor voltage is negative. Power
switches S and T4 are turned on to generate voltage level vz on
the AC side in the second operation mode. Capacitor voltage v2
is charged by the positive line current. Line current is linearly
increasing or decreasing if the mains voltage is greater or less
than capacitor voltage v2. In modes 3 and 4, voltage vd equals
zero. The boost inductor voltage is equal to v,. The line current
is increasing or decreasing according to the sign of mains
voltage. In mode 3, power switches T2 and T4 are turned on. In
mode 4, power switches TI and T3 are turned on. The dc load
current discharges two capacitor voltages. Voltage vd
equals -vI in operation mode 5. The boost inductor voltage is
equal to vs+vl. Capacitor voltage V I is charged by the negative
line current. The line current is increasing (or decreasing)if the
mains voltage greater (or less) than -vl. In the last mode, power
switches T2 and T3 are turned on to achieve voltage -v, on the
ac side. Negative line current will charge both capacitor
voltages vI and vz. Line current is controlled to increasing
because the boost inductor voltage is positive.
In the positive half cycle of mains voltage, the power switch
T4 is turned on and the voltage vb, is equal to -vz (=-vd2).TO
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generate voltage level vI+vz (mode l), power switch TI is
tumed on and line current is decreasing. In this case, the line
current charges both DC-link capacitors. Power switches S and
T4 are turned on to generate vd=vz (mode 2) The line current
will compensate voltage vz in this switching state. The line
current is increasingor decreasing if the mains voltage is greater
or less than capacitor voltage vz. If power switches T2=T4=1,
the voltage vab is shorted and line current is linearly increasing.
In this positive half cycle, three voltage levels v,, vJ2 and 0 are
generated. During the negative half cycle of mains voltage, the
rectifier generates another three voltage levels 0, -vJ2 and -vo
on the AC side. The switch T3 is turned on in this half cycle and
voltage vh=vl (=vJ2). The power switch TI, S or T2 is tumed
on to achieve voltage vd=O, -vJ2 or -vo respectively (assumed
vl=vz=vJ2).In the proposed operation principle, the switching
frequency of switches T3 and T4 is equal to the line frequency.
The Kirchhoff law applied on the AC side of rectifier can obtain
di,
v, = r i , + L - + v * .
(9)
dt
The instantaneous power at the ac and dc sides of the rectifier is
equal.
4tl= c u t
(12)
v*i, = vlil - v2i2.
(13)
According to (8), the currents il and iz on the DC side based on
(13) can be given as
L
L
The neutral point current io can be expressed in terms of the
switching functionsf, and&.
io = -il - i2 = -<f; - f; )is = (1 - f a2 )is
(16)
wheref,=l, 0 or -1, andfb=l or -1. The DC side currents can
also be expressed as the function of load current amd two
capacitor voltages.
dvl vl +v2
il = C - + dt
R '
d.
2
VI +v?
i2 = -C--dt
R
Substituting(17) and (18) into (16), the neutral point current is
expressed as
This equation gives
.
L,r f.
(4
(f)
Fig. 4 Operation mode of the adopted rectifier (a) mode 1 (b)
mode 2 (c) mode 3 (d) mode 4 (e) mode 5 ( f ) mode 6.
According to (8), (9) can be derived as
dis
1 .
+K .
(20)
C
This means that a DC component in the neutral point current io
can be used to balance the dc side voltages.
AV = (VI
fa-fb
vo
+
f2-f;
vs=ris+L-+dt
2
2
If the capacitor voltages on the DC side are balanced, ( 1 0) can
be rewritten as
v, =ri, + L -dis
+ - f a -f b
( 1 1)
dt
2
If the power switches are considered idea. There is no power
loss and energy storage during the instantaneous commutation.
" '
-vZ)
= --Jlodt
T3
I
T4 I
1
Fig. 5 Operation region and the corresponding switch gating
signals.
IV. CONTROL STRATEGY
Two operation regions of mains voltage during one cycle of
the input line frequency are defined to generate a three-level
voltage pattern. These operation regions and the corresponding
PWM voltage waveforms are shown in Fig. 5 and Table 2.
There is one high voltage level and one low voltage level in
each operation region. In the positive half cycle of mains
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voltage,power switch T4 is turned on and power switches TI (or
T2) is turned off in the first (or second) region. Mode 1 and
mode 2 are employed in the second region, and mode 2 and
mode 3 are used in the first region. Three voltage levels v,, vd2
and 0 are generated on the AC side voltage vd. For the negative
mains voltage, switch T3 is turned on and power switches T2 is
tsuned off in the first region and switch TI is turned off in the
second region. Similarlyvoltage levels 0, -vd2 and -v, are given
on the voltage vd.
T 4 = -fb(h-1)
2
'
(28)
S = l - f,".
(29)
If capacitor voltages v1 and v2 are equal, then there are five
voltage levels (v,, vd2,0, -vd2, -vo)on the voltage v ~ .
Table 3 Control strategy of the adopted three-level PWM
Table 2 Operation regions and the correspondingvoltage level
- vo
Low Level
The goals of control strategy for the three-level PWM
rectifier are sinusoidal line current with unity power factor,
constant DC-link voltage and balance capacitor voltages.
Generally the time-shift or voltage-shift triangle waves and the
modulating wave are compared to generate properly multilevel
P W M waveforms. Fig. 6 shows the control blocks of the
adopted rectifier. A proportional-integral(PI) voltage controller
is employed in the outer loop control to maintain the constant
DC link voltage. The line current command is derived from the
output of PI controller and the phase-locked loop circuit. The
reference mains current is
i: = (k,Av,
+ kiJ Av,dt) .%,
v,
switch
Gating
Signals
T4
SI
I
v2
Fig. 6 Control block diagram of the adopted rectifier.
(21)
where V , is the amplitude of the mains voltage. The
phase-locked loop generates a unit sinusoidal wave in phase
with mains voltage. The phase shifter, phase detector, counter
and digital-to-analog converter are used in the phase-locked
circuit. To balance the DC link voltage, the voltage gap v1-v~is
added to the line current command. A current controller is
adopted in the inner loop control to track the line current
command. Many PWM schemes for multilevel convertershave
been proposed [16]. In the proposed control scheme, three
control signals dI-d3 are employed to generate a three-level
voltage waveform on the AC terminal of the rectifier. These
control signals are
d l =0, if v,>O; or I, if vs<O,
(22)
d2=0, if o<lvsl<vJ2;or I, if lvsl>v,J2,
(23)
d3=0, if Ai,>h; or I, if Ai, <-h.
(24)
According to three control signals, the switching functions are
generated based on the look-up table (Table3). For example, if
the (dl, d2, d3)=(0, 1, 0), i.e. positive mains voltage, second
operation region and line current error Ai?h, then voltage
Vab-2
is generate to increase the line current. Similarly
switching functions can be achieved if the control signals are
given. The actual switching signals of power switches TI-T4
are expressed as followings
T1= f a (fa + 1)
2
'
f a (fa - 1)
T2 =
2
'
TI
R
T3
V. SIMULATIONRESULTS
To verify the proposed control algorithm of the adopted
three-level rectifier, computer simulations are performed. The
capacitance of two capacitors is 2200pF. The mains voltage is
220V- and source fkequency is 60Hz. The boost inductance is
2mH. The DC-link voltage of the proposed rectifier is 400V.
The current hysteresis band is 0.5A. Fig. 7 shows the simulated
waveforms of line voltage, line current and dc side voltage v d
operated in the rectificationmode. There is a three-level voltage
pattern on the voltage v&. The simulated line current is nearly
sinusoidal wave with unity power factor. Fig. 8 shows the
simulated waveforms of the adopted rectifier operated in the
inversion mode. Based on the simulated results by using the
discrete fourier transform, the input power factor is close to
unity and total harmonic distortion of the line current is close to
5%. To investigatethe voltage variation between two capacitor
voltages on the dc-link, the simulated capacitor voltages are
shown in Fig. 9. Two capacitor voltages are almost balanced
from the simulated results. The voltage difference between two
capacitors is about 5V under the simulatedresult.
W. CONCLUSION
This paper presents a simple control algorithm for the
three-level PWM rectifier. The proposed control scheme is
based on a look-up table instead of the conventional complex
control algorithm. The high power factor, low current distortion,
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and stable capacitor voltages are implemented fiom the
simulationresults. The advantages of the proposed three-level
active rectifier instead of two-level rectifier are implementing
high voltage application by using low voltage devices and
reducing the voltage harmonic contents.
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Fig. 7 Simulated waveforms of the adopted rectifier under the
rectificationmode.
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Fig. 8 Simulated waveforms of the adopted rectifier under the
inversion mode.
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