Chapter 5
Bipolar Junction Transistors
Microelectronic Circuit Design
Richard C. Jaeger
Travis N. Blalock
Jaeger/Blalock
Microelectronic Circuit Design, 5E
McGraw-Hill
Chap 5 - 1
Chapter Goals
•
•
•
•
•
•
•
•
•
•
Explore physical structure of bipolar transistor
Understand bipolar transistor action and importance of carrier
transport across base region
Study terminal characteristics of BJT.
Explore differences between npn and pnp transistors.
Develop the Transport Model for the bipolar device.
Define four operation regions of BJT.
Explore model simplifications for each operation region.
Understand origin and modeling of the Early effect.
Present SPICE model for bipolar transistor.
Reading:
– Jaeger’s: 5.1 – 5.7, 5.8.6 – 5.8.8, 5.10 – 5.11
Jaeger/Blalock
Microelectronic Circuit Design, 5E
McGraw-Hill
Chap 5 - 2
Bipolar Transistor
Physical Structure
•
•
cross-section view •
•
•
top view
Jaeger/Blalock
Consists of 3 alternating layers of n- and ptype semiconductor called emitter (E),
base (B) and collector (C).
Emitter is more heavily doped (n+) than the
collector (n)
Majority of current enters the collector,
crosses the base region and exits through
the emitter.
A small current also enters the base,
crosses the base-emitter junction and exits
through the emitter.
Carrier transport in the active base region
directly beneath the heavily doped (n+)
emitter dominates the i-v characteristics
Microelectronic Circuit Design, 5E
McGraw-Hill
Chap 5 - 3
Transport Model for the npn Transistor
•
•
TWO n-p and p-n junctions are
connected back to back  no
current flows  off!
Narrow width of the base region
causes coupling between the two
p-n junctions.
Jaeger/Blalock
• Emitter injects electrons into base
region, most of which travel across
narrow base and are collected by
collector
• Base-emitter voltage vBE and basecollector voltage vBC determine currents
in transistor and are positive when their
respective pn junctions are forwardbiased
• The terminal currents are collector
current(iC), base current (iB) and emitter
current (iE).
• Depending on the bias voltages, the
device is operated in different regions
Microelectronic Circuit Design, 5E
McGraw-Hill
Chap 5 - 4
npn Transistor
Forward-Active Region
VBE = VD,on ; VBC < VD,on  VCE>VCE,sat
Base current iB is given by
 bF is the forward common-emitter current gain
Emitter current iE is
I S   vBE
iE  iC  iB 
exp
a F   VT
0.95  a F  1
Forward transport current is
 
  1
 
aF 
bF
bF 1
 aF is the forward common-base current gain
IS is the BJT saturation current
In this forward-active region of operation
VT = kT/q =0.025 V at room temperature
Jaeger/Blalock
iC
iC
bF
aF
bF  ; aF  ; aF 
; bF 
iB
iE
1 bF
1aF
Microelectronic Circuit Design, 5E
McGraw-Hill
Chap 5 - 5
npn Transistor
Reverse-Active Region
VBC = VD,on ; VBE < VD,on VEC > VEC,sat
 bR is the reverse common-emitter current gain
 Collector current iC is given by
iC = iE - iB
Emitter current iE is
 aR is the reverse common-base current gain
-iE = iR
 The base currents in forward and reverse
Base current iB is given by
modes are different due to asymmetric
doping levels in emitter and collector regions.
 This reserve-active region is NOT of our interest!
Jaeger/Blalock
Microelectronic Circuit Design, 5E
McGraw-Hill
Chap 5 - 6
npn Transistor
Complete Transport Model - Valid for Any Bias

 vBE 
 vBC  I S 
 vBC  
iC  I S exp 
  exp 
  exp 
 1
 VT 
 VT  b R 
 VT  

 v 
 vBC  I S   vBE  
BE
iE  I S exp 
  exp 
  exp 
 1
 VT  b F   VT  
  VT 
 vBE   I S   vBC  
IS 
iB  exp 
 1  exp 
 1
b F   VT   b R   VT  
 The first terms in both emitter and collector current expressions are the
currents transported completely across base region.
 Asymmetry exists between base-emitter and base-collector voltages in
establishing dominant current in bipolar transistors.
Jaeger/Blalock
Microelectronic Circuit Design, 5E
McGraw-Hill
Chap 5 - 7
Transport Model Calculations
Example
•
•
•
•
I C  10
16
Problem: Find terminal voltages and currents.
Given data: VBB = 0.75 V, VCC = 5.0 V, IS = 10-16 A,
bF = 50, bR = 1
Assumptions: Room temperature operation, VT =
25.0 mV.
Analysis: VBE = VBB = 0.75 V, VCE = VCC = 5 V,
 VBC = VBE - VCE = 0.75 V- 5.00V = - 4.25 V
 forward-active operation
  0.75 
 4.25
 10 16   4.25
 
X
X
  exp 
 
 1  1.07 mA
exp 
exp 
 0.025 
1   0.025  
  0.025 

 10 16   0.75  
 0.75 


4.25
I E  10 exp 
  expX

 
 1  1.09mA
exp 





 
0.025
0.025
50
0.025



 4.25  
10 16   0.75   1016  X
IB 
 1 
 1  21.4 m A
exp 
exp 
 0.025  
50   0.025  
1 
16
Jaeger/Blalock
Microelectronic Circuit Design, 5E
McGraw-Hill
Chap 5 - 8
pnp Transistor Structure
• Voltages vEB and vCB are positive when their respective pn
junctions are forward-biased.
• Collector current and base current exit transistor terminals and
emitter current enters the device.
Jaeger/Blalock
Microelectronic Circuit Design, 5E
McGraw-Hill
Chap 5 - 9
pnp Transistor
Forward Characteristics
VEB = VD,on ; VCB <VD,on  VEC > VEC,sat = ~ 0.1V
Base current iB is given by
iF
I S   vEB  
iB 
 exp 
 1
b F b F   VT  
iC
iB 
bF
Collector current iC equals the
forward transport current:
 v  
iC  iF  I S exp  EB  1
  VT  
Jaeger/Blalock
Emitter current iE is given by

 vEB  
1 
iE  iC  iB  I S 1 exp 
 1
 b F 
 VT  
 vEB   iC
IS 
iE  iC  iB  exp 
 1 
a F   VT   a F
Microelectronic Circuit Design, 5E
McGraw-Hill
Chap 5 - 10
pnp Transistor
Reverse Characteristics
Base current iB is given by
iiFR I S   vCB  
iB 
bR
-iiEE
iB 
bR

exp 
 1
b R   VT  
Collector current iC is given by
Emitter current iE is the negative
of the reverse transport current is
 v  
iE  iR  I S exp  CB  1
  VT  
Jaeger/Blalock
 1

 vCB  
iC  iiBE - iEB  I S  1exp 
 1
 b R 
 VT  
 vCB   iE
-II SS 
iC  exp 
 1 
a R   VT   a R
Microelectronic Circuit Design, 5E
McGraw-Hill
Chap 5 - 11
pnp Transistor
Complete Transport Model Equations for Any Bias

 vEB 
 vCB  I S   vCB  
iC  I S exp 
  exp 
  exp 
 1
 VT 
 VT  b R   VT  

 v 
 vCB  I S 
 vEB  
EB
iE  I S exp 
  exp 
  exp 
 1
 VT  b F 
 VT  
  VT 
I S   vEB   I S   vCB  
iB  exp 
 1 + exp 
 1
b F   VT   b R   VT  
 First term in both emitter and collector current expressions gives current
transported completely across the base region.
 Symmetry exists between base-emitter and base-collector voltages in establishing
dominant currents
 With all the variables expressed as absolute values  same expressions for npn!
Jaeger/Blalock
Microelectronic Circuit Design, 5E
McGraw-Hill
Chap 5 - 12
Transport Model Circuit Representations
 Using proper notations with absolute values, for both npn and pnp transistors, the
total current traversing the base is modeled by a current source given by:
𝑖 = 𝑖 − 𝑖 = 𝐼 exp
|𝑣 |
|𝑣 |
− exp
|𝑉 |
|𝑉 |
 Diode currents correspond directly to the two components of base current.
I S   vBE   I S   vBC  
iB  exp 
 1  exp 
 1
b F   VT   b R   VT  
Jaeger/Blalock
Microelectronic Circuit Design, 5E
McGraw-Hill
Chap 5 - 13
Operation Regions of Bipolar Transistors
Base-Emitter
Junction VBE
Base-Collector Junction VBC
Reverse Bias
Forward Bias
Forward Bias
Forward-Active
Saturation Region
Region
(Closed Switch)
(Good Amplifier)
Reverse Bias
Reverse-Active
Region
(Poor Amplifier)
Jaeger/Blalock
Cutoff Region
(Open Switch)
Microelectronic Circuit Design, 5E
McGraw-Hill
Chap 5 - 14
Operation Regions of Bipolar Transistors
Jaeger/Blalock
Microelectronic Circuit Design, 5E
McGraw-Hill
Chap 5 - 15
i-v Characteristics of Bipolar Transistors
Common-Emitter Output Characteristics
 vBE <VBE(on): iB = 0  the transistor is cut-off
 vBE >VBE(on) & vCE > vCE, sat = 0.1V:
 npn transistor is in forward-active region
iC = bF iB (nearly independent of vCE)
 vBE > VBE(on) & 0 < vCE < vCE, sat:
 npn transistor is in saturation
 vCE < 0: roles of collector and emitter are
reversed.
Jaeger/Blalock
Microelectronic Circuit Design, 5E
McGraw-Hill
Chap 5 - 16
i-v Characteristics of Bipolar Transistors
Common-Emitter Transfer Characteristic
 Defines relation between collector
current and base-emitter voltage of
transistor.
 Almost identical to transfer
characteristic of a pn junction diode
 Setting vBC = 0 in the collector-current
expression yields
 v  
iC  I S exp  BE  1
  VT  
 Increases with a slope of
vBE / iC ~ 60mV/decade
Jaeger/Blalock
Microelectronic Circuit Design, 5E
McGraw-Hill
Chap 5 - 17
Simplified Cut-off-Region Model
 In the cut-off region, both junctions
are reverse-biased; the transistor is
said to be in OFF state
vBE < 0, vBC < 0  iC ~ iB ~ iE ~ 0
 Using the transport model to obtain:
iC 
IS
and
bR
iB  
Jaeger/Blalock
IS
bF

IS
bF
iE  
IS
bF

 vBE 
 vBC  I S 
 vBC  
iC  I S exp 
  exp 
  exp 
 1
 VT 
 VT  b R 
 VT  

 v 
 vBC  I S   vBE  
BE
iE  I S exp 
  exp 
  exp 
 1
 VT  b F   VT  
  VT 
I S   vBE   I S   vBC  
iB  exp 
 1  exp 
 1
b F   VT   b R   VT  
X X
X
X
X X
X
X
Microelectronic Circuit Design, 5E
McGraw-Hill
Chap 5 - 18
Simplified Cut-off-Region Model
Example
•
•
•
•
Problem: Estimate terminal currents using the transport model
Given data: IS = 10-16 A, aF = 0.95, aR = 0.25, VBE = 0 V, VBC = -5 V
Assumptions: Simplified transport model assumptions
Analysis: From given voltages, we know that transistor is in cut-off.
1 X
X
1 X
1
i  exp 1  1  exp

 1
X
b  V   b  V  

1 
16
I C  I S 1 

4
x
10
A

 bR 
 v 
 vBC  I S   vBE  
16
BE
iE  I S exp 
  exp 
  exp 
 1 I E  I S  10 A
 VT  b F   VT  
  VT 
IS
16
I




3
x
10
A








B
IS
vBE
IS
vBC

 vBE 
 vBC  I S 
 vBC  
iC  I S exp 
  exp 
  exp 
 1
 VT 
 VT  b R 
 VT  

B
F
T
R
bR
T
 For all practical purposes, all 3 currents are essentially 0.
Jaeger/Blalock
Microelectronic Circuit Design, 5E
McGraw-Hill
Chap 5 - 19
Simplified Forward-Active-Region Model
 In forward-active region, the emitter-base junction is forward-biased and the
collector-base junction is reverse-biased.
VBE = VD,on; VBC < 0 ; VCE > VCE,sat
 Using the transport model terminal current equations to obtain:

 vBE 
 vBC  I S 
 vBC  
iC  I S exp 
  exp 
  exp 
 1
V
V
b
V
 T 
 T  R 
 T  

X
X
 v 
 v  I   v  
i  I exp 
  exp 
  exp 
 1
V
V
b
V
X



 
 
 
I  v   I  v  
i  exp 
 1  exp 
 1
b   V   bX
V
 
 
E
B
S
BE
BC
S
BE
T
T
F
T
S
BE
S
BC
F
T
R
T
𝒗𝑩𝑬
𝑰𝑺
+
= 𝜷𝑭 𝒊𝑩 ; 𝒊𝑬 = 𝜷𝑭 + 𝟏 𝒊𝑩
𝑽𝑻
𝜷𝑹
𝒗𝑩𝑬
𝑰𝑺
𝒗𝑩𝑬
𝒊𝑬 ≅ 𝑰𝑺 𝐞𝐱𝐩
+
𝐞𝐱𝐩
𝑽𝑻
𝜷𝑭
𝑽𝑻
𝑰𝑺
𝒗𝑩𝑬
=
𝐞𝐱𝐩
𝜶𝑭
𝑽𝑻
𝑰𝑺
𝒗𝑩𝑬
𝑰𝑺
𝑰𝑺
𝒗𝑩𝑬
𝒊𝑩 ≅
𝐞𝐱𝐩
+
≅
𝐞𝐱𝐩
𝜷𝑭
𝑽𝑻
𝜷𝑹 𝜷𝑭
𝑽𝑻
𝒊𝑪 ≅ 𝑰𝑺 𝐞𝐱𝐩
 BJT is often considered as a current-controlled device although fundamental
forward-active behavior suggests a voltage-controlled current source.
Jaeger/Blalock
Microelectronic Circuit Design, 5E
McGraw-Hill
Chap 5 - 20
Simplified Forward-Active-Region Model
Example 1
• Problem: Estimate transistor terminal currents and base-emitter voltage
• Given data: IS =10-16 A, aF = 0.95, VBC = VB - VC = -5 V, IE = 100 mA
• Assumptions: Simplified transport model assumptions, room
temperature operation, VT = 25.0 mV
• Analysis: Current source forward-biases base-emitter diode, VBE > 0,
VBC < 0  the transistor is in forward-active operation region.
I C  a F I E  0.95 (100 m A)  95 m A
aF
0.95

 19
1 a F 1 0.95
I
100m A
IB  E 
 5 mA
b F 1
20
bF 
 I 
VBE  VT ln a F E   0.689 V
 IS 
Jaeger/Blalock
Microelectronic Circuit Design, 5E
McGraw-Hill
Chap 5 - 21
Simplified Forward-Active-Region Model
Example 2
• Problem: Estimate the transistor Q-point (terminal currents, base-emitter and
base-collector voltages) in the given circuit
• Given data: IS = 10-16 A, aF = 0.95, VC = +5 V, IB = 100 mA
• Assumptions: Simplified transport model assumptions, room temperature
operation, VT = 25.0 mV
• Analysis: Current source causes base current to forward-bias base-emitter diode,
VBE > 0, VBC <0  the transistor is in forward-active operation region.
a
0.95
bF  F 
 19
1 a F 1 0.95
I C  b F I B  19 (100m A)  1.90 mA
I E  ( b F 1) I B  20 (100m A )  2.00 mA
 IC 
 1.9mA 
VBE  VT ln 1   0.025V ln 1
  0.764 V
 0.1 fA 
 IS 
VBC  VB  VC  VBE  VC  0.764  5  4.24 V
Jaeger/Blalock
Microelectronic Circuit Design, 5E
McGraw-Hill
Chap 5 - 22
Simplified Circuit Model
Forward-Active Region
 Current in base-emitter diode iB is amplified by common-emitter current
gain bF and appears at collector iC  base and collector currents iB and iC are
exponentially related to base-emitter voltage vBE.
 Base-emitter diode is replaced by constant-voltage-drop model (VBE = 0.7
V) since it is forward-biased in the forward-active region.
 dc base and emitter voltages VB and VE differ from each other by 0.7-V
diode voltage drop in the forward-active region.
Jaeger/Blalock
Microelectronic Circuit Design, 5E
McGraw-Hill
Chap 5 - 23
Simplified Forward-Active-Region Model
Example 3
• Problem: Find transistor Q-point with bF = 50, bR = 1
• Assumptions: Forward-active region of operation, VBE = 0.7 V
• Analysis:
V  8.2k * I  V  0
BE
E
EE
9  0.7 V
 1.01 mA
8.2k 
IE
1.01mA
 IB 

 19.8 m A
bF  1
51
 IE 
 I C  b F I B  50 (19.8m A)  0.990 mA
VCE  VCC  I C RC  ( VBE )
 9  0.99mA ( 4.3K )  0.7  5.44 V
 Assumption of forward-active operation is correct!
Jaeger/Blalock
Microelectronic Circuit Design, 5E
McGraw-Hill
Chap 5 - 24
Simplified Circuit Model
Reverse-Active Region
 In reverse-active region, basecollector diode is forward-biased and
base-emitter diode is reverse-biased.
vBE < 0, vBC > 0
 Simplified equations become:
v 
exp  BC 
aR

 vBE 
 vBC  I S 
 vBC  
 VT 
iC  I S exp 
  exp 
  exp 
 1
V
V
b
V
 T 
 T  R 
 T  

 v BC 
IS
iB 
exp 

 v 







v
I
v
b
V
BE
BC
S
BE
R
 T 
X
i  I exp 
  exp 
  expX

 1
X
 V  b   V  
 V 
I  v   I  v  
i  exp 
 1  exp 
 1
b  X
V   b  V  
E
S
T
B
T
F
T
S
BE
S
BC
F
T
R
T
Jaeger/Blalock
iC  
IS
v 
iE   I S exp  BC 
 VT 
iE  a RiC   b RiB
Microelectronic Circuit Design, 5E
McGraw-Hill
Chap 5 - 25
Simplified Reverse-Active Region Model
Example
• Problem: Find transistor Q-point
• Given data: bF = 50, bR = 1, VBE = VB - VE = -9 V. Combination of R
and the voltage source forward-biases the base-collector junction.
• Assumptions: Reverse-active region of operation, VBC = 0.7 V
• Analysis:
 0.7V  ( 9V )
 IC 
 1.01 mA
8.2k
 IC
1.01mA
IB 

 0.505 mA
bR 1
2
 I E  b R I B  0.505 mA
 Assumption of reverse-active
operation is correct!
Jaeger/Blalock
Microelectronic Circuit Design, 5E
McGraw-Hill
Chap 5 - 26
Simplified Circuit Model
Saturation Region
 In the saturation region, both junctions are
forward-biased, and the transistor operates
with a small voltage between collector and
emitter.  vCE,SAT is the saturation voltage
V  I
V 
I C  I S exp  BE   S exp  BC  ;
 VT  a R
 VT 
V  I
V 
I
I B  S exp  BE   S exp  BC 
bF
 VT  b R
 VT 
VCESAT  VBE  VBC

v
iC  I S  exp  BE
 VT


v
i E  I S  exp  BE
 VT

iB 
 I S
 
 b R

 v BC   I S

exp

 

V
 T  b F


 v BC

exp


 VT

 v BE
IS 
exp


bF 
 VT

 v BC  
exp

  1

V
 T  


 v BE  
exp

  1

V
 T  

  IS 
 v BC

1

exp

 

 VT
  bR 
X
X
X
 
  1
 
X
𝑪𝑬𝑺𝑨𝑻
IC

1

 1  ( b  1) I
R
B
 VT ln  
 a R  1  I C

bF IB


I
 for I B  C
bF


 No simplified expressions exist for terminal
currents other than iC + iB = iE.
Jaeger/Blalock
Microelectronic Circuit Design, 5E
McGraw-Hill
Chap 5 - 27
Early Effect and Early Voltage
E
B
C
n+
p
n
-
E
B
C
n+
p
n
+
VCE
WB’ xd
WB
 As reverse-bias voltage across the collector-base junction VCE increases,
width of the collector-base depletion layer xd increases and width of the
base WB decreases  base-width modulation  current increases
 Early Effect: When the output characteristics are extrapolated back to point
of zero iC, the curves intersect (approximately) at a common point vCE = -VA
VA is Early voltage, typically between 15V and 150V
 Simplified equations (including Early effect):
𝐼 =𝑓
Jaeger/Blalock
1
𝑊
→ 𝑖 = 𝐼 exp
𝑣
𝑉
1+
𝑣
𝑉
; 𝛽 =𝛽
Microelectronic Circuit Design, 5E
McGraw-Hill
1+
𝑣
𝑉
Chap 5 - 28
Early Effect and Early Voltage
 Ideal w/o Early Effect, VA = ∞, l = 0:
 With Early Effect, VA ≠ ∞, l ≠ 0 :
Jaeger/Blalock
Microelectronic Circuit Design, 5E
McGraw-Hill
Chap 5 - 29
BJT SPICE Model
X
X
X
X
• RB is parasitic resistance between the
external base contact and the intrinsic base
region.
• RC is parasitic resistance between the
external collector contact and the intrinsic
collector region.
• RE models any extrinsic emitter
resistance in device.
• Collector current must pass through RC
on its way to the active region of the
collector-base junction.
Jaeger/Blalock
Microelectronic Circuit Design, 5E
McGraw-Hill
Chap 5 - 30
BJT SPICE Model Parameters
Typical Values
Saturation Current IS = 3x10-17 A
Forward current gain bF = 100
Reverse current gain bR = 0.5
Forward Early voltage VAF = 75 V
Base resistance RB = 50 
Collector Resistance RC = 50 
Emitter Resistance RE = 1 
Jaeger/Blalock
Microelectronic Circuit Design, 5E
McGraw-Hill
Chap 5 - 31
Biasing for the BJT
Overview
 The goal of biasing is to establish known Q-point which in turn
establishes initial operating region of the transistor.
 For a BJT, the Q-point is represented by (IC, VCE) for an npn transistor
or (IC, VEC) for a pnp transistor.
 The Q-point controls values of the device’s small-signal parameters
(transconductance, input and output resistances, gain), which will be
discussed later.
 In circuit analysis, we use simplified mathematical relationships derived
for a specified operation region, and the Early voltage is ignored.
 Two practical biasing circuits used for a BJT are:
– Four-Resistor Bias Network
– Two-Resistor Bias Network
Jaeger/Blalock
Microelectronic Circuit Design, 5E
McGraw-Hill
Chap 5 - 32
BJT Biasing
Four-Resistor Bias Network
 Assume forward-active region
VEQ  I B REQ  VBE  I E RE
VEQ  VBE
IB 
REQ  ( b F 1) RE
IB 
b F  75
4V  0.7V
 2.69 m A
12k  ( 76 )16k
I C  b F I B  202 m A
I E  ( b F 1) I B  204 m A
VCE  VCC  IC RC  I E RE  4.29 V
 Check:
IC = 202 mA, VCE = 4.29 V
Jaeger/Blalock
Microelectronic Circuit Design, 5E
McGraw-Hill
Chap 5 - 33
BJT Biasing
Four-Resistor Bias Network (cont.)
 All currents > 0, VBC = VBE - VCE = 0.7 - 4.32 = - 3.62 V
 Hence, base-collector junction is reverse-biased, and
assumption of forward-active region operation is correct.
 Load-line for the circuit is:

RE 
 I C  12  38.2k * I C
VCE  VCC   RC 
aF 

 The two points needed to plot the load
line are (0, 12 V) and (314 mA, 0)  the
resulting load line is plotted on the
common-emitter output characteristics.
 IB = 2.7 mA at the intersection of the iv
characteristic with load line
 the Q-point: (200 mA, 4.3 V)
Jaeger/Blalock
Microelectronic Circuit Design, 5E
McGraw-Hill
Chap 5 - 34
BJT Biasing
Four-Resistor Bias Design
 The currents can be approximated as:
VEQ VBE  I B REQ VEQ VBE
IC  I E 

RE
RE
for
I B REQ << (VEQ VBE )
 Desire IB << IR2  IR1 = IR2  base current does NOT disturb the
voltage divider action of R1 and R2  Q-point is independent of
base current as well as current gain!
 Also, VEQ is designed to be large enough that small variations in
the assumed value of VBE would not affect IE and IC.
 The base voltage divider network is set by choosing IR2 ≤ IC/N
 ensure that power dissipation in bias resistors is < 1/(N+1) %
of the total quiescent power consumed by circuit
Jaeger/Blalock
Microelectronic Circuit Design, 5E
McGraw-Hill
Chap 5 - 35
BJT Biasing
Four-Resistor Bias Design Guidelines
 Choose Thévenin equivalent base voltage:
VCC
V
 VEQ  CC
4
2
 Arbitrarily, select R2 to set IR2 = 10IB :
VCC  VEQ
R2 
 Accordingly, select R1 to set IR1 = 9IB :
R1 
 RE is determined by VEQ and the desired IC:
 RC is determined by desired VCE:
Jaeger/Blalock
10 I B
VEQ
9I B
RE 
VEQ  VBE
IC
VCC  VCE
RC 
 RE
IC
Microelectronic Circuit Design, 5E
McGraw-Hill
Chap 5 - 36
Four-Resistor Bias for BJT
Design Example
• Problem: Design 4-resistor bias circuit with given parameters.
• Given data: IC = 750 mA, bF = 100, VCC = 15 V, VCE = 5 V
• Assumptions: Forward-active operation region, VBE = 0.7 V
• Analysis: As only one out of many potential solutions, let’s divide the
supply rail (VCC - VCE) equally between RE and RC  VE = 5 V and VC = 10 V
Jaeger/Blalock
Microelectronic Circuit Design, 5E
McGraw-Hill
Chap 5 - 37
BJT Biasing
Two-Resistor Bias Example
• Problem: Find the Q-point a for a pnp transistor in a 2-resistor bias
circuit with given parameters.
• Given data: bF = 50, VEE = 9 V
• Assumptions: Forward-active operation region, VEB = 0.7 V
• Analysis:
 Assumption of forward-active region operation
is correct  Q-point is : (6.01 mA, 2.88 V)
Jaeger/Blalock
Microelectronic Circuit Design, 5E
McGraw-Hill
Chap 5 - 38