2/22/22, 1:41 PM

Signal Stability in Timing Jitter and Phase Noise| DigiKey
All Products

Login or

0
REGISTER item(s)
0
What is the Difference Between Timing Jitter and Phase Noise?
By: Art Pini
2021-03-18
Tags Engineering Timing & Clock Management Semiconductors & Dev Tools
Serial data transmission rates continue to climb in response to an ever-increasing demand for more data, more
quickly. As data rates increase, timing margins decrease, thereby pushing designers to minimize uncertainty in
data timing. Specifying uncertainty in data timing can take either of two forms depending upon the discipline you
come from. The two parameters are jitter and phase noise.
Phase noise and jitter both indicate the timing stability of a signal and are related to each other. In essence, these
are two ways of characterizing the timing uncertainty in a clock or data stream. Phase noise is the instability of a
signal’s frequency, expressed in the frequency domain, while jitter is a variation of the signal waveform in the
time domain.
The selection of which domain to consider is usually dependent on the application: RF engineers will generally
look at phase noise, while digital designers are more likely to use jitter.
Definition and measurement of jitter and phase noise
Jitter is the variation of a signal’s timing from its ideal and is usually measured with an oscilloscope. Jitter can
take several forms, including edge or phase jitter (called time interval error), period jitter, or cycle-to-cycle jitter
(the difference between the periods of adjacent cycles). Jitter of any type can be broken down into two main
components: random or deterministic jitter. Random components are generally unbounded, meaning that peak
jitter values increase with increasing time. Deterministic jitter elements are bounded and do not increase with
time. Each of these main components incorporates multiple sub-components that are beyond the scope of this
article.
Phase noise looks at the signal power adjacent to the clock fundamental in the frequency domain. Variations in
signal phase or frequency are manifest in the width of the spectral line. The greater the timing instability, the
broader the spectral line. Figure 1 provides us an example.
https://www.digikey.com/en/blog/what-is-the-difference-between-timing-jitter-and-phase-noise#:~:text=Phase noise and jitter both,are related to each o…
1/6
2/22/22, 1:41 PM
Signal Stability in Timing Jitter and Phase Noise| DigiKey
Figure 1: A comparison of jitter (upper trace) and phase noise (lower traces) of a clock signal. (Image source: Digi-Key Electronics)
The upper trace is a view of an edge of a 100 megahertz (MHz) clock signal. It is viewed with display persistence
turned on to give us a history of edge locations. The clock edge is moving horizontally in time. This variation is
the clock edge jitter. In this case, there are about 100 picoseconds (ps) of peak-to-peak jitter.
The lower traces show horizontally expanded views to the frequency spectrum of the 100 MHz clock signal using
a power density display. There are four overlaid spectra showing the differences in spectral width for edge jitter
values of 10, 50, 100, and 500 ps. Note the broadening of the spectral line for increasing amounts of jitter. Phase
noise is generally measured using a spectrum analyzer or a dedicated phase noise test set and is generally
presented at a fixed frequency offset from the clock fundamental frequency. For instance, phase noise might be
specified as -96 decibels relative to carrier (dBc) at 10 kilohertz (kHz) offset from the carrier.
Controlling jitter and phase noise
Designers can control jitter and phase noise in clock distribution chains by employing low-phase-noise clock
generators such as Analog Devices’ ADF4001BCPZ. It offers a 200 MHz bandwidth and has a typical phase noise
specification of -99 dB/Hz at 1 kHz offset from the clock frequency (Figure 2).
https://www.digikey.com/en/blog/what-is-the-difference-between-timing-jitter-and-phase-noise#:~:text=Phase noise and jitter both,are related to each o…
2/6
2/22/22, 1:41 PM
Signal Stability in Timing Jitter and Phase Noise| DigiKey
Figure 2: The Analog Devices ADF4001BCPZ is a 200 MHz lowphase-noise clock generator with a typical phase noise
specification of -99 dB/Hz at 1 kHz offset from the clock
frequency. (Image source: Analog Devices)
Distributing a clock to multiple devices requires a zero-delay clock buffer. In addition to guaranteeing very low
timing skew, these devices also reduce jitter due to their internal phase-locked loops (PLLs). As an example,
Cypress Semiconductor’s CY2308SXC-3T zero-delay buffer has two banks of four outputs. It operates over a
frequency range from 10 to 133 MHz and offers 60 ps typical cycle-to-cycle jitter at the output (Figure 3).
Figure 3: The Cypress Semiconductor CY2308SXC-3T zero-delay
buffer in a 16-SOIC package offers 60 ps typical cycle-to-cycle
jitter at the output. (Image source Cypress Semiconductor)
Conclusion
So, the answer to the original question is that phase noise and jitter are two different views of the same
information about clock or data timing stability, with phase noise being the view in the frequency domain and
https://www.digikey.com/en/blog/what-is-the-difference-between-timing-jitter-and-phase-noise#:~:text=Phase noise and jitter both,are related to each o…
3/6
2/22/22, 1:41 PM
Signal Stability in Timing Jitter and Phase Noise| DigiKey
jitter being the time domain interpretation. Good component selection helps reduce both of them.
About this author
Arthur (Art) Pini is a contributing author at Digi-Key Electronics. He has a Bachelor of Electrical Engineering degree
from City College of New York and a Master of Electrical Engineering degree from the City University of New York.
He has over 50 years experience in electronics and has worked in key engineering and marketing roles at Teledyne
LeCroy, Summation, Wavetek, and Nicolet Scientific. He has interests in measurement technology and extensive
experience with oscilloscopes, spectrum analyzers, arbitrary waveform generators, digitizers, and power meters.
More posts by Art Pini
Comments (0):
Login or Register to comment.
Related Blogs
Engineering
I Understand Noise Figure, but How Did Noise Get a ‘Temperature’?
Bill Schweber
https://www.digikey.com/en/blog/what-is-the-difference-between-timing-jitter-and-phase-noise#:~:text=Phase noise and jitter both,are related to each o…
4/6
2/22/22, 1:41 PM
Signal Stability in Timing Jitter and Phase Noise| DigiKey
Engineering
Basics of Brushed DC Motors
Ashley Awalt
More Blogs from this Author
Engineering
Selecting a Replacement Oscilloscope Probe is Easy—When You Know How
Art Pini
https://www.digikey.com/en/blog/what-is-the-difference-between-timing-jitter-and-phase-noise#:~:text=Phase noise and jitter both,are related to each o…
5/6
2/22/22, 1:41 PM
Signal Stability in Timing Jitter and Phase Noise| DigiKey
Engineering
Why Do Passive Oscilloscope Probes Have So Many Ground Connection Options?
Art Pini

1-800-344-4539
218-681-6674
United States

sales@digikey.com

Copyright © 1995-2022, Digi-Key Electronics.
218-681-3380

800-344-4539
All Rights Reserved.
Local Support: 701 Brooks Avenue South, Thief River Falls, MN 56701 USA
CA Privacy Rights: Do Not Sell My Personal Information
https://www.digikey.com/en/blog/what-is-the-difference-between-timing-jitter-and-phase-noise#:~:text=Phase noise and jitter both,are related to each o…
6/6