Digital System Design
Chapter 3: Gate-Level Minimization
Fall 2021
Peng-Hua Wang
Dept. of Communication Engineering
National Taipei University
Contents



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3.1 Introduction
3.2 The Map Method
3.3 Four-Variable K-Map
3.4 Product-of-Sums Simplification
3.5 Don’t-Care Conditions
3.6 NAND and NOR Implementation
3.7 Other Two-Level Implementations
3.8 Exclusive-OR Function
3.9 Hardware Description languages (HDLs)
3.10 Truth Tables in HDLs
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3.1 INTRODUCTION
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Introduction
 The truth table representation of a function
 Unique, but the function can be expressed in many
different algebraic forms.
 Complexity of the digital logic gates
 directly related to the complexity of the algebraic
expression of a function
 Gate-level minimization
 find an optimal gate-level implementation of the
Boolean functions.
 The map method
 a simple procedure for minimizing Boolean functions.
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3.2 THE MAP METHOD
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K-map
 Karnaugh map (K-map)
 由方格組成
 其實就是真値表的另一種呈現方式，但是可以幫助我們
合併minterm
 相鄰2, 4, 8, …個方格可以合併成一項
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原理
 每一格代表一個minterm
 𝐹 = 𝑥𝑦′
 相鄰2, 4, 8, …個方格可以
合併成一項
 𝐹 = 𝑥𝑦 ′ + 𝑥𝑦
= 𝑥(𝑦′ + 𝑦) = 𝑥
𝑦
𝑥
𝑥
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𝑦
0
1
0
0
0
1
1
0
𝑦
𝑥
𝑥
Gate-Level Minimization
𝑦
0
1
0
0
0
1
1
1
7
Two-variable K-map 原理
 𝐹 = 𝑥 ′ 𝑦 ′ + 𝑥𝑦 ′ + 𝑥𝑦
= 𝑥 ′ 𝑦 ′ + 𝑥𝑦 ′ + 𝑥𝑦 ′ + 𝑥𝑦
= 𝑦′ 𝑥 + 𝑥′ + 𝑥 𝑦′ + 𝑦
= 𝑦′ + 𝑥
𝑦
𝑥
𝑥
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𝑦
0
1
0
1
0
1
1
1
8
Two-variable K-map
 Figure 3.1
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Two-variable K-map
 Figure 3.2
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Three-variable K-Map
 Figure 3.3
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Example 3.1
 𝐹 𝑥, 𝑦, 𝑧 = ∑ 2,3,4,5
 Figure 3.4
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Example 3.2
 𝐹(𝑥, 𝑦, 𝑧) = ∑(3,4,6,7)
 Figure 3.5
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Example 3.3
 𝐹(𝑥, 𝑦, 𝑧) = ∑(0,2,4,5,6)
 Figure 3.6
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Example 3.4
 𝐹 𝑥, 𝑦, 𝑧 = 𝐴′ 𝐶 + 𝐴′ 𝐵 + 𝐴′ 𝐵𝐶 + 𝐵𝐶
 Figure 3.7
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3.3 FOUR-VARIABLE K-MAP
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Four-variable K-map
 Figure 3.8
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Example 3.5
 𝐹 𝑤, 𝑥, 𝑦, 𝑧 = ∑(0,1,2,4,5,6,8,9,12,13,14)
 Figure 3.9
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Example 3.6
 𝐹 = 𝐴′ 𝐵′ 𝐶 ′ + 𝐵′ 𝐶𝐷′ + 𝐴′ 𝐵𝐶𝐷′ + 𝐴𝐵′ 𝐶′
 Figure 3.10
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Prime Implicants
 𝐹(𝐴, 𝐵, 𝐶, 𝐷) = ∑(0,2,3,5,7,8,9,10,11,13,15)
𝐵𝐷
𝐵′𝐷′
𝐶
𝐶𝐷
CD
AB
00
𝐴
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00
01
1
11 10
1
01
1
1
11
1
1
1
1
10
1
𝐵′ 𝐶
1
𝐴𝐷
𝐴𝐵′
1
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Prime Implicants
 𝐹 𝐴, 𝐵, 𝐶, 𝐷 = ∑ 0,2,3,5,7,8,9,10,11,13,15
 𝐹 = 𝐵𝐷 + 𝐵′𝐷′ + 𝐶𝐷 + 𝐴𝐷
𝐵𝐷
𝐵′𝐷′
𝐶
𝐶𝐷
CD
AB
00
𝐴
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00
01
1
11 10
1
01
1
1
11
1
1
1
1
10
1
1
𝐴𝐷
1
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Prime Implicants
 𝐹(𝐴, 𝐵, 𝐶, 𝐷) = ∑(0,2,3,5,7,8,9,10,11,13,15)
 𝐹 = 𝐵𝐷 + 𝐵′𝐷′ + 𝐶𝐷 + 𝐴𝐵′
𝐵𝐷
𝐵′𝐷′
𝐶
𝐶𝐷
CD
AB
00
𝐴
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00
01
1
11 10
1
01
1
1
11
1
1
1
1
10
1
1
𝐴𝐵′
1
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Prime Implicants
 𝐹 𝐴, 𝐵, 𝐶, 𝐷 = ∑ 0,2,3,5,7,8,9,10,11,13,15
 𝐹 = 𝐵𝐷 + 𝐵′𝐷′ + 𝐵′ 𝐶 + 𝐴𝐷
CD
AB
00
𝐴
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𝐶
𝐵𝐷
𝐵′𝐷′
00
01
1
11 10
1
01
1
1
11
1
1
1
1
10
1
𝐵′ 𝐶
1
𝐴𝐷
1
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Prime Implicants
 𝐹(𝐴, 𝐵, 𝐶, 𝐷) = ∑(0,2,3,5,7,8,9,10,11,13,15)
 𝐹 = 𝐵𝐷 + 𝐵′𝐷′ + 𝐵′ 𝐶 + 𝐴𝐵′
𝐵′𝐷′
CD
AB
00
𝐴
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𝐶
𝐵𝐷
00
01
1
11 10
1
01
1
1
11
1
1
1
1
10
1
𝐵′ 𝐶
1
𝐴𝐵′
1
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Prime Implicants
 𝐹(𝐴, 𝐵, 𝐶, 𝐷) = ∑(0,2,3,5,7,8,9,10,11,13,15)
𝐵𝐷
𝐵′𝐷′

𝐶
𝐶𝐷
CD
AB
00
𝐴
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00
01
1
11 10
1
01
1
1
11
1
1
1
1
10
1
𝐵′ 𝐶

1
𝐴𝐷
𝐴𝐵′

𝐵𝐷, 𝐵′𝐷′, 𝐶𝐷,
𝐵′𝐶, 𝐴𝐷, 𝐴𝐵′稱
為prime
implicants
化簡𝐹時，𝐵𝐷和
𝐵′𝐷′一定存在，
稱為essential
prime implicants
除了essential
implicants, 其餘
prime implicants
可互相替換
1
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Prime Implicants
 𝐹 經化簡之後，有以下四種結果
 𝐹 = 𝐵𝐷 + 𝐵′𝐷′ + 𝐶𝐷 + 𝐴𝐷
 𝐹 = 𝐵𝐷 + 𝐵′𝐷′ + 𝐶𝐷 + 𝐴𝐵′
 𝐹 = 𝐵𝐷 + 𝐵′𝐷′ + 𝐵′ 𝐶 + 𝐴𝐷
 𝐹 = 𝐵𝐷 + 𝐵′𝐷′ + 𝐵′ 𝐶 + 𝐴𝐵′
 這四種可能出現了𝐵𝐷, 𝐵′𝐷′, 𝐶𝐷, 𝐵′𝐶, 𝐴𝐷, 𝐴𝐵′，稱為prime
implicants
 在𝐹的每一種化簡結果中，𝐵𝐷和𝐵′𝐷′都會出現，稱為
essential prime implicants
 除了essential implicants, 其餘prime implicants 可互相替換
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3.4 PRODUCT-OF-SUMS
SIMPLIFICATION
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Example 3.7
 𝐹 𝐴, 𝐵, 𝐶, 𝐷 = ∑ 0,1,2,5,8,9,10 , sum of products
 𝐹 𝐴, 𝐵, 𝐶, 𝐷 = 𝐵′ 𝐷′ + 𝐵′ 𝐶′ + 𝐴′𝐶 ′ 𝐷
𝐶
CD
AB
00
00
01
1
1
01
11 10
1
1
11
𝐴
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10
1
1
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1
28
Example 3.7
 𝐹 𝐴, 𝐵, 𝐶, 𝐷 = ∑ 0,1,2,5,8,9,10 , product of sums
 𝐹 ′ 𝐴, 𝐵, 𝐶, 𝐷 = 𝐶𝐷 + 𝐴𝐵 + 𝐵𝐷′
⇒ 𝐹(𝐴, 𝐵, 𝐶, 𝐷) = (𝐶′ + 𝐷′)(𝐴′ + 𝐵′)(𝐵′ + 𝐷)
00
01
11 10
00
1
1
0
1
01
0
1
0
0
11
0
0
0
0
10
1
1
0
1
CD
AB
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Example 3.7
 Figure 3.13
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Example
 Table 3.1
yz
00
01
11
10
0
0
1
1
0
1
1
0
0
1
x
 𝐹 𝑥, 𝑦, 𝑧 = 𝑥 ′ 𝑧 + 𝑥𝑧 ′
 𝐹 ′ 𝑥, 𝑦, 𝑧 = 𝑥 ′ 𝑧 ′ + 𝑥𝑧
⇒ 𝐹(𝑥, 𝑦, 𝑧) = (𝑥 + 𝑧)(𝑥’ + 𝑧’)
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3.5 DON’T-CARE CONDITIONS
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Example 3.8 (Sum of Product)
 Simplify the Boolean function 𝐹(𝑤, 𝑥, 𝑦, 𝑧) =
∑(1,3,7,11,15) with the don’t-care conditions 𝑑(𝑤, 𝑥, 𝑦, 𝑧) =
∑(0,2,5)
yz
yz
00
01
11 10
x
1
1
x
1
01
11
1
11
1
10
1
10
1
wx
00
01
x
wx
00
01
11 10
x
1
1
x
1
x
𝐹 = 𝑤 ′ 𝑧 + 𝑦𝑧
𝐹 = 𝑤 ′ 𝑥′ + 𝑦𝑧
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Example 3.8 (Product of Sum)
 Simplify the Boolean function 𝐹(𝑤, 𝑥, 𝑦, 𝑧) =
∑(1,3,7,11,15) which has the don’t-care conditions
𝑑(𝑤, 𝑥, 𝑦, 𝑧) = ∑(0,2,5)
yz
00
01
11 10
00
x
1
1
x
01
0
x
1
0
11
0
0
1
0
10
0
0
1
0
wx
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𝐹 ′ = 𝑧 ′ + 𝑤𝑦 ′
𝐹 = 𝑧(𝑤′ + 𝑦)
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3.6 NAND AND NOR
IMPLEMENTATION
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NAND and NOR
 “Digital circuits are frequently constructed with NAND or
NOR gates rather than with AND and OR gates.”
 “NAND and NOR gates are easier to fabricate and are the
basic gates used in IC digital logic families.”
 “The NAND and NOR gates are said to be a universal
gates because any logic circuit can be implemented with
it.”
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NAND is Universal




𝑥′ = 𝑥𝑥 ′ = 𝑥NAND𝑥
𝑥𝑦 = 𝑥𝑦 ′ ′ = 𝑥NAND𝑦 NAND 𝑥NAND𝑦
𝑥 + 𝑦 = 𝑥 ′ 𝑦 ′ ′ = 𝑥NAND𝑥 NAND(𝑦NAND𝑦)
Figure 3.16
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Three-input NANDs
 Figure 3.17
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Two-Level Implementation by NAND
 The implementation of Boolean functions with NAND gates
requires that functions be in sum-of-products form.
 Eg. 𝐹 = 𝐴𝐵 + 𝐶𝐷 = ((𝐴𝐵)′(𝐶𝐷)′)′
 Figure 3.18
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Example 3.9
 Implement 𝐹(𝑥, 𝑦, 𝑧) = ∑(1,2,3,4,5,7) with NAND.
 𝐹 = 𝑧 + 𝑥𝑦′ + 𝑥′𝑦 = (𝑧 ′ 𝑥𝑦 ′ ′ (𝑥 ′ 𝑦)′)′
yz
x
00
0
1
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1
01
11 10
1
1
1
1
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1
40
Figure 3.19
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Example
 Implement 𝐹 = 𝐴(𝐶𝐷 + 𝐵) + 𝐵𝐶′ with NANDs.
 Figure 3.20
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Example
 Implement 𝐹 = (𝐴𝐵′ + 𝐴′ 𝐵)(𝐶 + 𝐷′) with NANDs.
 Figure 3.21
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NOR is Universal




𝑥′ = 𝑥 + 𝑥 ′ = 𝑥NOR𝑥
𝑥𝑦 = 𝑥 ′ + 𝑦 ′ ′ = 𝑥NOR𝑥 NOR(𝑦NOR𝑦)
𝑥 + 𝑦 = 𝑥 + 𝑦 ′ ′ = 𝑥NOR𝑦 NOR(𝑥NOR𝑦)
Figure 3.22
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Three-Input NOR
 Figure 3.23
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Implementation by NOR
 The implementation of Boolean functions with NOR gates
requires that functions be in product-of-sums form.
 Eg. 𝐹 = (𝐴 + 𝐵)(𝐶 + 𝐷)𝐸 =
𝐴 + 𝐵 ′ + 𝐶 + 𝐷 ′ + 𝐸′ ′
 Figure 3.24
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Example
 𝐹 = 𝐴𝐵′ + 𝐴′𝐵 𝐶 + 𝐷′
=
=
′
′
′
𝐴𝐵 + 𝐴 𝐵 + 𝐶 + 𝐷
𝐴′ + 𝐵 ′ + 𝐴 +
′ ′ ′
′
′
′
𝐵
+ 𝐶 + 𝐷′
′
′
 Figure 3.25
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3.7 OTHER TWO-LEVEL
IMPLEMENTATIONS
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Two-Level Implementation
 使用4種邏輯閘(AND, OR, NAND, NOR)於二級(Two-Level)
的布林函數
 每一級可以用4種邏輯閘之一，二級共有16種實現法
 粗體為nondegenerate form
AND
OR
NAND
NOR
AND
AND-AND
AND-OR
AND-NAND
AND-NOR
OR
OR-AND
OR-OR
OR-NAND
OR-NOR
NAND
NAND-AND
NAND-OR
NAND-NAND
NAND-NOR
NOR
NOR-AND
NOR-OR
NOR-NAND
NOR-NOR
第二級
第一級
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Degenerate Forms
 Degenerate forms: 看似兩級，實為一級的實現
 AND-AND: (𝐴𝐵)(𝐶𝐷) = 𝐴𝐵𝐶𝐷
 OR-OR: (𝐴 + 𝐵) + (𝐶 + 𝐷) = 𝐴 + 𝐵 + 𝐶 + 𝐷
 AND-NAND: ((𝐴𝐵)(𝐶𝐷))′ = 𝐴′ + 𝐵′ + 𝐶′ + 𝐷′
 OR-NOR: ((𝐴 + 𝐵) + (𝐶 + 𝐷))′ = 𝐴′𝐵′𝐶′𝐷′
 NAND-OR: 𝐴𝐵 ′ + 𝐶𝐷 ′ = 𝐴′ + 𝐵′ + 𝐶′ + 𝐷′
 NAND-NOR:
((𝐴𝐵)′ + (𝐶𝐷)′)′ = (𝐴′ + 𝐵′ + 𝐶′ + 𝐷′)′ = 𝐴𝐵𝐶𝐷
 NOR-AND: (𝐴 + 𝐵)′(𝐶 + 𝐷)′ = 𝐴′𝐵′𝐶′𝐷′
 NOR-NAND: ((𝐴 + 𝐵)′(𝐶 + 𝐷)′)′ = 𝐴 + 𝐵 + 𝐶 + 𝐷
 Nondegenerate forms: 真實的兩級
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AND-OR-INVERT




NAND-AND and AND-NOR are equivalent
Need sum-of-product
Eg. 𝐹 = (𝐴𝐵 + 𝐶𝐷 + 𝐸)′
Figure 3.27
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OR-AND-INVERT




OR-AND and NOR-OR are equivalent
Need product-of-sum
Eg. 𝐹 = [(𝐴 + 𝐵)(𝐶 + 𝐷)𝐸]′
Figure 3.28
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Example 3.10
 Implement the following function with the 8 2-level forms
 𝐹 = 𝑥′𝑦′𝑧′ + 𝑥𝑦𝑧′
 𝐹′ = 𝑥𝑦′ + 𝑥′𝑦 + 𝑧
yz
00
01
11 10
0
1
0
0
0
1
0
0
0
1
x
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Example 3.10
 AND-OR: 𝐹 = 𝑥′𝑦′𝑧′ + 𝑥𝑦𝑧′
 NAND-NAND: 𝐹 = 𝑥′𝑦′𝑧′ + 𝑥𝑦𝑧 ′ =
𝑥 ′𝑦′𝑧′
′
𝑥𝑦𝑧 ′
′
′
 NOR-OR: 𝐹 = 𝑥′𝑦′𝑧′ + 𝑥𝑦𝑧 ′ = 𝑥 + 𝑦 + 𝑧 ′ + (𝑥 ′ + 𝑦 ′ + 𝑧)′
 OR-NAND: 𝐹 = 𝑥′𝑦′𝑧′ + 𝑥𝑦𝑧 ′ =
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𝑥 + 𝑦 + 𝑧 𝑥′ + 𝑦′ + 𝑧 ′
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54
Example 3.10
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Example 3.10
 OR-AND: 𝐹′ = 𝑥𝑦′ + 𝑥′𝑦 + 𝑧, 𝐹 = 𝑥 ′ + 𝑦 𝑥 + 𝑦 ′ 𝑧′
 NOR-NOR:
𝐹 = 𝑥′ + 𝑦 𝑥 + 𝑦′ 𝑧′ = 𝑥′ + 𝑦 ′ + 𝑥 + 𝑦′ ′ + 𝑧 ′
 NAND-AND: 𝐹 = 𝑥 ′ + 𝑦 𝑥 + 𝑦 ′ 𝑧 ′ = 𝑥𝑦 ′ ′ 𝑥 ′ 𝑦 ′ 𝑧′
 AND-NOR: 𝐹 = 𝑥 ′ + 𝑦 𝑥 + 𝑦 ′ 𝑧 ′ = (𝑥𝑦′ + 𝑥 ′ 𝑦 + 𝑧)′
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Example 3.10
 AND-NOR:
 𝐹 = 𝑥′ + 𝑦 𝑥 + 𝑦′ 𝑧′
= (𝑥𝑦′ + 𝑥 ′ 𝑦 + 𝑧)′
 NAND-AND:
 𝐹 = 𝑥′ + 𝑦 𝑥 + 𝑦′ 𝑧′
= 𝑥𝑦 ′ ′ 𝑥 ′ 𝑦 ′ 𝑧′
 Figure 3.29(b)
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Example 3.10
 OR-NAND:

𝐹 = 𝑥′𝑦′𝑧′ + 𝑥𝑦𝑧 ′
= 𝑥 + 𝑦 + 𝑧 𝑥′ + 𝑦′ + 𝑧 ′
 NOR-OR:

𝐹 = 𝑥′𝑦′𝑧′ + 𝑥𝑦𝑧 ′
= 𝑥 + 𝑦 + 𝑧 ′ + (𝑥 ′ + 𝑦 ′ + 𝑧)′
 Figure 3.29(c)
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3.8 EXCLUSIVE-OR FUNCTION
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Exclusive-OR
 Exclusive-OR (XOR): 𝐴 ⊕ 𝐵 = 𝐴𝐵′ + 𝐴′𝐵
 𝐴⊕𝐵 =𝐵⊕𝐴
 𝐴⊕𝐵 ⊕𝐶 =𝐴⊕ 𝐵⊕𝐶 =𝐴⊕𝐵⊕𝐶
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A
B
A⊕B
0
0
0
0
1
1
1
0
1
1
1
0
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XOR
 XOR by AND-OR-NOT
 XOR by NAND
 Figure 3.30
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Odd Function
 𝐴 ⊕ 𝐵 = 1 ⇒ There are 1 “1” in 𝐴 and 𝐵.
 𝐴 ⊕ 𝐵 ⊕ 𝐶 = 1 ⇒ There are 1 or 3 “1” in 𝐴, 𝐵 and 𝐶.
 𝐴 ⊕ 𝐵 ⊕ 𝐶 ⊕ 𝐷 = 1 ⇒ There are 1 or 3 “1” in 𝐴, 𝐵, 𝐶 and
𝐷.
 If there are an odd number of variables being equal to 1,
their XOR is 1.
 Multiple-variable XOR is defined as an odd function.
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Odd function of 3 variables
 Figure 3.31
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XOR Symbol
 Figure 3.32
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Odd Function of 4 Variables
 Figure 3.33
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Parity Generation
 資料和parity bit 總共有偶數個1
 資料有奇數個1, parity bit=1
 資料有偶數個1, parity bit=0
 資料作XOR
 Table 3.3
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Parity Check
 資料和parity bit 總共有偶數個1
 資料和parity bit一起作XOR
 結果為0⇒資料和parity bit 總共有偶數個1⇒資料可能無
誤
 結果為1⇒資料和parity bit 總共有奇數個1⇒資料必有誤
(但不知錯在哪裡)
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Parity Generation and Check
 Figure 3.34
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Parity Generation and Check
 Table 3.4
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THE END
The slides are supporting materials for the course “Digital System Design” in
NTPU. Distribution without permission is prohibited.
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