A
B
C
D
E
COMPAL CONFIDENTIAL
1
MODEL NAME : NAL60
PCB NO : LA-5691P ( DAA00001K00 )
BOM P/N : 43178731L01/43178731L02
1
M10 Lafite
BGA Arrandale (34 x 28 mm) +
SFF IBEXPEAK-M
2
2
2009-07-07
REV : 0.1(X00)
@ : Nopop Component
3
MB Type
BOM P/N
CPU
With BLT
1@
SV 2.4G
*
*
BLT EN,TPM EN
43178731L01
BLT EN,TPM EN
43178731L02
SV 2.0G
BLT DIS,TCM EN
43178731L03
LV 1.8G
Non BLT
2@
TCM
W(3@)
W(5@)
*
*
*
*
*
*
3
TPM
W/O(4@)
BOM CONFIG
W/O(6@)
1@,4@,5@
*
1@,3@,6@
2@,4@,5@
4
4
MB PCB
Part Number
DELL CONFIDENTIAL/PROPRIETARY
Description
DAA00001K00
PCB 0AW LA-5691P REV0 M/B
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Title
Cover Sheet
Size
B
C
D
Rev
0.1
LA-5691P
Date:
A
Document Number
Monday, July 13, 2009
Sheet
E
1
of
51
A
B
C
D
Clock Generator
SLG8SP585VTR
Block Diagram
Compal confidential
Model : NAL60
+3.3V_RUN
+1.05V_RUN
+1.8V_RUN
eDP LANE SW
PI3VEDP212ZLEX
eDP CONN
+LCDVDD
+3.3V_RUN
+BL_PWR_SRC
+CAMERA_VDD page 24
1
+1.5V_MEM
eDP
+1.05V_RUN_VTT
+3.3V_RUN_BKT_PWR
page 24
+VCCTTG
+VCC_GFXCORE
Arrandale
SFF
BGA CPU
On IO/B
2
DP B/C
+1.05V_M
+3.3V_RUN
+1.5V_RUN
+1.05V_RUN
Video Switch
PI3V712-AZLEX
+3.3V_RUN
Mini Card 1
WWAN
VGA
+1.8V_RUN
USB[6]
SD/MMC
CONN
page 28
PCIE2
Mini Card3
PCIE/BKT Card
USB[10]
Mini Card2
WLAN
+3.3V_PCIE_SATA
+1.5V_RUN page 35
+3.3V_LAN
+1.0V_LAN page 31
+3.3V_WLAN
+1.5V_RUN page 35
LPC BUS
Option
TPM1.2
For China
EXPRESS
Card
+3.3V_M
page 32
Smart Card
TDA8034HN
page 32
+3.3V_RUN
+2.5V_RUN
+1.2V_RUN
+3.3V_RUN page 32
E-Module
+5V_MOD
page 29
+3.3V_ALW
page 38
64M 4K sector
For iAMT
Fingerprint
CONN
+3.3V_TP_PWR
+5V_TP_PWR page 36
4
0.75V/1.8V
page 48
1.05VM
page 46
Int.KBD &
Stick
BC BUS
ECE1077
BC BUS
+3.3V_ALW
FP_USB
3.3V/5V
page 44
page 49
CHARGER
1.5V
page 50
page 45
BC BUS
+RTC_CELL
+3.3V_RUN_BKT_PWR
page 28
WWAN_SW_USB
BKT_USBBIO
TS3USB30ERSWR
+3.3V_RUN_BKT_PWR
page 27
GPIO
ECE1088
3
TS3USB31RSER
USB[5]
+3.3V_ALW page 28
+3.3V_ALW page 39
BKT_DP
4
BKT_I2S
BKT RSB CONN SDIO
+3.3V_BKT_PWR
Power Selector
page 51
DC IN & BATT IN
page 43
page 26
Power On/Off
SW & LED page
BKT CONN
+3.3V_BKT_PWR
page 27
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
LAFITE SV Block Diagram
Size
42
B
Document Number
Rev
0.1
LA-5691P
Date:
A
page 30
BKT_WWAN_USB
SMSC KBC
MEC5045
page 47
VCORE (IMVP-6)
Trough eDP Cable
USB[12]
FP_SW_USB
page 41
1.05VTT
page 30
DAI
BKT_I2S
+3.3V_RUN_BKT_PWR
page 27
page 40
+5V_RUN
+VREFOUT
INT.Speaker
page 24
TS3USB30ERSWR
SMBUS
HeadPhone &
MIC Jack
+3.3V_RUN
+3.3V_RUN
page 32
Touch Pad
+5V_ALW
Dig. MIC
+5V_HDD
+3.3V_HDD
page 29
page 15
DC/DC Interface
Stick
2
USB Ports
DAI
TLV320AIC3004IRHBR
FP_USB
SMSC SIO
ECE5028
SATA0
S-HDD
W25Q64BVSSIG
+3.3V_M
USB[2]
Azalia Codec
92HD81B1A5
SATA1
page 15
32M 4K sector
USH TPM1.2
SSX35BCB
BCM5882
E-SATA
page 31
+3.3V_RUN
+5V_RUN
page 30
SATA 0/1 (3Gb/S)
+1.5V_CARD
+3.3V_CARD page 34
RFID
+3.3V_LAN
HD Audio I/F
SPI
W25X32VSSIG
page 33
USB[7]
3
LAN SWITCH
PI3L720ZHEX
PCIE BUS
PCIE4
USB[4]
Intel Hanksville
82577LM
PCIE6
PCIE3
On AUDIO/B
SATA4
page 15-22
+3.3V_RUN page 34
PCIE1
USB [13]
page 40
DOCK LAN
LAN
Card Reader
R5U232
+3.3V_RUN
page 34
page 23
BlueTooth CONN
+1.05V_RUN_VTT
SIM CARD
+FAN1_VOUT
page 24
+3.3V_RUN
IBEXPEAK-M SFF
1045pin BGA
page 23
FAN
Camera
+3.3V_RUN
+3.3V_ALW_PCH
PCIE5
Trough eDP Cable
+3.3V_RUN
page 25
WWAN_SW_USB
+SIM_PWR
+3.3V_M
PCH
page 37
VGA
CRT CONN
1
page 15
EMC4022
FDI
Lane x 8
USB[11]
DOCKING PORT
+5V_RUN
+3.3V_ALW_PCH
page 7-12
INTEL
VGA
PCH XDP Port
+1.5V_MEM
+V_DDR_REF
Thermal
+5V_ALW
RJ45
page 13,14
+1.5V_MEM 800Mhz/1066MHz
DMI
Lane x 4
USB[0]
LAN
+1.05V_RUN_VTT page 8
BANK 0, 1, 2, 3, 4 ,5 ,6 ,7 ,8
BKT_DP
DOCK LAN
USB[8,9]
SATA5
DAI
page6
CPU XDP Port
DDRIII-DIMM X2
Memory BUS(DDR3)
1288pins
USB Ports
E
C
D
Monday, July 13, 2009
Sheet
E
2
of
51
5
4
3
2
POWER STATES
USB PORT#
Signal
SLP
S3#
SLP
S4#
SLP
S5#
S4
STATE#
SLP
M#
S0 (Full ON) / M0
HIGH
HIGH
HIGH
HIGH
HIGH
S3 (Suspend to RAM) / M1
LOW
HIGH
HIGH
HIGH
S4 (Suspend to DISK) / M1
LOW
LOW
HIGH
S5 (SOFT OFF) / M1
LOW
LOW
S3 (Suspend to RAM) / M-OFF
LOW
S4 (Suspend to DISK) / M-OFF
S5 (SOFT OFF) / M-OFF
State
D
C
1
ALWAYS
PLANE
M
PLANE
SUS
PLANE
RUN
PLANE
ON
ON
ON
ON
HIGH
ON
ON
ON
LOW
HIGH
ON
ON
LOW
LOW
HIGH
ON
HIGH
HIGH
HIGH
LOW
LOW
LOW
HIGH
LOW
LOW
LOW
LOW
LOW
CLOCKS
0
USB Port (Ext Right Side)
ON
1
NA
OFF
ON
2
USB Port (Ext Left Side )
OFF
OFF
ON
3
NA
ON
OFF
OFF
ON
4
WLAN
ON
OFF
ON
OFF
OFF
5
WWAN
LOW
ON
OFF
OFF
OFF
OFF
6
Bloetooth
LOW
ON
OFF
OFF
OFF
OFF
7
USB->BIO
8
DOCKING
9
DOCKING
10
Express Card
11
Camera
12
BKT
13
WPAN/NVMHCI
PCH
PM TABLE
power
plane
DESTINATION
+15V_ALW
+3.3V_SUS
+5V_RUN
+3.3V_M
+5V_ALW
+1.5V_MEM
+3.3V_RUN
+1.05V_M +1.05V_M
+3.3V_ALW_PCH
+1.5V_RUN
+3.3V_RTC_LDO
+0.75V_DDR_VTT
+3.3V_M
(M-OFF)
+VCC_CORE
+1.05V_RUN_VTT
+1.05V_RUN
D
C
State
B
S0
ON
ON
ON
ON
ON
S3
ON
ON
OFF
ON
OFF
Lane 1
MINI CARD-1 WWAN
S5 S4/AC
ON
OFF
OFF
ON
OFF
Lane 2
MINI CARD-2 WLAN
S5 S4/AC don't exist
OFF
OFF
OFF
OFF
OFF
Lane 3
Card Reader
Lane 4
EXPRESS CARD
Lane 5
MINI CARD-3 WPAN/NVMHCI
Lane 6
10/100/1G LAN
Lane 7
None
Lane 8
None
PCI EXPRESS
DESTINATION
B
A
A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Title
Index and Config.
Size
4
3
2
Rev
0.1
LA-5691P
Date:
5
Document Number
Monday, July 13, 2009
Sheet
1
3
of
51
EN_INVPWR
3
FDC654P
Q17
2
1
MODC_EN
4
HDDC_EN
5
+BL_PWR_SRC
ADAPTER
D
GFX_VR_ON
ISL62881
(PU13)
+VCC_GFXCORE
SI3456BDV
(Q32)
SI3456BDV
(Q29)
+5V_HDD
+5V_MOD
D
+PWR_SRC
BATTERY
ALWON
+15V_ALW
SN060898
(PU2)
CHARGER
+5V_ALW
RUN_ON
C
C
FDS8878
(Q55)
SIS406DN
(Q151)
AUX_ON
SI3456
(Q2)
M_ON
RUN_ON
PCH_ALW
SUS_ON
SI3456
(Q60)
SI4160DY
(Q61)
SI3456BDV
(Q66)
Pop option
B
+3.3V_WLAN
+1.8V_RUN +1.05V_RUN_VTT
SI3456BDV
(Q54)
M_ON
SI3456BDV
(Q47)
+5V_RUN
+3.3V_ALW_PCH
+3.3V_SUS
+3.3V_LAN
+1.05V_M
+3.3V_RUN
+3.3V_M
REGCTL_PNP10
+0.75V_DDR_VTT
CPU_VTT_ON
0.75V_DDR_VTT_ON
+1.5V_MEM
NCP5222
(PU6)
RUN_ON
+VCC_CORE
MAX15050
(PU4)
Pop option
RUN_ON
RT9026
(PU5)
RUN_ON
VT356
(PU3)
DDR_ON
B
ADP3210
(PU10)
IMVP_VR_ON
AUX_EN_WOWL
+3.3V_ALW
+3.3V_M
DCP69
(Q45)
SI4160DY
(Q183)
Pop option
+1.05V_M
A
A
+1.0V_LAN
+1.5V_RUN
+1.05V_RUN
Pop option
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Power Rail
Size
Document Number
Date:
Monday, July 13, 2009
Rev
0.1
LA-5691P
Sheet
1
4
of
51
5
4
3
2
2.2K
L11
MEM_SMBCLK
MEM_SMBDATA
PCH
200
+3.3V_LAN
B8
LAN_SMBCLK
28
DIMMB
SMBUS Address [TBD]
XDP1
SMBUS Address [TBD]
J9
LAN_SMBDATA
31
53
D
51
SMBUS Address [C8]
LOM
B12
53
SML1_SMBDATA
SML1_SMBCLK
3A
SMBUS Address [TBD]
202
2.2K
A5
DIMMA
2.2K
D
A17
200
+3.3V_ALW_PCH
2.2K
A11
1
202
4.7K
+3.3V_ALW_PCH 2.2K
+3.3V_ALW
2.2K
B4
DOCK_SMB_CLK
A3
DOCK_SMB_DAT
1A
2.2K
SMBUS Address [TBD]
+3.3V_RUN
2.2K
4.7K
B6
3A
XDP2
51
0 ohm
HDD_SMBCLK
14
0 ohm
HDD_SMBDATA
13
G Sensor
SMBUS Address [TBD]
127
129
2N7002(@)
DOCKING
1A
SMBUS Address [TBD]
2.2K
+3.3V_ALW
2.2K
B5
LCD_SMBCLK
17
A4
LCD_SMDATA
16
1B
C
1B
2N7002(@)
LCD
(JeDP1)
SMBUS Address [TBD]
BATTERY
CONN
SMBUS Address [TBD]
C
2.2K
+3.3V_ALW
2.2K
1C
1C
KBC
A56
B59
PBAT_SMBCLK
PBAT_SMBDAT
100 ohm
6
100 ohm
5
2.2K
0 ohm
21
0 ohm
23
SMBUS Address [TBD]
Black Top
+3.3V_ALW
2.2K
1E
A50
USH_SMBCLK
M9
1E
B53
USH_SMBDAT
L9
USH
SMBUS Address [TBD]
2.2K
2.2K
+3.3V_SUS
2.2K
B
2B
A49
CARD_SMBCLK
2B
B52
CARD_SMBDAT
MEC 5045
2.2K
2N7002
+3.3V_WLAN
B
WLAN_SMBCLK
30
WLAN_SMBDATA
32
WLAN
SMBUS Address [TBD]
2N7002
2.2K
2.2K
+3.3V_ALW
B50
CHARGER_SMBCLK
16
A47
CHARGER_SMBDAT
15
1G
1G
9
8
Charger
Express card
SMBUS Address [TBD]
SMBUS Address [TBD]
2.2K
2.2K
0 ohm(@)
0 ohm(@)
CKG_FFS_SMBCLK
32
B7
CKG_FFS_SMBDAT
31
2D
2D
+3.3V_RUN
A7
CLK GEN
SMBUS Address [TBD]
2.2K
2.2K
A
2A
2A
+3.3V_RUN
A
B49 DAI_GPU_R3P_SMBCLK
8
B48 DAI_GPU_R3P_SMBDAT
9
A/D,D/A
converter
SMBUS Address [TBD]
Compal Electronics, Inc.
18
19
Title
3-Fan
Controller
SMBUS TOPOLOGY
SMBUS Address [TBD]
Size
4
3
Rev
0.1
LA-5691P
Date:
5
Document Number
2
Monday, July 13, 2009
Sheet
1
5
of
51
5
4
3
2
1
+CLK_VDD_IO CAN BE RANGE FROM 1.05V TO 3V
+CK_VDD_MAIN
+3.3V_RUN
+3.3V_RUN
+CLK_VDD_IO
H_STP_CPU#
L89
D
1
2
10K_0402_5%~D
R92
+1.05V_RUN
2
1
2
1
2
C9
0.1U_0402_16V4Z~D
1
C10
0.1U_0402_16V4Z~D
2
C7
0.1U_0402_16V4Z~D
2
1
C6
2
1
0.1U_0402_16V4Z~D
2
1
C5
0.1U_0402_16V4Z~D
2
1
C4
0.1U_0402_16V4Z~D
1
C3
0.1U_0402_16V4Z~D
2
C2
10U_0805_10V4Z~D
1
2
L2
BLM18AG601SN1D_0603~D
D
1
C8
10U_0805_10V4Z~D
1
2
BLM18AG601SN1D_0603~D
CLKREF
1
@C1707
@
C1707
10P_0402_50V8J~D
2
EMI
+CK_VDD_MAIN
+CLK_VDD_IO
U1
1
5
C
15
18
17
24
29
VDD_DOT
VDD_27
CPU_0
CPU_0#
VDDSRC_IO
VDDCPU_IO
CPU_1
VDDSRC_3.3
VDDCPU_3.3
VDDREF_3.3
CPU_1#
SRC_1/SATA
SRC_1/SATA#
38 CKG_FFS_SMBDAT
CKG_FFS_SMBDAT 31
38 CKG_FFS_SMBCLK
CKG_FFS_SMBCLK 32
H_STP_CPU#
16
SDA
SRC_2
SCL
SRC_2#
DOT_96
CPU_STOP#
DOT_96#
23
22
C
20
CLK_BUF_BCLK
19
CLK_BUF_BCLK#
10
CLK_BUF_CKSSCD
CLK_BUF_CKSSCD 16
11
CLK_BUF_CKSSCD#
CLK_BUF_CKSSCD# 16
13
CLK_BUF_EXP
CLK_BUF_EXP 16
14
CLK_BUF_EXP#
CLK_BUF_EXP# 16
3
CLK_BUF_DOT96
4
CLK_BUF_DOT96#
CLK_BUF_BCLK 16
CLK_BUF_BCLK# 16
CLK_BUF_DOT96 16
CLK_BUF_DOT96# 16
+3.3V_RUN
27MHz
R17
2 0_0402_5%~D
1
CLK_XTAL_IN
28
CLK_XTAL_OUT
27
XTAL_IN
CLK_PCH_14M
R33
1
CLKREF
2
33_0402_5%~D
30
R369
100_0402_5%~D
1
2
XTAL_OUT
B
16 CLK_PCH_14M
R132
1K_0402_5%~D
7
2
C17
27P_0402_50V8J~D
2
1
2
1
27MHz_SS
6
1
CKPWRGD/PD#
VSS_DOT
VSS_27
VSS_SATA
VSS_SRC
VSS_CPU
VSS_REF
EP
REF_0/CPU_SEL
2
8
9
12
21
26
33
47
1
25
D
3
CLK_PWRGD
X1
14.318MHZ_16PF_7A14300083~D
2
1
C16
27P_0402_50V8J~D
S
B
Q136
SSM3K7002FU_SC70-3~D
2
G
CLK_EN#
CLK_PWRGD
SLG8SP585VTR_QFN32_5X5~D
+3.3V_RUN
+1.05V_RUN
@ U23
NC7SZ04P5X_NL_SC70-5~D
1
P
CPU1
1(0.7~1.5v)
100MHz
100MHz
0 (DEFULT)
133MHz
133MHz
2
A
Y
@ R372
0_0402_5%~D
1
2
4
2
R23
10K_0402_5%~D
CPU0
G
PIN 30
3
2
REF_O/CPU_SEL
CLKREF
NC
2
1
@ C1392
0.1U_0402_16V4Z~D
5
1
1
@ R41
4.7K_0402_5%~D
A
A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Title
Clock Generator
Size
4
3
2
Rev
0.1
LA-5691P
Date:
5
Document Number
Monday, July 13, 2009
Sheet
1
6
of
51
5
4
3
2
1
U2I
U2A
REV1.0
DMI_CRX_PTX_N0
DMI_CRX_PTX_N1
DMI_CRX_PTX_N2
DMI_CRX_PTX_N3
DMI_CRX_PTX_N0
DMI_CRX_PTX_N1
DMI_CRX_PTX_N2
DMI_CRX_PTX_N3
F7
J8
K8
J4
DMI_RX#[0]
DMI_RX#[1]
DMI_RX#[2]
DMI_RX#[3]
DMI_CRX_PTX_P0
DMI_CRX_PTX_P1
DMI_CRX_PTX_P2
DMI_CRX_PTX_P3
F9
J6
K9
J2
DMI_RX[0]
DMI_RX[1]
DMI_RX[2]
DMI_RX[3]
DMI_CRX_PTX_P0
DMI_CRX_PTX_P1
DMI_CRX_PTX_P2
DMI_CRX_PTX_P3
17
17
17
17
DMI_CTX_PRX_N0
DMI_CTX_PRX_N1
DMI_CTX_PRX_N2
DMI_CTX_PRX_N3
DMI_CTX_PRX_N0
DMI_CTX_PRX_N1
DMI_CTX_PRX_N2
DMI_CTX_PRX_N3
H17
K15
J13
F10
DMI_TX#[0]
DMI_TX#[1]
DMI_TX#[2]
DMI_TX#[3]
17
17
17
17
DMI_CTX_PRX_P0
DMI_CTX_PRX_P1
DMI_CTX_PRX_P2
DMI_CTX_PRX_P3
DMI_CTX_PRX_P0
DMI_CTX_PRX_P1
DMI_CTX_PRX_P2
DMI_CTX_PRX_P3
G17
M15
G13
J11
DMI_TX[0]
DMI_TX[1]
DMI_TX[2]
DMI_TX[3]
17
17
17
17
17
17
17
17
FDI_CTX_PRX_N0
FDI_CTX_PRX_N1
FDI_CTX_PRX_N2
FDI_CTX_PRX_N3
FDI_CTX_PRX_N4
FDI_CTX_PRX_N5
FDI_CTX_PRX_N6
FDI_CTX_PRX_N7
FDI_CTX_PRX_N0
FDI_CTX_PRX_N1
FDI_CTX_PRX_N2
FDI_CTX_PRX_N3
FDI_CTX_PRX_N4
FDI_CTX_PRX_N5
FDI_CTX_PRX_N6
FDI_CTX_PRX_N7
L2
N7
M4
P1
N10
R7
U7
W8
17
17
17
17
17
17
17
17
FDI_CTX_PRX_P0
FDI_CTX_PRX_P1
FDI_CTX_PRX_P2
FDI_CTX_PRX_P3
FDI_CTX_PRX_P4
FDI_CTX_PRX_P5
FDI_CTX_PRX_P6
FDI_CTX_PRX_P7
FDI_CTX_PRX_P0
FDI_CTX_PRX_P1
FDI_CTX_PRX_P2
FDI_CTX_PRX_P3
FDI_CTX_PRX_P4
FDI_CTX_PRX_P5
FDI_CTX_PRX_P6
FDI_CTX_PRX_P7
K1
N5
N2
R2
N9
R8
U6
W10
FDI_FSYNC0
FDI_FSYNC1
AC7
AC9
FDI_FSYNC[0]
FDI_FSYNC[1]
FDI_INT
AB5
FDI_INT
FDI_LSYNC0
FDI_LSYNC1
AA1
AB2
FDI_LSYNC[0]
FDI_LSYNC[1]
17 FDI_FSYNC0
17 FDI_FSYNC1
17 FDI_INT
17 FDI_LSYNC0
17 FDI_LSYNC1
B
FDI_TX#[0]
FDI_TX#[1]
FDI_TX#[2]
FDI_TX#[3]
FDI_TX#[4]
FDI_TX#[5]
FDI_TX#[6]
FDI_TX#[7]
FDI_TX[0]
FDI_TX[1]
FDI_TX[2]
FDI_TX[3]
FDI_TX[4]
FDI_TX[5]
FDI_TX[6]
FDI_TX[7]
Intel(R) FDI
17
17
17
17
DMI
C
17
17
17
17
B12
A13
D12
B11
PEG_RX#[0]
PEG_RX#[1]
PEG_RX#[2]
PEG_RX#[3]
PEG_RX#[4]
PEG_RX#[5]
PEG_RX#[6]
PEG_RX#[7]
PEG_RX#[8]
PEG_RX#[9]
PEG_RX#[10]
PEG_RX#[11]
PEG_RX#[12]
PEG_RX#[13]
PEG_RX#[14]
PEG_RX#[15]
G40
G38
H34
P34
G28
H25
H24
D29
B26
D26
B23
D22
A20
D19
A17
B14
PEG_RX[0]
PEG_RX[1]
PEG_RX[2]
PEG_RX[3]
PEG_RX[4]
PEG_RX[5]
PEG_RX[6]
PEG_RX[7]
PEG_RX[8]
PEG_RX[9]
PEG_RX[10]
PEG_RX[11]
PEG_RX[12]
PEG_RX[13]
PEG_RX[14]
PEG_RX[15]
PCI EXPRESS -- GRAPHICS
D
PEG_ICOMPI
PEG_ICOMPO
PEG_RCOMPO
PEG_RBIAS
PEG_TX#[0]
PEG_TX#[1]
PEG_TX#[2]
PEG_TX#[3]
PEG_TX#[4]
PEG_TX#[5]
PEG_TX#[6]
PEG_TX#[7]
PEG_TX#[8]
PEG_TX#[9]
PEG_TX#[10]
PEG_TX#[11]
PEG_TX#[12]
PEG_TX#[13]
PEG_TX#[14]
PEG_TX#[15]
PEG_TX[0]
PEG_TX[1]
PEG_TX[2]
PEG_TX[3]
PEG_TX[4]
PEG_TX[5]
PEG_TX[6]
PEG_TX[7]
PEG_TX[8]
PEG_TX[9]
PEG_TX[10]
PEG_TX[11]
PEG_TX[12]
PEG_TX[13]
PEG_TX[14]
PEG_TX[15]
F40
J38
G34
M34
J28
G25
K24
B28
A27
B25
A24
B21
B19
B18
B16
D15
N40
L38
M32
D40
A38
G32
B33
B35
L30
A31
B32
L28
N26
M24
G21
J20
L40
N38
N32
B39
B37
H32
A34
D36
J30
B30
D33
N28
M25
N24
F21
L20
AUBURNDALE SFF_BGA1288~D
A
R1084
49.9_0402_1%~D
PEG_IRCOMP_R 1
2
R1129
750_0402_1%~D
EXP_RBIAS
1
2
EDP_CPU_AUX# 24
EDP_CPU_HPD# 24
EDP_CPU_AUX 24
EDP_CPU_LANE_N1 24
EDP_CPU_LANE_N0 24
EDP_CPU_LANE_P1 24
EDP_CPU_LANE_P0 24
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS
AUBURNDALE SFF_BGA1288~D
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS161
VSS162
VSS163
VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170
VSS171
VSS172
VSS173
VSS174
VSS175
VSS176
VSS177
VSS178
VSS179
VSS180
VSS181
VSS182
VSS183
VSS184
VSS185
VSS186
VSS187
VSS188
VSS189
VSS190
VSS191
VSS192
VSS193
VSS194
VSS195
VSS196
VSS197
VSS198
VSS199
VSS200
VSS201
VSS202
VSS203
VSS204
VSS205
VSS206
VSS207
VSS208
VSS209
VSS210
VSS211
VSS212
VSS213
VSS214
VSS215
VSS216
VSS217
VSS218
VSS219
VSS220
U2J
AY24
AY23
AY21
AY19
AY17
AY15
AY14
AY12
AY8
AY4
AW67
AW62
AW59
AW55
AW51
AW48
AW44
AW41
AW37
AV9
AV1
AU70
AU62
AU57
AU53
AU50
AU46
AU42
AU39
AU35
AU33
AU32
AU30
AU28
AU26
AU24
AU23
AU21
AU19
AU17
AU15
AU14
AU4
AT64
AT10
AR62
AR57
AR53
AR50
AR46
AN51
AN48
AN44
AN41
AN37
AN5
AN4
AM64
AM8
AL62
AL55
AL51
AL48
AL44
AL41
AL37
AL35
AL33
AL1
AK70
AK64
AK55
AK51
AK48
AK44
AK41
AK37
AK32
AK30
AK28
AK26
AK24
AK23
AK21
AK19
AK17
AK15
AJ70
AH62
AH57
AH55
BV66
BV64
BT68
BR69
BR68
BR3
BN71
BN1
BL71
BL1
R14
H71
F71
E69
E68
A66
A64
E5
C68
REV1.0
AH53
AH51
AH50
AH48
AH46
AH44
AH42
AH41
AH39
AH37
AH35
AH33
AH32
AH30
AH28
AH26
AH24
AH23
AH21
AH19
AH17
AH15
AH4
AG64
AG9
AG6
AF69
AF62
AF1
AE70
AE64
AD62
AD57
AD53
AD50
AD46
AD42
AD4
AC67
AC64
AC10
AC5
AC1
AB70
AB62
AB57
AB53
AB50
AB46
AB42
AB39
AB37
AB35
AB33
AB32
AB30
AB28
AB26
AB24
AB23
AB21
AB19
AB17
AB15
AB14
AB9
AA66
AA64
AA62
AA57
AA53
AA50
AA46
AA42
AA39
AA37
AA35
AA33
AA32
AA30
AA28
AA26
AA24
AA23
AA21
AA19
F20
F4
E37
E33
E30
E16
E12
D41
D38
D34
D31
D27
D24
D20
D17
D13
D10
D6
B65
B40
ISENSEN
REV1.0
BU62
BU58
BU55
BU51
BU48
BU44
BU37
BU32
BU25
BU21
BU18
BU14
BU11
BU7
BP42
BN64
BN6
BM70
BM51
BM44
BM32
BM24
BM17
BL57
BL55
BL48
BL40
BL28
BL20
BK63
BK60
BK53
BK34
BK10
BJ64
BJ21
BJ9
BJ1
BH70
BH57
BH55
BH47
BH24
BH20
BH15
BG51
BG36
BF62
BF30
BF13
BF8
BE70
BE65
BE9
BE1
BD57
BD53
BD50
BD46
BD42
BD39
BD14
BB71
BB62
BB57
BB53
BB50
BB46
BB42
BB39
BB7
BB1
BA70
AY71
AY66
AY62
AY59
AY55
AY51
AY48
AR42
AR39
AR35
AR33
AR32
AR30
AR28
AR26
AR24
AR23
AR21
AR19
AR17
AR15
AR14
AR4
AR1
AP70
AP64
AN62
AN55
AY44
AY41
AY37
AY35
AY33
AY32
AY30
AY28
AY26
R18
0_0402_5%~D
1
2
VSS202
VSS203
VSS204
VSS205
VSS206
VSS207
VSS208
VSS209
VSS210
VSS211
VSS212
VSS213
VSS214
VSS215
VSS216
VSS217
VSS218
VSS219
VSS220
VSS221
VSS222
VSS223
VSS224
VSS225
VSS226
VSS227
VSS228
VSS229
VSS230
VSS231
VSS232
VSS233
VSS234
VSS235
VSS236
VSS237
VSS238
VSS239
VSS240
VSS241
VSS242
VSS243
VSS244
VSS245
VSS246
VSS247
VSS248
VSS249
VSS250
VSS251
VSS252
VSS253
VSS254
VSS255
VSS256
VSS257
VSS258
VSS259
VSS260
VSS261
VSS262
VSS263
VSS264
VSS265
VSS266
VSS267
VSS268
VSS269
VSS270
VSS271
VSS272
VSS273
VSS274
VSS275
VSS276
VSS277
VSS278
VSS279
VSS280
VSS281
VSS282
VSS283
VSS284
VSS285
VSS286
VSS287
VSS374
VSS375
VSS376
VSS377
VSS378
VSS379
VSS380
VSS381
VSS382
VSS383
VSS384
VSS385
VSS386
VSS387
VSS388
VSS389
VSS390
VSS391
VSS392
VSS415
VSS404
VSS405
VSS406
VSS407
VSS408
VSS409
VSS410
VSS411
VSS412
VSS413
VSS393
VSS394
VSS395
VSS396
VSS397
VSS398
VSS399
VSS400
VSS401
VSS402
VSS403
VSS288
VSS289
VSS290
VSS291
VSS292
VSS293
VSS294
VSS295
VSS296
VSS297
VSS298
VSS299
VSS300
VSS301
VSS302
VSS303
VSS304
VSS305
VSS306
VSS307
VSS308
VSS309
VSS310
VSS311
VSS312
VSS313
VSS314
VSS315
VSS316
VSS317
VSS318
VSS319
VSS320
VSS321
VSS322
VSS323
VSS324
VSS325
VSS326
VSS327
VSS328
VSS329
VSS330
VSS331
VSS332
VSS333
VSS334
VSS335
VSS336
VSS337
VSS338
VSS339
VSS340
VSS341
VSS342
VSS343
VSS344
VSS345
VSS346
VSS347
VSS348
VSS349
VSS350
VSS351
VSS352
VSS353
VSS354
VSS355
VSS356
VSS357
VSS358
VSS359
VSS360
VSS361
VSS362
VSS363
VSS364
VSS365
VSS366
VSS367
VSS368
VSS369
VSS370
VSS371
VSS372
VSS373
VSS
A40
A36
A33
A29
A26
A22
A19
A15
A12
A8
B62
B58
B55
B51
B48
B44
A59
A55
A52
A48
A45
AA17
AA15
AA14
AA4
W69
W62
W57
W53
W50
W46
W42
W6
W1
V70
U64
U62
U57
U53
U50
U46
U42
U39
U9
U4
T1
R70
R62
R57
R53
R50
R46
R42
R5
P4
N63
N57
N53
N50
N46
N30
N21
N15
M53
M42
M36
M1
L70
L57
L48
L47
L13
K64
K53
K43
K36
K34
K32
K25
K17
K11
K6
K4
J65
J57
J48
J47
J40
J9
H53
H43
H36
H1
G70
G57
G53
G48
G47
G43
G30
G24
G20
G15
F61
F48
F47
F28
D
C
B
A
AUBURNDALE SFF_BGA1288~D
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Auburndale (1/6)
Size
Document Number
Date:
Monday, July 13, 2009
Rev
0.1
LA-5691P
Sheet
1
7
of
51
5
4
3
2
1
+1.05V_RUN_VTT
2
U2B
H_CATERR#
H_PECI
47 H_PROCHOT#
1
2
R1286
56_0402_5%~D
23 H_THERMTRIP#
AD69
H_COMP0
AE66
TP_SKTOCC#
M71
H_CATERR#
N61
H_PECI
N19
H_PROCHOT#
N67
H_THERMTRIP#_R
N17
COMP2
COMP1
COMP0
CATERR#
PECI
PROCHOT#
AK7
AK8
CPU_BCLK
CPU_BCLK#
BCLK_ITP
BCLK_ITP#
K71
J70
CLK_CPU_ITP
CLK_CPU_ITP#
PEG_CLK
PEG_CLK#
L21
J21
CPU_EXP
CPU_EXP#
DPLL_REF_SSCLK
DPLL_REF_SSCLK#
Y2
W4
CPU_DPLL
CPU_DPLL#
BJ12
DDR3_DRAMRST#
BV33
BP39
BV40
SM_RCOMP0
SM_RCOMP1
SM_RCOMP2
AV66
AV64
PM_EXTTS#
U71
U69
XDP_PRDY#
XDP_PREQ#
T67
N65
P69
XDP_TCLK
XDP_TMS
XDP_TRST#
T69
T71
P71
T70
XDP_TDI_R
XDP_TDO_R
XDP_TDI_M
XDP_TDO_M
W71
XDP_DBRESET#_R
BCLK
BCLK#
PROC_DETECT
Thermal
19
H_COMP1
REV1.0
COMP3
Clocks
37
AC70
SM_DRAMRST#
SM_RCOMP[0]
SM_RCOMP[1]
SM_RCOMP[2]
DDR3
Misc
@ T184PAD~D
AD71
H_COMP2
Misc
D
H_COMP3
THERMTRIP#
PM_EXT_TS#[0]
PM_EXT_TS#[1]
PRDY#
PREQ#
1
37,47 IMVP_PWRGD
1
R1290
R1087
17 PM_DRAM_PWRGD
AM7
2 VCCPWRGOOD_0_R
0_0402_5%~D
1
19 H_CPUPWRGD
N70
M17
2
0_0402_5%~D
2 VCCPWRGOOD_1_R
0_0402_5%~D
@ R12
C
2 H_CPURST#_R
0_0402_5%~D
H_PM_SYNC
Y67
2 PM_DRAM_PWRGD_R
0_0402_5%~D
1
R878
46 H_VTTPWRGD
H_VTTPWRGD
H15
H_PWRGD_XDP
PCH_PLTRST#_EC
Y70
PCH_PLTRST#_R
1
2
R1144
1.5K_0402_1%~D
G3
PM_SYNC
VCCPWRGOOD_1
VCCPWRGOOD_0
SM_DRAMPWROK
VTTPWRGOOD
TAPPWRGOOD
RSTIN#
1
4,35,37,38
AM5
RESET_OBS#
TDI
TDO
TDI_M
TDO_M
DBR#
BPM#[0]
BPM#[1]
BPM#[2]
BPM#[3]
BPM#[4]
BPM#[5]
BPM#[6]
BPM#[7]
J69
J67
J62
K65
K62
J64
K69
M69
2
2 0_0402_5%~D
0_0402_5%~D
CLK_CPU_BCLK 19
CLK_CPU_BCLK# 19
JXDP1
XDP_PREQ#
XDP_PRDY#
XDP_OBS2
XDP_OBS3
H_CPUPWRGD
Place near JXDP1
1
R1136 1
R1137
1
R1138 1
R1139
2
2 0_0402_5%~D
0_0402_5%~D
2
2 0_0402_5%~D
0_0402_5%~D
CLK_CPU_EXP 16
CLK_CPU_EXP# 16
CLK_CPU_DPLL 16
CLK_CPU_DPLL# 16
1
R6
H_PWRGD_XDP 1
R19
2
1K_0402_5%~D
2
0_0402_5%~D
H_CPURST#
2
1K_0402_5%~D
XDP_RST#_R
XDP_DBRESET#
XDP_TDO
XDP_TRST#
XDP_TDI
XDP_TMS
OBSFN_A0
OBSFN_A1
GND
OBSDATA_A[0]
OBSDATA_A[1]
GND
OBSDATA_A[2]
OBSDATA_A[3]
GND
HOOK0
HOOK2
HOOK4
HOOK5
VCCOBS_AB
HOOK6
HOOK7
GND
TDO
TRSTn
TDI
TMS
TCK1
GND
GND
TCK0
GND
2
1
@ R68
SIO_PWRBTN#_R 15,17
0_0402_5%~D
MEM_SMBDATA 13,14,15,16
@ R20
2
1
0_0402_5%~D
2
1
R1241
0_0402_5%~D
1
R780 1
R781 1
R782 1
R783 1
R784 1
R785 1
R22 1
R24
XDP_OBS0_R
XDP_OBS1_R
XDP_OBS2_R
XDP_OBS3_R
XDP_OBS4_R
XDP_OBS5_R
XDP_OBS6_R
XDP_OBS7_R
XDP_DBRESET# 15,17
2
2
2
2
2
2
2
2
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
XDP_OBS0
XDP_OBS1
XDP_OBS2
XDP_OBS3
AUBURNDALE SFF_BGA1288~D
JTAG MAPPING
MEM_SMBCLK 13,14,15,16
C
CFG8
CFG8
10
CFG9
CFG9
10
CFG0
CFG0
10
CFG1
CFG1
10
CFG2
CFG2
10
CFG3
10
@ R21
1
2
0_0402_5%~D
@ R28
1
2
0_0402_5%~D
+3.3V_RUN
XDP_DBRESET#
CFG3
CFG10
@ R32
1
2
0_0402_5%~D
@ R34
1
2
0_0402_5%~D
1
1
2
1
R60
1K_0402_5%~D
+1.05V_RUN_VTT
@ R31
1
2
0_0402_5%~D
@ R35
1
2
0_0402_5%~D
R25
10K_0402_5%~D
2
25
26
Reserved Resistor PAD to Rework
for 60 pin XDP
XDP_TMS
2
@ R64
XDP_TDI_R
@
CFG10
10
XDP_PREQ#
CFG11
CFG11
10
XDP_TDO
CFG4
CFG4
10
XDP_TCLK
CFG5
CFG5
10
CFG6
CFG6
10
CFG7
CFG7
10
@
2
R65
2
R1149
2
R3
2
1
51_0402_1%~D
1
51_0402_1%~D
1
51_0402_5%~D
1
51_0402_1%~D
1
51_0402_1%~D
@ R67
B
2
PM_DRAM_PWRGD_R
D
MOLEX_52435-2426
Place close CPU
R879
1.1K_0402_1%~D
1
PM_EXTTS#
JTAG MAPPING
1
R880
3K_0402_1%~D
XDP_TDI_R
1
2
XDP_TDI
XDP_TRST#
R1153
0_0402_5%~D
2
2
@ R1145
12.4K_0402_1%~D
XDP_TDO_M
1
2
@ R1154
0_0402_5%~D
2
1
R66
51_0402_1%~D
XDP_TDO
1
+1.05V_RUN_VTT
Scan Chain
Stuff -> R1153,R1156,R1157
(Default)
No stuff -> R1154,R1155
2
R1142
130_0402_1%~D
2
1
R1141
24.9_0402_1%~D
2
1
R1157
0_0402_5%~D
R1140
100_0402_1%~D
2
1
1
2
2
2
1
2
R1095
49.9_0402_1%~D
R1094
49.9_0402_1%~D
R1093
20_0402_1%~D
1
SM_RCOMP2
SM_RCOMP1
SM_RCOMP0
1
H_COMP0
H_COMP1
H_COMP2
H_COMP3
R1235
20_0402_1%~D
H_THERMTRIP#
2
56_0402_5%~D
H_CATERR#
2
49.9_0402_1%~D
H_PROCHOT#
2
68_0402_1%~D
H_CPURST#_R
2
68_0402_1%~D
H_CPUPWRGD_XDP
PWRGD_XDP_R
CLK_CPU_ITP
CLK_CPU_ITP#
XDP_TCLK
+1.05V_RUN_VTT
1
R1285
1
R1232
1
R1233
1
@ R1234
1
R7
DDR3_DRAMRST# 13,14
+1.5V_MEM
B
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
XDP_OBS0
XDP_OBS1
2
R1143
750_0402_1%~D
TCK
TMS
TRST#
Power Management
1
R1088
17 H_PM_SYNC
JTAG & MBP
H_CPURST#
1
R1132 1
R1133
C19
0.1U_0402_16V4Z~D
1
+1.05V_RUN_VTT
XDP_TDI_M
XDP_TDO_R
CPU Only
1
2
@ R1155
0_0402_5%~D
Stuff -> R1153,R1154
No stuff -> R1154,R1155,R1157
PCH Only
1
2
R1156
0_0402_5%~D
Stuff -> R1155,R1156
No stuff -> R1153,R1154,R1157
A
A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Auburndale (2/6)
Size
Document Number
Date:
Monday, July 13, 2009
Rev
0.1
LA-5691P
Sheet
1
8
of
51
5
4
3
2
U2C
U2D
REV1.0
DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15
DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63
C
B
13 DDR_A_BS0
13 DDR_A_BS1
13 DDR_A_BS2
13 DDR_A_CAS#
13 DDR_A_RAS#
13 DDR_A_WE#
AT8
AT6
BB5
BB9
AV7
AV6
BE6
BE8
BF11
BE11
BK5
BH13
BF9
BF6
BK7
BN8
BN11
BN9
BG17
BK15
BK9
BG15
BH17
BK17
BN20
BN17
BK25
BH25
BJ20
BH21
BG24
BG25
BJ40
BM43
BF47
BF48
BN40
BH43
BN44
BN47
BN48
BN51
BH53
BJ55
BH48
BJ48
BM53
BN55
BF55
BN57
BN65
BJ61
BF57
BJ57
BK64
BK61
BJ63
BF64
BB64
BB66
BJ66
BF65
AY64
BC70
DDR_A_BS0
DDR_A_BS1
DDR_A_BS2
BT38
BH38
BF21
DDR_A_CAS#
DDR_A_RAS#
DDR_A_WE#
BK43
BL38
BF38
SA_DQ[0]
SA_DQ[1]
SA_DQ[2]
SA_DQ[3]
SA_DQ[4]
SA_DQ[5]
SA_DQ[6]
SA_DQ[7]
SA_DQ[8]
SA_DQ[9]
SA_DQ[10]
SA_DQ[11]
SA_DQ[12]
SA_DQ[13]
SA_DQ[14]
SA_DQ[15]
SA_DQ[16]
SA_DQ[17]
SA_DQ[18]
SA_DQ[19]
SA_DQ[20]
SA_DQ[21]
SA_DQ[22]
SA_DQ[23]
SA_DQ[24]
SA_DQ[25]
SA_DQ[26]
SA_DQ[27]
SA_DQ[28]
SA_DQ[29]
SA_DQ[30]
SA_DQ[31]
SA_DQ[32]
SA_DQ[33]
SA_DQ[34]
SA_DQ[35]
SA_DQ[36]
SA_DQ[37]
SA_DQ[38]
SA_DQ[39]
SA_DQ[40]
SA_DQ[41]
SA_DQ[42]
SA_DQ[43]
SA_DQ[44]
SA_DQ[45]
SA_DQ[46]
SA_DQ[47]
SA_DQ[48]
SA_DQ[49]
SA_DQ[50]
SA_DQ[51]
SA_DQ[52]
SA_DQ[53]
SA_DQ[54]
SA_DQ[55]
SA_DQ[56]
SA_DQ[57]
SA_DQ[58]
SA_DQ[59]
SA_DQ[60]
SA_DQ[61]
SA_DQ[62]
SA_DQ[63]
SA_BS[0]
SA_BS[1]
SA_BS[2]
SA_CAS#
SA_RAS#
SA_WE#
REV1.0
SA_CK[0]
SA_CK#[0]
SA_CKE[0]
BM34
BP35
BF20
M_CLK_DDR0
M_CLK_DDR#0
DDR_CKE0_DIMMA
SA_CK[1]
SA_CK#[1]
SA_CKE[1]
BK36
BH36
BK24
M_CLK_DDR1
M_CLK_DDR#1
DDR_CKE1_DIMMA
SA_CS#[0]
SA_CS#[1]
BH40
BJ47
DDR_CS0_DIMMA#
DDR_CS1_DIMMA#
BF43
BL47
M_ODT0
M_ODT1
SA_ODT[0]
SA_ODT[1]
M_CLK_DDR0 13
M_CLK_DDR#0 13
DDR_CKE0_DIMMA 13
M_CLK_DDR1 13
M_CLK_DDR#1 13
DDR_CKE1_DIMMA 13
DDR_CS0_DIMMA# 13
DDR_CS1_DIMMA# 13
M_ODT0
M_ODT1
13
13
DDR_A_DM[0..7]
SA_DM[0]
SA_DM[1]
SA_DM[2]
SA_DM[3]
SA_DM[4]
SA_DM[5]
SA_DM[6]
SA_DM[7]
SA_DQS#[0]
SA_DQS#[1]
SA_DQS#[2]
SA_DQS#[3]
SA_DQS#[4]
SA_DQS#[5]
SA_DQS#[6]
SA_DQS#[7]
SA_DQS[0]
SA_DQS[1]
SA_DQS[2]
SA_DQS[3]
SA_DQS[4]
SA_DQS[5]
SA_DQS[6]
SA_DQS[7]
BB10
BJ10
BM15
BN24
BG44
BG53
BN62
BH59
14 DDR_B_D[0..63]
13
DDR_A_DM0
DDR_A_DM1
DDR_A_DM2
DDR_A_DM3
DDR_A_DM4
DDR_A_DM5
DDR_A_DM6
DDR_A_DM7
AY5
BJ7
BN13
BL21
BH44
BK51
BP58
BE62
DDR_A_DQS#0
DDR_A_DQS#1
DDR_A_DQS#2
DDR_A_DQS#3
DDR_A_DQS#4
DDR_A_DQS#5
DDR_A_DQS#6
DDR_A_DQS#7
AY7
BJ5
BL13
BN21
BK44
BH51
BM60
BE64
DDR_A_DQS0
DDR_A_DQS1
DDR_A_DQS2
DDR_A_DQS3
DDR_A_DQS4
DDR_A_DQS5
DDR_A_DQS6
DDR_A_DQS7
BT36
BP33
BV36
BG34
BG32
BN32
BK32
BJ30
BN30
BF28
BH34
BH30
BJ28
BF40
BN28
BN25
DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12
DDR_A_MA13
DDR_A_MA14
DDR_A_MA15
DDR_A_DQS#[0..7]
DDR_A_DQS[0..7]
13
13
DDR_A_MA[0..15] 13
SA_MA[0]
SA_MA[1]
SA_MA[2]
SA_MA[3]
SA_MA[4]
SA_MA[5]
SA_MA[6]
SA_MA[7]
SA_MA[8]
SA_MA[9]
SA_MA[10]
SA_MA[11]
SA_MA[12]
SA_MA[13]
SA_MA[14]
SA_MA[15]
14 DDR_B_BS0
14 DDR_B_BS1
14 DDR_B_BS2
14 DDR_B_CAS#
14 DDR_B_RAS#
14 DDR_B_WE#
DDR_B_D0
DDR_B_D1
DDR_B_D2
DDR_B_D3
DDR_B_D4
DDR_B_D5
DDR_B_D6
DDR_B_D7
DDR_B_D8
DDR_B_D9
DDR_B_D10
DDR_B_D11
DDR_B_D12
DDR_B_D13
DDR_B_D14
DDR_B_D15
DDR_B_D16
DDR_B_D17
DDR_B_D18
DDR_B_D19
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_B_D28
DDR_B_D29
DDR_B_D30
DDR_B_D31
DDR_B_D32
DDR_B_D33
DDR_B_D34
DDR_B_D35
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D44
DDR_B_D45
DDR_B_D46
DDR_B_D47
DDR_B_D48
DDR_B_D49
DDR_B_D50
DDR_B_D51
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
DDR_B_D60
DDR_B_D61
DDR_B_D62
DDR_B_D63
BA2
AW2
BD1
BE4
AY1
BC2
BF2
BH2
BG4
BG1
BR6
BR8
BJ4
BK2
BU9
BV10
BR10
BT12
BT15
BV15
BV12
BP12
BV17
BU16
BP15
BU19
BV22
BT22
BP19
BV19
BV20
BT20
BT48
BV48
BV50
BP49
BT47
BV52
BV54
BT54
BP53
BU53
BT59
BT57
BP56
BT55
BU60
BV59
BV61
BP60
BR66
BR64
BR62
BT61
BN68
BL69
BJ71
BF70
BG71
BC67
BK70
BK67
BD71
BD69
DDR_B_BS0
DDR_B_BS1
DDR_B_BS2
BV43
BV41
BV24
DDR_B_CAS#
DDR_B_RAS#
DDR_B_WE#
BU46
BT40
BT41
SB_DQ[0]
SB_DQ[1]
SB_DQ[2]
SB_DQ[3]
SB_DQ[4]
SB_DQ[5]
SB_DQ[6]
SB_DQ[7]
SB_DQ[8]
SB_DQ[9]
SB_DQ[10]
SB_DQ[11]
SB_DQ[12]
SB_DQ[13]
SB_DQ[14]
SB_DQ[15]
SB_DQ[16]
SB_DQ[17]
SB_DQ[18]
SB_DQ[19]
SB_DQ[20]
SB_DQ[21]
SB_DQ[22]
SB_DQ[23]
SB_DQ[24]
SB_DQ[25]
SB_DQ[26]
SB_DQ[27]
SB_DQ[28]
SB_DQ[29]
SB_DQ[30]
SB_DQ[31]
SB_DQ[32]
SB_DQ[33]
SB_DQ[34]
SB_DQ[35]
SB_DQ[36]
SB_DQ[37]
SB_DQ[38]
SB_DQ[39]
SB_DQ[40]
SB_DQ[41]
SB_DQ[42]
SB_DQ[43]
SB_DQ[44]
SB_DQ[45]
SB_DQ[46]
SB_DQ[47]
SB_DQ[48]
SB_DQ[49]
SB_DQ[50]
SB_DQ[51]
SB_DQ[52]
SB_DQ[53]
SB_DQ[54]
SB_DQ[55]
SB_DQ[56]
SB_DQ[57]
SB_DQ[58]
SB_DQ[59]
SB_DQ[60]
SB_DQ[61]
SB_DQ[62]
SB_DQ[63]
BU33
BV34
BT26
M_CLK_DDR2
M_CLK_DDR#2
DDR_CKE2_DIMMB
BV38
BU39
BT24
M_CLK_DDR3
M_CLK_DDR#3
DDR_CKE3_DIMMB
BP46
BT43
DDR_CS2_DIMMB#
DDR_CS3_DIMMB#
SB_ODT[0]
SB_ODT[1]
BV45
BU49
M_ODT2
M_ODT3
SB_DM[0]
SB_DM[1]
SB_DM[2]
SB_DM[3]
SB_DM[4]
SB_DM[5]
SB_DM[6]
SB_DM[7]
BB4
BL4
BT13
BP22
BV47
BV57
BU65
BF67
DDR_B_DM0
DDR_B_DM1
DDR_B_DM2
DDR_B_DM3
DDR_B_DM4
DDR_B_DM5
DDR_B_DM6
DDR_B_DM7
SB_DQS#[0]
SB_DQS#[1]
SB_DQS#[2]
SB_DQS#[3]
SB_DQS#[4]
SB_DQS#[5]
SB_DQS#[6]
SB_DQS#[7]
BE2
BM3
BU12
BT19
BT52
BV55
BU63
BG69
DDR_B_DQS#0
DDR_B_DQS#1
DDR_B_DQS#2
DDR_B_DQS#3
DDR_B_DQS#4
DDR_B_DQS#5
DDR_B_DQS#6
DDR_B_DQS#7
SB_DQS[0]
SB_DQS[1]
SB_DQS[2]
SB_DQS[3]
SB_DQS[4]
SB_DQS[5]
SB_DQS[6]
SB_DQS[7]
BD4
BN4
BV13
BT17
BT50
BU56
BV62
BJ69
DDR_B_DQS0
DDR_B_DQS1
DDR_B_DQS2
DDR_B_DQS3
DDR_B_DQS4
DDR_B_DQS5
DDR_B_DQS6
DDR_B_DQS7
BT34
BP30
BV29
BU30
BV31
BT33
BT31
BP26
BV27
BT27
BU42
BU26
BT29
BT45
BV26
BU23
DDR_B_MA0
DDR_B_MA1
DDR_B_MA2
DDR_B_MA3
DDR_B_MA4
DDR_B_MA5
DDR_B_MA6
DDR_B_MA7
DDR_B_MA8
DDR_B_MA9
DDR_B_MA10
DDR_B_MA11
DDR_B_MA12
DDR_B_MA13
DDR_B_MA14
DDR_B_MA15
SB_CK[0]
SB_CK#[0]
SB_CKE[0]
SB_CK[1]
SB_CK#[1]
SB_CKE[1]
SB_CS#[0]
SB_CS#[1]
M_CLK_DDR2 14
M_CLK_DDR#2 14
DDR_CKE2_DIMMB 14
D
M_CLK_DDR3 14
M_CLK_DDR#3 14
DDR_CKE3_DIMMB 14
DDR_CS2_DIMMB# 14
DDR_CS3_DIMMB# 14
M_ODT2
M_ODT3
14
14
DDR_B_DM[0..7]
14
C
DDR SYSTEM MEMORY - B
13 DDR_A_D[0..63]
DDR SYSTEM MEMORY A
D
1
SB_BS[0]
SB_BS[1]
SB_BS[2]
SB_CAS#
SB_RAS#
SB_WE#
DDR_B_DQS#[0..7]
14
DDR_B_DQS[0..7]
14
DDR_B_MA[0..15] 14
SB_MA[0]
SB_MA[1]
SB_MA[2]
SB_MA[3]
SB_MA[4]
SB_MA[5]
SB_MA[6]
SB_MA[7]
SB_MA[8]
SB_MA[9]
SB_MA[10]
SB_MA[11]
SB_MA[12]
SB_MA[13]
SB_MA[14]
SB_MA[15]
B
AUBURNDALE SFF_BGA1288~D
AUBURNDALE SFF_BGA1288~D
A
A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Auburndale (3/6)
Size
Document Number
Date:
Monday, July 13, 2009
Rev
0.1
LA-5691P
Sheet
1
9
of
51
5
4
3
2
1
U2E
REV1.0
RSVD34
RSVD35
RSVD36
RSVD37
D
@
R831
0_0402_5%~D
2
1
R830
0_0402_5%~D
2
1
@
U1
V2
RSVD17
RSVD18
AV71
AW70
RSVD19
RSVD20
AY69
BB69
RSVD21
RSVD22
D8
B7
RSVD23
RSVD24
A10
B9
RSVD26
RSVD27
C5
A6
E3
F1
R66
R64
RSVD_NCTF[3]
RSVD_NCTF[4]
BT5
BR5
CFG0
D
R1107
3.01K_0402_1%~D
@
RSVD_NCTF[7]
RSVD_NCTF[8]
RSVD_NCTF[6]
RSVD_NCTF[5]
RSVD45
RSVD46
RSVD47
RSVD48
RSVD49
RSVD50
RSVD51
RSVD52
RSVD53
RSVD54
RSVD55
RSVD56
RSVD57
RSVD58
T188
AV69
AK71
AN69
AP66
AH66
AK66
AR71
AM66
AK69
AU71
AT70
AR69
AU69
AT67
PCI-Express Configuration Select
CFG0
1 : Single PEG
0 : Bifurcation enable
AP2
AN7
CFG3
1
RSVD_TP[2]
RSVD_TP[1]
H_RSVD41
BV6
BV8
RSVD62
RSVD63
AV4
AU2
RSVD64
RSVD65
BE69
BE71
DC_TEST_BV71
DC_TEST_BV69
DC_TEST_BV68
DC_TEST_BV5
DC_TEST_BV3
DC_TEST_BV1
DC_TEST_BT71
DC_TEST_BT69
DC_TEST_BT3
DC_TEST_BT1
DC_TEST_BR71
DC_TEST_BR1
DC_TEST_E71
DC_TEST_E1
DC_TEST_C71
DC_TEST_C69
DC_TEST_C3
DC_TEST_A71
DC_TEST_A69
DC_TEST_A68
DC_TEST_A5
BV71
BV69
BV68
BV5
BV3
BV1
BT71
BT69
BT3
BT1
BR71
BR1
E71
E1
C71
C69
C3
A71
A69
A68
A5
R1108
3.01K_0402_1%~D
@
H_RSVD64
H_RSVD65
2
C
RSVD15
RSVD16
RESERVED
H_RSVD17
H_RSVD18
RSVD_TP[0]
T4
T2
RSVD38
RSVD39
RSVD_NCTF[2]
RSVD_NCTF[1]
Reserve VIA on PCB
AU1
T187
2
CFG[0]
CFG[1]
CFG[2]
CFG[3]
CFG[4]
CFG[5]
CFG[6]
CFG[7]
CFG[8]
CFG[9]
CFG[10]
CFG[11]
CFG[12]
CFG[13]
CFG[14]
CFG[15]
CFG[16]
CFG[17]
AA71
AA69
1
TP_DC_TEST_BV71_BV69
TP_DC_TEST_BV68
TP_DC_TEST_BV5
TP_DC_TEST_BV3_BT3
TP_DC_TEST_BV1_BT1
TP_DC_TEST_BT71_BT69
@ R81
0_0402_5%~D
1
2
@
R1508
0_0402_5%~D
2
1
AL4
AM2
AK1
AK2
AK4
AJ2
AT2
AG7
AF4
AG2
AH1
AC2
AC4
AE2
AD1
AF8
AF6
AB7
H_RSVD37
AC69
AC71
R1507
0_0402_5%~D
2
1
CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
T185
T186
@
TP_DC_TEST_BR71
TP_DC_TEST_BR1
TP_DC_TEST_E71
TP_DC_TEST_E1
TP_DC_TEST_C71_A71
TP_DC_TEST_C69_A69
TP_DC_TEST_C3
C
PCI-Express Static Lane Reversal
CFG3
4@
@R1509
R1509
1 : Normal Operation
0 : Lane Number Reversed
15->0, 14->1 ...
2
T56
1
0_0402_5%~D
2
CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
H_RSVD32
H_RSVD33
2
@ R83
0_0402_5%~D
1
8
8
8
8
8
8
8
8
8
8
8
8
W66
W64
1
RSVD32
RSVD33
TP_DC_TEST_A68
TP_DC_TEST_A5
2
@R84
@
R84
1
0_0402_5%~D
CFG4
1
3
AUBURNDALE SFF_BGA1288~D
R1109
3.01K_0402_1%~D
Package Daisy Chain:
2
1: BR71 - pkg - BT71- board - BT69 - pkg - BV71 - board - BV69 - pkg - BV68
2: A68 - pkg - A69 - board - C69 - pkg - A71 - board - C71 - pkg - E71
3: A5 - pkg - C3
B
B
4: BR1 - pkg - BT1 - board - BV1 - pkg - BT3 - board - BV3 - pkg - BV5
Display Port Presence
*
CFG4
1 : Disabled; No Physical Display Port
attached to Embedded Display Port
0 : Enabled; An external Display Port device is
connected to the Embedded Display Port
A
A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Auburndale (4/6)
Size
Document Number
Date:
Monday, July 13, 2009
Rev
0.1
LA-5691P
Sheet
1
10
of
51
5
4
3
2
1
+VCC_CORE
1
1
C1908
1U_0402_6.3V6K~D
2
1
C1909
1U_0402_6.3V6K~D
2
2
1
C1910
1U_0402_6.3V6K~D
2
Current =48A
1
C1911
1U_0402_6.3V6K~D
2
C1912
1U_0402_6.3V6K~D
+VCC_CORE
U2H
+VCC0
REV1.0
1
1
1
1
1
D
C1918
1U_0402_6.3V6K~D
2
2
1
1
C1928
1U_0402_6.3V6K~D
2
C1929
1U_0402_6.3V6K~D
1
C1935
1U_0402_6.3V6K~D
2
C1936
1U_0402_6.3V6K~D
1
C1940
1U_0402_6.3V6K~D
2
2
2
C1930
1U_0402_6.3V6K~D
2
2
2
C1937
1U_0402_6.3V6K~D
2
C1931
1U_0402_6.3V6K~D
2
2
C1932
1U_0402_6.3V6K~D
1
C1938
1U_0402_6.3V6K~D
1
C1942
1U_0402_6.3V6K~D
2
C1922
1U_0402_6.3V6K~D
1
1
1
C1941
1U_0402_6.3V6K~D
2
C1921
1U_0402_6.3V6K~D
1
1
2
1
2
C1920
1U_0402_6.3V6K~D
1
2
1
C
C1919
1U_0402_6.3V6K~D
2
C1939
1U_0402_6.3V6K~D
1
C1943
1U_0402_6.3V6K~D
2
C1944
1U_0402_6.3V6K~D
High-Frequency Decoupling 25x on Top Side
+VCC_CORE
1
1
C1950
22U_0805_6.3VAM~D
2
1
1
C1951
22U_0805_6.3VAM~D
2
1
C1960
22U_0805_6.3VAM~D
2
1
1
C1961
22U_0805_6.3VAM~D
2
1
C1967
22U_0805_6.3VAM~D
2
2
1
C1952
22U_0805_6.3VAM~D
2
1
C1962
22U_0805_6.3VAM~D
1
C1968
22U_0805_6.3VAM~D
2
2
2
1
C1953
22U_0805_6.3VAM~D
2
1
C1963
22U_0805_6.3VAM~D
1
C1969
22U_0805_6.3VAM~D
2
2
C1954
22U_0805_6.3VAM~D
2
C1964
22U_0805_6.3VAM~D
1
C1970
22U_0805_6.3VAM~D
2
C1971
22U_0805_6.3VAM~D
B
Mid-Frequency Decoupling 15x on Bottom
Side between inductors and package
AF57
AF55
AF53
AF51
AF50
AF48
AF46
AF44
AF42
AF41
AD55
AD51
AD48
AD44
AD41
AB55
AB51
AB48
AB44
AB41
AA55
AA51
AA48
AA44
AA41
W55
W51
W48
W44
W41
U55
U51
U48
U44
U41
R55
R51
R48
R44
R41
P60
N55
N51
N48
N44
N42
M60
M51
M44
L55
K60
K51
K44
J55
H60
H51
H44
G60
G55
G51
G44
F55
E60
E57
E53
E50
E46
E42
D59
D57
D55
D54
D52
D50
D48
D47
D45
D43
B60
B56
B53
B49
B46
B42
A57
A54
A50
A47
A43
VCC_1
VCC_2
VCC_3
VCC_4
VCC_5
VCC_6
VCC_7
VCC_8
VCC_9
VCC_10
VCC_11
VCC_12
VCC_13
VCC_14
VCC_15
VCC_16
VCC_17
VCC_18
VCC_19
VCC_20
VCC_21
VCC_22
VCC_23
VCC_24
VCC_25
VCC_26
VCC_27
VCC_28
VCC_29
VCC_30
VCC_31
VCC_32
VCC_33
VCC_34
VCC_35
VCC_36
VCC_37
VCC_38
VCC_39
VCC_40
VCC_41
VCC_42
VCC_43
VCC_44
VCC_45
VCC_46
VCC_47
VCC_48
VCC_49
VCC_50
VCC_51
VCC_52
VCC_53
VCC_54
VCC_55
VCC_56
VCC_57
VCC_58
VCC_59
VCC_60
VCC_61
VCC_62
VCC_63
VCC_64
VCC_65
VCC_66
VCC_67
VCC_68
VCC_69
VCC_70
VCC_71
VCC_72
VCC_73
VCC_74
VCC_75
VCC_76
VCC_77
VCC_78
VCC_79
VCC_80
VCC_81
VCC_82
VCC_83
VCC_84
VCC_85
VCC_86
VCC_87
VCC_88
VCC_89
D
POWER
VCAP0_1
VCAP0_2
VCAP0_3
VCAP0_4
VCAP0_5
VCAP0_6
VCAP0_7
VCAP0_8
VCAP0_9
VCAP0_10
VCAP0_11
VCAP0_12
VCAP0_13
VCAP0_14
VCAP0_15
VCAP0_16
VCAP0_17
VCAP0_18
VCAP0_19
VCAP0_20
VCAP0_21
VCAP0_22
VCAP0_23
VCAP0_24
VCAP0_25
VCAP0_26
VCAP0_27
BD55
BD51
BD48
BB55
BB51
BB48
AY57
AY53
AY50
AW57
AW53
AW50
AU55
AU51
AU48
AR55
AR51
AR48
AN57
AN53
AN50
AL57
AL53
AL50
AK57
AK53
AK50
1
2
1
C1913
1U_0402_6.3V6K~D
1
2
1
C1923
1U_0402_6.3V6K~D
1
2
2
1
C1914
1U_0402_6.3V6K~D
2
1
C1924
1U_0402_6.3V6K~D
1
C1933
1U_0402_6.3V6K~D
2
2
1
C1915
1U_0402_6.3V6K~D
C1934
1U_0402_6.3V6K~D
2
2
1
C1916
1U_0402_6.3V6K~D
1
C1925
1U_0402_6.3V6K~D
2
2
C1917
1U_0402_6.3V6K~D
1
C1926
1U_0402_6.3V6K~D
2
C1927
1U_0402_6.3V6K~D
Don't connect to any other power
rail, this is package decoulpling
CPU CORE SUPPLY
C
+VCC2
VCAP1_1
VCAP1_2
VCAP1_3
VCAP1_4
VCAP1_5
VCAP1_6
VCAP1_7
VCAP1_8
VCAP1_9
VCAP1_10
VCAP1_11
VCAP1_12
VCAP1_13
VCAP1_14
VCAP1_15
VCAP1_16
VCAP1_17
VCAP1_18
VCAP1_19
VCAP1_20
VCAP1_21
VCAP1_22
VCAP1_23
VCAP1_24
VCAP1_25
VCAP1_26
VCAP1_27
BD44
BD41
BD37
BB44
BB41
BB37
AY46
AY42
AY39
AW46
AW42
AW39
AU44
AU41
AU37
AR44
AR41
AR37
AN46
AN42
AN39
AL46
AL42
AL39
AK46
AK42
AK39
1
2
1
C1945
1U_0402_6.3V6K~D
1
2
1
C1946
1U_0402_6.3V6K~D
1
C1955
1U_0402_6.3V6K~D
1
2
2
2
2
1
C1947
1U_0402_6.3V6K~D
1
C1956
1U_0402_6.3V6K~D
1
C1965
1U_0402_6.3V6K~D
2
C1966
1U_0402_6.3V6K~D
2
2
1
C1948
1U_0402_6.3V6K~D
1
C1957
1U_0402_6.3V6K~D
2
2
C1949
1U_0402_6.3V6K~D
1
C1958
1U_0402_6.3V6K~D
2
C1959
1U_0402_6.3V6K~D
Don't connect to any other power
rail, this is package decoulpling
B
PROCESSOR Power Rail Table (EDS V1.0)
Voltage Rail
Voltage
S0 Iccmax
Current (A)
VAXG
1.5
22
VccPLL
1.8
1.35
VCORE
0.75
48
VDDR
1.5
3
VTT
1.05
18
AUBURNDALE SFF_BGA1288~D
A
A
+VCC_CORE
1
+
2 3
1
+
C1981
470U_D2_2V-M~D
2 3
5
1
C1982
470U_D2_2V-M~D
+
2 3
1
C1983
470U_D2_2V-M~D
+
1
+ @C2068
470U_D2_2V-M~D
C1984
470U_D2_2V-M~D
2 3
2 3
4
Low-Frequency
Bulk 4x on
Bottom Side,
1x on Top
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
Auburndale (5/6)
Size
Document Number
Date:
Monday, July 13, 2009
Rev
0.1
LA-5691P
Sheet
1
11
of
51
5
4
3
2
1
+VCC_GFXCORE
2
+1.05V_RUN_VTT
VTT:
1
1uF x 20
22uF x 3
2
10uF x 4
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
Don't connect to any other power
rail, this is package decoulpling
2
+1.05V_RUN_VTT
R1497
0_0402_5%~D
1
2
1
2
R1498
0_0402_5%~D
+VTT0_72
+VTT0_73
H_PSI#
47
VID0
VID1
VID2
VID3
VID4
VID5
VID6
VID0
VID1
VID2
VID3
VID4
VID5
VID6
47
47
47
47
47
47
47
VTT_SELECT[1]
AN1
PROC_DPRSLPVR
F66
ISENSE
A41
VCC_SENSE
VSS_SENSE
F64
F63
VTT_SELECT
D
T74
@ PAD~D
1
2
R1496
0_0402_5%~D
H_DPRSLPVR
H_DPRSLPVR 47
VTT_SENSE
VSS_SENSE_VTT
IMVP_IMON
23,47
VCCSENSE
VSSSENSE
N13
VCCSENSE
VSSSENSE
VTT_SENSE
47
47
46
R12
C
+1.8V_RUN
Current =1.35A
VCCPLL1
VCCPLL2
VCCPLL3
VCCPLL4
VCCPLL5
W39
W37
U37
R39
R37
1
1
2
2
+1.5V_VDDQ_CK
C2039
4.7U_0603_6.3V6M~D
2
2
1
H_PSI#
A61
D61
D62
A62
B63
D64
D66
22U_0805_6.3V6M~D
C2038
1
1
F68
VID[0]
VID[1]
VID[2]
VID[3]
VID[4]
VID[5]
VID[6]
PSI#
1.8V
2
2
10U_0603_6.3V6M~D
C149
1
2
1
10U_0603_6.3V6M~D
C2037
2
1
10U_0603_6.3V6M~D
C2036
1
1U_0402_6.3V6K~D
C2044
2
1U_0402_6.3V6K~D
C2043
VTT1_12
VTT1_13
VTT1_14
VTT1_15
VTT1_16
VTT1_17
VTT1_18
VTT1_19
VTT1_20
VTT1_21
1
1U_0402_6.3V6K~D
C2042
VTT0_DDR
VTT0_DDR[1]
VTT0_DDR[2]
VTT0_DDR[3]
VTT0_DDR[4]
VTT0_DDR[5]
VTT0_DDR[6]
VTT0_DDR[7]
VTT0_DDR[8]
VTT0_DDR[9]
AK62
AK60
AK59
AH60
AH59
AF60
AF59
AD60
AD59
AB60
AB59
AA60
AA59
W60
W59
U60
U59
R60
R59
10U_0603_6.3V6M~D
C2035
+VCCTTG
VCAP2_1
VCAP2_2
VCAP2_3
VCAP2_4
VCAP2_5
VCAP2_6
VCAP2_7
VCAP2_8
VCAP2_9
VCAP2_10
VCAP2_11
VCAP2_12
VCAP2_13
VCAP2_14
VCAP2_15
VCAP2_16
VCAP2_17
VCAP2_18
VCAP2_19
2
1
2
22U_0805_6.3V6M~D
C143
2
1
2
1
VTT0_11
VTT0_12
VTT0_13
VTT0_14
VTT0_15
VTT0_16
VTT0_17
VTT0_18
VTT0_19
VTT0_20
VTT0_21
VTT0_22
VTT0_23
VTT0_24
VTT0_25
VTT0_26
VTT0_27
VTT0_28
VTT0_29
VTT0_30
VTT0_31
VTT0_32
VTT0_33
VTT0_34
VTT0_35
VTT0_36
VTT0_37
VTT0_38
VTT0_39
VTT0_40
VTT0_41
VTT0_42
VTT0_1
VTT0_2
VTT0_3
VTT0_4
VTT0_5
VTT0_6
VTT0_7
VTT0_8
VTT0_9
VTT0_10
VTT0_43
VTT0_44
VTT0_45
VTT0_46
VTT0_47
VTT0_48
VTT0_49
VTT0_50
VTT0_51
VTT0_52
VTT0_53
VTT0_54
VTT0_55
VTT0_56
VTT0_57
VTT0_58
VTT0_59
VTT0_60
VTT0_61
VTT0_62
VTT0_63
VTT0_64
VTT0_65
VTT0_66
VTT0_67
VTT0_68
VTT0_69
VTT0_70
VTT0_71
VTT0_72
VTT0_73
POWER
@C2071
330U_D2_2VM_R6M~D
2
2
1
22U_0805_6.3V6M~D
C2032
POWER
1
+
1
2
AW14
AW12
AU60
AU59
AU12
AR60
AR59
AR12
AN60
AN59
AN35
AN33
AN17
AN15
AN14
AN12
AM10
AL60
AL59
AL17
AL15
AL14
AL12
AK35
AK33
AF39
AF37
AF35
AF33
AF32
AF30
AD39
BF60
BF59
BD60
BD59
BB60
BB59
AY60
AW60
AW35
AW33
AD37
AD35
AD33
AD32
AD30
W35
W33
W32
W30
W28
W26
W24
W23
U35
U33
U32
U30
U28
U26
U24
U23
R35
R33
R32
R30
R28
R26
R24
R23
AY10
AN9
1.1V RAIL POWER
SENSE
LINES
GRAPHICS VIDs
- 1.5V RAILS
2
1
22U_0805_6.3V6M~D
C2031
2
1
1
1
2
330uF x 2 (6mohm)
on power side
1U_0402_6.3V6K~D
C2030
1
2
1U_0402_6.3V6K~D
C2029
DDR3
2
1
22U_0805_6.3V6M~D
C2021
2
1
10U_0603_6.3V6M~D
C2028
2
1
2
22U_0805_6.3V6M~D
C2020
2
1
AD15
AD14
AD12
AB12
AA12
W17
W15
W14
W12
R15
2
1U_0402_6.3V6K~D
C2041
1
2
1
2
1
330uF x 1
1
2
22uF x 1, 10uF x 2, 1uF x 2
1U_0402_6.3V6K~D
C2040
2
1
AW32
AW30
AW28
AW26
AW24
AW23
AW21
AW19
AW17
AW15
2
1
10U_0603_6.3V6M~D
C2027
2
W21
W19
U21
U19
U17
U15
U14
U12
R21
R19
R17
22U_0805_6.3V6M~D
C2026
2
1
1U_0402_6.3V6K~D
C2054
2
1
2
1U_0402_6.3V6K~D
C2053
2
1
10U_0603_6.3V6M~D
C2052
2
1
10U_0603_6.3V6M~D
C2051
1
22U_0805_6.3V6M~D
C2050
22U_0805_6.3V6M~D
C2049
B
1
1U_0402_6.3V6K~D
C2047
+1.05V_RUN_VTT
1
+1.05V_RUN_VTT0_DDR
1U_0402_6.3V6K~D
C2046
30ohm@100MHz
2
22U_0805_6.3V6M~D
C2034
22U_0805_6.3V6M~D
C2033
L91
MPZ1608S300AT_2P~D
1
2
1U_0402_6.3V6K~D
C2045
+1.05V_RUN_VTT
1
PEG & DMI
2x Mid-Freg Decoupling close SODIMM
VTT1_1
VTT1_2
VTT1_3
VTT1_4
VTT1_5
VTT1_6
VTT1_7
VTT1_8
VTT1_9
VTT1_10
VTT1_11
1
2
22U_0805_6.3V6M~D
C2019
C
1U_0402_6.3V6K~D
C2018
5x High-Freg Decoupling Bottom
2
1
22uF x 3
2
REV1.0
1
SENSE LINES
2
1
1uF x 16
2
2
1
CPU VIDS
2
1
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15
VDDQ16
VDDQ17
VDDQ18
VDDQ19
VDDQ20
VDDQ21
VDDQ22
VDDQ23
VDDQ24
VDDQ25
VDDQ26
VDDQ27
VDDQ28
VDDQ29
VDDQ30
VDDQ31
VDDQ32
VDDQ33
VDDQ34
VDDQ35
VDDQ36
1
2
1
1U_0402_6.3V6K~D 1U_0402_6.3V6K~D 1U_0402_6.3V6K~D 1U_0402_6.3V6K~D
C2062
C2063
C120
C135
2
1
1U_0402_6.3V6K~D
C2017
2
1
1U_0402_6.3V6K~D
C2016
2
1
1U_0402_6.3V6K~D
C2015
2
1
1U_0402_6.3V6K~D
C2014
+
1U_0402_6.3V6K~D
C2013
330U_D2_2VM_R6M~D
C2012
DG: 12mohm
1
BU40
BU35
BU28
BN38
BM25
BL30
BJ38
BH32
BH28
BG43
BF16
BF15
BD35
BD33
BD32
BD30
BD28
BD26
BD24
BD23
BD21
BD19
BD17
BD15
BB35
BB33
BB32
BB30
BB28
BB26
BB24
BB23
BB21
BB19
BB17
BB15
2
VGFX:
2
1
1U_0402_6.3V6K~D 1U_0402_6.3V6K~D 1U_0402_6.3V6K~D 1U_0402_6.3V6K~D
C1993
C2002
C2011
C2025
Current =3A
2
1
2
1
1U_0402_6.3V6K~D 1U_0402_6.3V6K~D 1U_0402_6.3V6K~D 1U_0402_6.3V6K~D
C1992
C2001
C2010
C2024
GFX_IMON
+1.5V_MEM
2
1
2
1
1U_0402_6.3V6K~D 1U_0402_6.3V6K~D 1U_0402_6.3V6K~D 1U_0402_6.3V6K~D
C1991
C2000
C2009
C2023
49
GFX_VR_EN
GFX_DPRSLPVR
GFX_IMON
2
1
2
Current =18A
U2F
1U_0402_6.3V6K~D 1U_0402_6.3V6K~D 1U_0402_6.3V6K~D 1U_0402_6.3V6K~D
C1990
C1999
C2008
C2022
49 GFX_VR_ON
49 GFX_DPRSLPVR
1
2
1
1U_0402_6.3V6K~D 1U_0402_6.3V6K~D 1U_0402_6.3V6K~D
C1989
C1998
C2007
R1120
2
1
1U_0402_6.3V6K~D 1U_0402_6.3V6K~D 1U_0402_6.3V6K~D
C1988
C1997
C2006
0_0402_5%~D
GFX_VR_ON_R
2
1
AH69
GFX_DPRSLPVR_R AL71
2
1
GFX_IMON
R1495
AL69
0_0402_5%~D
GFX_VID[0]
GFX_VID[1]
GFX_VID[2]
GFX_VID[3]
GFX_VID[4]
GFX_VID[5]
GFX_VID[6]
1
1U_0402_6.3V6K~D 1U_0402_6.3V6K~D 1U_0402_6.3V6K~D
C1987
C1996
C2005
AF71
AG67
AG70
AH71
AN71
AM67
AM70
1
1U_0402_6.3V6K~D 1U_0402_6.3V6K~D 1U_0402_6.3V6K~D
C1986
C1995
C2004
GFX_VID0
GFX_VID1
GFX_VID2
GFX_VID3
GFX_VID4
GFX_VID5
GFX_VID6
GFX_VID0
GFX_VID1
GFX_VID2
GFX_VID3
GFX_VID4
GFX_VID5
GFX_VID6
GRAPHICS
49
49
49
49
49
49
49
D
VAXG_SENSE
VSSAXG_SENSE
AN32
AN30
AN28
AN26
AN24
AN23
AN21
AN19
AL32
AL30
AL28
AL26
AL24
AL23
AL21
AL19
AK14
AK12
AJ10
AH14
AH12
AF28
AF26
AF24
AF23
AF21
AF19
AF17
AF15
AF14
AD28
AD26
AD24
AD23
AD21
AD19
AD17
1U_0402_6.3V6K~D 1U_0402_6.3V6K~D 1U_0402_6.3V6K~D
C1985
C1994
C2003
VCC_AXG_SENSEAF12
VSS_AXG_SENSE AF10
49 VCC_AXG_SENSE
49 VSS_AXG_SENSE
VAXG1
VAXG2
VAXG3
VAXG4
VAXG5
VAXG6
VAXG7
VAXG8
VAXG9
VAXG10
VAXG11
VAXG12
VAXG13
VAXG14
VAXG15
VAXG16
VAXG17
VAXG18
VAXG19
VAXG20
VAXG21
VAXG22
VAXG23
VAXG24
VAXG25
VAXG26
VAXG27
VAXG28
VAXG29
VAXG30
VAXG31
VAXG32
VAXG33
VAXG34
VAXG35
VAXG36
VAXG37
+1.05V_RUN_VTT
Current =22A
U2G
REV1.0
+1.5V_MEM
L4
VDDQ_CK[1]
VDDQ_CK[2]
BB14
BB12
1
1
2
2
1uH
1UH_GLFR1608T1R0M-LR_20%~D
B
C2048
1U_0402_6.3V6K~D
1uH_230mA
AUBURNDALE SFF_BGA1288~D
22uF x 2, 10uF x 2, 1uF x 2
AUBURNDALE SFF_BGA1288~D
+VCC_CORE
2
4.7K_0402_5%~D
1
GFX_VR_ON 1
R1510
Follow checklist pg20
VCCSENSE
VSSSENSE
2
2
R1499
100_0402_1%~D
Place R1499 and R1500 near CPU
Route VCCSENSE and VSSSENSE trace at
27.4 ohms, 7 mils spacing
R1500
100_0402_1%~D
A
A
1
Total VTT:24 x 1uF
8 x 10uF (7x 10u on DG)
6 x 22uF (4x 22u on DG)
3 x 330uF (6 ohm) on power side
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Title
Auburndale (6/6)
Size
4
3
2
Rev
0.1
LA-5691P
Date:
5
Document Number
Monday, July 13, 2009
Sheet
1
12
of
51
5
4
3
2
+1.5V_MEM
1
+1.5V_MEM
JDIMMA
+V_DDR_REF
9 DDR_A_MA[0..15]
2
1
2
DDR_A_DM0
C1120
9 DDR_A_DQS[0..7]
1
C1119
Populate R87 for Intel DDR3
VREFDQ multiple methods M1
9 DDR_A_DM[0..7]
0.1U_0402_16V4Z~D
9 DDR_A_D[0..63]
2.2U_0603_6.3V6K~D
9 DDR_A_DQS#[0..7]
DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D8
DDR_A_D9
D
DDR_A_DQS#1
DDR_A_DQS1
DDR_A_D10
DDR_A_D11
Layout Note:
Place near JDIMMA
DDR_A_D16
DDR_A_D17
DDR_A_DQS#2
DDR_A_DQS2
+1.5V_MEM
2
DDR_A_D24
DDR_A_D25
1 @
C1124
0.1U_0402_16V4Z~D
1 @
C1123
2
0.1U_0402_16V4Z~D
1 @
C1122
C1121
2
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1 @
DDR_A_D18
DDR_A_D19
DDR_A_DM3
DDR_A_D26
DDR_A_D27
2
9 DDR_CKE0_DIMMA
9
DDR_A_BS2
+1.5V_MEM
C
+
2
2
C1125
330U_SX_2VY~D
2
1
1
C1131
2
1
10U_0603_6.3V6M~D
C1130
2
1
10U_0603_6.3V6M~D
C1129
2
1
10U_0603_6.3V6M~D
C1128
1
10U_0603_6.3V6M~D
C1127
2
10U_0603_6.3V6M~D
C1126
10U_0603_6.3V6M~D
1
9 M_CLK_DDR0
9 M_CLK_DDR#0
9
DDR_A_BS0
9
9
DDR_A_WE#
DDR_A_CAS#
9 DDR_CS1_DIMMA#
2
2
1
2
C1142
2.2U_0603_6.3V6K~D
1
C1141
A
0.1U_0402_16V4Z~D
+3.3V_RUN
GND1
GND1
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204
DDR_A_D4
DDR_A_D5
DDR_A_DQS#0
DDR_A_DQS0
DDR_A_D6
DDR_A_D7
DDR_A_D12
DDR_A_D13
DDR_A_DM1
DDR3_DRAMRST#
D
DDR3_DRAMRST# 8,14
DDR_A_D14
DDR_A_D15
DDR_A_D20
DDR_A_D21
DDR_A_DM2
DDR_A_D22
DDR_A_D23
DDR_A_D28
DDR_A_D29
DDR_A_DQS#3
DDR_A_DQS3
DDR_A_D30
DDR_A_D31
DDR_CKE1_DIMMA
DDR_CKE1_DIMMA 9
DDR_A_MA15
DDR_A_MA14
DDR_A_MA11
DDR_A_MA7
C
DDR_A_MA6
DDR_A_MA4
DDR_A_MA2
DDR_A_MA0
M_CLK_DDR1
M_CLK_DDR#1
DDR_A_BS1
DDR_A_RAS#
DDR_CS0_DIMMA#
M_ODT0
M_ODT1
M_CLK_DDR1 9
M_CLK_DDR#1 9
DDR_A_BS1 9
DDR_A_RAS# 9
DDR_CS0_DIMMA# 9
M_ODT0
9
M_ODT1
9
+V_DDR_REF
DDR_A_D36
DDR_A_D37
DDR_A_DM4
DDR_A_D38
DDR_A_D39
DDR_A_D44
DDR_A_D45
1
2
1
2
C1133
1
C1138
2
10U_0603_6.3V6M~D
2
1
C1137
1U_0402_6.3V6K~D
2
1
C1136
1U_0402_6.3V6K~D
1
C1135
1U_0402_6.3V6K~D
2
C1134
1U_0402_6.3V6K~D
1
CKE1
VDD
A15
A14
VDD
A11
A7
VDD
A6
A4
VDD
A2
A0
VDD
CK1
CK1#
VDD
BA1
RAS#
VDD
S0#
ODT0
VDD
ODT1
NC
VDD
VREF_CA
VSS
DQ36
DQ37
VSS
DM4
VSS
DQ38
DQ39
VSS
DQ44
DQ45
VSS
DQS5#
DQS5
VSS
DQ46
DQ47
VSS
DQ52
DQ53
VSS
DM6
VSS
DQ54
DQ55
VSS
DQ60
DQ61
VSS
DQS7#
DQS7
VSS
DQ62
DQ63
VSS
EVENT#
SDA
SCL
VTT
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
C1132
B
CKE0
VDD
NC
BA2
VDD
A12/BC#
A9
VDD
A8
A5
VDD
A3
A1
VDD
CK0
CK0#
VDD
A10/AP
BA0
VDD
WE#
CAS#
VDD
A13
S1#
VDD
TEST
VSS
DQ32
DQ33
VSS
DQS4#
DQS4
VSS
DQ34
DQ35
VSS
DQ40
DQ41
VSS
DM5
VSS
DQ42
DQ43
VSS
DQ48
DQ49
VSS
DQS6#
DQS6
VSS
DQ50
DQ51
VSS
DQ56
DQ57
VSS
DM7
VSS
DQ58
DQ59
VSS
SA0
VDDSPD
SA1
VTT
VSS
DQ4
DQ5
VSS
DQS0#
DQS0
VSS
DQ6
DQ7
VSS
DQ12
DQ13
VSS
DM1
RESET#
VSS
DQ14
DQ15
VSS
DQ20
DQ21
VSS
DM2
VSS
DQ22
DQ23
VSS
DQ28
DQ29
VSS
DQS3#
DQS3
VSS
DQ30
DQ31
VSS
0.1U_0402_16V4Z~D
+0.75V_DDR_VTT
73
75
77
79
81
DDR_A_MA12
83
DDR_A_MA9
85
87
DDR_A_MA8
89
DDR_A_MA5
91
93
DDR_A_MA3
95
DDR_A_MA1
97
99
M_CLK_DDR0
101
M_CLK_DDR#0
103
105
DDR_A_MA10
107
DDR_A_BS0
109
111
DDR_A_WE#
113
DDR_A_CAS#
115
117
DDR_A_MA13
119
DDR_CS1_DIMMA#
121
123
125
127
DDR_A_D32
129
DDR_A_D33
131
133
DDR_A_DQS#4
135
DDR_A_DQS4
137
139
DDR_A_D34
141
DDR_A_D35
143
145
DDR_A_D40
147
DDR_A_D41
149
151
DDR_A_DM5
153
155
DDR_A_D42
157
DDR_A_D43
159
161
DDR_A_D48
163
DDR_A_D49
165
167
DDR_A_DQS#6
169
DDR_A_DQS6
171
173
DDR_A_D50
175
DDR_A_D51
177
179
DDR_A_D56
181
DDR_A_D57
183
185
DDR_A_DM7
187
189
DDR_A_D58
191
DDR_A_D59
193
195
1
2
197
R1182 10K_0402_5%~D199
1
2
201
R1183 10K_0402_5%~D203
+0.75V_DDR_VTT
205
DDR_A_BS2
VREF_DQ
VSS
DQ0
DQ1
VSS
DM0
VSS
DQ2
DQ3
VSS
DQ8
DQ9
VSS
DQS1#
DQS1
VSS
DQ10
DQ11
VSS
DQ16
DQ17
VSS
DQS2#
DQS2
VSS
DQ18
DQ19
VSS
DQ24
DQ25
VSS
DM3
VSS
DQ26
DQ27
VSS
2.2U_0603_6.3V6K~D
Layout Note:
Place near JDIMMA.203,204
DDR_CKE0_DIMMA
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
B
DDR_A_DQS#5
DDR_A_DQS5
DDR_A_D46
DDR_A_D47
DDR_A_D52
DDR_A_D53
DDR_A_DM6
DDR_A_D54
DDR_A_D55
DDR_A_D60
DDR_A_D61
DDR_A_DQS#7
DDR_A_DQS7
DDR_A_D62
DDR_A_D63
MEM_SMBDATA
MEM_SMBCLK
MEM_SMBDATA 8,14,15,16
MEM_SMBCLK 8,14,15,16
+0.75V_DDR_VTT
206
A
TYCO_2-2013022-2~D
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Title
DDRIII-SODIMM SLOT1
Size
4
3
2
Rev
0.1
LA-5691P
Date:
5
Document Number
Monday, July 13, 2009
Sheet
1
13
of
51
5
4
3
2
+1.5V_MEM
1
+1.5V_MEM
JDIMMB
+V_DDR_REF
D
9 DDR_B_DQS[0..7]
1
2
1
2
DDR_B_DM0
C1144
9 DDR_B_DM[0..7]
0.1U_0402_16V4Z~D
Populate R88 for Intel DDR3
VREFDQ multiple methods M1
9 DDR_B_D[0..63]
C1143
2.2U_0603_6.3V6K~D
9 DDR_B_DQS#[0..7]
DDR_B_D0
DDR_B_D1
DDR_B_D2
DDR_B_D3
DDR_B_D8
DDR_B_D9
9 DDR_B_MA[0..15]
DDR_B_DQS#1
DDR_B_DQS1
DDR_B_D10
DDR_B_D11
DDR_B_D16
DDR_B_D17
DDR_B_DQS#2
DDR_B_DQS2
DDR_B_D18
DDR_B_D19
Layout Note:
Place near JDIMMB
DDR_B_D24
DDR_B_D25
DDR_B_DM3
DDR_B_D26
DDR_B_D27
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
VREF_DQ
VSS
DQ0
DQ1
VSS
DM0
VSS
DQ2
DQ3
VSS
DQ8
DQ9
VSS
DQS1#
DQS1
VSS
DQ10
DQ11
VSS
DQ16
DQ17
VSS
DQS2#
DQS2
VSS
DQ18
DQ19
VSS
DQ24
DQ25
VSS
DM3
VSS
DQ26
DQ27
VSS
VSS
DQ4
DQ5
VSS
DQS0#
DQS0
VSS
DQ6
DQ7
VSS
DQ12
DQ13
VSS
DM1
RESET#
VSS
DQ14
DQ15
VSS
DQ20
DQ21
VSS
DM2
VSS
DQ22
DQ23
VSS
DQ28
DQ29
VSS
DQS3#
DQS3
VSS
DQ30
DQ31
VSS
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
DDR_B_D4
DDR_B_D5
DDR_B_DQS#0
DDR_B_DQS0
DDR_B_D6
DDR_B_D7
DDR_B_D12
DDR_B_D13
D
DDR_B_DM1
DDR3_DRAMRST#
DDR3_DRAMRST# 8,13
DDR_B_D14
DDR_B_D15
DDR_B_D20
DDR_B_D21
DDR_B_DM2
DDR_B_D22
DDR_B_D23
DDR_B_D28
DDR_B_D29
DDR_B_DQS#3
DDR_B_DQS3
DDR_B_D30
DDR_B_D31
+1.5V_MEM
DDR_CKE2_DIMMB
9 DDR_CKE2_DIMMB
2
1 @
DDR_B_MA12
DDR_B_MA9
2
DDR_B_MA8
DDR_B_MA5
DDR_B_MA3
DDR_B_MA1
1
2
C1155
2
1
+
2
9
DDR_B_BS0
9
9
DDR_B_WE#
DDR_B_CAS#
DDR_B_MA10
DDR_B_BS0
DDR_B_WE#
DDR_B_CAS#
DDR_B_MA13
DDR_CS3_DIMMB#
9 DDR_CS3_DIMMB#
DDR_B_D40
DDR_B_D41
Layout Note:
Place near JDIMMB.203,204
DDR_B_DM5
DDR_B_D42
DDR_B_D43
DDR_B_D48
DDR_B_D49
DDR_B_DQS#6
DDR_B_DQS6
+0.75V_DDR_VTT
DDR_B_D50
DDR_B_D51
2
1
2
C1161
1U_0402_6.3V6K~D
2
1
C1160
1U_0402_6.3V6K~D
1
C1159
1U_0402_6.3V6K~D
2
C1158
1U_0402_6.3V6K~D
1
DDR_B_D56
DDR_B_D57
DDR_B_DM7
DDR_B_D58
DDR_B_D59
+3.3V_RUN
+3.3V_RUN
+0.75V_DDR_VTT
205
1
2
C1163
2
C1162
1
2.2U_0603_6.3V6K~D
0.1U_0402_16V4Z~D
R1185
10K_0402_5%~D
A
1
1
R1184
10K_0402_5%~D
2
2
GND1
GND1
DDR_CKE3_DIMMB
DDR_CKE3_DIMMB 9
DDR_B_MA15
DDR_B_MA14
C
DDR_B_MA11
DDR_B_MA7
DDR_B_MA6
DDR_B_MA4
DDR_B_MA2
DDR_B_MA0
M_CLK_DDR3
M_CLK_DDR#3
M_CLK_DDR3 9
M_CLK_DDR#3 9
DDR_B_BS1
DDR_B_RAS#
DDR_B_BS1 9
DDR_B_RAS# 9
DDR_CS2_DIMMB#
DDR_CS2_DIMMB# 9
M_ODT2
M_ODT2
9
M_ODT3
M_ODT3
9
+V_DDR_REF
DDR_B_D36
DDR_B_D37
DDR_B_DM4
DDR_B_D38
DDR_B_D39
DDR_B_D44
DDR_B_D45
1
2
1
2
C1157
DDR_B_D34
DDR_B_D35
B
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204
C1156
DDR_B_DQS#4
DDR_B_DQS4
CKE1
VDD
A15
A14
VDD
A11
A7
VDD
A6
A4
VDD
A2
A0
VDD
CK1
CK1#
VDD
BA1
RAS#
VDD
S0#
ODT0
VDD
ODT1
NC
VDD
VREF_CA
VSS
DQ36
DQ37
VSS
DM4
VSS
DQ38
DQ39
VSS
DQ44
DQ45
VSS
DQS5#
DQS5
VSS
DQ46
DQ47
VSS
DQ52
DQ53
VSS
DM6
VSS
DQ54
DQ55
VSS
DQ60
DQ61
VSS
DQS7#
DQS7
VSS
DQ62
DQ63
VSS
EVENT#
SDA
SCL
VTT
0.1U_0402_16V4Z~D
DDR_B_D32
DDR_B_D33
CKE0
VDD
NC
BA2
VDD
A12/BC#
A9
VDD
A8
A5
VDD
A3
A1
VDD
CK0
CK0#
VDD
A10/AP
BA0
VDD
WE#
CAS#
VDD
A13
S1#
VDD
TEST
VSS
DQ32
DQ33
VSS
DQS4#
DQS4
VSS
DQ34
DQ35
VSS
DQ40
DQ41
VSS
DM5
VSS
DQ42
DQ43
VSS
DQ48
DQ49
VSS
DQS6#
DQS6
VSS
DQ50
DQ51
VSS
DQ56
DQ57
VSS
DM7
VSS
DQ58
DQ59
VSS
SA0
VDDSPD
SA1
VTT
2.2U_0603_6.3V6K~D
C1149
330U_SX_2VY~D
2
1
10U_0603_6.3V6M~D
C1154
2
1
10U_0603_6.3V6M~D
C1153
2
1
10U_0603_6.3V6M~D
C1152
1
10U_0603_6.3V6M~D
C1151
10U_0603_6.3V6M~D
C1150
10U_0603_6.3V6M~D
2
M_CLK_DDR2
M_CLK_DDR#2
9 M_CLK_DDR2
9 M_CLK_DDR#2
+1.5V_MEM
1
DDR_B_BS2
DDR_B_BS2
C1148
1 @
C1147
2
0.1U_0402_16V4Z~D
C1146
1 @
0.1U_0402_16V4Z~D
2
0.1U_0402_16V4Z~D
1 @
C1145
0.1U_0402_16V4Z~D
C
9
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
201
203
B
DDR_B_DQS#5
DDR_B_DQS5
DDR_B_D46
DDR_B_D47
DDR_B_D52
DDR_B_D53
DDR_B_DM6
DDR_B_D54
DDR_B_D55
DDR_B_D60
DDR_B_D61
DDR_B_DQS#7
DDR_B_DQS7
DDR_B_D62
DDR_B_D63
MEM_SMBDATA
MEM_SMBCLK
MEM_SMBDATA 8,13,15,16
MEM_SMBCLK 8,13,15,16
+0.75V_DDR_VTT
206
A
TYCO_2-2013297-2~D
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Title
DDRIII-SODIMM SLOT2
Size
4
3
2
Rev
0.1
LA-5691P
Date:
5
Document Number
Monday, July 13, 2009
Sheet
1
14
of
51
4
Open
Keep CMOS
Shunt
Clear ME RTC Registers
Open
Keep ME RTC Registers
19
GPIO36
19
GPIO37
19
GPIO16
19 TEMP_ALERT#_R
19
GPIO28
19 SIO_EXT_SCI#_R
+RTC_CELL
1
1
PCH_AZ_SYNC
R120
100K_0402_5%~D
@
@ R78
@ R91
@ R101
@ R102
@ R103
@ R104
@ R105
@ R106
@ R107
@ R108
@ R109
@ R110
@ R111
@ R112
@ R113
@ R114
@ R115
@ R116
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
C296
18P_0402_50V8J~D
2
1
PCH_RTCX1
4
3
2
R222
10M_0402_5%~D
Y1
32.768K_12.5P_1TJS125DJ4A420P~D
+RTC_CELL
2
1
2
1
R226
2
2
REV1.0
PCH_RTCX2
A13
C13
RTCX1
RTCX2
PCH_RTCRST#
B16
RTCRST#
SRTCRST#
J15
INTRUDER#
G15
PCH_INTVRMEN
E11
20K_0402_5%~D
R225
1
2
2
1
INTRUDER#
1M_0402_5%~D
1
2
R236
33_0402_5%~D
1
2
2
30 PCH_AZ_CODEC_BITCLK
30
PCH_AZ_BITCLK
E27
PCH_AZ_RST#
2
33_0402_5%~D
HDA_SYNC
SPKR
C29
PCH_AZ_CODEC_SDIN0
30 PCH_AZ_CODEC_SDIN0
HDA_SDIN0
SPI_WP#0
PCH_SPI_DIN
PCH_SPI_CS0#
14
16
18
JP6
2
4
6
8
10
12
1
3
5
7
9
11
1
3
5
7
9
11
PCH_SPI_DO
PCH_AZ_SDOUT
2
33_0402_5%~D
1
R242
30 PCH_AZ_CODEC_SDOUT
+3.3V_M
37
13
15
17
G2 G1
G4 G3
G6 G5
HDA_SDIN2
D28
PCH_SPI_CLK
SPI_HOLD#0
ME_FWP
35 USB_MCARD3_DET#
+3.3V_ALW_PCH
HDA_SDIN3
G29
ME_FWP
E33
USB_MCARD3_DET#
A33
IHDA
HDA_SDIN1
A29
@
2
1 R804
PCH_JTAG_TCK
J5
200_0402_5%~D 2
1 R807
PCH_JTAG_TMS
J3
200_0402_5%~D 2
1 R805
PCH_JTAG_TDI
L5
200_0402_5%~D 2
1 @ R806
PCH_JTAG_TDO
G1
PCH_JTAG_RST#
2
1
R1281
100_0402_5%~D
2
1
R1282
100_0402_5%~D
2
1
R1315
100_0402_5%~D
@ T189PAD~D
200 MIL SO8
64Mb Flash ROM
C328
1
2
1
+3.3V_M
HDA_DOCK_EN#/GPIO33
HDA_DOCK_RST#/GPIO13
3
4
/CS
DO
VCC
/HOLD
/WP
CLK
GND
DIO
8
7
SPI_HOLD#0
PCH_SPI_DIN 1
R1247
2
2
2
@
R299
3.3K_0402_5%~D
U12
1
PCH_SPI_DIN
6
PCH_SPI_CLK
5
PCH_SPI_DO
JTAG_TMS
JTAG_TDI
JTAG_TDO
J1
TRST#
G33
LPC_LFRAME#
A31
G31
LPC_LDRQ0#
LPC_LDRQ1#
W7
IRQ_SERIRQ
LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
32,33,37,38
32,33,37,38
32,33,37,38
32,33,37,38
IRQ_SERIRQ
PCH_SPI_DIN
SPI_WP#_SEL
1
@ R1060
2
0_0402_5%~D
1
200 MIL SO8
TDO
0.1U_0402_16V4Z~D
TMS
R1238
3.3K_0402_5%~D
32Mb Flash ROM
U13
1
8
2
1
PCH_SPI_CS1#
C1205
1
2
2
R1237
3.3K_0402_5%~D
/CS
VCC
2
DO
/HOLD
7
3
/WP
CLK
6
PCH_SPI_CLK
GND
DIO
5
PCH_SPI_DO
4
TDI
TCK
TRST#
W25X32VSSIG_SO8~D
PLTRST1#_XDP
XDP_DBRESET#
XDP_DBRESET# 8,17
PCH_JTAG_TDO
PCH_JTAG_RST#_R 1
2 PCH_JTAG_RST#
PCH_JTAG_TDI
@ R117
PCH_JTAG_TMS
0_0402_5%~D
AE1
AE3
AG3
AG1
SATA_ODD_PRX_DTX_N1_C
SATA_ODD_PRX_DTX_P1_C
SATA_ODD_PTX_DRX_N1_C
SATA_ODD_PTX_DRX_P1_C
SATA5RXN
SATA5RXP
SATA5TXN
SATA5TXP
SATAICOMPO
AL7
SPI_CS0#
AL9
SPI_CS1#
PCH_SPI_DO
AN7
Ref.
ES1
ES2
R806
No Stuff
200 ohm
SATALED#
SPI_MOSI
AN5
SPI_MISO
PCH JTAG Disable
R1315
No Stuff
R807
200 ohm
ES1
4
HDD
29
29
29
29
ODD
AE11
AE9
AE7
AE5
AC9
AC11
AC5
AC7
AC3
AC1
AA3
AA1
ESATA_PRX_DTX_N4_C 26
ESATA_PRX_DTX_P4_C 26
ESATA_PTX_DRX_N4_C 26
ESATA_PTX_DRX_P4_C 26
E-SATA
AA11
AA9
AA5
AA7
SATA_PRX_DKTX_N5_C 36
SATA_PRX_DKTX_P5_C 36
SATA_PTX_DKRX_N5_C 36
SATA_PTX_DKRX_P5_C 36
DOCKED
AF10
SATA_COMP
AF12
B
+1.05V_RUN
R1201
37.4_0402_1%~D
1
2
SATA0GP/GPIO21
SATA1GP/GPIO19
U7
SATA_ACT#_R
T4
HDD_DET#_R
V2
GPIO19
R382
43K_0402_5%~D
SATA_ACT#_R 41
R131 1
2 0_0402_5%~D
2
1
R58
10K_0402_5%~D
HDD_DET#
ES2
+3.3V_RUN
All
No Stuff
51 ohm
100 ohm
No Stuff
No Stuff
No Stuff
200 ohm
No Stuff
No Stuff
51 ohm
R1281
100 ohm
100 ohm
No Stuff
No Stuff
No Stuff
R805
200 ohm
200 ohm
20K ohm
No Stuff
51 ohm
R1282
100 ohm
100 ohm
10K ohm
No Stuff
No Stuff
R804
51 ohm
51 ohm
51 ohm
51 ohm
51 ohm
R808
20K ohm
20K ohm
No Stuff
No Stuff
R1316
10K ohm
10K ohm
No Stuff
No Stuff
29
+3.3V_RUN
Production
No Stuff
3
C
R265
10K_0402_5%~D
2
1
+3.3V_RUN
PCH_SPI_CS1#
2 PCH_SPI_DIN_R
33_0402_5%~D
SATA1RXN
SATA1RXP
SATA1TXN
SATA1TXP
SATA4RXN
SATA4RXP
SATA4TXN
SATA4TXP
PLTRST_XDP# 18
+3.3V_RUN
PSATA_PRX_DTX_N0_C 29
PSATA_PRX_DTX_P0_C 29
PSATA_PTX_DRX_N0_C 29
PSATA_PTX_DRX_P0_C 29
@R264
@
R264
1K_0402_5%~D
2
1
No Reboot Strap
Low = Default
A
SPKR
High = No Reboot
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PCH (1/8)
Size
Document Number
Rev
0.1
LA-5691P
Date:
5
+3.3V_ALW_PCH
32,33,37,38
SPKR
A
XDP_FN14
XDP_FN15
IBEXPEAK-M SFF_FCBGA1045~D
PCH Pin
+3.3V_M
D
XDP_FN12
XDP_FN13
SPI_CLK
PCH_SPI_CS0#
PCH JTAG Enable
W25Q64BVSSIG_SO8~D
2 SPI_WP#0
0_0402_5%~D
XDP_FN10
XDP_FN11
LPC_LDRQ0# 37
LPC_LDRQ1# 37
SPI_WP#_SEL 37
SPI_WP#_SEL
1
@ R1246
XDP_FN8
XDP_FN9
R118
1K_0402_5%~D
PLTRST1#_XDP 1
2
LPC_LFRAME# 32,33,37,38
AJ7
AJ5
AG11
AG9
SATAICOMPI
SPI
PCH_SPI_CS0#
JTAG_TCK
R1525
0_0402_5%~D
PCH_SPI_CLK 1
2 PCH_SPI AL5
0.1U_0402_16V4Z~D
1
R298
3.3K_0402_5%~D
E31
D32
C31
B32
LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP
SATA3RXN
SATA3RXP
SATA3TXN
SATA3TXP
HDA_SDO
JTAG
TAA module Connector
XDP_FN16
XDP_FN17
1
B
SERIRQ
SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP
TYCO_5-1775013-4~D
51_0402_5%~D
LDRQ0#
LDRQ1#/GPIO23
HDA_RST#
B28
J29
2
4
6
8
10
12
FWH4/LFRAME#
HDA_BCLK
E29
SPKR
30 PCH_AZ_CODEC_RST#
CMOS place near DIMM
INTVRMEN
U1
1
R240
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
GND1
OBSFN_C0
OBSFN_C1
GND3
OBSDATA_C0
OBSDATA_C1
GND5
OBSDATA_C2
OBSDATA_C3
GND7
OBSFN_D0
OBSFN_D1
GND9
OBSDATA_D0
OBSDATA_D1
GND11
OBSDATA_D2
OBSDATA_D3
GND13
ITPCLK/HOOK4
ITPCLK#/HOOK5
VCC_OBS_CD
RESET#/HOOK6
DBR#/HOOK7
GND15
TD0
TRST#
TDI
TMS
GND17
IRQ_SERIRQ
PCH_AZ_SYNC
2
33_0402_5%~D
1
R238
30 PCH_AZ_CODEC_SYNC
@
CMOS1 SHORT PADS~D
1
2
C299
1U_0402_6.3V6K~D
SHORT PADS~D
2
1U_0402_6.3V6K~D
SRTCRST#
20K_0402_5%~D
C
FWH0/LAD0
FWH1/LAD1
FWH2/LAD2
FWH3/LAD3
RTC
1
R224
R223
0_0402_5%~D
1
2
@JXDP2
@
JXDP2
GND0
OBSFN_A0
OBSFN_A1
GND2
OBSDATA_A0
OBSDATA_A1
GND4
OBSDATA_A2
OBSDATA_A3
GND6
OBSFN_B0
OBSFN_B1
GND8
OBSDATA_B0
OBSDATA_B1
GND10
OBSDATA_B2
OBSDATA_B3
GND12
PWRGOOD/HOOK0
HOOK1
VCC_OBS_AB
HOOK2
HOOK3
GND14
SDA
SCL
TCK1
TCK0
GND16
SAMTE_BSH-030-01-L-D-A
U73A
PCH_RTCX2_R
1
18P_0402_50V8J~D
2
C297
1
C298
+3.3V_ALW_PCH
1
On Die PLL VR is supplied by
1.5V when sampled high, 1.8 V
when sampled low
INTVRMEN- Integrated SUS
1.1V VRM Enable
High - Enable Internal VRs
1
PCH_INTVRMEN
@
ME1
+3.3V_ALW_PCH
1
3
5
7
1
XDP_FN0
9
XDP_FN1
@ C1375
11
0.1U_0402_16V4Z~D
13
2
XDP_FN2
15
XDP_FN3
17
19
21
23
25
XDP_FN4
27
XDP_FN5
29
31
XDP_FN6
33
XDP_FN7
35
37
RESET_OUT#
39
17,38 RESET_OUT#
1
2 PCH_PWRBTN#_XDP
41
8,17 SIO_PWRBTN#_R
@ R69
0_0402_5%~D
43
45
47
49
51
8,13,14,16 MEM_SMBDATA
53
8,13,14,16 MEM_SMBCLK
55
PCH_JTAG_TCK
57
59
XDP_FN0
XDP_FN1
XDP_FN2
XDP_FN3
XDP_FN4
XDP_FN5
XDP_FN6
XDP_FN7
XDP_FN8
XDP_FN9
XDP_FN10
XDP_FN11
XDP_FN12
XDP_FN13
XDP_FN14
XDP_FN15
XDP_FN16
XDP_FN17
33_0402_5%~D
33_0402_5%~D
33_0402_5%~D
33_0402_5%~D
33_0402_5%~D
33_0402_5%~D
33_0402_5%~D
33_0402_5%~D
33_0402_5%~D
33_0402_5%~D
33_0402_5%~D
33_0402_5%~D
33_0402_5%~D
33_0402_5%~D
33_0402_5%~D
33_0402_5%~D
33_0402_5%~D
33_0402_5%~D
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
R217
330K_0402_1%~D
2
USB_OC0#_R
USB_OC1#_R
USB_OC2#
USB_OC3#
USB_OC4#
USB_OC5#
USB_OC6#
USB_OC7#
PCMCLK_REQ#_R
LANCLK_REQ#_R
HDD_DET#_R
GPIO19
GPIO36
GPIO37
GPIO16
TEMP_ALERT#_R
GPIO28
SIO_EXT_SCI#_R
18 USB_OC0#_R
18 USB_OC1#_R
18 USB_OC2#
18 USB_OC3#
18 USB_OC4#
18 USB_OC5#
18 USB_OC6#
18 USB_OC7#
16 PCMCLK_REQ#_R
16 LANCLK_REQ#_R
1
2
Clear CMOS
1
2
LPC
Shunt
ME_CLR1 TPM setting
D
3
CMOS setting
SATA
5
CMOS_CLR1
2
Monday, July 13, 2009
Sheet
1
15
of
51
5
4
3
2
1
+3.3V_RUN
@ Q190A
2N7002DW-7-F_SOT363-6~D
2
MEM_SMBCLK
HDD_SMBCLK
1
HDD_SMBCLK 29,38
5
6
D
MEM_SMBDATA
3
HDD_SMBDAT
4
HDD_SMBDAT 29,38
D
@ Q190B
2N7002DW-7-F_SOT363-6~D
U73B
2 0.1U_0402_10V7K~D
2 0.1U_0402_10V7K~D
C326 1
C327 1
2 0.1U_0402_10V7K~D
2 0.1U_0402_10V7K~D
PCIE_PRX_GLANTX_N6
PCIE_PRX_GLANTX_P6
PCIE_PTX_GLANRX_N6
PCIE_PTX_GLANRX_P6
AU33
AR33
BA31
AW31
PERN6
PERP6
PETN6
PETP6
BE31
BC31
AR31
AU31
PERN7
PERP7
PETN7
PETP7
BD32
BB32
BE33
BC33
AM48
AM50
1
R122
+3.3V_ALW_PCH
10/100/1G LAN --->
31 CLK_PCIE_LAN#
31 CLK_PCIE_LAN
31 LANCLK_REQ#
15 LANCLK_REQ#_R
Media Card--->
34 CLK_PCIE_PCM#
34 CLK_PCIE_PCM
34 PCMCLK_REQ#
15 PCMCLK_REQ#_R
B
MiniWPAN (Mini Card 3)--->
Express card--->
MiniWLAN (Mini Card 2)--->
MiniWWAN (Mini Card 1)--->
35 CLK_PCIE_MINI3#
35 CLK_PCIE_MINI3
+3.3V_ALW_PCH
35 MINI3CLK_REQ#
34 CLK_PCIE_EXP#
34 CLK_PCIE_EXP
+3.3V_ALW_PCH
34 EXPCLK_REQ#
35 CLK_PCIE_MINI2#
35 CLK_PCIE_MINI2
+3.3V_ALW_PCH
35 MINI2CLK_REQ#
26 CLK_PCIE_MINI1#
26 CLK_PCIE_MINI1
+3.3V_ALW_PCH
26 MINI1CLK_REQ#
2
10K_0402_5%~D
R1198 1
R1199 1
1
R16
R1293
R1294
PCIECLKREQ0#
K4
2 0_0402_5%~D
2 0_0402_5%~D
PCIE_LAN#
PCIE_LAN
2
LANCLK_REQ#_R R11
AW49
AW51
0_0402_5%~D
1 0_0402_5%~D
1 0_0402_5%~D
2
2
PCIE_PCM#
PCIE_PCM
AT48
AT50
R1466
1
2 0_0402_5%~D
PCMCLK_REQ#_R
R1297
R1302
R61
2
2
1
1 0_0402_5%~D
1 0_0402_5%~D
2 10K_0402_5%~D
PCIE_MINI3#
PCIE_MINI3
R1205
R1206
R523
2
2
2
1 0_0402_5%~D
1 0_0402_5%~D
1 10K_0402_5%~D
PCIE_EXP#
PCIE_EXP
R1203
R1196
R45
2
2
2
1 0_0402_5%~D
1 0_0402_5%~D
1 10K_0402_5%~D
PCIE_MINI2#
PCIE_MINI2
R1195
R1202
R40
2
2
2
1 0_0402_5%~D
1 0_0402_5%~D
1 10K_0402_5%~D
PCIE_MINI1#
PCIE_MINI1
MINI3CLK_REQ#
EXPCLK_REQ#
MINI2CLK_REQ#
MINI1CLK_REQ#
PERN5
PERP5
PETN5
PETP5
N1
AU49
AU51
D8
AR49
AR51
C3
AL49
AL51
G3
AH48
AH50
A9
2
0_0402_5%~D
MEM_SMBDATA 8,13,14,15
+3.3V_ALW_PCH
SML0ALERT#/GPIO60
PERN3
PERP3
PETN3
PETP3
PERN4
PERP4
PETN4
PETP4
MEM_SMBCLK 8,13,14,15
SML0CLK
B8
LAN_SMBCLK
SML0DATA
J9
LAN_SMBDATA
SML1ALERT#/GPIO74
B12
SML1_SMBCLK
A17
SML1_SMBDAT
U11
PCH_CL_CLK1
T10
PCH_CL_DATA1
P10
PCH_CL_RST1#
R9
R1
10K_0402_5%~D
PEG_A_CLKRQ#
1
2
CL_CLK1
CL_RST1#
PCIECLKRQ0#/GPIO73
CLKOUT_PCIE1N
CLKOUT_PCIE1P
PCIECLKRQ1#/GPIO18
CLKOUT_PCIE2N
CLKOUT_PCIE2P
CLKOUT_DMI_N
CLKOUT_DMI_P
CLKIN_DMI_N
CLKIN_DMI_P
CLKIN_BCLK_N
CLKIN_BCLK_P
CLKIN_DOT_96N
CLKIN_DOT_96P
CLKIN_SATA_N/CKSSCD_N
CLKIN_SATA_P/CKSSCD_P
CLKOUT_PCIE3N
CLKOUT_PCIE3P
REFCLK14IN
PCIECLKRQ3#/GPIO25
CLKIN_PCILOOPBACK
CLKOUT_PCIE4N
CLKOUT_PCIE4P
XTAL25_IN
XTAL25_OUT
PCIECLKRQ4#/GPIO26
XCLK_RCOMP
CLKOUT_PCIE5N
CLKOUT_PCIE5P
CLKOUT_PEG_B_N
CLKOUT_PEG_B_P
PEG_B_CLKRQ# /GPIO56
SML1_SMBCLK 38
+3.3V_ALW_PCH
SML1_SMBDAT 38
MEM_SMBCLK
PCH_CL_CLK1 35
2
R252
2
R255
PCH_SMB_ALERT# 2
R1175
1
2.2K_0402_5%~D
1
2.2K_0402_5%~D
1
10K_0402_5%~D
LAN_SMBCLK
1
2.2K_0402_5%~D
1
2.2K_0402_5%~D
MEM_SMBDATA
PCH_CL_DATA1 35
PCH_CL_RST1# 35
AG49
AG51
AL3
AL1
CLK_CPU_EXP#
CLK_CPU_EXP
AN3
AN1
CLK_CPU_DPLL#
CLK_CPU_DPLL
BA23
AW23
CLK_BUF_EXP#
CLK_BUF_EXP
AP4
AP2
CLK_BUF_BCLK#
CLK_BUF_BCLK
G17
E17
CLK_BUF_DOT96#
CLK_BUF_DOT96
AG5
AG7
CLK_BUF_CKSSCD#
CLK_BUF_CKSSCD
R47
CLK_PCH_14M
A43
CLK_PCI_LOOPBACK
AD50
AD48
XTAL25_IN
XTAL25_OUT
AE49
1
R686
CLK_CPU_EXP# 8
CLK_CPU_EXP 8
2
R309
2
R377
LAN_SMBDATA
C
CLK_CPU_DPLL# 8
CLK_CPU_DPLL 8
CLK_PCH_14M
CLK_BUF_EXP# 6
CLK_BUF_EXP 6
@ R1526
10_0402_5%~D
CLK_BUF_BCLK# 6
CLK_BUF_BCLK 6
1
CLK_BUF_DOT96# 6
CLK_BUF_DOT96 6
2
PCIECLKRQ2#/GPIO20
PCIECLKRQ5#/GPIO44
2
2.2K_0402_5%~D
2
2.2K_0402_5%~D
+3.3V_LAN
CLKOUT_PEG_A_N
CLKOUT_PEG_A_P
CLKOUT_DP_N/CLKOUT_BCLK1_N
CLKOUT_DP_P/CLKOUT_BCLK1_P
CLKOUT_PCIE0N
CLKOUT_PCIE0P
1
R1178
1
R1179
SML1_SMBDAT
E7
SML1DATA/GPIO75
CL_DATA1
SML1_SMBCLK
LAN_SMBCLK 31
LAN_SMBDATA 31
SML1CLK/GPIO58
PEG_A_CLKRQ#/GPIO47
PERN8
PERP8
PETN8
PETP8
E9
CLKOUTFLEX0/GPIO64
CLKOUTFLEX1/GPIO65
CLKOUTFLEX2/GPIO66
CLKOUTFLEX3/GPIO67
N51 SIO_14M
CLK_BUF_CKSSCD# 6
CLK_BUF_CKSSCD 6
B
CLK_PCH_14M 6
CLK_PCI_LOOPBACK 18
R379
0_0402_5%~D
2
1
2
90.9_0402_1%~D
R1223
@ R685
1M_0402_5%~D
+1.05V_RUN
2
1 22_0402_5%~D
CLK_SIO_14M 37
R41 PCI_TCM 4@ R1220 2
1 22_0402_5%~D
CLK_PCI_TPM_CHA 33
R43 PCI_TPM
1 22_0402_5%~D
N45 JETWAY14M
@C2066
@C2066
4.7P_0402_50V8C~D
R1219
2
2
@ R36
1
22_0402_5%~D
CLK_PCI_TPM 32
@ Y6
25MHZ_18PF_1Y725000CE1A~D
2
1
2
1
PCIE_PRX_GLANTX_N6
PCIE_PRX_GLANTX_P6
PCIE_PTX_GLANRX_N6_C
PCIE_PTX_GLANRX_P6_C
C1025 1
C1024 1
PCIE_PRX_WPANTX_N5AW29
PCIE_PRX_WPANTX_P5 BA29
PCIE_PTX_WPANRX_N5 BE29
PCIE_PTX_WPANRX_P5 BC29
BD28
BB28
AU29
AR29
MEM_SMBDATA
R381
0_0402_5%~D
1
@
JETWAY_14M 33
2
31
31
31
31
PCIE_PRX_EXPTX_N4
PCIE_PRX_EXPTX_P4
PCIE_PTX_EXPRX_N4
PCIE_PTX_EXPRX_P4
MEM_SMBCLK
A11
1
10/100/1G LAN --->
2 0.1U_0402_10V7K~D
2 0.1U_0402_10V7K~D
L11
2
C
C1008 1
C1009 1
2
0_0402_5%~D
1
R54
12P_0402_50V8J~D
C1168
MiniWPAN (Mini Card 3)--->
35 PCIE_PRX_WPANTX_N5
35 PCIE_PRX_WPANTX_P5
35 PCIE_PTX_WPANRX_N5_C
35 PCIE_PTX_WPANRX_P5_C
PCIE_PRX_PCMTX_N3 AW27
PCIE_PRX_PCMTX_P3 BA27
PCIE_PTX_PCMRX_N3 AU27
PCIE_PTX_PCMRX_P3 AR27
1
R51
PCH_SMB_ALERT#
1
PCIE_PRX_EXPTX_N4
PCIE_PRX_EXPTX_P4
PCIE_PTX_EXPRX_N4_C
PCIE_PTX_EXPRX_P4_C
2 0.1U_0402_10V7K~D
2 0.1U_0402_10V7K~D
SMBDATA
PERN2
PERP2
PETN2
PETP2
J11
2
34
34
34
34
C1373 1
C1374 1
BE27
BC27
AU25
AR25
SMBus
Express card--->
PCIE_PRX_WLANTX_N2
PCIE_PRX_WLANTX_P2
PCIE_PTX_WLANRX_N2
PCIE_PTX_WLANRX_P2
SMBCLK
Link
PCIE_PRX_PCMTX_N3
PCIE_PRX_PCMTX_P3
PCIE_PTX_PCMRX_N3_C
PCIE_PTX_PCMRX_P3_C
2 0.1U_0402_10V7K~D
2 0.1U_0402_10V7K~D
SMBALERT#/GPIO11
Controller
Media Card--->
34
34
34
34
C320 1
C321 1
PERN1
PERP1
PETN1
PETP1
PEG
PCIE_PRX_WLANTX_N2
PCIE_PRX_WLANTX_P2
PCIE_PTX_WLANRX_N2_C
PCIE_PTX_WLANRX_P2_C
2 0.1U_0402_10V7K~D
2 0.1U_0402_10V7K~D
REV1.0
BA25
AW25
BC25
BE25
From CLK BUFFER
35
35
35
35
C317 1
C319 1
PCIE_PRX_WANTX_N1
PCIE_PRX_WANTX_P1
PCIE_PTX_WANRX_N1
PCIE_PTX_WANRX_P1
Clock Flex
MiniWLAN (Mini Card 2)--->
PCIE_PRX_WANTX_N1
PCIE_PRX_WANTX_P1
PCIE_PTX_WANRX_N1_C
PCIE_PTX_WANRX_P1_C
PCI-E*
MiniWWAN (Mini Card 1)--->
26
26
26
26
IBEXPEAK-M SFF_FCBGA1045~D
A
A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PCH (2/8)
Size
Document Number
Rev
0.1
LA-5691P
Date:
5
4
3
2
Monday, July 13, 2009
Sheet
1
16
of
51
5
4
3
2
1
D
D
+3.3V_ALW_PCH
+3.3V_RUN
ME_SUS_PWR_ACK
2
R269
1
10K_0402_5%~D
PCH_PCIE_WAKE#
2
R268
1
1K_0402_5%~D
SIO_SLP_LAN#
2
R380
1
10K_0402_5%~D
PCH_RI#
2
R267
1
10K_0402_5%~D
DMI_CRX_PTX_P3
DMI_CRX_PTX_P2
DMI_CRX_PTX_P1
DMI_CRX_PTX_P0
BE21
BC19
BE17
BA17
DMI_CRX_PTX_N3
DMI_CRX_PTX_N2
DMI_CRX_PTX_N1
DMI_CRX_PTX_N0
BA19
BC23
BD20
BE15
DMI_CRX_PTX_P3
DMI_CRX_PTX_P2
DMI_CRX_PTX_P1
DMI_CRX_PTX_P0
AW19
BE23
BB20
BC15
DMI0RXP
DMI1RXP
DMI2RXP
DMI3RXP
FDI_RXP0
FDI_RXP1
FDI_RXP2
FDI_RXP3
FDI_RXP4
FDI_RXP5
FDI_RXP6
FDI_RXP7
DMI0TXN
DMI1TXN
DMI2TXN
DMI3TXN
DMI0TXP
DMI1TXP
DMI2TXP
DMI3TXP
+1.05V_RUN
R385
49.9_0402_1%~D
1
2
BA21
DMI_COMP_R
AW21
DMI_ZCOMP
FDI_INT
FDI_FSYNC0
FDI_FSYNC1
DMI_IRCOMP
FDI_LSYNC0
FDI_LSYNC1
R48
1
2 8.2K_0402_5%~D
PCH_RSMRST#
R260 1
2 10K_0402_5%~D
XDP_DBRESET#
8,15 XDP_DBRESET#
P4
1
R253
SYS_PWROK
2
0_0402_5%~D
N9
15,38 RESET_OUT#
1
R254
PCH_PWROK
2
0_0402_5%~D
D16
38 PM_MEPWROK
1
R256
PM_MPWROK_R
2
0_0402_5%~D
M10
B
1
R257
2
0_0402_5%~D
PM_DRAM_PWRGD
8 PM_DRAM_PWRGD
38 PCH_RSMRST#
1
R53
38 AC_PRESENT
PCH_RSMRST#
ME_SUS_PWR_ACK
38 ME_SUS_PWR_ACK
8,15 SIO_PWRBTN#_R
38 SIO_PWRBTN#
LAN_RST#
SIO_PWRBTN#_R
2
0_0402_5%~D
AC_PRESENT
C11
D6
D14
N3
R7
N7
SYS_RESET#
WAKE#
SYS_PWROK
PWROK
MEPWROK
LAN_RST#
DRAMPWROK
RSMRST#
SUS_PWR_DN_ACK/GP30
PWRBTN#
ACPRESENT/GPIO31
System Power Management
PCH_PWROK
CLKRUN#/GPIO32
SUS_STAT#/GPIO61
SUSCLK/GPIO62
SLP_S5#/GPIO63
FDI_CTX_PRX_N7
FDI_CTX_PRX_N6
FDI_CTX_PRX_N5
FDI_CTX_PRX_N4
FDI_CTX_PRX_N3
FDI_CTX_PRX_N2
FDI_CTX_PRX_N1
FDI_CTX_PRX_N0
AR17
BA15
BD12
AU15
BE13
AR13
BA13
BA11
FDI_CTX_PRX_P7
FDI_CTX_PRX_P6
FDI_CTX_PRX_P5
FDI_CTX_PRX_P4
FDI_CTX_PRX_P3
FDI_CTX_PRX_P2
FDI_CTX_PRX_P1
FDI_CTX_PRX_P0
BE11
FDI_INT
BB8
FDI_FSYNC0
BC9
FDI_FSYNC1
BE9
FDI_LSYNC0
BC11
FDI_LSYNC1
C7
W1
PCH_PCIE_WAKE#
CLKRUN#
CLKRUN#
K2
SUS_STAT#/LPCPD#
T173
PAD~D
L13
SUSCLK
T179
PAD~D
T2
PAD~D
H8
SIO_SLP_S5#
D2
SIO_SLP_S4#
F4
SIO_SLP_S3#
L9
SIO_SLP_M#
2 PCH_BATLOW#
8.2K_0402_5%~D
PCH_RI#
A
C5
K10
PMSYNCH
RI#
BIA_PWM_PCH
7
7
FDI_LSYNC0
7
FDI_LSYNC1
7
33,37,38
SLP_LAN# / GPIO29
H_PM_SYNC
L_DDC_CLK
L_DDC_DATA
T48
T50
L_CTRL_CLK
L_CTRL_DATA
SIO_SLP_S5# 38
PCH_CRT_DDC_CLK
2
2.2K_0402_5%~D
PCH_CRT_DDC_DAT
2
2.2K_0402_5%~D
LVD_VREFH
LVD_VREFL
AP44
AP46
LVDSA_CLK#
LVDSA_CLK
25 PCH_CRT_BLU
25 PCH_CRT_GRN
25 PCH_CRT_RED
AL43
AK46
AM44
AJ41
SDVO_TVCLKINN
SDVO_TVCLKINP
LVD_IBG
LVD_VBG
AG43
AG41
AL41
AK44
AM46
AJ43
LVDSA_DATA#0
LVDSA_DATA#1
LVDSA_DATA#2
LVDSA_DATA#3
LVDSA_DATA0
LVDSA_DATA1
LVDSA_DATA2
LVDSA_DATA3
LVDSB_CLK#
LVDSB_CLK
LVDSB_DATA#0
LVDSB_DATA#1
LVDSB_DATA#2
LVDSB_DATA#3
LVDSB_DATA0
LVDSB_DATA1
LVDSB_DATA2
LVDSB_DATA3
AA47
AA45
AA43
CRT_BLUE
CRT_GREEN
CRT_RED
PAD~D
25 PCH_CRT_DDC_CLK
25 PCH_CRT_DDC_DAT
SIO_SLP_S3# 37
PAD~D
SIO_SLP_M# 37,46
25 PCH_CRT_HSYNC
25 PCH_CRT_VSYNC
R480
1
1
R673
PCH_CRT_DDC_CLK
PCH_CRT_DDC_DAT
AA49
AC51
CRT_DDC_CLK
CRT_DDC_DATA
20_0402_1%~D
2 HSYNC
2 VSYNC
20_0402_1%~D
W47
W45
W43
AC43
PAD~D
H_PM_SYNC 8
BA39
AW39
DDPC_CTRLCLK
DDPC_CTRLDATA
DDPC_AUXN
DDPC_AUXP
DDPC_HPD
DDPC_0N
DDPC_0P
DDPC_1N
DDPC_1P
DDPC_2N
DDPC_2P
DDPC_3N
DDPC_3P
DDPD_CTRLCLK
DDPD_CTRLDATA
DDPD_AUXN
DDPD_AUXP
DDPD_HPD
DDPD_0N
DDPD_0P
DDPD_1N
DDPD_1P
DDPD_2N
DDPD_2P
DDPD_3N
DDPD_3P
C
Y50
Y48
PCH_SDVO_CTRLCLK 25
PCH_SDVO_CTRLDATA 25
BA41
AW41
BD36
DPB_PCH_DOCK_AUX# 25
DPB_PCH_DOCK_AUX 25
DPB_PCH_DOCK_HPD 36
BC47
BE47
BB44
BD44
BC45
BE45
BC43
BE43
DPB_PCH_LANE_N0
DPB_PCH_LANE_P0
DPB_PCH_LANE_N1
DPB_PCH_LANE_P1
DPB_PCH_LANE_N2
DPB_PCH_LANE_P2
DPB_PCH_LANE_N3
DPB_PCH_LANE_P3
U47
U45
36
36
36
36
36
36
36
36
PCH_DDPC_CTRLCLK 25
PCH_DDPC_CTRLDATA 25
BA43
AW43
BB36
DPC_PCH_DOCK_AUX# 25
DPC_PCH_DOCK_AUX 25
DPC_PCH_DOCK_HPD 36
BB40
BD40
BC41
BE41
AW37
BA37
BA35
AW35
DPC_PCH_LANE_N0
DPC_PCH_LANE_P0
DPC_PCH_LANE_N1
DPC_PCH_LANE_P1
DPC_PCH_LANE_N2
DPC_PCH_LANE_P2
DPC_PCH_LANE_N3
DPC_PCH_LANE_P3
36
36
36
36
36
36
36
36
B
AC49
AA51
AY44
BA45
AU37
BC37
BE37
BE39
BC39
BC35
BE35
AW33
BA33
IBEXPEAK-M SFF_FCBGA1045~D
R672
1K_0402_0.5%~D
E5
SDVO_INTN
SDVO_INTP
DDPB_0N
DDPB_0P
DDPB_1N
DDPB_1P
DDPB_2N
DDPB_2P
DDPB_3N
DDPB_3P
CRT_HSYNC
CRT_VSYNC
DAC_IREF
CRT_IRTN
AU35
AR35
DDPB_AUXN
DDPB_AUXP
DDPB_HPD
PAD~D
SIO_SLP_S4# 37
AU39
AR39
SDVO_STALLN
SDVO_STALLP
SDVO_CTRLCLK
SDVO_CTRLDATA
PCH_CRT_BLU
PCH_CRT_GRN
PCH_CRT_RED
U9
BD8
L_BKLTCTL
AR43
AV46
AN41
AT44
1
R890
1
R887
REV1.0
U49
AR41
AV44
AN43
AT46
+3.3V_RUN
L_BKLTEN
L_VDD_EN
U43
W51
AE43
AE41
CRT_IREF
TP23
BATLOW#/GPIO72
W49
U51
2
1
R275
24 BIA_PWM_PCH
PANEL_BKEN_PCH
ENVDD_PCH
7
FDI_FSYNC1
PCH_PCIE_WAKE# 37
T6
+3.3V_ALW_PCH
7
7
7
7
7
7
7
7
37 PANEL_BKEN_PCH
24,37 ENVDD_PCH
AH46
AH44
T5
SLP_M#
FDI_CTX_PRX_P7
FDI_CTX_PRX_P6
FDI_CTX_PRX_P5
FDI_CTX_PRX_P4
FDI_CTX_PRX_P3
FDI_CTX_PRX_P2
FDI_CTX_PRX_P1
FDI_CTX_PRX_P0
FDI_FSYNC0
T4
SLP_S3#
7
7
7
7
7
7
7
7
FDI_INT
T3
SLP_S4#
U73D
FDI_CTX_PRX_N7
FDI_CTX_PRX_N6
FDI_CTX_PRX_N5
FDI_CTX_PRX_N4
FDI_CTX_PRX_N3
FDI_CTX_PRX_N2
FDI_CTX_PRX_N1
FDI_CTX_PRX_N0
Digital Display Interface
7
7
7
7
DMI_CTX_PRX_P3
DMI_CTX_PRX_P2
DMI_CTX_PRX_P1
DMI_CTX_PRX_P0
FDI_RXN0
FDI_RXN1
FDI_RXN2
FDI_RXN3
FDI_RXN4
FDI_RXN5
FDI_RXN6
FDI_RXN7
DMI0RXN
DMI1RXN
DMI2RXN
DMI3RXN
LVDS
DMI_CRX_PTX_N3
DMI_CRX_PTX_N2
DMI_CRX_PTX_N1
DMI_CRX_PTX_N0
BC21
BE19
BC17
AW17
CRT
7
7
7
7
DMI_CTX_PRX_N3
DMI_CTX_PRX_N2
DMI_CTX_PRX_N1
DMI_CTX_PRX_N0
AU17
AW15
BB12
AR15
BC13
AU13
AW13
AW11
1
DMI_CTX_PRX_P3
DMI_CTX_PRX_P2
DMI_CTX_PRX_P1
DMI_CTX_PRX_P0
REV1.0
FDI
7
7
7
7
1
8.2K_0402_5%~D
U73C
DMI
C
DMI_CTX_PRX_N3
DMI_CTX_PRX_N2
DMI_CTX_PRX_N1
DMI_CTX_PRX_N0
2
R282
FDI Lane Number Reversed
DMI Lane Number Reversed
7
7
7
7
CLKRUN#
A
IBEXPEAK-M SFF_FCBGA1045~D
SIO_SLP_LAN#
SIO_SLP_LAN# 31,37
1
R679
1
R680
1
R681
1
R682
2 PCH_CRT_BLU
150_0402_1%~D
2 PCH_CRT_GRN
150_0402_1%~D
2 PCH_CRT_RED
150_0402_1%~D
2 ENVDD_PCH
100K_0402_5%~D
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PCH (3/8)
Size
Document Number
Rev
0.1
LA-5691P
Date:
5
4
3
2
Monday, July 13, 2009
Sheet
1
17
of
51
5
4
3
2
1
+3.3V_RUN
RP3
1
2
3
4
PCI_DEVSEL#
PCI_PIRQC#
PCI_REQ0#
PCI_PERR#
8
7
6
5
8.2K_1206_8P4R_5%~D
RP4
U73E
PCI_PIRQB#
LVDS_CBL_DET#
PCI_SERR#
CAM_CBL_DET#
8
7
6
5
8.2K_1206_8P4R_5%~D
RP6
1
2
3
4
PCI_STOP#
PCI_PLOCK#
PCI_IRDY#
PCI_PIRQA#
8
7
6
5
8.2K_1206_8P4R_5%~D
C
1
R817
1
R590
GPIO3
2
8.2K_0402_5%~D
BT_DET#
2
8.2K_0402_5%~D
J47
D46
J41
F48
1
PCI_GNT3#
R863
4.7K_0402_5%~D
@
2
26 PCIE_MCARD2_DET#
39
BT_DET#
35 PCIE_MCARD3_DET#
24 LVDS_CBL_DET#
A16 swap override Strap/Top-Block
29,38 HDD_FALL_INT1
Swap Override jumper
PCI_GNT#3
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
B36
L37
G49
B44
PCI_REQ0#
PCI_REQ1#
BT_DET#
L39
E41
L35
M50
PCI_GNT0#
PCI_GNT1#
PCIE_MCARD3_DET#
PCI_GNT3#
H50
H48
C41
J45
LVDS_CBL_DET#
GPIO3
CAM_CBL_DET#
FFS_PCH_INT
D50
M48
D44
A45
PCI_SERR#
PCI_PERR#
E51
J43
24 CAM_CBL_DET#
1
2
R632
0_0402_5%~D
@ R121 1
2 0_0402_5%~D PCH_PCIRST#
Low = A16 swap
F2
High = Default
B
PCI_IRDY#
A37
E47
D48
G43
PCI_DEVSEL#
PCI_FRAME#
R100
R97
R94
R14
32 PLTRST_USH#
34 PLTRST_R5U232#
15 PLTRST_XDP#
31 PLTRST_LAN#
1
1
1
1
2
2
2
2
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
37 CLK_PCI_5028
38 CLK_PCI_MEC
36 CLK_PCI_DOCK
16 CLK_PCI_LOOPBACK
+3.3V_RUN
D40
PCI_STOP#
PCI_TRDY#
G37
J37
L7
R1216
R1217
R1215
R63
PCI_PLOCK#
2
PCH_PLTRST#
D4
PCI_5028
PCI_MEC
PCI_DOCK
N43
R45
R51
N49
R49
1 22_0402_5%~D
1 22_0402_5%~D
2 22_0402_5%~D
2
2
1
1 22_0402_5%~D PCI_LOOPBACKOUT
C/BE0#
C/BE1#
C/BE2#
C/BE3#
AT4
BA3
AU3
AU1
NV_RCOMP
BA1
NV_WR#0_RE#
NV_WR#1_RE#
+VCCPNAND
AN9
AN11
AR7
AR5
AR1
AR9
AR11
AU5
AU9
AW5
AW7
BB2
BB4
AW9
BA9
BC5
NV_ALE
NV_CLE
NV_RB#
D
1
NV_DQS0
NV_DQS1
NV_DQ0/NV_IO0
NV_DQ1/NV_IO1
NV_DQ2/NV_IO2
NV_DQ3/NV_IO3
NV_DQ4/NV_IO4
NV_DQ5/NV_IO5
NV_DQ6/NV_IO6
NV_DQ7/NV_IO7
NV_DQ8/NV_IO8
NV_DQ9/NV_IO9
NV_DQ10/NV_IO10
NV_DQ11/NV_IO11
NV_DQ12/NV_IO12
NV_DQ13/NV_IO13
NV_DQ14/NV_IO14
NV_DQ15/NV_IO15
PIRQA#
PIRQB#
PIRQC#
PIRQD#
REQ0#
REQ1#/GPIO50
REQ2#/GPIO52
REQ3#/GPIO54
GNT0#
GNT1#/GPIO51
GNT2#/GPIO53
GNT3#/GPIO55
PIRQE#/GPIO2
PIRQF#/GPIO3
PIRQG#/GPIO4
PIRQH#/GPIO5
PCIRST#
SERR#
PERR#
IRDY#
PAR
DEVSEL#
FRAME#
@ R872
10K_0402_5%~D
NV_ALE
Danbury Technology Enabled
NV_ALE
High = Enabled (Default)
Low = Disabled
NV_ALE
NV_CLE
AV2
+VCCPNAND
AV4
AW1
C
@R866
@
R866
1K_0402_5%~D
NV_WE#_CK0
NV_WE#_CK1
AR3
BA5
USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P
USBP10N
USBP10P
USBP11N
USBP11P
USBP12N
USBP12P
USBP13N
USBP13P
A19
C19
J19
L19
B20
D20
G19
E19
G21
E21
C21
A21
J23
L23
G23
E23
C23
A23
L25
J25
D24
B24
C25
A25
J27
G27
E25
G25
USBP0USBP0+
C27
USBRBIAS
PLOCK#
USBRBIAS#
STOP#
TRDY#
USBRBIAS
PME#
OC0#/GPIO59
OC1#/GPIO40
OC2#/GPIO41
OC3#/GPIO42
OC4#/GPIO43
OC5#/GPIO9
OC6#/GPIO10
OC7#/GPIO14
PLTRST#
CLKOUT_PCI0
CLKOUT_PCI1
CLKOUT_PCI2
CLKOUT_PCI3
CLKOUT_PCI4
USBP2USBP2+
USBP4USBP4+
USBP5USBP5+
USBP6USBP6+
USBP7USBP7+
USBP8USBP8+
USBP9USBP9+
USBP10USBP10+
USBP11USBP11+
USBP12USBP12+
USBP13USBP13+
A27
C9
E15
G13
C15
A15
C17
D10
D12
USB_OC0#_R
USB_OC1#_R
USBP0- 26
USBP0+ 26
----->Right Side
USBP2- 26
USBP2+ 26
----->Left Side
USBP4- 35
USBP4+ 35
USBP5- 27
USBP5+ 27
USBP6- 39
USBP6+ 39
USBP7- 32
USBP7+ 32
USBP8- 36
USBP8+ 36
USBP9- 36
USBP9+ 36
USBP10- 34
USBP10+ 34
USBP11- 24
USBP11+ 24
USBP12- 28
USBP12+ 28
USBP13- 35
USBP13+ 35
----->WLAN
----->WWAN
----->Blue Tooth
----->BIO
----->DOCK
----->DOCK
----->Express Card
----->Camera
----->BKT
----->WPAN
NV_CLE
DMI Termination Voltage
NV_CLE
USB_OC5#
USB_OC6#
USB_OC7#
USB_OC2#
2
R303
22.6_0402_1%~D
1
1
2 0_0402_5%~D
2 0_0402_5%~D
USB_OC2#
USB_OC3#
USB_OC4#
USB_OC5#
USB_OC6#
USB_OC7#
USB_OC0#
USB_OC1#
USB_OC2#
USB_OC3#
USB_OC4#
USB_OC5#
USB_OC6#
USB_OC7#
Set to Vcc when HIGH
+3.3V_ALW_PCH
Within 500 mils
R71
R77
Set to Vss when LOW
RP1
USB_OC0#
USB_OC1#
USB_OC3#
USB_OC4#
1
4
3
2
1
5
6
7
8
B
10K_1206_8P4R_5%~D
RP2
4
5
3
6
2
7
1
8
10K_1206_8P4R_5%~D
26
26
15
15
15
15
15
15
USB_OC0#_R 15
USB_OC1#_R 15
IBEXPEAK-M SFF_FCBGA1045~D
C40
1
AU7
AW3
AL11
BA7
2
RP5
1
2
3
4
NV_CE#0
NV_CE#1
NV_CE#2
NV_CE#3
1
+3.3V_RUN
REV1.0
2
8.2K_1206_8P4R_5%~D
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
NVRAM
B40
G47
E39
G39
C39
C45
J35
C35
A41
J39
A47
D36
L51
L49
K48
J51
L47
C47
J49
C37
A39
G51
L45
E45
L43
G35
E49
E43
G45
C43
L41
G41
USB
PCI_TRDY#
PCI_FRAME#
PCI_REQ1#
PCI_PIRQD#
8
7
6
5
PCI
1
2
3
4
D
2
4
PCH_PLTRST#_EC
Boot BIOS Strap
PCH_PLTRST#_EC 8,26,33,34,35,37,38
G
O
A
PCI_GNT0#
PCI_GNT#1
TC7SH08FU_SSOP5~D
PCI_GNT#0
Boot BIOS Location
0
0
LPC
0
1
Reserved (NAND)
1
0
PCI
1
1
SPI
PCI_GNT1#
2
@
R93
1K_0402_5%~D
A
1
B
2
R79
1K_0402_5%~D
2
1
1
3
PCH_PLTRST#
A
P
5
0.1U_0402_16V4Z~D
U11
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
@
Title
PCH (4/8)
Size
*
4
3
Rev
0.1
LA-5691P
Date:
5
Document Number
2
Monday, July 13, 2009
Sheet
1
18
of
51
5
4
3
2
1
D
D
U73F
15 SIO_EXT_SCI#_R
REV1.0
SIO_EXT_SMI#
38 SIO_EXT_SMI#
31 PM_LANPHY_ENABLE
TACH1/GPIO1
GPIO6
A35
TACH2/GPIO6
GPIO7
E35
SIO_EXT_SMI#
G9
PM_LANPHY_ENABLE
F6
G5
37 SIO_EXT_WAKE#
15
GPIO16
30 SPEAKER_DET#
@T26
@
T26 PAD~D
GPIO16
W9
SPEAKER_DET#
C33
GPIO22
U5
35 PCIE_MCARD1_DET#
TP_ONDIE_PLL_VR
15
+3.3V_ALW_PCH
Internal pull up GPIO27 to
enable VccVRM
1
C
35 USB_MCARD1_DET#
32 CONTACTLESS_DET#
15
GPIO36
15
R1284
8.2K_0402_5%~D
@
2
GPIO28
@ T25 PAD~D
USB_MCARD1_DET#
R5
GPIO37
2 0_0402_5%~D
V4
GPIO37
M4
TPM_ID0
R3
TPM_ID1
R1
TP_ONDIE_PLL_VR
26 USB_MCARD2_DET#
29
FFS_INT2
USB_MCARD2_DET#
J7
GPIO46
H4
FFS_INT2
W3
R882 1
2 0_0402_5%~D
TEMP_ALERT#_R
IO_LOOP
37 TEMP_ALERT#
15 TEMP_ALERT#_R
26 IO_LOOP
W11
A7
A20GATE
SATA4GP/GPIO16
CLKOUT_BCLK0_N/CLKOUT_PCIE8N
TACH0/GPIO17
CLKOUT_BCLK0_P/CLKOUT_PCIE8P
SCLOCK/GPIO22
PECI
RCIN#
PROCPWRGD
GPIO28
THRMTRIP#
+3.3V_RUN
B
2
R1242
2
R1243
2
R1244
2
R1245
1
R95
1
R1529
1
R1530
1
R1531
1
R1532
1
R1533
CONTACTLESS_DET#
1
10K_0402_5%~D
GPIO37
1
10K_0402_5%~D
GPIO16
1
10K_0402_5%~D
TEMP_ALERT#
1
10K_0402_5%~D
SPEAKER_DET#
2
8.2K_0402_5%~D
GPIO1
2
10K_0402_5%~D
GPIO6
2
10K_0402_5%~D
GPIO7
2
10K_0402_5%~D
GPIO22
2
10K_0402_5%~D
GPIO34
2
10K_0402_5%~D
All NCTF pins should have thick
traces at 45°from the pad.
CLK_CPU_BCLK
BC7
H_PECI
U3
SIO_RCIN#
BE7
H_CPUPWRGD
BE5
PCH_THRMTRIP#_R
SIO_EXT_SCI#
CLK_CPU_BCLK# 8
CLK_CPU_BCLK 8
H_PECI
8
SIO_RCIN#
38
TP1
SATA3GP/GPIO37
2
10K_0402_5%~D
R237
56_0402_5%~D
H_CPUPWRGD 8
AU21
TP3
AU19
TP4
BA51
TP5
BA49
TP6
AY50
SDATAOUT0/GPIO39
PCIECLKRQ6#/GPIO45
PCIECLKRQ7#/GPIO46
SDATAOUT1/GPIO48
TP7
SATA5GP/GPIO49/TEMP_ALERT#
TP8
GPIO57
TP10
TP12
TP13
TP14
TP 15
TP16
TP17
TP 18
NC_1
NC_2
NC_3
NC_4
NC_5
INIT3_3V#
TP24
C33
0.1U_0402_16V4Z~D
C
+3.3V_ALW_PCH
AU23
TP2
SLOAD/GPIO38
VSS_NCTF_1
VSS_NCTF_2
VSS_NCTF_3
VSS_NCTF_4
VSS_NCTF_5
VSS_NCTF_6
VSS_NCTF_7
VSS_NCTF_8
VSS_NCTF_9
VSS_NCTF_10
VSS_NCTF_11
VSS_NCTF_12
VSS_NCTF_13
VSS_NCTF_14
VSS_NCTF_15
VSS_NCTF_16
VSS_NCTF_17
VSS_NCTF_18
VSS_NCTF_19
VSS_NCTF_20
VSS_NCTF_21
VSS_NCTF_22
VSS_NCTF_23
1
R272
+1.05V_RUN_VTT
2
SATA2GP/GPIO36
RSVD
2 GPIO46
10K_0402_5%~D
CLK_CPU_BCLK#
AK4
1
8.2K_0402_5%~D
1
10K_0402_5%~D
1
NCTF
1
R1309
AK2
SIO_RCIN#
SIO_A20GATE 38
GPIO35
+3.3V_ALW_PCH
A3
A49
A5
A50
A51
B2
B50
B51
BC1
BC51
BD1
BD2
BD50
BD51
BE1
BE2
BE3
BE49
BE50
BE51
C1
C51
E1
SIO_A20GATE
STP_PCI#/GPIO34
TP9
VSS_NCTF_1
VSS_NCTF_2
VSS_NCTF_3
VSS_NCTF_4
VSS_NCTF_5
VSS_NCTF_6
VSS_NCTF_7
VSS_NCTF_8
VSS_NCTF_9
VSS_NCTF_10
VSS_NCTF_11
VSS_NCTF_12
VSS_NCTF_13
VSS_NCTF_14
VSS_NCTF_15
VSS_NCTF_16
VSS_NCTF_17
VSS_NCTF_18
VSS_NCTF_19
VSS_NCTF_20
VSS_NCTF_21
VSS_NCTF_22
VSS_NCTF_23
V10
2
R230
2
R231
GPIO15
GPIO27
L1
+3.3V_RUN
AJ49
AJ51
SIO_A20GATE
LAN_PHY_PWR_CTRL/GPIO12
L3
N5
CLKOUT_PCIE7N
CLKOUT_PCIE7P
AN49
AN51
GPIO8
GPIO24
GPIO34
R877 1
TACH3/GPIO7
G7
GPIO28
CLKOUT_PCIE6N
CLKOUT_PCIE6P
1
2
1K_0402_5%~D
BMBUSY#/GPIO0
CPU
1
@ R99
W5
E37
2
2
R130
0_0402_5%~D
MISC
1
GPIO1
GPIO
SIO_EXT_SCI#
38 SIO_EXT_SCI#
IO_LOOP
2
R835
1
100K_0402_5%~D
GPIO28
2
R74
1
10K_0402_5%~D
SIO_EXT_SMI#
1
R274
2
10K_0402_5%~D
AY48
AJ9
J17
L17
AE47
AE45
L29
J31
L31
B
L33
J13
W41
AC41
AA41
U41
N41
P2
INIT3_3V#
PAD~D
T7 @
G11
IBEXPEAK-M SFF_FCBGA1045~D
+3.3V_RUN
1
1
4@ R787
20K_0402_5%~D
2
A
TPM_ID1
6@
TPM_ID0
TPM_ID1
0
0
0
1
USH1.0 (For SSI)
1
0
USH2.0
1
1
1
R922
10K_0402_5%~D
2
TPM_ID0
5@
3@ R339
2.2K_0402_5%~D
China TPM
No TPM, No China TPM
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
2
1
A
R273
10K_0402_5%~D
2
+3.3V_RUN
Title
-----> will use MEMO control pop R339
& de-pop R787 when USH1.0 enable
for SSI build only
PCH (5/8)
Size
4
3
Rev
0.1
LA-5691P
Date:
5
Document Number
2
Monday, July 13, 2009
Sheet
1
19
of
51
5
4
3
2
1
PCH Power Rail Table
+1.05V_RUN
1
VSSA_DAC
AC47
2
VCCALVDS
AD38
VSSA_LVDS
AD36
1
2
C87
0.1U_0402_10V7K~D
VCCADAC
L49
2
1
BLM18PG181SN1_0603~D
+VCCADAC
AC45
C109
0.01U_0402_16V7K~D
REV1.0
CRT
2
VCCCORE[1]
VCCCORE[2]
VCCCORE[3]
VCCCORE[4]
VCCCORE[5]
VCCCORE[6]
VCCCORE[7]
VCCCORE[8]
VCCCORE[9]
VCCCORE[10]
VCCCORE[11]
VCCCORE[12]
VCCCORE[13]
VCCCORE[14]
VCCCORE[15]
VCCCORE[16]
Current =0.069A
POWER
VCC CORE
1
U73G
AB24
AB25
AC24
AC25
AD24
AD25
AF24
AF25
AF27
AF28
AH27
AH28
AH30
AH31
Y22
Y24
C77
1U_0402_6.3V6K~D
2
D
C1139
10U_0805_4VAM~D
1
S0 Iccmax
Current (A)
+3.3V_RUN
Current =1.432A
1
2
Voltage Rail
Voltage
V_CPU_IO
1.1/1.05
< 1 (mA)
V5REF
5
< 1 (mA)
V5REF_Sus
5
< 1 (mA)
C38
10U_0805_4VAM~D
D
3.3
0.357
VccAClk
1.1
0.052
VccADAC
3.3
0.069
VccADPLLA
1.1
0.068
VccADPLLB
1.1
0.069
VccapllEXP
1.1
0.04
VccCore
1.1
1.432
VccDMI
1.1
0.058
Vcc3_3
AK24
LVDS
+1.05V_RUN
VCCIO[15]
VCC_TX_LVDS[1]
VCC_TX_LVDS[2]
VCC_TX_LVDS[3]
VCC_TX_LVDS[4]
AF36
AF38
AH36
AH38
AK27
AK28
AM19
AM21
AM22
AM24
AM25
AM16
AM18
2 @
+1.05V_RUN
VCCPNAND[1]
VCCPNAND[2]
VCCPNAND[3]
VCCPNAND[4]
2
C93
0.1U_0402_10V7K~D
AR21
AK21
+1.05V_RUN
+VCCAFDI_VRM
AP22
VCCFDIPLL
VCCIO[16]
VCCVRM[2]
B
Current =0.196A
1
2
R391
0_0603_5%~D
AH22
+1.05V_+1.5V_1.8V_RUN
+1.05V_RUN_VTT
1
AF18
AF19
AH18
AH19
1
NAND / SPI
VCC3_3[1]
FDI
BD16
2 @
1
2
Place C22 Near BD16 pin
1
+3.3V_RUN
Current =0.058A
VCCDMI
AM38
C22
1U_0402_6.3V6K~D
C85
0.1U_0402_10V7K~D
2
AB33
AB34
AB36
AB38
Y36
Y38
+1.5V_1.8V_RUN_VCCADMI_VRM
VCCVRM[1]
Current =0.357A
+3.3V_RUN
1
2
VCC3_3[2]
VCC3_3[3]
VCC3_3[4]
VCC3_3[5]
VCC3_3[6]
VCC3_3[7]
DMI
2
1
VCCIO[1]
VCCIO[2]
VCCIO[3]
VCCIO[4]
VCCIO[5]
VCCIO[6]
VCCIO[7]
VCCIO[8]
VCCIO[9]
PCI E*
2
1
C84
1U_0402_6.3V6K~D
2
1
C83
1U_0402_6.3V6K~D
2
1
C81
1U_0402_6.3V6K~D
1
C80
10U_0805_4VAM~D
C
C82
1U_0402_6.3V6K~D
Current =3.062A
VCCAPLL_EXP
2
C1140
1U_0402_6.3V6K~D
C94
0.1U_0402_10V7K~D
1
C78
1U_0402_6.3V6K~D
AM27
HVCMOS
Place C78 Near AM27 pin
+1.8V_RUN
Current =0.156A
VccDMI
1.1
0.061
VccFDIPLL
1.1
0.037
VccIO
1.1
3.062
VccLAN
1.1
0.32
VccME
1.1
1.849
VccME3_3
3.3
0.085
VccpNAND
1.8
0.156
VccRTC
3.3
2 (mA)
VccSATAPLL
1.1
0.031
VccSus3_3
3.3
0.163
3.3
0.006
VccSusHDA
C
Current =0.085A
VCCME3_3[1]
VCCME3_3[2]
VCCME3_3[3]
VCCME3_3[4]
AF14
AF16
AH14
AH16
VccVRM
+3.3V_M
1
2
1.8 / 1.5
VccVRM
0.196
11
< 1 (mA)
VccALVDS
3.3
< 1 (mA)
VccTX_LVDS
1.8
0.059
B
C95
0.1U_0402_10V7K~D
IBEXPEAK-M SFF_FCBGA1045~D
+1.05V_+1.5V_1.8V_RUN
R390
0_0603_5%~D
1
2
+VCCAFDI_VRM
+1.5V_RUN
+1.05V_+1.5V_1.8V_RUN
+1.8V_RUN
2
1
@ R96
@R96
0_0603_5%~D
+1.05V_RUN
2
1
R387
0_0603_5%~D
+1.05V_+1.5V_1.8V_RUN
2
1
@ R80
@R80
0_0603_5%~D
A
A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PCH (6/8)
Size
Document Number
Rev
0.1
LA-5691P
Date:
5
4
3
2
Monday, July 13, 2009
Sheet
1
20
of
51
AD31
V27
+VCCRTCEXT
L15
C103
0.1U_0402_10V7K~D
2
AR23
+1.05V_+1.5V_1.8V_RUN
+1.05V_RUN_VCCA_A_DPL
+1.05V_RUN_VCCA_B_DPL
+1.05V_RUN R689
0_0805_5%~D
1
2
AD34
1
B
+3.3V_ALW_VCCPSUS
+DCPSUS
1
2
T18
T19
P14
P16
P18
P19
Y18
+3.3_RUN_VCCPCORE
Y19
1
2
L53
10UH_LB2012T100MR_20%_0805~D 1
+
2
2
+1.05V_RUN_VCCA_B_DPL
1
2
1
+
2
1
2
VCCVRM[3]
VCCADPLLA
2
1
2
E13
1
2
C18
0.1U_0402_10V7K~D
S
D
2
1
2
VCCADPLLB
VCCIO[11]
VCCIO[12]
VCCIO[13]
VCCIO[10]
V5REF_SUS
V5REF
VCC3_3[10]
VCC3_3[11]
VCC3_3[12]
VCC3_3[13]
VCC3_3[14]
VCC3_3[15]
VCCIO[24]
+PCH_V5REF_SUS
T25
Follow DG 1.11
+5V_RUN +3.3V_RUN
T21
+1.05V_RUN
J21
+PCH_V5REF_SUS
J33
+PCH_V5REF_RUN
VCC3_3[16]
P30
C
R311
100_0402_5%~D
R517
0_0805_5%~D
2
1
+3.3V_RUN_VCCPPCI
P31
C342
1U_0603_10V6K~D
D15
RB751S40T1_SOD523-2~D
+PCH_V5REF_RUN
1
+3.3V_RUN
2
C335
1U_0603_10V6K~D
1
P33
2
P34
C356
0.1U_0402_10V7K~D
+3.3V_RUN
P36
P38
1
AJ11
2
C1203
0.1U_0402_10V7K~D
VCCIO[25]
DCPSST
AJ1
+VCCSATAPLL
1
AD14
2
DCPSUS[3]
DCPSUS[4]
VCCSUS3_3[29]
VCCSUS3_3[30]
VCCSUS3_3[31]
VCCSUS3_3[32]
VCC3_3[8]
VCC3_3[9]
V_CPU_IO[2]
VCCRTC
AD16
VCCVRM
AR19
VCCIO[16]
+VCCIO
AB16
AB18
VCCIO[18]
AB19
1
2
VCCIO[20]
VCCIO[21]
VCCIO[22]
VCCME[7]
VCCME[8]
VCCME[9]
VCCME[10]
VCCSUSHDA
IBEXPEAK-M SFF_FCBGA1045~D
AC14
AC16
AC18
AC19
B
+1.05V_+1.5V_1.8V_RUN
AB14
VCCIO[17]
VCCIO[19]
CPU
V_CPU_IO[1]
VCCIO[14]
VCCIO[15]
HDA
1
C783
0.1U_0402_10V7K~D
+VCCA_DPLL_L
5
1
D16
RB751S40T1_SOD523-2~D
2
R557
0_0805_5%~D
2
1
+1.05V_RUN
+1.05V_M
V34
T34
T36
V36
+VCCSUSHDA
L27
1
2
2
1
R650
0_0603_5%~D
+3.3V_ALW_PCH
A
C672
1U_0402_6.3V6K~D
DELL CONFIDENTIAL/PROPRIETARY
C107
1U_0402_6.3V6K~D
2
0_0805_5%~D
C105
220U_B2_2.5VM_R35M~D
1
R678
DCPRTC
VCCSUS3_3[28]
+RTC_CELL
+1.05V_RUN_VCCA_A_DPL
C104
220U_B2_2.5VM_R35M~D
+1.05V_RUN
2
AK19
C781
0.1U_0402_10V7K~D
L52
10UH_LB2012T100MR_20%_0805~D
1
2
1
C2060
1U_0402_6.3V6K~D
1
C763
4.7U_0603_6.3V6K~D
2
2
AK18
C113
0.1U_0402_10V7K~D
+V_CPU_IO
1
A
VCCME[16]
2
C760
0.1U_0402_10V7K~D
C777
0.1U_0402_10V7K~D
2
C106
1U_0402_6.3V6K~D
R692
0_0603_5%~D
1
2
VCCME[15]
1
VCCIO[23]
1
+1.05V_RUN_VTT
VCCME[14]
RTC
2
C759
0.1U_0402_10V7K~D
2
N11
R313
100_0402_5%~D
1
VCCSATAPLL
+VCCSST
C677
0.1U_0402_10V7K~D
2
AM33
AD33
C217
0.1U_0402_10V7K~D
2
1
C139
1U_0402_6.3V6K~D
1
C138
1U_0402_6.3V6K~D
2
C108
1U_0402_6.3V6K~D
1
AM34
AD19
AF33
AF34
+1.05V_RUN_SSCVCC
VCCME[11]
D
+3.3V_ALW_PCH
VCCME[6]
VCCME[13]
1
+5V_ALW_PCH
VCCME[5]
V30
Y30
2
+3.3V_ALW_PCH
VCCME[4]
VCCME[12]
Y28
2
1
40 ALW_ENABLE
R500
0_0603_5%~D
2
1
+3.3V_ALW_VCCPUSB
VCCME[1]
V28
Y27
C96
1U_0402_6.3V6K~D
2
2
AD30
2
1
VCCME[3]
Q10
SSM3K7002FU_SC70-3~D
1
1
AC31
P22
P24
P25
P27
DCPSUSBYP[1]
DCPSUSBYP[2]
VCCME[2]
+1.05V_RUN
1
2
2
AC30
+1.05V_RUN_VCCUSBCORE
USB
AB31
+1.05V_M_VCCEPW
1
T24
V21
V22
V24
3
C610
1U_0402_6.3V6K~D
2
AB30
2
VCCSUS3_3[1]
VCCSUS3_3[2]
VCCSUS3_3[3]
VCCSUS3_3[4]
Clock and Miscellaneous
C
1
C110
0.1U_0402_10V7K~D
VCCLAN[1]
VCCLAN[2]
SATA
2
+3.3V_RUN
R691
0_0805_5%~D
1
2
VCCIO[26]
VCCIO[27]
VCCIO[28]
VCCIO[29]
PCI/GPIO/LPC
1
2
+TP_PCH_VCCDSW V14
V16
1
C101
1U_0402_6.3V6K~D
2
1
AF21
AF22
C102
1U_0402_6.3V6K~D
1
C116
22U_0805_6.3V6M~D
R674
0_0805_5%~D
1
2
C117
22U_0805_6.3V6M~D
2
C100
1U_0402_6.3V6K~D
R669
0_0603_5%~D
+1.05V_M_VCCAUX
1
C112
22U_0805_6.3V6M~D
2
C111
22U_0805_6.3V6M~D
1
1
VCCACLK
+5V_ALW_PCH
1
C611
1U_0402_6.3V6K~D
AE51
R499
0_0603_5%~D
2
1
1
REV1.0
PCI/GPIO/LPC
D
+3.3V_ALW_PCH R690
0_0805_5%~D
1
2
+5V_ALW
POWER
C97
0.1U_0402_10V7K~D
U73H
2 @
+1.05V_M
+1.05V_M
+VCCACLK
C39
1U_0402_6.3V6K~D
1
1
1
Place C39 Near AE51 pin
2
R57
20K_0402_5%~D
3
2
G
4
C99
0.1U_0402_10V7K~D
5
Compal Electronics, Inc.
Title
PCH (7/8)
Size
Document Number
Rev
0.1
LA-5691P
Date:
4
3
2
Monday, July 13, 2009
Sheet
1
21
of
51
5
4
3
2
1
D
D
U73J
U73I
AU11
AB12
AB2
AB21
AB22
AB27
AB28
AB4
AB40
AB42
AB44
AB46
AB48
AB50
AB6
AB8
AC21
AC22
AC27
AC28
AC33
AC34
AC36
AC38
AD10
AD12
AD18
AD2
AD21
AD22
AD27
AD28
AD4
AD40
AD42
AD44
AD46
AD6
AD8
AF2
AF30
AF31
AF4
AF40
AF42
AF44
AF46
AF48
AF50
AF6
AF8
AG45
AG47
AH10
AH2
AH21
AH24
AH25
AH33
AH34
AH4
AH40
AH42
AH6
AH8
AJ3
AJ45
AJ47
C
B
AT32
AT34
AT36
AT38
AT40
AT42
AT6
AT8
AU41
AU43
AU45
AU47
AV10
AV12
AV14
AV16
AV18
AV20
AV22
AV24
AV26
AV28
AV30
AV32
AV34
AV36
AV38
AV40
AV42
AV48
AV50
AV6
AV8
AW45
AW47
AY10
AY12
AY14
AY16
AY18
AY2
AY20
AY22
AY24
AY26
AY28
AY30
AY32
AY34
AY36
AY38
AY4
AY40
AY42
AY46
AY6
AY8
B10
B14
B18
B22
B26
VSS[0]
VSS[1]
VSS[2]
VSS[3]
VSS[4]
VSS[5]
VSS[6]
VSS[7]
VSS[8]
VSS[9]
VSS[10]
VSS[11]
VSS[12]
VSS[13]
VSS[14]
VSS[15]
VSS[16]
VSS[17]
VSS[18]
VSS[19]
VSS[20]
VSS[21]
VSS[22]
VSS[23]
VSS[24]
VSS[25]
VSS[26]
VSS[27]
VSS[28]
VSS[29]
VSS[30]
VSS[31]
VSS[32]
VSS[33]
VSS[34]
VSS[35]
VSS[36]
VSS[37]
VSS[38]
VSS[39]
VSS[40]
VSS[41]
VSS[42]
VSS[43]
VSS[44]
VSS[45]
VSS[46]
VSS[47]
VSS[48]
VSS[49]
VSS[50]
VSS[51]
VSS[52]
VSS[53]
VSS[54]
VSS[55]
VSS[56]
VSS[57]
VSS[58]
VSS[59]
VSS[60]
VSS[61]
VSS[62]
VSS[63]
VSS[64]
VSS[65]
VSS[66]
VSS[67]
U73K
REV1.0
REV1.0
VSS[68]
VSS[69]
VSS[70]
VSS[71]
VSS[72]
VSS[73]
VSS[74]
VSS[75]
VSS[76]
VSS[77]
VSS[78]
VSS[79]
VSS[80]
VSS[81]
VSS[82]
VSS[83]
VSS[84]
VSS[85]
VSS[86]
VSS[87]
VSS[88]
VSS[89]
VSS[90]
VSS[91]
VSS[92]
VSS[93]
VSS[94]
VSS[95]
VSS[96]
VSS[97]
VSS[98]
VSS[99]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
AK10
AK12
AK14
AK16
AK22
AK25
AK30
AK31
AK33
AK34
AK36
AK38
AK40
AK42
AK48
AK50
AK6
AK8
AL45
AL47
AM10
AM12
AM14
AM2
AM28
AM30
AM31
AM4
AM40
AM42
AM6
AM8
AN45
AN47
AP10
AP12
AP14
AP20
AP24
AP26
AP28
AP30
AP32
AP34
AP36
AP38
AP40
AP42
AP48
AP50
AP6
AP8
AR37
AR45
AR47
AT10
AT12
AT14
AT16
AT18
AT2
AT20
AT22
AT24
AT26
AT28
AT30
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]
VSS[164]
VSS[165]
VSS[166]
VSS[167]
VSS[168]
VSS[169]
VSS[170]
VSS[171]
VSS[172]
VSS[173]
VSS[174]
VSS[175]
VSS[176]
VSS[177]
VSS[178]
VSS[179]
VSS[180]
VSS[181]
VSS[182]
VSS[183]
VSS[184]
VSS[185]
VSS[186]
VSS[187]
VSS[188]
VSS[189]
VSS[190]
VSS[191]
VSS[192]
VSS[193]
VSS[194]
VSS[195]
VSS[196]
VSS[197]
VSS[198]
VSS[199]
VSS[200]
VSS[201]
VSS[202]
VSS[203]
VSS[204]
VSS[205]
VSS[206]
VSS[207]
VSS[208]
VSS[209]
VSS[210]
VSS[211]
VSS[212]
VSS[213]
VSS[214]
VSS[215]
VSS[216]
VSS[217]
VSS[218]
VSS[219]
VSS[220]
VSS[221]
VSS[222]
VSS[223]
VSS[224]
VSS[225]
VSS[226]
VSS[227]
VSS[228]
VSS[229]
VSS[230]
VSS[231]
VSS[232]
VSS[233]
VSS[234]
VSS[235]
VSS[236]
VSS[237]
VSS[238]
VSS[239]
VSS[240]
VSS[241]
VSS[242]
VSS[243]
VSS[244]
VSS[245]
VSS[246]
VSS[247]
VSS[248]
VSS[249]
VSS[250]
VSS[251]
VSS[252]
VSS[253]
VSS[254]
VSS[255]
VSS[256]
VSS[257]
VSS[258]
VSS[259]
IBEXPEAK-M SFF_FCBGA1045~D
B3
B30
B34
B38
B42
B46
B49
B6
BA47
BB10
BB14
BB16
BB18
BB22
BB24
BB26
BB30
BB34
BB38
BB42
BB46
BB48
BB50
BB6
BC3
BC49
BD10
BD14
BD18
BD22
BD24
BD26
BD3
BD30
BD34
BD38
BD42
BD46
BD49
BD6
C49
D18
D22
D26
D30
D34
D38
D42
E3
F10
F12
F14
F16
F18
F20
F22
F24
F26
F28
F30
F32
F34
F36
REV1.0
F38
F40
F42
F44
F46
F50
F8
H10
H12
H14
H16
H18
H2
H20
H22
H24
H26
H28
H30
H32
H34
H36
H38
H40
H42
H44
H46
H6
K12
K14
K16
K18
K20
K22
K24
K26
K28
K30
K32
K34
K36
K38
K40
K42
K44
K46
K50
K6
K8
L21
M12
M14
M16
M18
M2
M20
M22
M24
M26
M28
M30
M32
AB10
AM36
AH12
T27
AP16
AP18
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]
VSS[164]
VSS[165]
VSS[166]
VSS[167]
VSS[168]
VSS[169]
VSS[170]
VSS[171]
VSS[172]
VSS[173]
VSS[174]
VSS[175]
VSS[176]
VSS[177]
VSS[178]
VSS[179]
VSS[180]
VSS[181]
VSS[182]
VSS[183]
VSS[184]
VSS[185]
VSS[186]
VSS[187]
VSS[188]
VSS[189]
VSS[190]
VSS[191]
VSS[192]
VSS[193]
VSS[194]
VSS[195]
VSS[196]
VSS[266]
VSS[270]
VSS[271]
VSS[272]
VSS[273]
VSS[274]
VSS[197]
VSS[198]
VSS[199]
VSS[200]
VSS[201]
VSS[202]
VSS[203]
VSS[204]
VSS[205]
VSS[206]
VSS[207]
VSS[208]
VSS[209]
VSS[210]
VSS[211]
VSS[212]
VSS[213]
VSS[214]
VSS[215]
VSS[216]
VSS[217]
VSS[218]
VSS[219]
VSS[220]
VSS[221]
VSS[222]
VSS[223]
VSS[224]
VSS[225]
VSS[226]
VSS[227]
VSS[228]
VSS[229]
VSS[230]
VSS[231]
VSS[232]
VSS[233]
VSS[234]
VSS[235]
VSS[236]
VSS[237]
VSS[238]
VSS[239]
VSS[240]
VSS[241]
VSS[242]
VSS[243]
VSS[244]
VSS[245]
VSS[246]
VSS[247]
VSS[248]
VSS[249]
VSS[250]
VSS[251]
VSS[252]
VSS[253]
VSS[254]
VSS[255]
VSS[256]
VSS[257]
VSS[258]
VSS[259]
VSS[263]
VSS[262]
VSS[261]
VSS[260]
VSS[264]
VSS[265]
M34
M36
M38
M40
M42
M44
M46
M6
M8
N47
P12
P21
P28
P40
P42
P44
P46
P48
P50
P6
P8
T12
T14
T16
T2
T22
T28
T30
T31
T33
T38
T40
T42
T44
T46
T6
T8
V12
V18
V19
V25
V31
V33
V38
V40
V42
V44
V46
V48
V50
V6
V8
Y10
Y12
Y14
Y16
Y2
Y21
Y25
Y31
Y33
Y34
Y4
Y46
Y44
Y42
Y40
Y6
Y8
C
B
IBEXPEAK-M SFF_FCBGA1045~D
IBEXPEAK-M SFF_FCBGA1045~D
A
A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PCH (8/8)
Size
Document Number
Rev
0.1
LA-5691P
Date:
5
4
3
2
Monday, July 13, 2009
Sheet
1
22
of
51
5
4
3
2
1
+5V_RUN
+5V_RUN
1
+5V_RUN
+3.3V_M
2
1
2
depop only for SSI
6
N/C
TPF3000-BP-TR_QFN20_4X4~D
@
1
2
@ R1534
10K_0402_5%~D
2
1
3
1
E
2
2
B
Q8
MMBT3904WT1G_SC70-3~D
1
1
@ Q94B
2N7002DW-7-F_SOT363-6~D
+3.3V_RUN
1
C
2
Q7
MMBT3904WT1G_SC70-3~D
2
1
2
B
3
1
C222 @
100P_0402_50V8K~D
C221
E
2200P_0402_50V7K~D
C
@ C227
100P_0402_50V8K~D
3
2
1
1
+3.3V_M
C228
2200P_0402_50V7K~D
2
B
E Q9
MMBT3904WT1G_SC70-3~D
1
2
2
@
1
2
3
4
5
6
1
2
3
4
GND
GND
MOLEX_53780-0470
@
1
R3P_SMBCLK
4
R3P_SMBDAT
R146
1
2
10K_0402_5%~D
23
24
REM_DIODE2_N
REM_DIODE2_P
26
27
REM_DIODE3_P
REM_DIODE3_N
30
29
R1408 1
2
R998
12,47 IMVP_IMON
48 BQ24765_IINP
1
2
R1537
0_0402_5%~D
1
2
R1538
0_0402_5%~D
U3
2
3
6
13
REM_DIODE1_N
REM_DIODE1_P
Q9 Place near DIMM
2 0_0402_5%~D
1
4.7K_0402_5%~D
VSET
31
25
28
VDDH
VDDH
VDDL
VDD_PWRGD
THERMTRIP2#
16
THERMATRIP2#
THERMTRIP3#
18
THERMATRIP3#
DN1/THERM
DP1/VREF_T
SYS_SHDN#
DN2/DP4
DP2/DN4
POWER_SW#
DP3/DN5
DN3/DP5
ACAVAIL_CLR
ATF_INT#/BC_IRQ#
19
20
21
9
FAN_OUT
FAN_OUT
VSET
5
4
43
ACAV_IN
38,48,50
BC_INT#_EMC4022 38
2
R141
VCP
VIN
THERM_STP#
2
+RTC_CELL
47K_0402_1%~D
1
@ R147
POWER_SW#
1
+3.3V_M
10K_0402_5%~D
+FAN1_VOUT
1
Place C227 close
to Q9
PHASE_U
PHASE_V
PHASE_W
MOT_COM
C
2
Place C222 close to Q7 as
possible.
3
30,38 DAI_GPU_R3P_SMBDAT
1
C237
10U_0805_10V4Z~D
1
C236
0.1U_0402_16V4Z~D
2
C235
10U_0805_10V4Z~D
2
C234
0.1U_0402_16V4Z~D
1
Diode circuit at DP4/DN4 is used for skin
temp sensor (placed optimally between CPU,
PCH).
0_0402_5%~D
0_0805_5%~D
0_0402_5%~D
0_0805_5%~D
@ Q94A
2N7002DW-7-F_SOT363-6~D
+5V_RUN
Place C223 close to the Q8 as possible
Place C224, close to the Guardian pins as possible
C
6
30,38 DAI_GPU_R3P_SMBCLK
C224
2200P_0402_50V7K~D
2
2
2
2
5
C
2
1
1
1
1
+5V_RUN +5V_RUN
Place under CPU
@ C223
100P_0402_50V8K~D
R507
R516
R519
R529
R1536
2.2K_0402_5%~D
PWM
2 0_0805_5%~D PHASE_W
2 0_0805_5%~D PHASE_V
2 0_0805_5%~D PHASE_U
1
1
1
D
JFAN1
FAN1_DET#
+FAN1_VOUT
FAN1_TACH_FB
1
GND
GND
GND
@ R531
@ R534
@ R535
R142
10K_0402_5%~D
2 0.27_1210_1%~D
2
20
8
15
21
PHASE_W_R
PHASE_V_R
PHASE_U_R
12
13
14
2 1U_0402_6.3V6K~D
R1517 1
R1535
2.2K_0402_5%~D
2
1
PWM
SMCLK
SMDATA
C434 1
I_RET
9
1
2 MOT_COM_R 10
0_0805_5%~D
R3P_SMBCLK
18
R3P_SMBDAT
19
7
2
R1462
15K_0402_5%~D
R1458
15K_0402_5%~D
2
1
R138
15K_0402_5%~D
2
1
MOT_COM 1
@ R536
C_FILT
PARAM_SEL1
PARAM_SEL2
I_RET
PARAM_SEL3
PARAM_SEL4 PHASE_W
PHASE_V
MOT_COM
PHASE_U
Populate only for SSI
+3.3V_RUN
C219
16
3
4
5
1
Close to U140 pin 17
TACH
FAN_OKAY
VDD
VDD
R156
10K_0402_5%~D
2
1
22U_0805_6.3VAM~D
11
17
FAN1_TACH_FB
FAN_OK
1
2
@ D2
RB751S40T1_SOD523-2~D
2
1
U140
+5V_RUN
2
Close to U140 pin 11
2
@ R136
10K_0402_5%~D
R1457
10K_0402_5%~D
2
1
2
1
C73
4.7U_0603_10V6K~D
2
1
C406
0.01U_0402_16V7K~D
D
1
C72
4.7U_0603_10V6K~D
2
C391
0.01U_0402_16V7K~D
1
1
R151
953_0402_1%~D
+3.3V_M
1
Depop for M09 Fan Solution
FAN1_TACH_FB
2
2
C231
0.1U_0402_16V4Z~D
B
Rset=953,Tp=88degree
FAN_OK
+3.3V_M
1 FAN1_DET#
@ R594
0_0402_5%~D
PWM
1
2
R145
10K_0402_5%~D
2
10
11
14
SMCLK/BC_CLK
SMDATA/BC_DATA
TACH/GPIO1
8
7
BC_CLK_EMC4022 38
BC_DAT_EMC4022 38
GPIO2
1
2
38 PCH_PWRGD#
THERMATRIP2#
1
R148
2
1K_0402_5%~D
12
2
3
1
2
VDD
ADDR_MODE
C218
0.1U_0402_16V4Z~D
8 H_THERMTRIP#
15
+RTC_CELL
2
NC
NC
VSS
RTC_PWR3V
1
R150
2
4.7K_0402_5%~D
Pull-up Resistor
on ADDR_MODE/XEN
*
+RTC_CELL
5
1
DOCK_PWR_SW# 38
A
2
POWER_SW_IN# 38
5
4
2N3904
2N3904
SMBUS
Address
2F(r/w)
2E(r/w)
18K
Thermistor
2F(r/w)
>= 33K
Thermistor
2E(r/w)
A
DELL CONFIDENTIAL/PROPRIETARY
1
2
For Remote1
mode
3
THERMATRIP3#
B
O
<= 4.7K +/- 5%
10K
C1050
0.1U_0402_16V4Z~D
1
2
P
2
U68
TC7SH08FU_SSOP5~D
POWER_SW#
4
+VCC_4022
17
22
33
G
R157
8.2K_0402_5%~D
A
1
32
EMC4022-1-EZK_QFN32_5X5~D
1
+3.3V_M
C230
1U_0402_6.3V6K~D
1
+3.3V_M
C229
0.1U_0402_16V4Z~D
3V_PWROK#
1
+1.05V_RUN_VTT
R135
C
2.2K_0402_5%~D
1
2
2
B
Q5 E
PMST3904_SOT323-3~D
R1218
1
2
22_0402_5%~D
+VCC_4022
GPIO3/PWM/THERTRIP_SIO
R134
8.2K_0402_5%~D
B
Compal Electronics, Inc.
C243
0.1U_0402_16V4Z~D
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
FAN & Thermal Sensor
Size
Document Number
Date:
Monday, July 13, 2009
Rev
0.1
LA-5691P
Sheet
1
23
of
51
5
4
3
2
1
LCD Power
JEDP1
2
17,37 ENVDD_PCH
3
1
R166
0_0402_5%~D
2
+LCDVDD
2@ R1304
1
1@ R1305
+3.3V_RUN_BKT_PWR
@
1
2
0_0603_5%~D
2
0_0603_5%~D
2
+1.05V_RUN_VTT
USBP11_D-
2
S
1
2
EDP_HPD
2
0_0402_5%~D
1
R513
2
0_0402_5%~D
D
Q3
SSM3K7002FU_SC70-3~D
2
G
R1028
110K_0402_1%~D
S
USBP11_D+
PRTR5V0U2X_SOT143-4~D
B
EDP_LANE_P0
EDP_LANE_N0
EDP_LANE_P1
EDP_LANE_N1
@ R995 0_0603_5%~D
1
2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
2
2
2
2
1
2
2
EDP_CPU_AUX_SW
EDP_CPU_AUX#_SW
EDP_HPD_MB_SW#
Q132
D
S
1@ U132
3 VDD
9 VDD
12 VDD
16 VDD
20 VDD
29 VDD
1
2
4
5
6
7
8
EN_INVPWR
10
11
32
AUX+
AUXHPD
SEL
HPD_SEL
AUX_SEL
2
D0+A
D0-A
D1+A
D1-A
AUX+A
AUX-A
HPD_A
D0+B
D0-B
D1+B
D1-B
31
30
27
26
EDP_CPU_LANE_P0
EDP_CPU_LANE_N0
EDP_CPU_LANE_P1
EDP_CPU_LANE_N1
19
18
17
EDP_CPU_AUX
EDP_CPU_AUX#
EDP_CPU_HPD#
25
24
23
22
EDP_BKT_LANE_P0
EDP_BKT_LANE_N0
AUX+B
AUX-B
HPD_B
15
14
13
1
CCD_OFF
D
S
2
G
BKT_GPIO14
2
EN_INVPWR
3
D
2
G
EN_INVPWR_D
1
Panel backlight power control by EC
GND
GND
GPAD
21
28
33
EDP_CPU_LANE_P0
EDP_CPU_LANE_N0
EDP_CPU_LANE_P1
EDP_CPU_LANE_N1
7
7
7
7
B
EDP_CPU_AUX 7
EDP_CPU_AUX# 7
EDP_CPU_HPD# 7
EDP_BKT_LANE_P0 27
EDP_BKT_LANE_N0 27
EDP_HPD_MB_SW#
2@ R1521
0_0402_5%~D
1
2
2@ RN8
EDP_CPU_AUX#_SW 1
EDP_CPU_AUX_SW 2
C1043
0.1U_0402_16V4Z~D
4
3
EDP_CPU_HPD#
EDP_CPU_AUX#
EDP_CPU_AUX
0_0404_4P2R_5%~D
+3.3V_RUN
EDP_LANE_N0_SW
EDP_LANE_P0_SW
1
R279
1
R1027
2
100K_0402_5%~D
2
100K_0402_5%~D
MB_EDP_AUX#
MB_EDP_AUX
Function
SEL/HPD_SEL/AUX_SSEL
Port A active
L
Port B active
H
2@ RN2
1
2
4
3
EDP_CPU_LANE_N0
EDP_CPU_LANE_P0
0_0404_4P2R_5%~D
EDP_LANE_N1_SW
EDP_LANE_P1_SW
2@ RN3
1
2
4
3
EDP_CPU_LANE_N1
EDP_CPU_LANE_P1
A
0_0404_4P2R_5%~D
1
2
DELL CONFIDENTIAL/PROPRIETARY
C1044
0.1U_0402_25V4Z~D
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Title
eDP & CAM Conn
Size
4
3
2
Document Number
Rev
0.1
LA-5691P
Date:
5
FDC654P: P CHANNAL
Bypass Non BKT function
PI3VEDP212ZLEX_TQFN32_6X3~D
100K_0402_5%~D
R169
2
CCD_OFF
1
Webcam PWR CTRL
37
+3.3V_RUN
2
+15V_ALW
3
A
38
1
Q133
SSM3K7002FU_SC70-3~D
2
BKT_GPIO1
BKT_GPIO1
D0+
D0D1+
D1-
G
1
C250
10U_1206_16V4Z~D
2
C249
0.1U_0402_16V4Z~D
1
28
1
BKT_GPIO14
3
BAT54CW_SOT323-3~D
PMV45EN_SOT23-3~D
+CAMERA_VDD_R 3
C
1
C271 EDP_LANE_P0_SW
C358 EDP_LANE_N0_SW
C359 EDP_LANE_P1_SW
C225 EDP_LANE_N1_SW
1
1
1
1
For Webcam
+CAMERA_VDD
28
+3.3V_RUN_BKT_PWR
+CAMERA_VDD
3
IO2
2
1
47K_0402_5%~D
D69
USBP11_D-
3
1
R457
4
VCC
IO1
3
1
R168
1@ C1856
0.1U_0402_16V4Z~D
@ U50
1 GND
4
C247
0.1U_0603_50V4Z~D
PWR_SRC_ON
EDP_HPD_MB_SW#
1@ C2064
1U_0402_6.3V6K~D
4
1
USBP11-
3
USBP11-
USBP11_D+
2
USBP11+
18
2
Q18
SSM3K7002FU_SC70-3~D
1
18
@ L59
DLW21SN121SQ2L_4P~D
1 1
2 2
+BL_PWR_SRC
1
R167
100K_0402_5%~D
R1470
7.5K_0402_5%~D
USBP11+
6
5
2
1
4
+3.3V_RUN_LVDS
1
+3.3V_RUN
40mil
D
40mil
G
30
1
2.2K_0402_5%~D
1
2.2K_0402_5%~D
1
DMIC0
Q17
FDC654P_SSOT6~D
+PWR_SRC
LCD_SMBCLK
2
R548
LCD_SMBDAT
2
R549
2
@
JAE_CAL09-T-HN0520-S12
30
D48
SD05.TCT_SOD323-2~D
2
1
C
D49
SD05.TCT_SOD323-2~D
2
1
BREATH_BLUE_LED 41
BATT_YELLOW_LED 41
BATT_BLUE_LED 41
DMIC_CLK
C248
1000P_0402_50V7K~D
BREATH_BLUE_LED
BATT_YELLOW_LED
BATT_BLUE_LED
3
1
2
3
1
2
Q15
PDTC124EU_SC70-3~D
BIA_PWM_PCH 17
USBP11_D+
USBP11_D+CAMERA_VDD
DMIC_CLK
CAM_CBL_DET#
CAM_CBL_DET# 18
DMIC0
D
S
ALS_INT#
LCD_SMBCLK 38
LCD_SMBDAT 38
+3.3V_RUN
ALS_INT#
37
2
BAT54CW_SOT323-3~D
2
+3.3V_RUN
LCD_SMBCLK
LCD_SMBDAT
@ R165
10K_0402_5%~D
0.1U_0603_50V4Z~D
2
3
2
EN_LCDPWR
1
1
+BL_PWR_SRC
C246 1
1
C241
0.1U_0402_16V4Z~D
3
37 LCD_VCC_TEST_EN
5
4
D3
+3.3V_RUN_LVDS
For MIC
2
1
RB751V_SOD323-2~D
6 2
1
1@ D86
1
2
1
BKT_GPIO18 2
BKT_GPIO18
37
1
C242
0.1U_0402_25V4Z~D
28
LCD_TST
R158
100K_0402_5%~D
G
Close to JEDP1.18,19
+LCDVDD
LCD_TST
2
1K_0402_5%~D
1
R667
EDP_HPD
+3.3V_ALW
S
2
EDP_CPU_AUX_SW
EDP_CPU_AUX#_SW
2 0.1U_0402_10V7K~D
2 0.1U_0402_10V7K~D
+15V_ALW
2N7002DW-7-F_SOT363-6~D
Q13B
C295 1
C314 1
+LCDVDD
R162
100K_0402_5%~D
1
EDP_LANE_N0
EDP_LANE_P0
MB_EDP_AUX
MB_EDP_AUX#
SI3456BDV-T1-E3_TSOP6~D
+LCDVDD
6
4
5
2
1
+15V_ALW
D
+LCDVDD
LVDS_CBL_DET# 18
EDP_LANE_N1
EDP_LANE_P1
R161
470_0402_5%~D
D
LVDS_CBL_DET#
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
CONNTST
GND
LANE1_N
LANE1_P
GND
LANE0_N
LANE0_P
GND
AUX_CH_P
AUX_CH_N
GND
LCD_VCC
LCD_VCC
LCD_VCC
TEST
GND
HPD
BL_GND
BL_GND
BL_GND
BL_GND
BL_PWR
BL_PWR
BL_PWR
BL_PWR
BL_ENABLE
BL_PWM
SMBUS_CLK
SMBUS_DATA
ALS_VCC
ALS_INT#
GND
USB+
USBUSB_VCC
MIC_CLK
MIC_VCC
MIC_DAT
GND
PWR_LED
BATT2_LED
BATT1_LED
GND
CONNTST
Q13A
2N7002DW-7-F_SOT363-6~D
MGND1
MGND2
MGND3
MGND4
MGND5
MGND6
MGND7
MGND8
MGND9
C244
0.1U_0402_16V4Z~D
45
46
47
48
49
50
51
52
53
Q12
Monday, July 13, 2009
Sheet
1
24
of
51
5
4
3
AUX/DDC SW for DPC to E-DOCK
1
C272
0.1U_0402_10V7K~D
DPC_AUX_C
2
1
DPC_DOCK_AUX
36 DPC_DOCK_AUX
3
D
17 DPC_PCH_DOCK_AUX#
2
C274
36 DPC_DOCK_AUX#
4
5
DPC_AUX#_C
1
0.1U_0402_10V7K~D
DPC_DOCK_AUX#
6
7
BE0
A0
VCC
BE3
B0
A3
BE1
A1
B3
BE2
B1
A2
GND
B2
14
13
12
PCH_CRT_VSYNC
PCH_CRT_HSYNC
PCH_CRT_RED
PCH_CRT_GRN
PCH_CRT_BLU
17 PCH_CRT_VSYNC
17 PCH_CRT_HSYNC
17 PCH_CRT_RED
17 PCH_CRT_GRN
17 PCH_CRT_BLU
U86
1
2
1
2
5
6
7
A0
A1
A2
A3
A4
8
PCH_DDPC_CTRLCLK 17
11
10
17 PCH_CRT_DDC_DAT
17 PCH_CRT_DDC_CLK
9
+3.3V_RUN
U131
C337
0.1U_0402_16V4Z~D
17 DPC_PCH_DOCK_AUX
1
VGA SW for MB/DOCK
+3.3V_RUN
2
2
PCH_DDPC_CTRLDATA 17
37 CRT_SWITCH
8
PCH_CRT_DDC_DAT
PCH_CRT_DDC_CLK
9
10
CRT_SWITCH
30
SEL1
SEL2
0B1
1B1
2B1
3B1
4B1
5B1
6B1
GND
GND
GND
GND
GPAD
0B2
1B2
2B2
3B2
4B2
5B2
6B2
A5
A6
PI3C3125LEX_TSSOP14~D
3
11
28
31
33
+5V_RUN
VDD
VDD
VDD
VDD
VDD
4
16
23
29
32
27
25
22
20
18
12
14
VSYNC_CRT
HSYNC_CRT
RED_CRT
GREEN_CRT
BLUE_CRT
DAT_DDC2_CRT
CLK_DDC2_CRT
26
24
21
19
17
13
15
VSYNC_DOCK
HSYNC_DOCK
RED_DOCK
GREEN_DOCK
BLUE_DOCK
DAT_DDC2_DOCK
CLK_DDC2_DOCK
VSYNC_CRT 26
HSYNC_CRT 26
RED_CRT
26
GREEN_CRT 26
BLUE_CRT
26
DAT_DDC2_CRT 26
CLK_DDC2_CRT 26
D
VSYNC_DOCK 36
HSYNC_DOCK 36
RED_DOCK
36
GREEN_DOCK 36
BLUE_DOCK 36
DAT_DDC2_DOCK 36
CLK_DDC2_DOCK 36
PI3V712-AZLEX_TQFN32_6X3~D
2
1
1
NC
P
G
3
Source
A=B1
MB
1
A=B2
APR/SPR
1
2
AUX/DDC SW for DPB to E-DOCK
C
1
2
1
2
1
2
1
2
1
2
C264
0.1U_0402_16V4Z~D
Chanel
0
C263
0.1U_0402_16V4Z~D
SEL1/SEL2
DPC_CA_DET#
4
C262
0.1U_0402_16V4Z~D
Y
U8
NC7SZ04P5X_NL_SC70-5~D
C261
0.1U_0402_16V4Z~D
A
C260
0.1U_0402_16V4Z~D
2
C259
10U_0805_10V4Z~D
DPC_CA_DET
36 DPC_CA_DET
5
+3.3V_RUN
C277
0.1U_0402_16V4Z~D
+3.3V_RUN
2
C
1
C368
0.1U_0402_16V4Z~D
17 DPB_PCH_DOCK_AUX
C369
0.1U_0402_10V7K~D
DPB_AUX_C
2
1
DPB_DOCK_AUX
36 DPB_DOCK_AUX
17 DPB_PCH_DOCK_AUX#
2
C370
36 DPB_DOCK_AUX#
U88
DPB_AUX#_C
1
0.1U_0402_10V7K~D
DPB_DOCK_AUX#
1
2
BE0
A0
3
B0
4
5
BE1
A1
6
14
13
A3
12
B3
BE2
11
10
B1
A2
GND
B2
9
Fingerprint CONN.
PCH_SDVO_CTRLCLK 17
PCH_SDVO_CTRLDATA 17
JBIO4
8
1
2
3
4
5
6
GND
GND
PI3C3125LEX_TSSOP14~D
+5V_RUN
DPB_CA_DET
D82
FPRESET#
A
3
G
2
2
FP_RESET# 32
1
3
BKT_GPIO17 28
2
1
TYCO_2041070-6~D
BAT54CW_SOT323-3~D
+3.3V_RUN Place close to
JBIO1.1
1
5
P
B
36 DPB_CA_DET
+3.3V_TP_PWR
FP_USB_DFP_USB_D+
1
C445
0.1U_0402_16V4Z~D
NC
2
+3.3V_TP_PWR
1
2
3
4
5
6
7
8
C770
0.1U_0402_16V4Z~D
7
VCC
BE3
B
U51
Y
4
DPB_CA_DET#
1
U18
NC7SZ04P5X_NL_SC70-5~D
FP_USB_D-
GND
2
IO1
VCC
IO2
4
3
+3.3V_TP_PWR
FP_USB_D+
PRTR5V0U2X_SOT143-4~D
27 FP_SW_USBD+
1
27 FP_SW_USBD-
4
@ L29
DLW21SN121SQ2L_4P~D
1
2 2
FP_USB_D+
+3.3V_RUN
1
R885
1
R886
1
R900
1
R891
PCH_DDPC_CTRLCLK
2
2.2K_0402_5%~D
PCH_DDPC_CTRLDATA
2
2.2K_0402_5%~D
PCH_SDVO_CTRLCLK
2
2.2K_0402_5%~D
PCH_SDVO_CTRLDATA
2
2.2K_0402_5%~D
4
1
R422
1
R423
Intel WW18 Strapping option
3
3
FP_USB_D-
2
0_0402_5%~D
2
0_0402_5%~D
+3.3V_RUN
+3.3V_RUN_BKT_PWR
2@ PJP59 PAD-OPEN 4x4m +3.3V_TP_PWR
1
2
1@ PJP60 PAD-OPEN 4x4m
1
2
Intel WW18 Strapping option
A
A
1
R1010
1
R996
DPB_CA_DET
2
1M_0402_5%~D
DPC_CA_DET
2
1M_0402_5%~D
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
DPC DPD SW for DOCK
Size
Document Number
Date:
Monday, July 13, 2009
Rev
0.1
LA-5691P
Sheet
1
25
of
51
2
1
Close to JP1
+VREFOUT
2
1
2
BTB Connector
C1859
0.1U_0402_16V4Z~D
1
+5V_ALW
C2056
0.1U_0402_16V4Z~D
2
C2055
0.1U_0402_16V4Z~D
1
+5V_RUN
E-SATA/Jack Connector
DETECT_GND
JBIO2
37 ESATA_USB_PWR_EN#
18 USB_OC1#
15 ESATA_PTX_DRX_P4_C
15 ESATA_PTX_DRX_N4_C
15 ESATA_PRX_DTX_N4_C
15 ESATA_PRX_DTX_P4_C
18
18
ESATA_USB_PWR_EN#
USB_OC1#
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
ESATA_PTX_DRX_P4_C
ESATA_PTX_DRX_N4_C
ESATA_PRX_DTX_N4_C
ESATA_PRX_DTX_P4_C
USBP2+
USBP2-
USBP2+
USBP2+5V_RUN
B
31
32
33
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
GND
GND
GND
GND
GND
GND
EXT_MONO_MIC
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
EXT_MONO_MIC 30
AUD_HP_OUT_L
AUD_HP_OUT_R
AUD_HP_OUT_L 30
AUD_HP_OUT_R 30
AUD_MIC_SWITCH
AUD_HP_NB_SENSE
AUD_NB_MUTE
AUD_MIC_SWITCH 30
AUD_HP_NB_SENSE 30,37
AUD_NB_MUTE 30,37
+VREFOUT
+5V_ALW
34
35
36
MOLEX_48210-3011~D
JBIO1
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
PCIE_WAKE#
MINI1CLK_REQ#
UIM_DATA
UIM_CLK
UIM_RESET
UIM_VPP
WWAN_RADIO_DIS#
PCH_PLTRST#_EC
34,35,37 PCIE_WAKE#
16 MINI1CLK_REQ#
28
UIM_DATA
28
UIM_CLK
28 UIM_RESET
28 UIM_VPP
37 WWAN_RADIO_DIS#
8,18,33,34,35,37,38 PCH_PLTRST#_EC
WWAN_SW_USBDWWAN_SW_USBD+
27 WWAN_SW_USBD27 WWAN_SW_USBD+
USB_MCARD2_DET#
LED_WWAN_OUT#
PCIE_MCARD2_DET#
LAN_ACTLED_YEL#
LED_10_GRN#
LED_100_ORG#
USB_SIDE_EN#
USB_OC0#
19 USB_MCARD2_DET#
37,41 LED_WWAN_OUT#
18 PCIE_MCARD2_DET#
31 LAN_ACTLED_YEL#
31 LED_10_GRN#
31 LED_100_ORG#
37 USB_SIDE_EN#
18 USB_OC0#
+5V_RUN
+LOM_VCT
+3.3V_LAN
+3.3V_RUN
+1.5V_RUN
+SIM_PWR
+5V_ALW
+3.3V_RUN_WWAN_PWR
+3.3V_RUN_BKT_PWR
2
1@ C1868
0.1U_0402_16V4Z~D
1
71
73
BKT RSB Connector
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
GND
GND
72
74
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
GND
GND
CLK_PCIE_MINI1#
CLK_PCIE_MINI1
CLK_PCIE_MINI1# 16
CLK_PCIE_MINI1 16
PCIE_PRX_WANTX_N1
PCIE_PRX_WANTX_P1
PCIE_PRX_WANTX_N1 16
PCIE_PRX_WANTX_P1 16
PCIE_PTX_WANRX_N1_C
PCIE_PTX_WANRX_P1_C
PCIE_PTX_WANRX_N1_C 16
PCIE_PTX_WANRX_P1_C 16
SW_LAN_TX0+
SW_LAN_TX0-
SW_LAN_TX0+ 31
SW_LAN_TX0- 31
SW_LAN_TX1+
SW_LAN_TX1-
SW_LAN_TX1+ 31
SW_LAN_TX1- 31
SW_LAN_TX2+
SW_LAN_TX2-
SW_LAN_TX2+ 31
SW_LAN_TX2- 31
SW_LAN_TX3+
SW_LAN_TX3-
SW_LAN_TX3+ 31
SW_LAN_TX3- 31
RED_CRT
GREEN_CRT
BLUE_CRT
B
RED_CRT
25
GREEN_CRT 25
BLUE_CRT 25
HSYNC_CRT
VSYNC_CRT
HSYNC_CRT 25
VSYNC_CRT 25
DAT_DDC2_CRT
CLK_DDC2_CRT
DAT_DDC2_CRT 25
CLK_DDC2_CRT 25
USBP0+
USBP0-
USBP0+
USBP0-
IO_LOOP
IO_LOOP
18
18
19
FOX_QT01070A-1120-7H
+3.3V_RUN_BKT_PWR
1@ JRSB
27 SDIO_D0_BLT
27 SDIO_D1_BLT
SDIO_D2_BLT
SDIO_CLK_BLT
SDIO_CLK_BLT 27
SDIO_CMD_BLT
SDIO_CMD_BLT 27
22
+3.3V_RUN_WWAN_PWR
1
2
HRS_DF12(3.0)-20DS-0.5V86
+3.3V_LAN
1
2
+5V_ALW
1
2
+5V_RUN
1
2
+3.3V_RUN
1
2
+1.5V_RUN
1
2
+SIM_PWR
1
2
+LOM_VCT
1
2
C1867
0.1U_0402_16V4Z~D
SDIO_GPIO1_BLT 28
SDIO_GPIO2_BLT 28
SDIO_RST#_BLT 27
SDIO_PWR#_BLT 27
BKT_GPIO13 28
C1866
0.1U_0402_16V4Z~D
SDIO_GPIO1_BLT
SDIO_GPIO2_BLT
SDIO_RST#_BLT
SDIO_PWR#_BLT
BKT_GPIO13
C1865
0.1U_0402_16V4Z~D
G2
2
4
6
8
10
12
14
16
18
20
C1864
0.1U_0402_16V4Z~D
G1
2
4
6
8
10
12
14
16
18
20
C1863
0.1U_0402_16V4Z~D
21
1
3
5
7
9
11
13
15
17
19
C1862
0.1U_0402_16V4Z~D
SDIO_D3_BLT
1
3
5
7
9
11
13
15
17
19
C1861
0.1U_0402_16V4Z~D
27 SDIO_D3_BLT
SDIO_D1_BLT
C1860
0.1U_0402_16V4Z~D
27 SDIO_D2_BLT
RSB DETECT_GND
SDIO_D0_BLT
Volume + Sniffer
Change to 6 pins connector
A
A
JBIO3
1
2
3
4
5
6
GND
GND
1
2
3
4
5
6
7
8
WIRELESS_ON#/OFF
VOL_DOWN
VOL_UP
VOL_MUTE
WIRELESS_ON#/OFF 37
VOL_DOWN
VOL_UP
VOL_MUTE
37
37
37
TYCO_2041070-6~D
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
2
Display port
Size
Document Number
Date:
Monday, July 13, 2009
Rev
0.1
LA-5691P
1
Sheet
26
of
51
2
1
+3.3V_BKT_PWR
+3.3V_RUN_BKT_PWR Source
4
1@
Q20A
2N7002DW-7-F_SOT363-6~D
2
1
2
+3.3V_RUN
1
2
1
2
G
3
3
2
1
2
6
2
C1900
1@ D97
BKT_GPIO19
C1901
1@
Q20B
2N7002DW-7-F_SOT363-6~D
5
1
1@ 470P_0402_50V7K~D
R1478
1@ 100K_0402_5%~D
28
4
1@ 20K_0402_5%~D
R1476
1@ 100K_0402_5%~D
S
6
5
2
1
R1477
1@ 10U_0805_10V4Z~D
+3.3V_ALW2
28
28
D
+3.3V_ALW
1
+15V_ALW
Q193
1@ SI3456BDV-T1-E3_TSOP6~D
+3.3V_RUN_BKT_PWR
BKT_GPIO6
BKT_GPIO9
BKT_GPIO6
BKT_GPIO9
24 EDP_BKT_LANE_N0
24 EDP_BKT_LANE_P0
38
38
BKT_SMBCLK
BKT_SMBDAT
BKT_GPIO16
BKT_GPIO7
BKT_GPIO8
BKT_SMBCLK
BKT_SMBDAT
28 BKT_GPIO16
28
BKT_GPIO7
28
BKT_GPIO8
+3.3V_RUN_BKT_PWR
R1479
1
1
1
R1480
3
34,37,40,45 RUN_ON
2
2
2@ 0_0805_5%~D
BAT54CW_SOT323-3~D
B
@ 100K_0402_5%~D
Q194
+5V_ALW 1@ SI3456BDV-T1-E3_TSOP6~D
+5V_RUN_BKT_PWR
6
5
4
2
R1481
1
1@ 100K_0402_5%~D
1
+15V_ALW
G
3
2
1
3
2
2
34,37,40,45 RUN_ON
3
6
4
1
1@
Q19A
2N7002DW-7-F_SOT363-6~D
2
+5V_RUN
2
1
2
1
S
D
26
26
26
26
SDIO_D0_BLT
SDIO_D1_BLT
SDIO_D2_BLT
SDIO_D3_BLT
SDIO_D0_BLT
SDIO_D1_BLT
SDIO_D2_BLT
SDIO_D3_BLT
1@ 20K_0402_5%~D
1@ D98
BKT_GPIO4
2
C1902
5
1
C1903
1@
Q19B
2N7002DW-7-F_SOT363-6~D
1@ 2200P_0402_50V7K~D
R1483
1@ 100K_0402_5%~D
R1482
1@ 10U_0805_10V4Z~D
+3.3V_ALW2
28
BKT_WWAN_USBBKT_WWAN_USB+
28 BKT_WWAN_USB28 BKT_WWAN_USB+
+5V_RUN_BKT_PWR Source, for Touch Pad and Audio Amplifier
+3.3V_BKT_PWR
1@ JBKT
1 VSS
VSS
3 PAID_IN
BLT_Sus#
5 Radio_disable#
LID_Cl#
7 VSS
VSS
9 eDP_CH1_n
NC
11
eDP_CH1_p
NC
13 VSS
VSS
15
NC
BLT_LED_1#
17 NC
NC
19
VSS
VSS
21 SMBCLK_1
I2S_LRC
23 SMBDATA_1
I2S_DIN
25 SMBALERT_1
I2S_DOUT
27 RST_BLT#
I2S_BCLK
29
BLT_USB_Port1_Dir
VSS
31
VSS
M_Clk
33 VSS
VSS
35
VSS
VSS
37 VDD 3.3v
VDD 3.3v
39 VDD 3.3v
VDD 3.3v
41
VDD 3.3v
VDD 3.3v
43 VDD 3.3v
VDD 3.3v
45 VSS
VSS
47 VSS
VSS
49 BLT_USB1_WWAN_Data- BLT_USB2_BioMetric51 BLT_USB1_WWAN_Data+ BLT_USB2_BioMetric+
53 VSS
VSS
55 NC
Ser_RX
57
NC
Ser_TX
59 VSS
VSS
61 SDIO_D0_BLT
SDIO_CLK_BLT
63 SDIO_D1_BLT
VSS
65
SDIO_D2_BLT
SDIO_CMD_BLT
67 SDIO_D3_BLT
SDIO_RST#_BLT
69 SDIO_GPIO1_BLT
SDIO_PWR#_BLT
71
SDIO_GPIO2_BLT
VPP_Test
73 VSS
Reserved
75 NC
NC
77 NC
NC
79 VSS
PAID_OUT
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
81
82
BKT_GPIO5
BLT_LED#
BKT_I2S_LRC
BKT_GPIO5
28
BLT_LED#
41
BKT_I2S_LRC 30
BKT_I2S_DO
BKT_I2S_SCLK
BKT_I2S_DO 30
BKT_I2S_SCLK 30
BKT_MCLK
BKT_MCLK
30
BKT_USBBIOBKT_USBBIO+
B
SDIO_CLK_BLT
SDIO_CLK_BLT 26
SDIO_CMD_BLT
SDIO_RST#_BLT
SDIO_PWR#_BLT
SDIO_CMD_BLT 26
SDIO_RST#_BLT 26
SDIO_PWR#_BLT 26
PAID Detect GND
G1
G2
HRS_DF12(3.0)-80DP-0.5V86
+5V_RUN_BKT_PWR
R1484
1
1
R1485
1
Enable BlackTop POWER
2
2
2@ 0_0805_5%~D
G
3
2
3
1
2
2
6
1
2
2
1
4
4
1
D
S
3
G
1
2
3
1
2
6
5
2
1@
Q21A
2N7002DW-7-F_SOT363-6~D
2
1
1@ 20K_0402_5%~D
1@
Q21B
2N7002DW-7-F_SOT363-6~D
1
C2057
+3.3V_RUN
BKT_GPIO2
1@ 100K_0402_5%~D
R1503
1@ 10U_0805_10V4Z~D
2
28
4
C372
1
R1502
1@
Q197A
2N7002DW-7-F_SOT363-6~D
2
BKT_GPIO15
2
2
1@ 20K_0402_5%~D
1@ D100
28
1
1
R1487
1@ 10U_0805_10V4Z~D
1@
Q197B
2N7002DW-7-F_SOT363-6~D
5
C1905
R1488
1@ 100K_0402_5%~D
C1904
R1486
1@ 100K_0402_5%~D
4
1@ 470P_0402_50V7K~D
+3.3V_ALW2
6
5
2
1
6
5
2
1
R1501
1@ 470P_0402_50V7K~D
+3.3V_ALW
1@ 100K_0402_5%~D
+15V_ALW
Q39
1@ SI3456BDV-T1-E3_TSOP6~D
+3.3V_RUN_WWAN_PWR
1
+3.3V_ALW2
+3.3V_RUN_WWAN_PWR Source, for WWAN
Q195
1@ SI3456BDV-T1-E3_TSOP6~D
+3.3V_BKT_PWR
+3.3V_ALW
D
+15V_ALW
S
BAT54CW_SOT323-3~D@ 100K_0402_5%~D
+3.3V_RUN_WWAN_PWR
R1489
1
1
1
R1490
3
37 MCARD_WWAN_PWREN
For Audio I2S
2
2
2@0_0805_5%~D
@ 100K_0402_5%~D
+1.8V_RUN_BKT_PWR
+3.3V_RUN_BKT_PWR
For WWAN USB signals isolation
1
A
1@ D101
FP_USBD+
FP_USBDBKT_USBBIO+
BKT_USBBIO-
1@ U22
1 D1+
7 D12
6
4
S
X
L
H
OE# Function
H Disconnect
L
D=1D
L
DD+
D2+
D2GND
OE#
VCC
S
5
3
18
18
FP_SW_USBDFP_SW_USBD+
FP_SW_USBD- 25
FP_SW_USBD+ 25
+3.3V_RUN_BKT_PWR
1@ C2059 0.1U_0402_16V4Z~D
8
9
1
2
BKT_GPIO11
10
BKT_GPIO11 28
Select logic 1 Work from BlackTop
RN5
FP_USBD+
FP_USBD-
1
2
4
3
FP_SW_USBD+
FP_SW_USBD-
2@ 0_0404_4P2R_5%~D
USBP5+
USBP5BKT_WWAN_USB+
BKT_WWAN_USB-
S
X
L
TS3USB30ERSWR_TQFN10_1P8X1P4~D
D=2D
USBP5+
USBP5-
H
OE# Function
H Disconnect
L
D=1D
L
1@ U144
1 D1+
7 D12
6
4
DD+
D2+
D2GND
OE#
VCC
S
5
3
8
9
10
WWAN_SW_USBDWWAN_SW_USBD+ WWAN_SW_USBD- 26
WWAN_SW_USBD+ 26
+3.3V_RUN_BKT_PWR
1@ C2058
0.1U_0402_16V4Z~D
1
2
BKT_GPIO4
BKT_GPIO4 28
28
1
3
BKT_GPIO4
+1.8V_RUN_BKT_PWR
2@ R11
1
3
1
BAT54CW_SOT323-3~D
+1.8V_RUN
A
5
2
1
#SHDN
GND
FP_USBD+
FP_USBD-
OUT
1@ C11
1U_0402_6.3V6K~D
32
32
IN
2
34,37,40,45 RUN_ON
NC
4
2
2
For Biometric USB signals isolation
1@ U37
1@ C1
1U_0402_6.3V6K~D
BAT54CW_SOT323-3~D
MAX8511EXK18+T_SC70-5~D
2
TS3USB30ERSWR_TQFN10_1P8X1P4~D
0_0603_5%~D
RN6
USBP5+
USBP5-
D=2D
Select logic 1 Work from BlackTop
1
2
4
3
WWAN_SW_USBD+
WWAN_SW_USBD-
DELL CONFIDENTIAL/PROPRIETARY
2@ 0_0404_4P2R_5%~D
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Title
BlackTop POWER and CONN
Size
Rev
0.1
LA-5691P
Date:
2
Document Number
1
Monday, July 13, 2009
Sheet
27
of
51
5
4
3
2
1
GPIO Expander for BlackTop
+3.3V_ALW
Add BlackTop to PCH interface by USB signal when diagnostic mode
1@ U145
8 VCC
27 BKT_WWAN_USB27 BKT_WWAN_USB+
BKT_WWAN_USB-
6
BKT_WWAN_USB+
2
BKT_GPIO3
1
2
NC
HSD-
D-
HSD+
D+
OE#
GND
7
5
USBP12-
3
USBP12+
USBP12-
18
USBP12+ 18
38 BC_DAT_ECE1088
38 BC_CLK_ECE1088
38 BC_INT#_ECE1088
4
TS3USB31RSER_QFN8_1P5X1P5~D
+3.3V_ALW
BKT_GPIO3 logic 0 on diagnostic mode
R1492 2
R1493 2
R1494 2
1
2
1@ 0.1U_0402_16V4Z~D
C1906
1@ 0.1U_0402_16V4Z~D
1
C1907
1@ 0.1U_0402_16V4Z~D
+3.3V_RUN_BKT_PWR
C373
2
1
D
BC_DAT_ECE1088
BC_CLK_ECE1088
BC_INT#_ECE1088
1 @ 10K_0402_5%~D
1 1@ 10K_0402_5%~D
1 1@ 10K_0402_5%~D
+3.3V_ALW
R1491
BKT_GPIO17
1
D
2
@ 10K_0402_5%~D
U143
ECE1088GPIO00
7
21
VCC
VCC
22
23
24
BC_DAT/SMB_DATA
BC_CLK/SMB_CLK
BC_INT#/SMB_INT#
25
28
27
SMB_ADDR
TEST
RESERVE
29
THER_PAD
GPIO01
GPIO02
GPIO03
GPIO07
GPIO13
GPIO14
GPIO15
GPIO16
GPIO17
GPIO20
GPIO24
GPIO25
GPIO26
GPIO27
GPIO30
GPIO31
GPIO32
GPIO36
GPIO37
17
18
19
20
26
1
2
3
4
5
6
8
9
10
11
12
13
14
15
16
BKT_GPIO1
BKT_GPIO2
BKT_GPIO3
BKT_GPIO4
BKT_GPIO5
BKT_GPIO6
BKT_GPIO7
BKT_GPIO8
BKT_GPIO9
SDIO_GPIO1_BLT
BKT_GPIO11
SDIO_GPIO2_BLT
BKT_GPIO13
BKT_GPIO14
BKT_GPIO15
BKT_GPIO16
BKT_GPIO17
BKT_GPIO18
BKT_GPIO19
BKT_GPIO1
BKT_GPIO2
24
27
BKT_GPIO4 27
BKT_GPIO5 27
BKT_GPIO6 27
BKT_GPIO7 27
BKT_GPIO8 27
BKT_GPIO9 27
SDIO_GPIO1_BLT 26
BKT_GPIO11 27
SDIO_GPIO2_BLT 26
BKT_GPIO13 26
BKT_GPIO14 24
BKT_GPIO15 27
BKT_GPIO16 27
BKT_GPIO17 25
BKT_GPIO18 24
BKT_GPIO19 27
1@ ECE1088-FZG_QFN28_5X5~D
C
BKT_GPIO1
For eDP signals switch
BKT_GPIO2
For BKT power switch
BKT_GPIO3
For TP power swich&USB signal switch
BKT_GPIO4
For AMP/TP power source&USB signal switch
For LID_Closed
BKT_GPIO6
For PAD_Out
BKT_GPIO7
For BKT Reset
BKT_GPIO8
For USB_SEL_BLK
BKT_GPIO9
For Radio_OFF
+SIM_PWR
1
BKT_GPIO11
BKT_GPIO12
For WLAN antenna mux control
For Inverter Power
BKT_GPIO15
For WWAN Power
BKT_GPIO16
For SMBALERT
BKT_GPIO17
For Biometic reset signal
BKT_GPIO18
For LVDS Power switch
BKT_GPIO19
For TP Power
UIM_RESET
UIM_CLK
UIM_RESET
UIM_CLK
1
2
3
4
VCC
RST
CLK
NC
GND
VPP
I/O
NC
GND
GND
MOLEX_475531001~D
5
6
7
8
9
10
UIM_VPP
UIM_DATA
UIM_VPP
26
UIM_DATA 26
UIM_CLK
1
2
@
1
2
6
2
5
3
4
@
SRV05-4.TCT_SOT23-6~D
UIM_VPP
+SIM_PWR
UIM_DATA
1
2
@
1
2
C577
33P_0402_50V8J~D
BKT_GPIO14
JSIM1
1
C576
33P_0402_50V8J~D
RSB_DET#
UIM_RESET
C575
33P_0402_50V8J~D
BKT_GPIO13
26
26
U31
SIM Card
C574
33P_0402_50V8J~D
B
2
Biometric mux switch
C573
1U_0402_6.3V6K~D
BKT_GPIO5
C
@
B
A
A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Braidwood/ SATA repeater & PCIE SATA SW
Size
Document Number
Date:
Monday, July 13, 2009
Rev
0.1
LA-5691P
Sheet
1
28
of
51
3
2
1
+5VMOD Source
+15V_ALW
SATA_ODD_PRX_DTX_P1
ODD_DET#
+5V_MOD
DP
+5V
+5V
MD
GND
GND
5
GND1
GND2
14
15
TYCO_2-1759838-5_NR~D
1
R319
2
1
2
C436
0.1U_0402_16V4Z~D
C435
10U_0805_10V4Z~D
2
2
+5V_MOD
+5V_RUN
PJP15
1
2
1
2
@ PAD-OPEN 1x2mm
Free Fall Sensor
+3.3V_RUN
1
1
2
MODC_EN
Main SATA +5V Default
100K_0402_5%~D
37
Pleace near ODD CONN
1
D
S
R318
100K_0402_5%~D
8
9
10
11
12
13
3
C379
10U_0805_10V4Z~D
2
10K_0402_5%~D
3
ODD_DET#
1
@ R1239
4
38
+5V_MOD
D Q29
SI3456BDV-T1-E3_TSOP6~D
G
2 MOD_EN
1
1 0.01U_0402_16V7K~D
R316
100K_0402_5%~D
R317
100K_0402_5%~D
2
C375 2
GND
RX+
RXGND
TXTX+
GND
2
SATA_ODD_PRX_DTX_N1
1
SATA_ODD_PTX_DRX_P1
SATA_ODD_PTX_DRX_N1
1 0.01U_0402_16V7K~D
2
15 SATA_ODD_PRX_DTX_P1_C
1 0.01U_0402_16V7K~D
1 0.01U_0402_16V7K~D
C374 2
+5V_ALW
C378
0.1U_0603_50V4Z~D
2
15 SATA_ODD_PRX_DTX_N1_C
C311 2
C310 2
6
1
C377
0.1U_0402_16V4Z~D
2
C376
1000P_0402_50V7K~D
1
15 SATA_ODD_PTX_DRX_P1_C
15 SATA_ODD_PTX_DRX_N1_C
+3.3V_ALW2
Q31A
2N7002DW-7-F_SOT363-6~D
+5V_MOD
D
1
2
3
4
5
6
7
1
JSATA1
1
2
5
6
For ODD
4
4
Q31B
2N7002DW-7-F_SOT363-6~D
5
U139
DE351DLTR
1
6
C
18,38 HDD_FALL_INT1
16,38 HDD_SMBDAT
16,38 HDD_SMBCLK
HDD_FALL_INT1
FFS_INT2
8
9
12
13
14
HDD_SMBDAT
HDD_SMBCLK
7
VDD_IO
VDD
GND
GND
GND
GND
INT 1
INT 2
SDO
SDA / SDI / SDO
SCL / SPC
RSVD
CS
RSVD
2
4
5
10
C
3
11
+3.3V_RUN
DE351DLTR8_LGA14_3X5~D
+3.3V_RUN
HDD_SMBDAT
2
2.2K_0402_5%~D
HDD_SMBCLK
2
2.2K_0402_5%~D
1
R445
1
R463
HDD PWR
+5V_ALW
+15V_ALW
1
+3.3V_ALW2
1
2
FFS_INT2_Q
FFS_INT2_Q
D10
Q118
SDM10U45-7_SOD523-2~D
SSM3K7002FU_SC70-3~D
4
1
2
5
6
2
D
G
4
+3.3V_RUN
PJP17
1
2
R477
100K_0402_5%~D
2
1
+3.3V_HDD
C79
10U_0805_10V4Z~D
2
1
Q117
SI3456BDV-T1-E3_TSOP6~D
S
1
C388
0.1U_0402_10V7K~D
2
1
C387
0.1U_0402_16V4Z~D
1
C386
10U_0805_10V4Z~D
2
C385
0.1U_0402_16V4Z~D
C384
1000P_0402_50V7K~D
2
1
B
Open
23
24
3
1
@ PAD-OPEN 1x2mm
+5V_HDD Source
Main SATA +5V Default
+3.3V_HDD
2
+3.3V_ALW
TYCO_1775770-3~D
+5V_HDD
2
3
2
6
1
1
GND1
GND2
2
1
1
2
1
2
HDDC_EN
1
+5V_RUN
PJP16
1
2
2
3
D
FFS_INT2
S
FFS_INT2
HDD_DET#
+5V_HDD
37
+5V_HDD
1
2
5
6
HDD_DET#
3.3V
3.3V
3.3V
GND
GND
GND
5V
5V
5V
GND
Reserved
GND
12V
12V
12V
2N7002DW-7-F_SOT363-6~D
Q34A
1
15
@ R329
100K_0402_5%~D
G
19
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
+3.3V_HDD
+5V_HDD
+3.3V_RUN
5
R323
2
2
C1385
2
GND
RX+
RXGND
TXTX+
GND
100K_0402_5%~D
C1382
PSATA_PRX_DTX_N0_C
1
2
3
4
5
6
7
R322
100K_0402_5%~D
15 PSATA_PRX_DTX_N0_C
2
C324
PSATA_PRX_DTX_P0_C
PSATA_PTX_DRX_P0
0.01U_0402_16V7K~D
1 PSATA_PTX_DRX_N0
0.01U_0402_16V7K~D
1 PSATA_PRX_DTX_P0
0.01U_0402_16V7K~D
1 PSATA_PRX_DTX_N0
0.01U_0402_16V7K~D
1
S
C383
10U_0805_10V4Z~D
15 PSATA_PRX_DTX_P0_C
2
C323
PSATA_PTX_DRX_N0_C
3
C382
0.1U_0603_50V4Z~D
15 PSATA_PTX_DRX_N0_C
B
PSATA_PTX_DRX_P0_C
D Q32
SI3456BDV-T1-E3_TSOP6~D
G
HDD_EN_5V
4
R321
100K_0402_5%~D
JSATA2
15 PSATA_PTX_DRX_P0_C
2
For HDD
2N7002DW-7-F_SOT363-6~D
Q34B
1
R320
100K_0402_5%~D
2
@ PAD-OPEN 1x2mm
Open
A
A
+3.3V_HDD Source
Pleace near HDD CONN
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
ODD/HDD CONNECTOR
Size
Document Number
Date:
Monday, July 13, 2009
Rev
0.1
LA-5691P
Sheet
1
29
of
51
2
1
Place close to U15
JSPK1
RST#
10
12
LINEL
LINER
RST#
31
28
29
23
PORTB_L
PORTB_R
31
32
SYNC
RST#
PORT_C_L
PORT_C_R
VREFOUT_C
DMIC_CLK/GPIO1
DMIC0/GPIO2
SPDIF_OUT_0
EAPD
SPORTD_RPORTD_R+
INT_SPK_RINT_SPK_R+
15
16
AUD_DOCK_HP_OUT_L
AUD_DOCK_HP_OUT_R
PORT_E_L
PORT_E_R
PORT_F_L
PORT_F_R
CAP-
1
36
PCBEEP
CAP+
MONO_OUT
2
7
33
30
26
19
20
24
INT_SPK_L+
INT_SPK_L-
17
18
C408 2
C409 2
12
3
AUD_PC_BEEP
C389
22
AVSS
AVSS
AVSS
GPAD
VDD
OUT
OE
GND
3
+3.3V_RUN_BKT_PWR
1
10M_0402_5%~D
DAI_GPU_R3P_SMBCLK
VREFFILT
42
PVSS
V-
34
49
DAP
VREG
37
VREFFILT
21
1
2
0.1U_0402_16V4Z~D R327
1
SPKR
510K_0402_5%~D
15
1
2
0.1U_0402_16V4Z~D R828
C394
1
BEEP
510K_0402_5%~D
38
Resistor
PORT B (HP1)
PORT F
10K
PORT C
5.11K
SPDIFOUT0
+3.3V_RUN_BKT_PWR
DMIC0
2
SPDIFOUT1 (DMIC0)
1
Pull-up to AVDD
26,37
37 DOCK_HP_DET
I2S_LRCLK
4
I2S_DO
6
1A3
10
1A4
12
14
+3.3V_RUN
37 EN_I2S_NB_CODEC#
R354
100K_0402_5%~D
2
1
R345
1K_0402_5%~D
1
15
@
DAI_BCLK#
36
5
DAI_LRCK#
36
1Y3#
7
DAI_DO#
36
1Y4#
9
DAI_12MHZ#
36
2Y1#
11
1A1
1Y1#
1A2
1Y2#
2A1
3
@
2A2
2Y2#
OE1#
OE2#
GND
13
A
+3.3V_RUN
I2S_DI#
8
D20
DA204U_SOT323-3~D
@
SN74HC368DR_SO16~D
1
2
5
Q40B
2N7002DW-7-F_SOT363-6~D
DAI_DI
DOCK_MIC_DET
36
37
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
2
VCC
2
XTALI_12MHZ
1
R351
20K_0402_1%~D
2
1
2
U17
16
@
3
6
2
4
AUD_HP_NB_SENSE
Q40A
5
Q38B
2N7002DW-7-F_SOT363-6~D
1
4
1
2
2
R353
100K_0402_5%~D
1
2N7002DW-7-F_SOT363-6~D
1
R352
39.2K_0402_1%~D
2
1
+3.3V_RUN
1
R349
20K_0402_1%~D
2
1
3
R348
39.2K_0402_1%~D
6
2
1
1
2
2
Q38A
2N7002DW-7-F_SOT363-6~D
R347
2
1
2.49K_0402_1%~D
AUD_SENSE_B
@
I2S_BCLK
+VDDA_AVDD
C420
1000P_0402_50V7K~D
26 AUD_MIC_SWITCH
23,38
+3.3V_RUN
D55
DA204U_SOT323-3~D
C415
1U_0402_6.3V6K~D
2
PORT E
20K
D19
DA204U_SOT323-3~D
C414
10U_0805_10V6K~D
2
1
D18
DA204U_SOT323-3~D
C455
4.7U_0603_6.3V6M~D
2
1
+3.3V_RUN
R355
100K_0402_5%~D
23,38
DAI_GPU_R3P_SMBDAT
SENSE_B
PORT A (HP0)
D17
DA204U_SOT323-3~D
C457
4.7U_0603_6.3V6M~D
1
SENSE_A
39.2K
C413
0.1U_0402_16V7K~D
1
2.49K_0402_1%~D
C417
1000P_0402_50V7K~D
2
DAI_GPU_R3P_SMBCLK
DAI_GPU_R3P_SMBDAT
R346
R350
100K_0402_5%~D
33
XTALI_12MHZ
2
2
Place closely to Pin 34
1
B
6
2
+VDDA_AVDD
2
21
12MHZ_15PF_7C12000011~D
1
2
2.49K
AUD_SENSE_A
DVSS
CAP2
2
+3.3V_RUN
DRVSS
WCLK
2
25
1
Place closely to Pin 13.
SDA
2
17
26
2
1
R1089
10M_0402_5%~D
BKT_DOCK_MIC_IN_L_R
2
2 10K_0402_5%~D BKT_DOCK_MIC_IN_R_R
10K_0402_5%~D
1 2.2U_0805_10V6K~D MIC_IN_L_C
1
1 2.2U_0805_10V6K~D MIC_IN_R_C R1091 1
R1092
92HD81B1A5NLGXYDX8_QFN48_7X7~D
A
AVSS1
AVSS2
1U_0603_10V6K~D
2 AUD_DOCK_HP_L_C
2 AUD_DOCK_HP_R_C
1U_0603_10V6K~D
MIC_IN_L
MIC_IN_R
DVSS
CAP2
1
2
R1090
C410
AUD_DOCK_HP_L_R 1
2
1K_0402_5%~D
AUD_DOCK_HP_R_R 1
2
1K_0402_5%~D
C411
1
R340 1
R342
9
I2S_LRCLK
SCL
X4
4
AUD_HP_OUT_L 26
AUD_HP_OUT_R 26
43
44
DAI_GPU_R3P_SMBDAT
RESET#
TLV320AIC3004IRHBR_QFN32_5X5~D
+VREFOUT
40
41
8
1
+3.3V_RUN_BKT_PWR
EXT_MONO_MIC 26
PORTD_L+
PORTD_L-
DMIC1/GPIO0/SPDIF_OUT_1
2
DAI_GPU_R3P_SMBCLK
1
SDATA_OUT
PORTA_L
PORTA_R
VREFOUT_A
2
1
2
2
47
SDATA_IN
2
AUD_SENSE_A
AUD_SENSE_B
13
14
1
1
3
48
2
10K_0402_5%~D
BITCLK
1
2
1
1
46
35
C453
4.7U_0603_6.3V6M~D
AUD_DOCK_HP_L_C
AUD_DOCK_HP_R_C
2
2
4
1
2
R883
0_0402_5%~D
SENSE_A
SENSE_B
2
1
L3
1
2
BLM21PG600SN1D_0805~D
+VDDA_PVDD
39
45
2
+1.8V_RUN_BKT_PWR
R26
2.2K_0402_5%~D
1 DMIC_CLK_R
100_0603_5%~D
2
PVDD
PVDD
DVDD_IO
2
27
38
2
Close pin 32
R27
2.2K_0402_5%~D
2
1
1
R1296
BCLK
DIN
MCLK
2
+3.3V_RUN
26,37 AUD_NB_MUTE
2
4
1
I2S_BCLK
I2S_DI#
XTALI_12MHZ
20
19
22
23
28
11
13
14
16
15
30
1
2
11
AVDD
AVDD
DVDD
1
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
3
PCH_AZ_CODEC_RST#
@
IOVDD
I2S_DO
BKT_DOCK_MIC_IN_L_R
BKT_DOCK_MIC_IN_R_R
2
5
10
AUD_MIC_SWITCH
DVDD
7
5
27
29
2
2
1
@
C679
150P_0402_50V8J~D
1
DMIC0
C676
150P_0402_50V8J~D
24
32
DOUT
LEFT_LO
RIGHT_LO
3
R1295
DMIC_CLK
DRVDD
DRVDD
3
8
DVDD_CORE
1
1
C432
0.1U_0402_10V7K~D
PCH_AC_SDIN0_R
2
33_0402_5%~D
PCH_AZ_CODEC_SDOUT
15 PCH_AZ_CODEC_SDOUT
1
R332
15 PCH_AZ_CODEC_SYNC
24
18
24
1
3
15 PCH_AZ_CODEC_RST#
AVDD
C459
1U_0402_6.3V6K~D
9
6
15 PCH_AZ_CODEC_SDIN0
25
+3.3V_RUN_IOVDD
C1067
1000P_0402_50V7K~D
1
PCH_AZ_CODEC_BITCLK
15 PCH_AZ_CODEC_BITCLK
U15
+3.3V_RUN_I2S_VDD
+1.8V_RUN_BKT_PWR
C400
10U_0805_10V6K~D
2
1
U16
C456
1U_0402_6.3V6K~D
2
2
C401
0.1U_0402_10V7K~D
2
1
+5V_RUN_BKT_PWR
L77
BLM21PG600SN1D_0805~D
+VDDA_AVDD
1
2
C454
1U_0402_6.3V6K~D
PESD5V2S2UT_SOT23-3~D
1
C399
0.1U_0402_10V7K~D
1
C403
10U_0805_10V6K~D
INT_SPK_L-
1
C404
0.1U_0402_10V7K~D
3
1
C402
1U_0402_6.3V6K~D
INT_SPK_L+
C405
0.1U_0402_10V7K~D
2
L18
BLM18EG601SN1D_2P~D
1
2
+3.3V_RUN_BKT_PWR
+CODEC_DVDD_CORE
@ D93
27 BKT_I2S_LRC
C430
0.1U_0402_10V7K~D
PESD5V2S2UT_SOT23-3~D
B
2
27 BKT_I2S_DO
2
1
2
+3.3V_RUN
2
1
3
1
2
@ R50
33_0402_5%~D
1
+3.3V_RUN
2
1
C1066
1000P_0402_50V7K~D
INT_SPK_R-
2
1
C393
1U_0402_6.3V6K~D
3
2
C392
0.1U_0402_10V7K~D
INT_SPK_R+
2
1
2
PCH_AZ_CODEC_RST#
@ D92
2
2
R365
100K_0402_5%~D
1
C463
1U_0402_6.3V6K~D
GND
GND
MOLEX_53780-0970~D
1
C431
0.1U_0402_10V7K~D
+3.3V_RUN_BKT_PWR
C433
0.1U_0402_10V7K~D
Place close to JSPK1
1
XTALI_12MHZ
2
1@ 0_0402_5%~D
I2S_BCLK
2
1@ 0_0402_5%~D
I2S_DI#
2
1@ 0_0402_5%~D
I2S_LRCLK
2
1@ 0_0402_5%~D
1
R1265
1
R1266
1
R1267
1
R1268
BKT_MCLK
27 BKT_I2S_SCLK
Close pin 25
C397
1U_0402_6.3V6K~D
1
2
1
L70
47UH_CBMF1608T470K_10%~D
Close pin 18
C398
0.1U_0402_10V7K~D
2
2
C685
0.1U_0402_16V4Z~D
2
1
@C424
@
C424
100P_0402_50V8J~D
2
1
@C423
@
C423
100P_0402_50V8J~D
1
@C426
@
C426
100P_0402_50V8J~D
2
@C425
@
C425
100P_0402_50V8J~D
1
10
11
27
Close pin 24
C428
10U_0805_10V6K~D
19 SPEAKER_DET#
+3.3V_RUN_BKT_PWR
C458
1U_0402_6.3V6K~D
INT_SPK_L+
INT_SPK_LINT_SPK_R+
INT_SPK_R-
1
2
3
4
5
6
7
8
9
C429
0.1U_0402_10V7K~D
1
2
3
4
5
6
7
8
9
LID_CL#
LID_CL#
+3.3V_ALW
1
37,41
1
15 mils trace
Azalia (HD) Codec
Size
Document Number
Date:
Monday, July 13, 2009
Rev
0.1
LA-5691P
1
Sheet
30
of
51
5
4
3
2
1
Trace=12mil
C427
10P_0402_50V8J~D
1
2
C
R1200
1
2
1
1K_0402_5%~D
R59
1
2
2
C476
27P_0402_50V8J~D
1
C475
27P_0402_50V8J~D
Y2
25MHZ_18PF_1Y725000CE1A~D
1
2
LED0
LED1
LED2
TP_LAN_JTAG_TDI
TP_LAN_JTAG_TDO
TP_LAN_JTAG_TMS
TP_LAN_JTAG_TCK
32
34
33
35
JTAG_TDI
JTAG_TDO
JTAG_TMS
JTAG_TCK
LED
26
27
25
XTALO
XTALI
9
10
XTAL_OUT
XTAL_IN
LAN_TEST_EN
30
TEST_EN
RES_BIAS
12
RBIAS
VDD3P3_15
VDD3P3_19
VDD3P3_29
1
2
5
+RSVD_VCC3P3_1 R70 2
+RSVD_VCC3P3_2 R1291 2
4
+3.3V_LAN_OUT
15
19
29
+3.3V_LAN_OUT_R
2
R693
1
0_0603_5%~D
VDD1P0_43
VDD1P0_11
VDD1P0_40
VDD1P0_22
VDD1P0_16
VDD1P0_8
+3.3V_LAN
1
C786
1U_0402_6.3V6K~D
+1.0V_LAN_4
43
+1.0V_LAN_3
11
+1.0V_LAN_2
2
R694
2
R695
2
R696
1
40
22
16
8
CTRL_1P0
7
49
1
2
2
+1.0V_LAN
1
0_0603_5%~D
1
0_0603_5%~D
1
0_0603_5%~D
2
1
2
+1.05V_M
+1.0V_LAN
1
@
1
2
1
2
1
2
@ R119
1
2
0_0805_5%~D
C
REGCTL_PNP10
+1.0V_LAN_2
+1.0V_LAN_3
WG82577LM-QLDT-A2_QFN48_6X6~D
1
2
R1200 Resistor Value:
3.01 kohm for Hanksville-M LOM
2.37 kohm for Hanksville-D LOM
+1.0V_LAN_4
1
2
1
2
1
2
+3.3V_M
@ R373
0_1210_5%~D
1
Need to verify A3 silicon drive
power before removing C427
+LOM_VCT
+1.0V_LAN
47
46
37
VSS_EPAD
Q45
DCP69A-13_SOT223-3~D
20 mil trace width min
1
3.01K_0402_1%~D
1
3.01K_0402_1%~D
2
2
4
+LOM_VCT_R
2
VDD1P0_47
VDD1P0_46
VDD1P0_37
JTAG
T176
T177
LOM_ACTLED_YEL#
LOM_SPD100LED_ORG#
LOM_SPD10LED_GRN#
@ R562 0_0603_5%~D
2
1
+LOM_VCT
6
2
1
D
2
VDD3P3_OUT
PAD~D @
PAD~D @
2
LAN_DISABLE_N
37 LAN_DISABLE#_R
3.01K_0402_1%~D
1
R56
2
@
3
RSVD_VCC3P3_1
RSVD_VCC3P3_2
VDD3P3_IN
2
0_0402_5%~D
1
C806
0.1U_0402_10V7K~D
LAN_DISABLE#_R
2
0_0402_5%~D
10K_0402_5%~D
1
R42
SMBUS
2
SMBus Device Address 0xC8
VCT
1
C474
10U_0805_10V4Z~D
19 PM_LANPHY_ENABLE
LAN_SMBCLK
LAN_SMBDATA
16 LAN_SMBCLK
16 LAN_SMBDATA
1
R73
1
R44
10K_0402_5%~D
REGCTL_PNP10
2
LAN_TX3+
LAN_TX3-
+3.3V_LAN_R
Trace=12mil
3
23
24
C1118
0.01U_0402_16V7K~D
SMB_CLK
SMB_DATA
MDI_PLUS3
MDI_MINUS3
2
C803
0.1U_0402_10V7K~D
28
31
LAN_TX2+
LAN_TX2-
1
2
C480
0.1U_0402_10V7K~D
PERp
PERn
20
21
R72
4.99K_0402_1%~D
2
1
41
42
MDI_PLUS2
MDI_MINUS2
C802
0.1U_0402_10V7K~D
PETp
PETn
C479
0.1U_0402_10V7K~D
38
39
1 PCIE_PRX_GLANTX_P6_C
0.1U_0402_10V7K~D
1 PCIE_PRX_GLANTX_N6_C
0.1U_0402_10V7K~D
LAN_TX1+
LAN_TX1-
C801
0.1U_0402_10V7K~D
2
C451
2
C452
16 PCIE_PRX_GLANTX_P6
16 PCIE_PRX_GLANTX_N6
16 PCIE_PTX_GLANRX_P6_C
16 PCIE_PTX_GLANRX_N6_C
+3.3V_LAN
MDI_PLUS1
MDI_MINUS1
17
18
C41
1U_0402_6.3V6K~D
PE_CLKP
PE_CLKN
LAN_TX0+
LAN_TX0-
C800
0.1U_0402_10V7K~D
44
45
13
14
C478
0.1U_0402_10V7K~D
CLK_PCIE_LAN
CLK_PCIE_LAN#
MDI_PLUS0
MDI_MINUS0
C477
0.1U_0402_10V7K~D
16 CLK_PCIE_LAN
16 CLK_PCIE_LAN#
CLK_REQ_N
PE_RST_N
1
C466
4.7U_0603_6.3V6M~D
48
36
2
C465
4.7U_0603_6.3V6M~D
LANCLK_REQ#_R
18 PLTRST_LAN#
D
MDI
16 LANCLK_REQ#
U79
PCIE
R37
0_0402_5%~D
1
2
1
R371
0_1210_5%~D
2
R699
10K_0402_5%~D
1
+1.05V_M for VC10 not the
correct or complete
implementation to connect to
+1.05V SVR.
1
TP_LAN_JTAG_TMS
2
10K_0402_5%~D
TP_LAN_JTAG_TCK
2
10K_0402_5%~D
1
@R75
@
R75
1
@R76
@
R76
R370
0_1210_5%~D
1
2
C805
10U_0805_6.3V6M~D
+3.3V_LAN
+3.3V_RUN
C804
0.1U_0402_10V7K~D
+3.3V_LAN
Q2
+3.3V_ALW
+3.3V_LAN
DOCK_LOM_TRD0+
DOCK_LOM_TRD0-
32
31
DOCK_LOM_TRD1+
DOCK_LOM_TRD1-
27
26
DOCK_LOM_TRD2+
DOCK_LOM_TRD2-
23
22
DOCK_LOM_TRD3+
DOCK_LOM_TRD3-
19
20
40
DOCK_LOM_ACTLED_YEL#
DOCK_LOM_SPD100LED_ORG#
DOCK_LOM_SPD10LED_GRN#
LAN_TX2+R
9
A2+
LAN_TX2-R
10
A2-
LEDB0
LEDB1
LEDB2
LAN_TX3+ 1
2
L26
22NH_0603CS-220EJTS_5%~D
LAN_TX31
2
L27
22NH_0603CS-220EJTS_5%~D
LAN_TX3+R
11
A3+
C0+
C0-
LAN_TX3-R
12
LOM_ACTLED_YEL#
LOM_SPD100LED_ORG#
LOM_SPD10LED_GRN#
Layout Notice : Place bead as
close PI3L500 as possible
15
16
42
5
43
FROM NIC
DOCKED
A3-
C1+
C1-
SEL
C2+
C2-
LEDA0
LEDA1
LEDA2
C3+
C3LEDC0
LEDC1
LEDC2
PD
17,37 SIO_SLP_LAN#
1
@R47
@
R47
S
3
G
1
2
2
ENAB_3VLAN
1
2
1
2
DOCK_LOM_TRD0+ 36
DOCK_LOM_TRD0- 36
DOCK_LOM_TRD1+ 36
DOCK_LOM_TRD1- 36
DOCK_LOM_TRD2+ 36
DOCK_LOM_TRD2- 36
+3.3V_LAN
DOCK_LOM_TRD3+ 36
DOCK_LOM_TRD3- 36
A
DOCK_LOM_ACTLED_YEL# 36
DOCK_LOM_SPD100LED_ORG# 36
DOCK_LOM_SPD10LED_GRN# 36
@
PAD_GND
TO
DOCK
PI3L720ZHEX_TQFN42_9X3P5~D
4
B
LAN_ACTLED_YEL# 26
LED_100_ORG# 26
LED_10_GRN# 26
@
@
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
LOM_ACTLED_YEL#
LOM_SPD10LED_GRN#
LOM_SPD100LED_ORG#
Intel Intel 82577/82578 (Hanksville) / LAN SW
Size
Document Number
Date:
Monday, July 13, 2009
Rev
0.1
LA-5691P
5
C481
0.1U_0402_10V7K~D
C482
10U_0805_6.3V6M~D
1
2
3
1
SW_LAN_TX3+ 26
SW_LAN_TX3- 26
1: TO DOCK
0: TO RJ45
2
2
0_0402_5%~D
4
36
35
LAN_TX2+ 1
2
L24
22NH_0603CS-220EJTS_5%~D
LAN_TX21
2
L25
22NH_0603CS-220EJTS_5%~D
6
LAN_ACTLED_YEL#
LED_100_ORG#
LED_10_GRN#
B3+
B3-
1
R2
5
1
17
18
41
A1-
AUX_ON
1
SW_LAN_TX3+
SW_LAN_TX3-
A1+
7
38
SW_LAN_TX2+ 26
SW_LAN_TX2- 26
2
25
24
6
LAN_TX1-R
SW_LAN_TX1+ 26
SW_LAN_TX1- 26
1
SW_LAN_TX2+
SW_LAN_TX2-
2
39
30
21
14
8
4
1
29
28
R394
10K_0402_5%~D
34
33
B2+
B2-
0_0402_5%~D
R393
10K_0402_5%~D
B1+
B1-
SW_LAN_TX0+ 26
SW_LAN_TX0- 26
R392
10K_0402_5%~D
A0-
LAN_TX1+R
13
SW_LAN_TX0+
SW_LAN_TX0SW_LAN_TX1+
SW_LAN_TX1-
LAN_TX1+ 1
2
L22
22NH_0603CS-220EJTS_5%~D
LAN_TX11
2
L23
22NH_0603CS-220EJTS_5%~D
DOCKED
38
37
2
3
B0+
B0-
A0+
1
A
DOCKED
LAN_TX0-R
2
2
37
LAN_TX0+R
4
C1414
2200P_0402_50V7K~D
LAN_TX0+ 1
2
L20
22NH_0603CS-220EJTS_5%~D
LAN_TX01
2
L21
22NH_0603CS-220EJTS_5%~D
R1311
100K_0402_5%~D
Q184B
2N7002DW-7-F_SOT363-6~D
U25
6
5
2
1
R1310
100K_0402_5%~D
LAN ANALOG
SWITCH
VDD
VDD
VDD
VDD
VDD
VDD
VDD
1
+3.3V_ALW2
Q184A
2N7002DW-7-F_SOT363-6~D
1
2
C462
0.1U_0402_16V4Z~D
2
C461
0.1U_0402_16V4Z~D
1
B
C460
0.1U_0402_16V4Z~D
2
D
SI3456BDV-T1-E3_TSOP6~D
+15V_ALW
+3.3V_LAN
3
2
Sheet
1
31
of
51
5
4
3
2
1
+3.3V_ALW
+3.3V_ALW
25
GPAD
GND
12
2
SC_RST
RFID MODE
Component VOLTAGE CURRENT
R555,R633
1
2
+3.3V_ALW
R634
NOPOP
3K
NOPOP
C641,C647 NOPOP
D28,D29
NOPOP
D31-D34
POP
150P
1
/CS
VCC
8
SPI_RXD
2
DO
+2.5V_ALW_AVDD
2
2
C1070
750P_0603_50V8G~D
4
GND
DIO
5
SPI_TXD
L72
150NH_LLQ1608-FR15G_2%~D
1
2
RFREADER_TXN1
1
3
+3.3V_ALW
1
2
POP
BCM5882_GPIO15
2
1
NOPOP
1
R341
TYCO_1-2041084-0~D
4
2
4.7K_0402_5%~D
2
1
RFREADER_TXP1
RFREADER_TXN1
HF_RFIDTAG_VTX
HF_RX_P
HF_RX_N
A10
B10
RFREADER_RXP
RFREADER_RXN
HF_RX_TEST0
HF_RX_TEST1
HF_RX_TEST2
HF_RX_TEST3
B9
C9
C10
E9
HF_RX_TEST0
HF_RX_TEST1
HF_RX_TEST2
HF_RX_TEST3
HF_TX_AVDD1P2
HF_RX_AVDD1P2
HF_RX_ADC_AVDD1P2
D7
F8
D10
+RFID_AVDD1P2
HF_RX_AVDD2P5
HF_TX_AVDD2P5
F9
A7
+RFID_AVDD2P5
HF_TX_AVDD3P3_D8
HF_TX_AVDD3P3_B7
D8
B7
+RFID_AVDD3P3
HF_TX_AVSS_C7
HF_TX_AVSS_C8
HF_TX_AVSS_E7
C7
C8
E7
HF_RFIDTAG_VREF
HF_RFIDTAG_DVDD1P2
C6
E6
HF_RFIDTAG_AVDD2P5_C6
HF_RFIDTAG_AVDD2P5_E6
D6
B5
HF_RFIDTAG_AVSS_D6
HF_RFIDTAG_AVSS_B6
HF_RFIDTAG_DVSS
C
A9
B11
E8
D9
B
Disable RFID: depop R497,
R496, C642, C640, L71, L72
pop R1061-R1065
2
@
1
2
3
2
1
2
1
1
2
3
4
5
6
7
8
RFREADER_TXN1_PI
ANT_RFTAG_VRXN_R
ANT_RFTAG_VRXP_R
RFREADER_TXP1_PI
19 CONTACTLESS_DET#
1
2
3
4
5
6
GND
GND
TYCO_2041070-6~D
1
@C647
@
C647
1U_0402_6.3V6K~D
+2.5V_ALW_AVDD
BLM18BB100SN1D_2P~D
2
1 +RFID_AVDD2P5
L36
BLM18BB100SN1D_2P~D
1 +RFID_AVDD3P3
L38
2
A8
B8
placement close to U32 pins: RFREADER_TXN1 &
RFREADER_TXP1, and ESD diodes should be placed
between Pi filter and connector.
2
C1071
750P_0603_50V8G~D
Hardware enable for USH TPM:Populate D70 & R841,
No Stuff R483.
Hardware disable for USH TPM:No Stuff D70 &
R841, Populate R483
@ D34
DA204U_SOT323-3~D
+3.3V_ALW
M45PE16-VMW6TG_SO8W8~D
BCM5882_GPIO15
W25X32VSSIG_SO8~D
SPI_RXD
PLL_TESTOUT
PLL_TESTOUT
T157 PAD~D
HF_RX_TEST2
R908
0_0402_5%~D
1
2
HF_TX_P
HF_TX_N
RFID
+1.2V_ALW_AVDD
BLM18BB100SN1D_2P~D
2
1 +RFID_AVDD1P2
L37
1
2
1
2
1
2
2
DELL CONFIDENTIAL/PROPRIETARY
1
2
C629
0.1U_0402_16V4Z~D
SPI_CLK
8
7
6
5
T155PAD~D
C13
BCM5882KFBG_FBGA196~D
C628
1U_0402_6.3V6K~D
6
Q
VSS
VCC
W#
SWV
HF_RX_ADC_AVSS1
HF_RX_ADC_AVSS2
C627
1U_0402_6.3V6K~D
SPI_RST
CLK
D
C
RESET#
S#
T156PAD~D
SWV
HF_RX_AVSS_A9
HF_RX_AVSS_B11
R633
15K_0402_1%~D
C626
0.1U_0402_16V4Z~D
7
/WP
1
2
3
4
POR_MONITOR
K11
JCS1
C625
1U_0402_6.3V6K~D
/HOLD
BCM5882_GPIO15
3
SPI_TXD
SPI_CLK
SPI_RST
SPI_CS
C5
2
A5
0.01U_0402_25V7K~D
B4
U34
SPI_CS
J13
1
@ C641
1U_0402_6.3V6K~D
@ R498
3K_0402_1%~D
3K
3K
POR_MONITOR
T154 PAD~D
@ D32
DA204U_SOT323-3~D
C643
1U_0402_6.3V6K~D
1
2
R494,R498 NOPOP
SPI_RST
BCM5882
2
2
1
1
2
+3.3V_ALW
@ U19
5
2
C624
1U_0402_6.3V6K~D
R1468
1.5K_0402_5%~D
2
@ D33
DA204U_SOT323-3~D
RFREADER_RXN
1
3
1
C632
0.1U_0402_16V4Z~D
2
10
9
8
7
6
5
4
3
2
1
1
C631
1U_0402_6.3V6K~D
1
10
9
8
7
6
5
4
3
2
1
3
C1
1
+3.3V_ALW
1
2
@ R1063
0_0402_5%~D
C630
3.3U_0603_10V6K~D
SC_CLK
SC_IO
SC_C4
SC_C8
SC_DET
GND
GND
1
+3.3V_ALW
Place C718 close
to U33 pin15
JSC1
12
11
1
1
2
@ D31
DA204U_SOT323-3~D
RSTOUT_N
HF_RFIDTAG_VRX_P
HF_RFIDTAG_VRX_N
L71
150NH_LLQ1608-FR15G_2%~D
1
2
RFREADER_TXP1
1
2
@ R1062
0_0402_5%~D
1
C644
0.1U_0402_16V4Z~D
A
1
SC_VCC should be 3X wide as
regular SC trace width to carry
~60mA max. current per ISO spec
C1031 and C646 should be p
laced very close to SC cage pin
C646
.47U_0402_6.3V6-K~D
@ C1031
10U_0805_10V4Z~D
2
2
3
+3.3V_ALW
SC_RST
SC_CLK
SC_IO
SC_C4
SC_C8
SC_DET
2
C718
0.22U_0402_10V6K~D
TDA8034HN_HVQFN24_4X4~D
1
0_0402_5%~D
100_0402_5%~D
100_0402_5%~D
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
+SC_VCC
+SC_VCC
@ R1064
0_0402_5%~D
1
24
RFTAG_VRXP
A6
RFTAG_VRXN B6
R555
15K_0402_1%~D
@ R494
3K_0402_1%~D
@C1026
@
C1026
1U_0402_6.3V6K~D
1
2
CLKOUT
2
XTAL2
2
1
XTAL1
RFREADER_RXP
POR_EXTR
+1.2V_ALW_AVDD
2
23
C639
1U_0402_6.3V6K~D
1
2
D3
TESTMODE
A4
R631
0_0402_5%~D
1
2
CLKOUT
HF_RX_TEST3
@ L73
100NH_LLQ1608-FR10G_2%~D
1
2
R488
3.3M_0402_5%~D
2
2
2
2
2
2
2
2 1U_1206_100V7K~D
2 1U_1206_100V7K~D
1
C595
R634
3K_0402_1%~D
BCM5882_SCCLK
2
C1015
27P_0402_50V8J~D
AUX1UC
AUX2UC
I/OUC
OFFN
PAD~D T143
1
+SC_VCC
1
1
1
1
1
1
C633
27P_0402_50V8J~D
21
22
20
19
1
R773
R772
R491
R493
R492
R1459
2
1
1
14
13
9
10
11
8
AUX1UC
AUX2UC
BCM5882_IO
BCM5882_SCDET
RSTIN
CMDVCCN
EN_5V/3VN
EN_1.8VN
1
1
2
15
RST
CLK
I/O
AUX1
AUX2
PRESN
3
5
2
4
2
2
1
VCC
BCM5882_SCRST
2
1SCC_CMDVCC_N
R776
BCM5882_GPIO25
0_0402_5%~D BCM5882_GPIO26
1
2
@ R1065
0_0402_5%~D
16
2
2
C1177
10U_0603_6.3V6M~D
VDDP
2 4.12K_0402_1%~D C642 1
2 4.12K_0402_1%~D C640 1
C1021
4.7U_0603_6.3V6M~D
1
17
R898
4.7K_0402_5%~D
@
VDD(intf)
VDD
2
C709
10U_0805_10V6M~D
SCC_CMDVCC_N_R
PORadj
CLKDIV1
CLKDIV2
2
+5V_ALW
C1014
0.1U_0402_16V4Z~D
18
6
7
2
1
C706
10U_0805_10V6M~D
PORADJ
CLKDIV1
CLKDIV2
1
C620
0.1U_0402_16V4Z~D
2
U33
B
R485
4.7K_0402_5%~D
@
1
1
1
CONTACTLESS_DET#
SCC_CMDVCC_N_R
BCM5882_GPIO15
CLKDIV2
U32C
SBOOT
POR_EXTR
+3.3V_ALW
2 PORADJ
4.7K_0402_5%~D
2 CLKDIV2
4.7K_0402_5%~D
C622
0.1U_0402_16V4Z~D
1
@ R538
1
R553
2 PORADJ
4.7K_0402_5%~D
2 CLKDIV1
4.7K_0402_5%~D
1
@ R537
1
R532
1
2
J14
J1
D2
C2
B1
BCM5882KFBG_FBGA196~D
C595 should be placed
closer to pin A5
C606
1U_0402_6.3V6K~D
2
SECURE_BOOT
D1
D
GPIO_4
GPIO_14
GPIO_15
GPIO_16
HF_RX_TEST1
+2.5V_ALW_AVDD
C605
1U_0402_6.3V6K~D
+3.3V_ALW
Smart Card
+3.3V_ALW
+1.2V_ALW_AVDD
BCM5882KFBG_FBGA196~D
SCANACCMODE
E2
HF_RX_TEST0
R907
0_0402_5%~D
1
2
UART_TX/GPIO1
C1176
10U_0603_6.3V6M~D
C609
15P_0402_50V8J~D
2
All XTAL components and traces should be
placed/layout on top layer. The gnd/pwr
layer below will provide shielding from
27.12Mhz interference which might affect
cellular certification.
C602
1U_0402_6.3V6K~D
27.12MHZ_12PF_1N227120CC0B~D
C608
12P_0402_50V8J~D
1
1
LPC
SPI
XO
1 R476
4
5.1M_0402_5%~D
3
GND
2
OUT
GND
1
IN
2
UART_RX/GPIO0
R894
0_0402_5%~D
1
2
ANT_RFTAG_VRXP_R R497 1
ANT_RFTAG_VRXN_R R496 1
C601
1U_0402_6.3V6K~D
2
1
E3
SBOOT
POR_EXTR
2
@
XI
1
BCM5882_SCCLK
AUX1UC
BCM5882_GPIO25
BCM5882_GPIO26
BCM5882_SCDET
BCM5882_IO
BCM5882_SCRST
@ R775
SC_TEST 2
1 SCC_CMDVCC_N
0_0402_5%~D
Y3
SCANACCMODE
USH_TESTMODE
PAD~D T159
1
ALDO_PWRDN
PAD~D T158
2
E12
OVSTB
25
L14
1
CORE_PWRDN
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
1
1
1
1
1
1
1
2
IDDQ_EN
P1
2
2
2
2
2
2
2
+SC_PWR
E1
FP_RESET#
CLKDIV1
@
K1
R472
R533
R767
R766
R774
R608
R771
OVSTB
UART_TX/GPIO1
UART_RX/GPIO0
@
WAKEUP_N
JTAG_RST#_USH
R897
0_0402_5%~D
1
2
JTCE_USH
M11
M12
F2
F1
M2
L11
M10
N14
P14
L10
SC_CLK
SC_FCB
SC_SEL5V_GPIO_25
SC_SEL18V_GPIO_26
SC_DET
SC_IO
SC_RST
SC_PWR_N14
SC_PWR_P14
SC_VCC
JTAG_TCK
JTAG_TDI
JTAG_TDO
JTAG_TMS
JTAG_TRSTN
JTCE
@
L7
JTCE_USH
JTAG_TMS_USH
T145PAD~D
T148PAD~D
T149PAD~D
T150PAD~D
L1
M1
N1
N2
L3
L2
CLK
UART
BCMGPIO_10
BCMGPIO_11
BCMGPIO_12
BCMGPIO_13
JTAG_TDO_USH
R896
0_0402_5%~D
1
2
@
SMBCLK
SMBDAT
SMBALERT_N
SMB_GPIO_0
SMB_GPIO_1
SM BUS
Smard Card
1
C3
B2
A2
A1
JTAG_TDI_USH
@
2
SSP_CLK1_GPIO_10
SSP_FSS1_GPIO_11
SSP_TXD1_GPIO_12
SSP_RXD1_GPIO_13
RST_N
NC
JTAG_CLK_USH
JTAG_TDI_USH
JTAG_TDO_USH
JTAG_TMS_USH
JTAG_RST#_USH
@
R899
0_0402_5%~D
PCI_TPM_TERM
SPI_CLK
SPI_CS
SPI_RXD
SPI_TXD
G1
D4
C4
B3
A3
UART_TX_GPIO_1
UART_RX_GPIO_0
UART_CTS_GPIO_2
UART_RTS_GPIO_3
@
G3
G2
H1
H2
BCM5882
REFCLK_XTALIN
REFCLK_XTALOUT
@
SSP_CLK0_GPIO_6
SSP_FSS0_GPIO_7
SSP_TXD0_GPIO_8
SSP_RXD0_GPIO_9
JTAG_CLK_USH
R895
0_0402_5%~D
1
2
G14
F14
@
USBH_OC1
+3.3V_ALW
@
2 USH_PWR_STATE#_R
0_0402_5%~D
1
2
R738
1K_0402_5%~D
1
2
R739
1K_0402_5%~D
1
2
R743
1K_0402_5%~D
1
R1049
REF_XIN
2
10M_0402_5%~D
LRESET_N_GPIO_17
LPCEN
LPCPD_N_GPIO_24
M9
L9
K9
M7
N8
BCM5882_ALERT#
2 150_0402_5%~D
SMB_GPIO1
USBH_DN_1
USBH_UP_1
USBH_OC_1
P11
P12
P10
FP_USBD- 27
FP_USBD+ 27
2
1
R844
4.7K_0402_5%~D
@
@
C589
4.7P_0402_50V8C~D
R1460 1
PAD~D T147
P7
P8
P9
@
SC_DET
R481
0_0402_5%~D
1
2 REF_XOUT
1
R486
LCLK
LAD0_GPIO_20
LAD1_GPIO_21
LAD2_GPIO_22
LAD3_GPIO_23
LFRAME_N_GPIO_18
LSERIRQ_GPIO_19
2 0_0402_5%~D
37 USH_PWR_STATE#
C
P2
N3
M4
K5
N4
K4
L4
FP_USBDFP_USBD+
USBH_OC0#
USBH_DN_0
USBH_UP_0
USBH_OC_0
USBD_DN
USBD_UP
USBD_ATTACH_GPIO_27
PLTRST1#_USH M3
USH_LPCEN
M5
LPD#
N6
1
2
R1048
0_0402_5%~D
R466 1
USH_SMBCLK
USH_SMBDAT
33,37 SP_TPM_LPC_EN
38 USH_SMBCLK
38 USH_SMBDAT
37 BCM5882_ALERT#
P5
P6
N7
R615 1
2 0_0402_5%~D
R618 1
2 0_0402_5%~D
R619 1
2 0_0402_5%~D
R620 1
2 0_0402_5%~D
R621 1
2 0_0402_5%~D
2 0_0402_5%~D IRQ_SERIRQ_R
RST_N
BCM5882
@@@@
R744
10_0402_5%~D
1
PLTRST_USH#
18 PLTRST_USH#
USBP7-_R
2 0_0402_5%~D
USBP7+_R
2 0_0402_5%~D
2 1.5K_0402_5%~D
CLK_PCI_TPM
LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
LPC_LFRAME#
@ R842 1
16 CLK_PCI_TPM
15,33,37,38 LPC_LAD0
15,33,37,38 LPC_LAD1
15,33,37,38 LPC_LAD2
15,33,37,38 LPC_LAD3
15,33,37,38 LPC_LFRAME#
15,33,37,38 IRQ_SERIRQ
CLK_PCI_TPM
2
R468 1
R469 1
R470 1
USBP7USBP7+
U32D
REF_XIN
REF_XOUT
JTAG
U32A
18
18
2 RST_N
4.7K_0402_5%~D
2 OVSTB
4.7K_0402_5%~D
2 FP_RESET#
4.7K_0402_5%~D
2CONTACTLESS_DET#
10K_0402_5%~D
1
R810
1
R484
1
R1034
1
@ R1061
@
D
2 JTAG_RST#_USH
1K_0402_5%~D
2 USH_LPCEN
4.7K_0402_5%~D
1
R737
1
6@ R483
2 PLTRST1#_USH
10K_0402_5%~D
2 USH_LPCEN
4.7K_0402_5%~D
2 LPD#
4.7K_0402_5%~D
2 IRQ_SERIRQ_R
4.7K_0402_5%~D
USH_SMBCLK
2
2.2K_0402_5%~D
USH_SMBDAT
2
2.2K_0402_5%~D
2 BCM5882_ALERT#
2.2K_0402_5%~D
2 USH_PWR_STATE#
4.7K_0402_5%~D
2 USBH_OC1
4.7K_0402_5%~D
1
@ R1059
1
5@ R841
1
@ R474
1
R843
1
R490
1
R626
1
R629
1
R630
1
R637
Compal Electronics, Inc.
Title
USH BCM5882 (1/2)
Size
Document Number
Rev
0.1
LA-5691P
Date:
Monday, July 13, 2009
Sheet
1
32
of
51
A
5
4
3
2
+3.3V_ALW
2
1
2
C1178
10U_0603_6.3V6M~D
2
1
C593
1U_0402_6.3V6K~D
1
1
C592
1U_0402_6.3V6K~D
1
2
C1179
10U_0603_6.3V6M~D
1
2
C619
1U_0402_6.3V6K~D
1
2
C618
1U_0402_6.3V6K~D
1
2
C617
1U_0402_6.3V6K~D
1
2
C616
1U_0402_6.3V6K~D
2
C615
1U_0402_6.3V6K~D
C614
1U_0402_6.3V6K~D
1
+1.2V_ALW_PLL
C613
1U_0402_6.3V6K~D
2
1
1
2
U32B
+1.2V_ALW_PLL
+1.2V_ALW_AVDD
+2.5V_ALW_AVDD
+3.3V_ALW
D
1
1
2
A14
D11
P13
+SC_PWR
C1027
0.1U_0402_16V4Z~D
USH BCM5882 and China TPM Z8H172T Option
Ref Des TCM Enable
TPM Enable
ALL TPM/TCM Disable
PART/PIN
TCM circuit
All 3@
POP
@
SIO 5028 ->SP_TPM_LPC_EN
PU R841
@
POP
@
PD R483
POP
@
@
PU R788
@
@
@
PU R787
@
@
POP
PD R339
POP
POP
@
PU R273
POP
POP
@
PD R922
@
@
POP
2
+1.2V_ALW_PLL
1
+VDDC_5882
@
+3.3V_ALW
C
PCH GPIO39 ->TPM_ID1
PCH GPIO38 ->TPM_ID0
1
2
2
1
C599
1U_0402_6.3V6K~D
1
1
C1180
10U_0603_6.3V6M~D
2
2
C598
1U_0402_6.3V6K~D
China TPM
1
C877
1U_0402_6.3V6K~D
1
2
C597
1U_0402_6.3V6K~D
LOW:Power Down Mode
High:Working Mode
C873
1U_0402_6.3V6K~D
2
C596
1U_0402_6.3V6K~D
1
D14
E14
C14
D13
F3
J4
J5
J6
J7
J8
J10
J11
K7
K8
E4
J2
K3
L8
N10
+VDDC_5882
2
H13
E10
E11
A13
B12
C1017
4.7U_0603_6.3V6M~D
1
2
C612
1U_0402_6.3V6K~D
1
2
C875
1U_0402_6.3V6K~D
1
2
C638
1U_0402_6.3V6K~D
1
2
C637
1U_0402_6.3V6K~D
1
2
C636
1U_0402_6.3V6K~D
2
C635
1U_0402_6.3V6K~D
1
C621
1U_0402_6.3V6K~D
2
H14
A11
A12
G4
H3
H4
J3
M13
N13
L6
M6
K10
K12
L12
L13
D5
E5
N5
BCM5882
AVDD_1P2I_REF
AVDD_1P2O_A11
AVDD_1P2O_A12
AVSS_LDO12
AVDD_2P5I
AVDD_2P5O_E10
AVDD_2P5O_E11
C11
AVSS_LDO25_B13
AVSS_LDO25_C12
B13
C12
AVSS_PLL
B14
AVDD25_LDO12_A13
AVDD25_LDO12_B12
AVSS_REF
F13
PLL_AVSS
D12
PLL_DVSS
E13
POR_AVSS
G13
VSSC_F4
VSSC_F5
VSSC_F6
VSSC_F7
VSSC_F10
VSSC_F11
VSSC_F12
VSSC_G5
VSSC_G6
VSSC_G7
VSSC_G8
VSSC_G9
VSSC_G10
VSSC_G11
VSSC_G12
VSSC_H5
VSSC_H6
VSSC_H7
VSSC_H8
VSSC_H9
VSSC_H10
VSSC_H11
VSSC_H12
VSSC_J9
VSSC_J12
VSSC_K2
VSSC_K6
VSSC_K13
VSSC_K14
VSSC_L5
VSSC_M8
VSSC_M14
VSSC_N9
VSSC_N11
VSSC_N12
VSSC_P3
VSSC_P4
F4
F5
F6
F7
F10
F11
F12
G5
G6
G7
G8
G9
G10
G11
G12
H5
H6
H7
H8
H9
H10
H11
H12
J9
J12
K2
K6
K13
K14
L5
M8
M14
N9
N11
N12
P3
P4
AVDD25_PLL_A14
D
AVDD33_LDO25
OTP_PWR
PLL_AVDD_1P2I
PLL_AVDD_1P2O
PLL_DVDD_1P2I
VDDC_D13
VDDC_F3
VDDC_J4
VDDC_J5
VDDC_J6
VDDC_J7
VDDC_J8
VDDC_J10
VDDC_J11
VDDC_K7
VDDC_K8
VDDO_33_E4
VDDO_33_J2
VDDO_33_K3
VDDO_33_L8
VDDO_33_N10
VDDO_33CORE_G4
VDDO_33CORE_H3
VDDO_33CORE_H4
VDDO_33CORE_J3
VDDO_33SC_M13
VDDO_33SC_N13
VDDO_LPC_L6
VDDO_LPC_M6
VDDO_SC_K10
VDDO_SC_K12
VDDO_SC_L12
VDDO_SC_L13
C
VDDO_VAR_D5
VDDO_VAR_E5
VESD
BCM5882KFBG_FBGA196~D
+3.3V_RUN
3@ U24
B
B
2 0_0402_5%~D
2 0_0402_5%~D
LPC_LFRAME#_R
PCI_RST#_R
3@ R909 1
2 0_0402_5%~D
CLKRUN#_R
TCM_BA1
TCM_BA0
NC_5
NC_12
NC_13
NC_1
NC_2
NC_6
NC_8
NC_P
5
12
13
1
JETWAY_14M
1
1
1
SSX44-B_TSSOP28~D
TCM Vender
ZTE
Jetway
1
3@
1
2
3@
JETWAY_14M 16
2
@
3@
TCM_BA0
TCM_BA1
POP
R1026, R1023, C23, C1174
C1175, R910
3@
2
2
@C2067
@C2067
4.7P_0402_50V8C~D
@ C1175
0.1U_0402_16V4Z~D
2
R1023
1
2
A
JETWAY_PIN5
2
1
3@
+3.3V_RUN
1
@ R1528
10_0402_5%~D
2
JETWAY_PIN5
1
2
6
8
14
CLK_PCI_TPM_CHA
3@
R1025
10K_0402_5%~D
LCLK
LFRAME#
LRESET#
SERIRQ
CLKRUN#
PP
BA_1
BA_0
2
R1022
10K_0402_5%~D
21
22
16
27
15
7
3
9
GND_11
GND_18
GND_25
GND_4
11
18
25
4
C23
1U_0402_6.3V6K~D
LPCPD#
LAD0
LAD1
LAD2
LAD3
1
3@ R905 1
3@ R906 1
28
26
23
20
17
@
2
C_TPM_LPC_EN
LPC_LAD0_R
LPC_LAD1_R
LPC_LAD2_R
LPC_LAD3_R
1
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
2
2
2
2
2
2
1K_0402_5%~D
1K_0402_5%~D
2
1
R1026
1
1
1
1
1
C1174
10U_0603_6.3V6M~D
R893
R901
R902
R903
R904
C1173
0.1U_0402_16V4Z~D
16 CLK_PCI_TPM_CHA
15,32,37,38 LPC_LFRAME#
8,18,26,34,35,37,38 PCH_PLTRST#_EC
+3.3V_RUN
15,32,37,38 IRQ_SERIRQ
17,37,38 CLKRUN#
1
2
@R1210
@
R1210
4.7K_0402_5%~D
3@
3@
3@
3@
3@
C1172
0.1U_0402_16V4Z~D
SP_TPM_LPC_EN
LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
10
19
24
C1171
0.1U_0402_16V4Z~D
32,37
15,32,37,38
15,32,37,38
15,32,37,38
15,32,37,38
VDD_0
VDD_1
VDD_2
A
3@
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
USH BCM5882 (2/2)
Size
Document Number
Date:
Monday, July 13, 2009
Rev
0.1
LA-5691P
Sheet
1
33
of
51
5
4
2
1
2
C1887
10U_0805_10V4Z~D
2
1
+1.5V_RUN
+3.3V_SUS
1
36
1
2
C1889
0.1U_0402_16V4Z~D
1
MF_VOUT
R876 1
+3.3V_RUN
8,18,26,33,35,37,38
2 10K_0402_5%~D
R684 1
@ R683 1
R1467
2 47K_0402_5%~D UDIO1
1
SROM: UDIO 1
Pull-Hi: Disable
Pull-Lo: Enable (Default)
13
14
REFCLKP
REFCLKN
16 PCIE_PTX_PCMRX_P3_C
16 PCIE_PTX_PCMRX_N3_C
15
17
RXP
RXN
2 0.1U_0402_10V7K~D PCIE_PRX_PCMTX_P3_C 19
2 0.1U_0402_10V7K~D PCIE_PRX_PCMTX_N3_C 20
C1891 1
C1892 1
16 PCIE_PRX_PCMTX_P3
16 PCIE_PRX_PCMTX_N3
PLTRST_R5U232#
18 PLTRST_R5U232#
C1895
1U_0402_6.3V6K~D
100K_0402_5%~D
R1516
2
1
2
R1469
5.1K_0402_1%~D
2
1
2
1
1
PERST#
RXC
CPO
RREF
TEST
21
49
AGND
GND
2
TPBIAS0
TPBN0
TPBP0
TPAN0
TPAP0
MFIO00
MFIO01
MFIO02
MFIO03
MFIO04
MFIO05
MFIO06
MFIO07
MFIO08
MFIO09
MFIO10
MFIO11
MFIO12
MFIO13
MFIO14
TXP
TXN
9
16
22
24
10
6
MFCD0#
MFCD1#
3.3Vin
3.3Vin
3.3Vout
3.3Vout
AUX_IN
AUX_OUT
SYSRST#
OC#
20
SHDN#
PERST#
EXPRCRD_STBY_R#
1
STBY#
NC
EXPRCRD_PWREN#
10
CPPE#
GND
9
1
45
46
47
48
25
26
27
28
29
30
31
32
33
34
35
38
39
40
41
1.5Vout
1.5Vout
18
11
13
2
2
1
3
5
2
15
+3.3V_CARDAUX
19
8
1
16
2
7
CPUSB#
1
2
SDWP
SDDAT1/MMCDAT1
SDDAT0/MMCDAT0
MMCDAT7
MMCDAT6
SDCLK/MMC_CLK_R 1
2 SDCLK/MMC_CLK
R1515
22_0402_5%~D
MMCDAT5
SDCMD/MMCCMD
MMCDAT4
SDDAT3/MMCDAT3
SDDAT2/MMCDAT2
Express Card
C
+1.5V_CARD: Max. 650mA, Average 500mA
+3.3V_CARD: Max. 1300mA, Average 1000mA
SDCD#/MMCCD#
R5U232-QFN48P_QFN48_6X6~D
18
18
USBP10-
4
USBP10+
1
MFIO Pin Assignment Table
1
R791
2
0_0402_5%~D
1
R792
2
0_0402_5%~D
3
3
4
1
2
USBP10_D-
1
2
EXPRCRD_DET#
USBP10_D+
2
CPUSB#
@ L64
DLW21SN900SQ2_0805~D
CARD_SMBCLK
CARD_SMBDAT
JSD1
19
20
2
1
18
CD_SW/SD
WP_SW/SD
CD_SW_TAISOL/SD
WP/SW_TAISOL/SD
16 EXPCLK_REQ#
2
1
1
1
35,38 CARD_SMBDAT
GND_SW
EXPRCRD_PWREN#
16 CLK_PCIE_EXP#
16 CLK_PCIE_EXP
16 PCIE_PRX_EXPTX_N4
16 PCIE_PRX_EXPTX_P4
16 PCIE_PTX_EXPRX_N4_C
16 PCIE_PTX_EXPRX_P4_C
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
JEXP1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
GND
GND
B
TYCO_2-2041070-6~D
CARD_SMBDAT
T-SOL_156-4000000901_NR~D
35,38 CARD_SMBCLK
only for MMC/SD
A
1
2
2
SDCD#/MMCCD#
SDWP
SDCD#/MMCCD#
SDWP
CD_WP_SW/GND
CD_WP_SW/GND
CARD_RESET#
+3.3V_SUS
2
C21
47U_1206_6.3V6M~D
1
2
R13
150K_0402_5%~D
16
17
DAT4/MMC10
DAT5/MMC11
DAT6/MMC12
DAT7/MMC13
PCIE_WAKE#
+3.3V_CARD
C507
0.1U_0402_16V4Z~D
Place close
to JSD1.9
13
11
7
5
R127
2.2K_0402_5%~D
2
2
MMCDAT4
MMCDAT5
MMCDAT6
MMCDAT7
R126
2.2K_0402_5%~D
2
1
C767
0.1U_0402_16V4Z~D
1
C491
10P_0402_50V8J~D
+3.3V_RUN_CARD
1
SDDAT0/MMCDAT0
SDDAT1/MMCDAT1
SDDAT2/MMCDAT2
SDCLK/MMC_CLK
DAT3/SD1
CMD/SD2
VSS1/SD3
VCC/SD4
CLK/SD5
GND/VSSS2/SD6
DAT0/SD7
DAT1/SD8
DAT2/SD9
26,35,37 PCIE_WAKE#
+3.3V_CARDAUX
MFIO SD8 XD MS8
00
WP
D7
BS
01
D1
D6
02
D0
D5
D1
03
D7
D4
04
D6
D3
D5
D0
05 CLK D2
06
D1
07
D5
D0
D4
08
CMD WP# D2
09
D4 WE# D6
10
D3 ALE D3
11
D2 CLE
12
- CE#
13
- RE# D7
- R/B# CLK
14
C506
0.1U_0402_16V4Z~D
+3.3V_RUN_CARD
14
12
10
9
8
6
4
3
15
2
CARD_SMBCLK
A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Title
R5U232
Size
Document Number
Custom
4
3
2
Rev
0.1
LA-5691P
Date:
5
D
CARD_RESET#
37 EXPRCRD_DET#
SDDAT3/MMCDAT3
SDCMD/MMCCMD
2
1
+1.5V_CARD
4
5
GND pad under IC Chip.
5 GND vias required at GND pad.
Pin 21 connect to GND pad on IC-mounted layer.
B
1
RCLKEN
TPS2231MRGPR-1_QFN20_4X4~D
C504
0.1U_0402_16V4Z~D
C1893
0.022U_0402_16V7K~D
RXC
CPO
RREF
TEST
1
2 0_0402_5%~D
2 0_0402_5%~D
CPUSB#
UDIO0
UDIO1
UDIO2
UDIO3
16 CLK_PCIE_PCM
16 CLK_PCIE_PCM#
C1894
1500P_0402_7K~D
C
PCH_PLTRST#_EC
PCH_PLTRST#_EC
37 EXPRCRD_PWREN#
3
6
7
8
2
4
17
27,37,40,45 RUN_ON
37 EXPRCRD_STDBY#
16 PCMCLK_REQ#
+3.3V_RUN
2
2
1.5Vin
1.5Vin
+3.3V_CARD
C1016
10U_0805_6.3V6M~D
2
XO
XI
X5
24.576MHZ_16PF_7A24500022~D
2
2A max
U52
12
14
1
C1003
10U_0805_6.3V6M~D
43
44
2
1
C1006
0.1U_0402_16V4Z~D
C1890
15P_0402_50V8J~D
2
1
R5U232_XO
R5U232_XI
1
0_0402_5%~D
1
1
C1002
0.1U_0402_16V4Z~D
1
+3.3V_RUN_CARD
2
R1465
+3.3V_RUN
C1001
0.1U_0402_16V4Z~D
R5U232-QFN48P
2
1
C1885
0.1U_0402_16V4Z~D
2
C1884
0.1U_0402_16V4Z~D
18
23
C1883
0.1U_0402_16V4Z~D
C1882
0.1U_0402_16V4Z~D
C1881
0.1U_0402_16V4Z~D
C1880
0.1U_0402_16V4Z~D
PCIE_VIN
PCIE_VIN
AVCC_3V
1
C1012
10U_0805_6.3V6M~D
2
+1.5V_CARD
1
C1000
0.1U_0402_16V4Z~D
2
1
C999
0.1U_0402_16V4Z~D
2
1
12
42
C2065
0.1U_0402_16V4Z~D
C1888
15P_0402_50V8J~D
2
1
2
1
PCIE_VOUT
PCIE_VOUT
C134
0.1U_0402_16V4Z~D
D
1
VCC_3V
VCC_3V
C997
0.1U_0402_16V4Z~D
2
C1879
1U_0402_6.3V6K~D
1
2
+PCIE_PHY
U135
11
37
C1886
0.1U_0402_16V4Z~D
+3.3V_RUN
3
Monday, July 13, 2009
Sheet
1
34
of
51
3
2
1
R443
USB_MCARD1_DET#
1
R438
2
1
4
1
2
PCIE_WAKE#
1
2 0_0402_5%~D
1
2 0_0402_5%~D
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
16 CLK_PCIE_MINI2#
16 CLK_PCIE_MINI2
38 HOST_DEBUG_RX
38
MSCLK
PCIE_PRX_WLANTX_N2
PCIE_PRX_WLANTX_P2
16 PCIE_PRX_WLANTX_N2
16 PCIE_PRX_WLANTX_P2
C2080
0.1U_0402_10V7K~D
1
2
+5V_ALW
+3.3V_ALW
C
+5V_ALW
C2084
0.1U_0402_10V7K~D
1
2
+3.3V_RUN
1
C2082
0.1U_0402_10V7K~D
1
2
+5V_ALW
+PWR_SRC
@ C552
33P_0402_50V8J~D
16 PCH_CL_CLK1
16 PCH_CL_DATA1
1
16 PCH_CL_RST1#
R448
2
0_0402_5%~D
53
+3.3V_WLAN
USB_MCARD1_DET#
1
@R741
@
R741
2
1
2
1
+
2
+1.5V_RUN
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
G1
G2
54
PCIE_MCARD1_DET# 1
@ R439
1
2
100K_0402_5%~D
2
C1705 4700P_0402_25V7K~D
HOST_DEBUG_TX 38
WLAN_RADIO_DIS#_R
2
1 PCH_PLTRST#_EC
R444
0_0402_5%~D
WLAN_SMBCLK
WLAN_SMBDATA
USBP4USBP4+
USB_MCARD1_DET#
WIMAX_LED#
LED_WLAN_OUT#
1
R1409
USBP4- 18
USBP4+ 18
USB_MCARD1_DET# 19
MSDATA
WLAN_RADIO_DIS#_R
2
D21
RB751S40T1_SOD523-2~D
+3.3V_PCIE_BKT
1
@ R742
2 PCIE_MCARD3_DET#
0_0402_5%~D
WPAN Noise
USB_MCARD3_DET#
COEX2_WLAN_ACTIVE R454 1
CLK_PCIE_MINI3#
CLK_PCIE_MINI3
D
S
G
Q50
SI3456BDV-T1-E3_TSOP6~D
6
1
2
@
1
2
1
2
1
2
1
2
1
2
53
C585
4.7U_0603_6.3V6M~D
4
1
2
100K_0402_5%~D
2 USB_MCARD3_DET#
100K_0402_5%~D
C584
0.1U_0402_16V4Z~D
2
1
C583
0.1U_0402_16V4Z~D
2
1
C582
0.047U_0402_16V4Z~D
1
2
1
R1506
1
R266
+3.3V_PCIE_BKT
C581
0.047U_0402_16V4Z~D
1
+1.5V_RUN
C580
0.1U_0402_16V4Z~D
A
PCIE_MCARD3_DET#
18 PCIE_MCARD3_DET#
+3.3V_ALW_PCH
C579
0.047U_0402_16V4Z~D
R450
100K_0402_5%~D
PCIE_PTX_WPANRX_N5_C
PCIE_PTX_WPANRX_P5_C
16 PCIE_PTX_WPANRX_N5_C
16 PCIE_PTX_WPANRX_P5_C
C578
0.047U_0402_16V4Z~D
C553
4700P_0402_25V7K~D
37 MCARD_PCIE_BKT_PWREN
4
2
Q192A
2N7002DW-7-F_SOT363-6~D
PCIE_PRX_WPANTX_N5
PCIE_PRX_WPANTX_P5
16 PCIE_PRX_WPANTX_N5
16 PCIE_PRX_WPANTX_P5
3
1
2
6
5
2
1
Q192B
2N7002DW-7-F_SOT363-6~D
5
2
+3.3V_PCIE_BKT
3
1
R436
100K_0402_5%~D
R435
100K_0402_5%~D
2
+3.3V_ALW
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
MINI3CLK_REQ#
16 MINI3CLK_REQ#
16 CLK_PCIE_MINI3#
16 CLK_PCIE_MINI3
+15V_ALW
1
+3.3V_PCIE_BKT
2
JMINI3
PCIE_WAKE#
2 0_0402_5%~D
38
2
0_0402_5%~D
1
37 WLAN_RADIO_DIS#
PCIE/BKT Card
26,34,37 PCIE_WAKE#
C
LED_WLAN_OUT# 37,41
2
0_0402_5%~D
1
@ R428
@
USB_MCARD3_DET#
B
+3.3V_RUN
2 PCIE_MCARD1_DET#
0_0402_5%~D
+3.3V_WLAN
MOLEX_48338-0088
C554
330U_D2E_6.3VM_R25~D
2
1
C562
4.7U_0603_6.3V6M~D
2
1
C561
0.1U_0402_16V4Z~D
2
1
C560
0.1U_0402_16V4Z~D
1
C559
0.047U_0402_16V4Z~D
2
@
C558
0.047U_0402_16V4Z~D
2
1
C557
0.1U_0402_16V4Z~D
1
C556
0.047U_0402_16V4Z~D
C555
0.047U_0402_16V4Z~D
2
PCIE_MCARD1_DET#
19 PCIE_MCARD1_DET#
2
+1.5V_RUN
1
PCIE_PTX_WLANRX_N2_C
PCIE_PTX_WLANRX_P2_C
16 PCIE_PTX_WLANRX_N2_C
16 PCIE_PTX_WLANRX_P2_C
COEX2_WLAN_ACTIVE
D
CARD_SMBDAT 34,38
2N7002DW-7-F_SOT363-6~D
Q49B
Mini WLAN
16 MINI2CLK_REQ#
Stiching caps for PCIE6
CARD_SMBCLK 34,38
CARD_SMBDAT
3
JMINI2
COEX2_WLAN_ACTIVE R440
COEX1_BT_ACTIVE
R441
CARD_SMBCLK
5
WLAN_SMBDATA
+3.3V_WLAN
39 COEX2_WLAN_ACTIVE
39 COEX1_BT_ACTIVE
6
2N7002DW-7-F_SOT363-6~D
Q49A
1
R437
100K_0402_5%~D
2
100K_0402_5%~D
2
100K_0402_5%~D
2
R434 1
2.2K_0402_5%~D
1
4
2
Q53A
2N7002DW-7-F_SOT363-6~D
2
37 AUX_EN_WOWL
R433
WLAN_SMBCLK
1
2.2K_0402_5%~D
D
S
2
2
4
Q47
SI3456BDV-T1-E3_TSOP6~D
6
C2075
0.1U_0402_10V7K~D
1
2
+5V_ALW
+3.3V_RUN
+3.3V_ALW_PCH
+3.3V_WLAN
PCIE_MCARD1_DET#
Q53B
2N7002DW-7-F_SOT363-6~D
5
C2074
0.1U_0402_10V7K~D
1
2
+5V_ALW
+3.3V_RUN
+3.3V_WLAN
6
5
2
1
3
1
2
+5V_ALW
C2077
0.1U_0402_10V7K~D
1
2
+3.3V_RUN
C2073
0.1U_0402_10V7K~D
1
2
+3.3V_LAN
+3.3V_RUN
1
C551
4700P_0402_25V7K~D
D
+3.3V_RUN
C2076
0.1U_0402_10V7K~D
1
2
+3.3V_ALW
R432
100K_0402_5%~D
C2072
0.1U_0402_10V7K~D
1
2
+3.3V_RUN
+3.3V_ALW
R431
100K_0402_5%~D
Stiching caps for MDI
+3.3V_ALW
1
+15V_ALW
G
4
3
5
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
GND1
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
GND2
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
C572
4700P_0402_25V7K~D
B
+1.5V_RUN
Confirm with DELL about UWB
UWB_RADIO_DIS#
1 PCH_PLTRST#_EC
0_0402_5%~D
2
R456
USBP13USBP13+
USB_MCARD3_DET#
UWB_RADIO_DIS# 37
PCH_PLTRST#_EC 8,18,26,33,34,37,38
USBP13- 18
USBP13+ 18
USB_MCARD3_DET# 15
54
FOX_AS0B241-S47R-7H
A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Mini Card
Size
Document Number
Date:
Monday, July 13, 2009
Rev
0.1
LA-5691P
Sheet
1
35
of
51
2
1
JDOCK1
17 DPB_PCH_LANE_P2
17 DPB_PCH_LANE_N2
17 DPB_PCH_LANE_P3
17 DPB_PCH_LANE_N3
2
2
1 0.1U_0402_10V7K~D
1 0.1U_0402_10V7K~D
DPB_DOCK_LANE_P0
DPB_DOCK_LANE_N0
C472
C483
2
2
1 0.1U_0402_10V7K~D
1 0.1U_0402_10V7K~D
DPB_DOCK_LANE_P1
DPB_DOCK_LANE_N1
C468
C470
2
2
1 0.1U_0402_10V7K~D
1 0.1U_0402_10V7K~D
DPB_DOCK_LANE_P2
DPB_DOCK_LANE_N2
C469
C471
2
2
1 0.1U_0402_10V7K~D
1 0.1U_0402_10V7K~D
DPB_DOCK_LANE_P3
DPB_DOCK_LANE_N3
DPB_DOCK_AUX
DPB_DOCK_AUX#
25 DPB_DOCK_AUX
25 DPB_DOCK_AUX#
17 DPB_PCH_DOCK_HPD
DPB_PCH_DOCK_HPD
+NBDOCK_DC_IN_SS
1
B
BLUE_DOCK
25 BLUE_DOCK
C985
0.033U_0402_16V7K~D
2
Close to DOCK
Its for Enhance ESD on dock issue.
25
RED_DOCK
RED_DOCK
GREEN_DOCK
25 GREEN_DOCK
25 HSYNC_DOCK
25 VSYNC_DOCK
38
38
CLK_MSE
DAT_MSE
30
30
DAI_BCLK#
DAI_LRCK#
30
30
DAI_DI
DAI_DO#
30 DAI_12MHZ#
37
37
D_LAD0
D_LAD1
37
37
D_LAD2
D_LAD3
37
37
D_LFRAME#
D_CLKRUN#
37
37
D_SERIRQ
D_DLDRQ1#
18 CLK_PCI_DOCK
38 DOCK_SMB_CLK
38 DOCK_SMB_DAT
38,42 DOCK_SMB_ALERT#
42 DOCK_PSID
38 DOCK_PWR_BTN#
37,42,50 SLICE_BAT_PRES#
SLICE_BAT_PRES#
SM24.TCT_SOT23-3~D
2
1
@
145
146
147
148
GND1
PWR1
PWR1
PWR1
153
154
155
156
157
158
Shield_G
Shield_G
Shield_G
Shield_G
Shield_G
Shield_G
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
PWR2
PWR2
PWR2
GND2
149
150
151
152
Shield_G
Shield_G
Shield_G
Shield_G
Shield_G
Shield_G
159
160
161
162
163
164
DOCK_AC_OFF
DPC_CA_DET
DOCK_AC_OFF 37,50
DOCK_LOM_SPD100LED_ORG# 31
DPC_CA_DET 25
DPC_DOCK_LANE_P0
DPC_DOCK_LANE_N0
C361 2
C357 2
1 0.1U_0402_10V7K~D
1 0.1U_0402_10V7K~D
DPC_DOCK_LANE_P1
DPC_DOCK_LANE_N1
C355 2
C313 2
1 0.1U_0402_10V7K~D
1 0.1U_0402_10V7K~D
DPC_DOCK_LANE_P2
DPC_DOCK_LANE_N2
C360 2
C362 2
1 0.1U_0402_10V7K~D
1 0.1U_0402_10V7K~D
DPC_DOCK_LANE_P3
DPC_DOCK_LANE_N3
C364 2
C363 2
1 0.1U_0402_10V7K~D
1 0.1U_0402_10V7K~D
DPC_DOCK_AUX
DPC_DOCK_AUX#
DPC_PCH_LANE_P0 17
DPC_PCH_LANE_N0 17
DPC_PCH_LANE_P1 17
DPC_PCH_LANE_N1 17
DPC_PCH_LANE_P2 17
DPC_PCH_LANE_N2 17
DPC_PCH_LANE_P3 17
DPC_PCH_LANE_N3 17
DPC_DOCK_AUX 25
DPC_DOCK_AUX# 25
DPC_PCH_DOCK_HPD
DPC_PCH_DOCK_HPD 17
ACAV_DOCK_SRC# 50
1
DAT_DDC2_DOCK 25
CLK_DDC2_DOCK 25
2
SATA_PRX_DKTX_P5
SATA_PRX_DKTX_N5
SATA_PTX_DKRX_P5
SATA_PTX_DKRX_N5
2
C586 2
C587
1
C306 1
C305
1
1 0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
2
2 0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
SATA_PRX_DKTX_P5_C 15
SATA_PRX_DKTX_N5_C 15
B
Close to DOCK
Its for Enhance ESD on dock issue.
SATA_PTX_DKRX_P5_C 15
SATA_PTX_DKRX_N5_C 15
USBP8+ 18
USBP8- 18
USBP9+ 18
USBP9- 18
CLK_KBD 38
DAT_KBD 38
BREATH_LED# 38,41
DOCK_LOM_ACTLED_YEL# 31
DOCK_LOM_TRD0+ 31
DOCK_LOM_TRD0- 31
+3.3V_ALW
DOCK_LOM_TRD1+ 31
DOCK_LOM_TRD1- 31
+LOM_VCT
DOCK_DET#
1
+LOM_VCT
DOCK_LOM_TRD2+ 31
DOCK_LOM_TRD2- 31
2
1
R1038
2
100K_0402_5%~D
C42
1U_0402_6.3V6K~D
DOCK_LOM_TRD3+ 31
DOCK_LOM_TRD3- 31
DOCK_DCIN_IS+ 48
DOCK_DCIN_IS- 48
D71
RB751S40T1_SOD523-2~D
1
2
DOCK_POR_RST# 38
DOCK_DET_R#
DOCK_DET#
37
CLK_PCI_DOCK
+DOCK_PWR_BAR
1
2
@ R462
10_0402_5%~D
1
2
DPB_PCH_DOCK_HPD
A
C986
0.033U_0402_16V7K~D
C1033
0.1U_0603_50V4Z~D
2
C1034
0.1U_0603_50V4Z~D
1
D64
3
+DOCK_PWR_BAR
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
1
17 DPB_PCH_LANE_P1
17 DPB_PCH_LANE_N1
C473
C446
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
@C590
@C590
4.7P_0402_50V8C~D
DPC_PCH_DOCK_HPD
A
2
2
JAE_WD2F144WB3R300~D
R796
100K_0402_5%~D
1
R798
100K_0402_5%~D
1
17 DPB_PCH_LANE_P0
17 DPB_PCH_LANE_N0
DPB_CA_DET
2
DOCK_DET_1
31 DOCK_LOM_SPD10LED_GRN#
25 DPB_CA_DET
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
2
DOCKING CONN
Size
Document Number
Date:
Monday, July 13, 2009
Rev
0.1
LA-5691P
1
Sheet
36
of
51
5
4
3
2
1
+3.3V_ALW
PCIE_WAKE#
2
10K_0402_5%~D
SLICE_BAT_PRES#
2
100K_0402_5%~D
DCIN_CBL_DET#
2
100K_0402_5%~D
PWR_BTN_BD_DET#
2
100K_0402_5%~D
1
R501
1
R503
1
R862
1
R1099
+3.3V_ALW
1
2
1
C1072
10U_0805_10V4Z~D
2
1
C648
0.1U_0402_16V4Z~D
2
C652
0.1U_0402_16V4Z~D
1
1
C649
0.1U_0402_10V7K~D
2
2
C650
0.1U_0402_16V4Z~D
D
1
R881
VGA_IDENTIFY
2
100K_0402_5%~D
31 LAN_DISABLE#_R
41 SYS_LED_MASK#
24 ALS_INT#
19 SIO_EXT_WAKE#
17 PCH_PCIE_WAKE#
35 WLAN_RADIO_DIS#
VGA_IDENTIFY
1
@R558
@
R558
2
100K_0402_5%~D
26 WWAN_RADIO_DIS#
26 VOL_DOWN
26 VOL_UP
26 VOL_MUTE
VGA_IDENTIFY
Discrete
0
UMA
1
35 UWB_RADIO_DIS#
B17
B18
LAN_DISABLE#_R
B47
A45
SYS_LED_MASK#
B48
ALS_INT#
A46
R526 1
2 0_0402_5%~D B49
A47
PCH_PCIE_WAKE#
B50
WLAN_RADIO_DIS#
A48
WWAN_RADIO_DIS#
VOL_DOWN
VOL_UP
VOL_MUTE
VGA_IDENTIFY
UWB_RADIO_DIS#
R528
10K_0402_5%~D
2
1
BCM5882_ALERT#
A53
B57
B58
A55
B59
A56
B60
A57
B61
A58
B62
A59
1
B
2
A
O
SIO_SLP_S3# 17
SIO_SLP_S4# 17
4
2
1
D65
RB751S40T1_SOD523-2~D
DOCK_AC_OFF 36,50
1
ACAV_IN_NB
DOCK_AC_OFF_EC
A63
B65
A61
C1051
0.1U_0402_16V4Z~D
1
2
38,48,50
LAD0
LAD1
LAD2
LAD3
LFRAME#
LRESET#
PCICLK
CLKRUN#
LDRQ0#
LDRQ1#
SER_IRQ
LPC
GPIOD[3]/VBUS_DET
GPIOD[4]/OCS1_N
GPIOD[5]/OCS2_N
GPIOD[6]/OCS3_N
GPIOD[7]/OCS4_N
CLKI (14.318 MHz)
GPIOH[6]
GPIOH[7]
VSS
GPIOG[0]
GPIOG[1]
GPIOG[2]
GPIOG[3]
GPIOG[4]
GPIOG[5]
GPIOG[6]
GPIOG[7]
DLPC
DLAD0
DLAD1
DLAD2
DLAD3
DLFRAME#
DCLK_RUN#
DLDRQ1#
DSER_IRQ
SYSOPT1/GPIOH[2]
SYSOPT0/GPIOH[3]
PWRGD
GPIOF[7]
GPIOF[6]
GPIOF[5]
GPIOF[4]
OUT65
GPIOJ[4]
VSS
GPIOK[7]
VSS
VSS
VSS
VSS
VSS
GPIOJ[1]
IRTX
IRRX
GPIOF[3]/IRMODE/IRRX3B
GPIOF[2]/IRTX2
GPIOF[1]/IRRX2
GPIOF[0]/IRMODE/IRRX3A
LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
LPC_LFRAME#
PCH_PLTRST#_EC
CLK_PCI_5028
CLKRUN#
LPC_LDRQ0#
LPC_LDRQ1#
IRQ_SERIRQ
A32
CLK_SIO_14M
2
R515
1
100K_0402_5%~D
CPU_VTT_ON
2
R518
1
100K_0402_5%~D
0.75V_DDR_VTT_ON 2
R520
PBATT_OFF
2
R521
1
100K_0402_5%~D
1
100K_0402_5%~D
U69
TC7SH08FU_SSOP5~D
R1078
33K_0402_5%~D
LPC_LAD[0..3] 15,32,33,38
LPC_LFRAME# 15,32,33,38
PCH_PLTRST#_EC 8,18,26,33,34,35,38
CLK_PCI_5028 18
CLKRUN# 17,33,38
LPC_LDRQ0# 15
LPC_LDRQ1# 15
IRQ_SERIRQ 15,32,33,38
CLK_SIO_14M 16
CLK_SIO_14M
CLK_PCI_5028
B51
D_LAD0
D_LAD1
D_LAD2
D_LAD3
D_LFRAME#
D_CLKRUN#
D_DLDRQ1#
D_SERIRQ
B29
B28
A25
A24
B23
A19
B24
A20
D_LAD0
36
D_LAD1
36
D_LAD2
36
D_LAD3
36
D_LFRAME# 36
D_CLKRUN# 36
D_DLDRQ1# 36
D_SERIRQ 36
A4
RUNPWROK_R1
B56
SP_TPM_LPC_EN
ME_FWP
@R506
@
R506
10_0402_5%~D
1
1
10K_0402_5%~D
@C654
@
C654
4.7P_0402_50V8C~D
2
1
@ C656
4.7P_0402_50V8C~D
2
+3.3V_RUN
SP_TPM_LPC_EN 32,33
GPIO_PSID_SELECT 42
+3.3V_ALW
SPI_WP#_SEL 15
1
2
@ R527
10_0402_5%~D
B
@ R649
1K_0402_5%~D
C657
4.7U_0603_6.3V6M~D
R524
100K_0402_5%~D
+3.3V_RUN
1
A6
A9
A12
A18
B27
B39
A44
B64
A64
2
R1130
TP_DET#
39
R1288
8.2K_0402_5%~D
LID_CL_SIO#
R525
10_0402_5%~D
2
1
LID_CL#
LID_CL#
30,41
1
2 LED_WWAN_OUT#
100K_0402_5%~D
2 LED_WLAN_OUT#
100K_0402_5%~D
+1.05V_RUN_VTT
CPU_CATERR#
1
R1289
C
2.2K_0402_5%~D
1
2
2
B
Q182 E
PMST3904_SOT323-3~D
2
1
2
C655
0.047U_0402_16V4Z~D
A
C1372
0.1U_0402_16V4Z~D
8 H_CATERR#
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
C
2
A27
A26
B26
B25
A21
B22
A28
B20
A23
A22
B21
3
A
1
R38
1
R39
ACAV_IN_NB
2
1
R514
1K_0402_5%~D
C1
+3.3V_ALW
+3.3V_ALW
DOCK_AC_OFF_EC 50
GPIOD[1]
GPIOD[2]
ECE5028-LZY_DQFN132_11X11~D
B19
RUN_ON
D_DLDRQ1#
IMVP_VR_ON 47
IMVP_PWRGD 8,47
0.75V_DDR_VTT_ON 45
AUX_EN_WOWL 35
1
100K_0402_5%~D
1
100K_0402_5%~D
1
100K_0402_5%~D
1
SLICE_BAT_PRES#
PWR_BTN_BD_DET#
B33
B15
A15
B16
A16
GPIOI[7]
GPIOI[4]
GPIOI[3]
1
2
R509
0_0402_5%~D
0.75V_DDR_VTT_ON
8mil
2
R510
2
R511
2
R512
D_SERIRQ
1
MASK_SATA_LED#
MCARD_PCIE_BKT_PWREN
HDDC_EN
MODC_EN
TEST
1.8V_RUN_PWRGD 45
RUN_ON
27,34,40,45
RUN_ON
CPU_CATERR#
+CAP_LDO
+3.3V_RUN
D_CLKRUN#
5
B32
A31
B66
A62
A60
B46
B67
TEST_PIN
EP
26,41 LED_WWAN_OUT#
39,41 BT_ACTIVE
32 BCM5882_ALERT#
35,41 LED_WLAN_OUT#
LID_CL_SIO#
CPU_VTT_ON
GPIO
GPIOI[6]
GPIOI[5]
GPIOI[2]
CAP_LDO
GPIOJ[0]
2
DOCK_HP_DET 30
CRT_SWITCH 25
ME_FWP
15
1
100K_0402_5%~D
2
ALS_INT#
2
2.2K_0402_5%~D
GPIOB[0]/INIT#
GPIOB[1]/SLCTIN#
GPIOC[2]/SLCT
GPIOC[3]/PE
GPIOC[4]/BUSY
GPIOC[5]/ACK#
GPIOC[6]/ERROR#
GPIOC[7]/ALF#
GPIOD[0]/STROBE#
GPIOC[1]/PD7
GPIOC[0]/PD6
GPIOB[7]/PD5
GPIOB[6]/PD4
GPIOB[5]/PD3
GPIOB[4]/PD2
GPIOB[3]/PD1
GPIOB[2]/PD0
GPIO
SIO_SLP_LAN# 17,31
DOCK_HP_DET
CRT_SWITCH
ME_FWP
2
R756
2
1
R258
B
A33
B36
A34
B37
A35
B38
A36
A37
B40
A38
B41
A39
B42
A40
B43
A41
B44
SIO_SLP_LAN#
TP_DET#
1
36,42,50 SLICE_BAT_PRES#
41 PWR_BTN_BD_DET#
USB_SIDE_EN#
EN_I2S_NB_CODEC#
USH_PWR_STATE#
EN_DOCK_PWR_BAR
PANEL_BKEN_PCH
ENVDD_PCH
LCD_TST
PSID_DISABLE#
LED_SATA_DIAG_OUT#
DOCKED
DOCK_DET#
AUD_NB_MUTE
MCARD_WWAN_PWREN
LCD_VCC_TEST_EN
CCD_OFF
AUD_HP_NB_SENSE
ESATA_USB_PWR_EN#
A5
B6
A7
B7
A8
B9
A10
B10
A11
B12
1
17,46
2
+3.3V_RUN
GPIOE[0]/RXD
GPIOE[1]/TXD
GPIOE[2]/RTS#
GPIOE[3]/DSR#
GPIOE[4]/CTS#
GPIOE[5]/DTR#
GPIOE[6]/RI#
GPIOE[7]/DCD#
GPIOJ[2]
GPIOJ[3]
GPIOJ[6]
GPIOJ[5]
GPIOK[0]
GPIOK[1]
GPIOK[3]
GPIOK[2]
GPIOK[5]
GPIOK[6]
DOCK_MIC_DET 30
TEMP_ALERT# 19
SIO_SLP_M#
2
41 MASK_SATA_LED#
35 MCARD_PCIE_BKT_PWREN
29
HDDC_EN
29
MODC_EN
EXPRCRD_DET#
A1
B2
A2
B3
A3
B45
A42
B4
GPIOH[0]
GPIOH[1]
GPIOH[4]
GPIOH[5]
BC_INT#
BC_DAT
BC_CLK
SIO_SLP_M#
1
46 CPU_VTT_ON
B13
A13
B14
A14
A29
B31
A30
GPIOI[1]
P
26 USB_SIDE_EN#
30 EN_I2S_NB_CODEC#
32 USH_PWR_STATE#
50 EN_DOCK_PWR_BAR
17 PANEL_BKEN_PCH
17,24 ENVDD_PCH
24
LCD_TST
42 PSID_DISABLE#
41 LED_SATA_DIAG_OUT#
31
DOCKED
36 DOCK_DET#
26,30 AUD_NB_MUTE
27 MCARD_WWAN_PWREN
24 LCD_VCC_TEST_EN
24 CCD_OFF
26,30 AUD_HP_NB_SENSE
26 ESATA_USB_PWR_EN#
WIRELESS_ON#/OFF
BT_RADIO_DIS#
EXPRCRD_PWREN#
EXPRCRD_STDBY#
BC_INT#_ECE5028
BC_DAT_ECE5028
BC_CLK_ECE5028
DOCK_MIC_DET
TEMP_ALERT#
B63
+3.3V_ALW
G
34 EXPRCRD_DET#
ECE5028-LZY
+3.3V_ALW
B68
B35
B34
B1
B5
B8
B11
NC
NC
NC
NC
VCC1
GPIOJ[7]
GPIOK[4]
3
WIRELESS_ON#/OFF
2
100K_0402_5%~D
SP_TPM_LPC_EN
2
10K_0402_5%~D
LCD_TST
2
100K_0402_5%~D
PANEL_BKEN_PCH
1
100K_0402_5%~D
SYS_LED_MASK#
2
10K_0402_5%~D
MCARD_WWAN_PWREN
2
100K_0402_5%~D
1
R874
1
@ R788
1
R816
2
R530
1
R658
1
R15
26 WIRELESS_ON#/OFF
39 BT_RADIO_DIS#
34 EXPRCRD_PWREN#
34 EXPRCRD_STDBY#
38 BC_INT#_ECE5028
38 BC_DAT_ECE5028
38 BC_CLK_ECE5028
DCIN_CBL_DET#
PBATT_OFF
WIRELESS_LED#
PCIE_WAKE#
GPIOA[0]
GPIOA[1]
GPIOA[2]
GPIOA[3]
GPIOA[4]
GPIOA[5]
GPIOA[6]
GPIOA[7]
2
+3.3V_RUN
42 DCIN_CBL_DET#
50
PBATT_OFF
41 WIRELESS_LED#
26,34,35 PCIE_WAKE#
B52
A49
B53
A50
B54
A51
B55
A52
C653
0.1U_0402_16V4Z~D
USB_SIDE_EN#
2
10K_0402_5%~D
ESATA_USB_PWR_EN#
2
10K_0402_5%~D
1
R502
1
R923
42 PBAT_PRES#
PBAT_PRES#
VCC1
VCC1
VCC1
VCC1
U35
+3.3V_ALW2
C
A17
B30
A43
A54
D
4
3
2
Title
ECE5028
Size
Document Number
Date:
Monday, July 13, 2009
Rev
0.1
LA-5691P
Sheet
1
37
of
51
5
4
3
2
1
1
+RTC_CELL
R539
100K_0402_5%~D
1
2
1
+3.3V_ALW_PCH
AC_PRESENT
20mA drive pins
2
10K_0402_5%~D
DOCK_SMB_DAT
DOCK_SMB_CLK
LCD_SMBDAT
LCD_SMBCLK
CKG_FFS_SMBDAT
CKG_FFS_SMBCLK
DAI_GPU_R3P_SMBDAT
DAI_GPU_R3P_SMBCLK
CHARGER_SMBDAT
CHARGER_SMBCLK
CARD_SMBDAT
CARD_SMBCLK
USH_SMBDAT
USH_SMBCLK
BGPO0
VCI_IN2#
VCI_OUT
VCI_IN1#
VCI_IN0#
VCI_OVRD_IN
VCI_IN3#
DAT_MSE
+3.3V_ALW
+3.3V_RUN
CKG_FFS_SMBDAT
R578
10K_0402_5%~D
1
2
1
2
R540
2
R542
CKG_FFS_SMBCLK
1
2.2K_0402_5%~D
1
2.2K_0402_5%~D
FWP#
BKT_SMBDAT 27
BKT_SMBCLK 27
B
1=JTAG interface Reset disabled
0=Reset JTAG interface
@ R586
10K_0402_5%~D
43
ACAV_IN
+RTC_CELL
23,48,50
VCI_IN1#
2
R657
1
100K_0402_5%~D
C919
1
2
1
JTAG_RST#
REV
240K 4700p X00
130K 4700p X01
62K 4700p X02
33K 4700p
1
+RTC_CELL
1
1
1
2
1
R1540
2
1K_0402_5%~D
2
JTAG1
@SHORT PADS~D
@
2
@ C2069
1U_0402_6.3V6K~D
LAT_ON_SW_BTN# 41
2
: LAT_ON_SW#
1
@
R1539
100K_0402_5%~D
C2070
1U_0402_6.3V6K~D
2
<BOM Structure>
A
DELL CONFIDENTIAL/PROPRIETARY
D
Compal Electronics, Inc.
Q189
SSM3K7002FU_SC70-3~D
2
G
3
1
4.7K_0402_5%~D
1
4.7K_0402_5%~D
1
4.7K_0402_5%~D
1
4.7K_0402_5%~D
2
2
2
R569
2
R570
2
R571
2
R572
CLK_MSE
2
C671
4.7U_0603_6.3V6M~D
8mil
1
2
23
CLK_KBD
C1040
0.1U_0402_16V4Z~D
PCH_PWRGD#
2
8.2K_0402_5%~D
R585
100_0402_1%~D
1
2
R98
PCH_PWRGD#
1
R5
DAT_KBD
+3.3V_ALW
BOARD_ID
R640
100K_0402_5%~D
RESET_OUT#
HDD_SMBDAT 16,29
HDD_SMBCLK 16,29
MEC5045-LZY_DQFN132_11X11~D
1
+3.3V_M
1
2.2K_0402_5%~D
1
2.2K_0402_5%~D
+5V_RUN
1 0_0402_5%~D
1 0_0402_5%~D
2
2 0_0402_5%~D
0_0402_5%~D
ALWON
2
R565
2
R567
DOCK_SMB_CLK
+3.3V_ALW
EP
VSS_RO
: LAT_ON_SW#
ALWON
VCI_IN1#
POWER_SW_IN#
ACAV_IN
DOCK_PWR_SW#
DOCK_SMB_DAT
DOCK_SMB_DAT 36
DOCK_SMB_CLK 36
LCD_SMBDAT 24
LCD_SMBCLK 24
CKG_FFS_SMBDAT 6
CKG_FFS_SMBCLK 6
DAI_GPU_R3P_SMBDAT 23,30
DAI_GPU_R3P_SMBCLK 23,30
CHARGER_SMBDAT 48
CHARGER_SMBCLK 48
CARD_SMBDAT 34,35
CARD_SMBCLK 34,35
USH_SMBDAT 32
USH_SMBCLK 32
1
R1519 1
R1464
A59
B63
A60
A63
B67
B1
A1
18,29
2
A3
B4
A4
B5
B7
A7
B48
B49
A47
B50
B52
A49
B53
A50
HDD_FALL_INT1
ME_SUS_PWR_ACK 17
1.5V_SUS_PWRGD 44
PM_MEPWROK 17
1.05V_M_PWRGD 46
ALW_PWRGD_3V_5V 43
ODD_DET#
29
RESET_OUT# 15,17
M_ON
40,46
PCH_RSMRST# 17
AC_PRESENT 17
SIO_PWRBTN# 17
1
B66
NC1
NC2
NC3
NC4
NC5
NC6
NC7
DOCK_SMB_ALERT# 36,42
2
1
@ R635
0_0402_5%~D
ME_SUS_PWR_ACK
1.5V_SUS_PWRGD
PM_MEPWROK
1.05V_M_PWRGD
ALW_PWRGD_3V_5V
ODD_DET#
RESET_OUT#
M_ON
PCH_RSMRST#
AC_PRESENT
SIO_PWRBTN#
DELL PWR SW INF
XTAL1
XTAL2
GPIO160/32KHZ_OUT
B17
B34
A46
A48
B51
A64
B68
DOCK_SMB_ALERT#
FFS_INT
1
GPIO003/I2C1A_DATA
GPIO004/I2C1A_CLK
GPIO005/I2C1B_DATA
GPIO006/I2C1B_CLK
GPIO012/I2C1H_DATA/I2C2D_DATA
GPIO013/I2C1H_CLK/I2C2D_CLK
GPIO130/I2C2A_DATA
GPIO131/I2C2A_CLK
GPIO132/I2C1G_DATA
GPIO140/I2C1G_CLK
GPIO141/I2C1F_DATA/I2C2B_DATA
GPIO142/I2C1F_CLK/I2C2B_CLK
GPIO143/I2C1E_DATA
GPIO144/I2C1E_CLK
MASTER CLOCK
A61
A62
B62
C
SMBUS INTERFACE
GPIO011/nSMI
GPIO061/LPCPD#
LDRQ#
SER_IRQ
LRESET#
PCI_CLK
LFRAME#
LAD0
LAD1
LAD2
LAD3
CLKRUN#
GPIO100/nEC_SCI
2
4
1
R1231
+3.3V_ALW
B2
A2
B8
B18
A8
B9
A9
A14
B15
A17
B39
A44
B47
A54
B58
R98
240K_0402_5%~D
RESET_OUT#
5
2
Bat2 = Amber LED
Bat1 = Blue LED
R579
10K_0402_5%~D
C675
22P_0402_50V8J~D
C674
22P_0402_50V8J~D
A
@ C673
4.7P_0402_50V8C~D
DOCK_PWR_BTN# 36
1
A6
A27
B29
A28
B30
A29
B31
A30
B32
A31
B33
A32
A33
1
2
MSDATA
35
MSCLK
35
SIO_A20GATE 19
PS_ID
42
BAT1_LED#
41
BAT2_LED#
41
2
1K_0402_5%~D
R85
33K_0402_5%~D
1
MSDATA
MSCLK
SIO_A20GATE
PS_ID
BAT1_LED#
BAT2_LED#
FWP#
C919
4700P_0402_25V7K~D
Y4
32.768K_12.5P_1TJS125DJ4A420P~D
MEC_XTAL2
1
4
2
CHIPSET_ID for BID
function
24
@ R446 2
@ R508 2
HOST INTERFACE
@ R588
10_0402_5%~D
1
EN_INVPWR
1
R554
2 C670
1U_0402_6.3V6K~D
+3.3V_ALW
DDR_ON
44,45
HOST_DEBUG_TX 35
HOST_DEBUG_RX 35
CLK_PCI_MEC
MEC_XTAL1
3
1
1
10K_0402_5%~D
SYSTEM_ID
Place closely pin A29
32 KHz
Clock
Same as Laguna
2
SYSTEM_ID
BOARD_ID
DDR_ON
HOST_DEBUG_TX
HOST_DEBUG_RX
RUNPWROK
EN_INVPWR
DOCK_PWR_SW#
2
@ C669
1U_0402_6.3V6K~D
2
GPIO123/BCM_A_CLK
GPIO122/BCM_A_DAT
GPIO121/BCM_A_INT#
GPIO022/BCM_B_CLK
GPIO023/BCM_B_DAT
GPIO024/BCM_B_INT#
GPIO044/BCM_C_CLK
GPIO043/BCM_C_DAT
GPIO042/BCM_C_INT#
GPIO047/LSBCM_D_CLK
GPIO046/LSBCM_D_DAT
GPIO045/LSBCM_D_INT#
GPIO032/GPTP-IN3/BCM_E_CLK
GPIO31/GPTP-OUT2/BCM_E_DAT
GPIO30/GPTP-IN2/BCM_E_INT#
ACES_85204-06001~D
1
A10
B10
B14
B44
B46
B26
A25
B36
B37
B38
A34
A35
A36
A40
B43
A45
A55
A57
B61
B65
2
R1131
1
R550
100K_0402_5%~D
2
A43
B45
A42
A12
B13
A13
B20
A18
B19
A20
B21
A19
A16
B16
A15
C1
MEC_XTAL1
1
0_0402_5%~D
BC-LINK
B54
2
R587
GPIO001/ECSPI_CS1
GPIO002/ECSPI_CS2
GPIO014/GPTP-IN7/HSPI_CS1
GPIO040/GPTP-OUT3/HSPI_CS2
GPIO015/GPTP-OUT7
GPIO016/GPTP-IN8
GPIO017/GPTP-OUT8
GPIO26/GPTP-IN1
GPIO27/GPTP-OUT1
GPIO041
GPIO107/nRESET_OUT
GPIO125/GPTP-IN5
GPIO126
GPIO151/GPTP-IN4
GPIO152/GPTP-OUT4
VR_CAP[1]
MEC_XTAL2
2
C651
0.1U_0402_16V4Z~D
GENERAL PURPOSE I/O
B12
JTAG_TDI
JTAG_TMS
JTAG_CLK
JTAG_TDO
2
D
+RTC_CELL
1
2
A11
A22
B35
A41
A58
A52
B3
A26
B64
VTR[1]
VTR[2]
VTR[3]
VTR[4]
VTR[5]
VTR[6]
VTR[7]
VTR[8]
VBAT
15,32,33,37 IRQ_SERIRQ
8,18,26,33,34,35,37 PCH_PLTRST#_EC
18 CLK_PCI_MEC
15,32,33,37 LPC_LFRAME#
15,32,33,37 LPC_LAD0
15,32,33,37 LPC_LAD1
15,32,33,37 LPC_LAD2
15,32,33,37 LPC_LAD3
17,33,37 CLKRUN#
19 SIO_EXT_SCI#
POWER_SW#_MB 39,41
FAN PWM & TACH
GPIO050/FAN_TACH1
GPIO051/FAN_TACH2
GPIO052/FAN_TACH3
GPIO053/PWM0
GPIO054/PWM1
GPIO055/PWM2
GPIO056/PWM3
VSS[2]
VSS[5]
VSS[7]
VSS[8]
2
1
1
2
1
1
2
2
2
R583
10K_0402_5%~D
1
2
3
4
5
6
R584
10K_0402_5%~D
G1
G2
1
2
3
4
5
6
R582
10K_0402_5%~D
JP2
7
8
R581
10K_0402_5%~D
B
R580
49.9_0402_1%~D
1
+3.3V_ALW
SIO_EXT_SMI#
SIO_RCIN#
LPC_LDRQ#_MEC
IRQ_SERIRQ
PCH_PLTRST#_EC
CLK_PCI_MEC
LPC_LFRAME#
LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
CLKRUN#
SIO_EXT_SCI#
1
23 DOCK_PWR_SW#
GPIO007/I2C1D_DATA/PS2_CLK0B/I2C3A_DATA
GPIO021/RC_ID1
GPIO010/I2C1D_CLK/PS2_DAT0B/I2C3A_CLK
GPIO020/RC_ID2
GPIO110/PS2_CLK2/GPTP-IN6
GPIO025/UART_CLK
GPIO111/PS2_DAT2/GPTP-OUT6
GPIO120/UART_TX
GPIO112/PS2_CLK1A
GPIO124/GPTP-OUT5/UART_RX
GPIO113/PS2_DAT1A
VCC_PRWGD
GPIO114/PS2_CLK0A
GPIO060/KBRST
GPIO115/PS2_DAT0A
GPIO101/ECGP_SCLK
GPIO154/I2C1C_DATA/PS2_CLK1B
GPIO103/ECGP_SIN
GPIO155/I2C1C_CLK/PS2_DAT1B
GPIO105/ECGP_SOUT
GPIO102/HSPI_SCLK
GPIO104/HSPI_MISO
GPIO106/HSPI_MOSI
JTAG INTERFACE
GPIO116/MSDATA
GPIO145/JTAG_TDI
GPIO117/MSCLK
GPIO146/I2C1K_CLK/JTAG_TDO
GPIO127/A20M
GPIO147/I2C1J_DATA/I2C2C_DATA/JTAG_CLK
GPIO153/LED3
GPIO150/I2C1J_CLK/I2C2C_CLK/JTAG_TMS
GPIO156/LED1
JTAG_RST#
GPIO157/LED2
nFWP
AGND
ACES_85204-06001~D
19 SIO_EXT_SMI#
19 SIO_RCIN#
BC_CLK_ECE5028
BC_DAT_ECE5028
BC_INT#_ECE5028
BC_CLK_EMC4022
BC_DAT_EMC4022
BC_INT#_EMC4022
BC_CLK_ECE1088
BC_DAT_ECE1088
BC_INT#_ECE1088
BC_CLK_ECE1077
BC_DAT_ECE1077
BC_INT#_ECE1077
BEEP
SIO_SLP_S5#
ACAV_IN_NB
2
RUNPWROK
MISC INTERFACE
B27
B60
B11
B28
1
1
1
1
2
2
2
2
2
2 0_0402_5%~D
0_0402_5%~D
HOST_DEBUG_TX
HOST_DEBUG_RX
B22
A21
B23
B24
A23
B25
A24
2
1K_0402_5%~D
C918
4700P_0402_25V7K~D
MSCLK
MSDATA
1
R593 1
R577
R574
100K_0402_5%~D
1
2
3
4
5
6
R575
10K_0402_5%~D
1
2
3
4
5
6
R1410
10K_0402_5%~D
G1
G2
R576
10K_0402_5%~D
JDEG1
@
DOCK_POR_RST#
SUS_ON
AUX_ON
BREATH_LED#
PCH_ALW_ON
KYBRD_BKLT_PWM
2
1
C668
0.1U_0402_16V4Z~D
37 BC_CLK_ECE5028
37 BC_DAT_ECE5028
37 BC_INT#_ECE5028
23 BC_CLK_EMC4022
23 BC_DAT_EMC4022
23 BC_INT#_EMC4022
28 BC_CLK_ECE1088
28 BC_DAT_ECE1088
28 BC_INT#_ECE1088
39 BC_CLK_ECE1077
39 BC_DAT_ECE1077
39 BC_INT#_ECE1077
30
BEEP
17 SIO_SLP_S5#
37,48,50 ACAV_IN_NB
A51
B55
B56
A53
B57
2
1
C667
0.1U_0402_16V4Z~D
36 DOCK_POR_RST#
40 SUS_ON
31
AUX_ON
36,41 BREATH_LED#
40 PCH_ALW_ON
39 KYBRD_BKLT_PWM
JTAG_TDI
JTAG_TDO
JTAG_CLK
JTAG_TMS
JTAG_RST#
@ C1053
0.1U_0402_16V4Z~D
1
2
2
1
C666
0.1U_0402_16V4Z~D
MSDATA PD is used to enable JTAG
debug and this pin must be pulled
high to enable JTAG boundary scan
if required.
A5
B6
A37
B40
A38
B41
A39
B42
B59
A56
2
1
+3.3V_RUN
PS/2 INTERFACE
SML1_SMBDAT
SML1_SMBCLK
CLK_TP_SIO
DAT_TP_SIO
CLK_KBD
DAT_KBD
CLK_MSE
DAT_MSE
PBAT_SMBDAT
PBAT_SMBCLK
2
1
C665
0.1U_0402_16V4Z~D
16 SML1_SMBDAT
16 SML1_SMBCLK
39
CLK_TP_SIO
39
DAT_TP_SIO
36 CLK_KBD
36
DAT_KBD
36 CLK_MSE
36
DAT_MSE
42 PBAT_SMBDAT
42 PBAT_SMBCLK
1
C664
0.1U_0402_16V4Z~D
2
U36
+3.3V_ALW
7
8
1
C663
10U_0805_10V4Z~D
C
C660
0.1U_0402_16V4Z~D
C662
0.1U_0402_16V4Z~D
MSDATA
1
10K_0402_5%~D
M_ON
1
1M_0402_5%~D
AUX_ON
2
2.7K_0402_5%~D
DDR_ON
2
100K_0402_5%~D
SUS_ON
2
100K_0402_5%~D
PCH_ALW_ON
2
100K_0402_5%~D
DOCK_POR_RST#
2
1M_0402_5%~D
EN_INVPWR
2
100K_0402_5%~D
+RTC_CELL_VBAT
1
2
CHARGER_SMBDAT
2
2.2K_0402_5%~D
CHARGER_SMBCLK
2
2.2K_0402_5%~D
1
R29
1
R30
2
R589
2
R561
1
R563
1
R564
1
R566
1
R568
1
R1046
1
R595
+RTC_CELL
1
2
R544
0_0402_5%~D
1
R541
1
C659
1U_0402_6.3V6K~D
2
<BOM Structure>
C661
0.1U_0402_16V4Z~D
D
POWER_SW_IN#
23 POWER_SW_IN#
+3.3V_ALW
2
@ C658
1U_0402_6.3V6K~D
1
BC_DAT_ECE1088
2
100K_0402_5%~D
BC_DAT_ECE5028
2
100K_0402_5%~D
BC_DAT_EMC4022
1
100K_0402_5%~D
BC_DAT_ECE1077
1
100K_0402_5%~D
DOCK_SMB_ALERT#
1
10K_0402_5%~D
LCD_SMBCLK
2
2.2K_0402_5%~D
LCD_SMBDAT
2
2.2K_0402_5%~D
PBAT_SMBDAT
2
2.2K_0402_5%~D
PBAT_SMBCLK
2
2.2K_0402_5%~D
LPC_LDRQ#_MEC
1
100K_0402_5%~D
1
R1518
1
R543
2
R545
2
R546
2
R547
1
R1522
1
R1523
1
R551
1
R552
2
@ R837
1
2
+3.3V_ALW
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
S
3
2
Title
EMC5045
Size
Document Number
Date:
Monday, July 13, 2009
Rev
0.1
LA-5691P
Sheet
1
38
of
51
5
4
3
2
1
BlueTooth
+3.3V_RUN
C1703
1
2
0.1U_0402_16V4Z~D
D
D
JBT
2
1
2
2
1
2
13
14
@ FAN
1
2
@ Speak
Part Number
C
@SM CARD BODY
Part Number
SP070007V0L
JTP1
+3.3V_ALW
TP_CLK
TP_DATA
+5V_TP_PWR
+5V_ALW
+3.3V_TP_PWR
Place close to
JTP1.5,6
38 KYBRD_BKLT_PWM
37
TP_DET#
KYBRD_BKLT_PWM
TP_DET#
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Part Number
DC000001Q0L
17
18
G1
G2
1
2
1
1
D54
SD05.TCT_SOD323-2~D
D53
SD05.TCT_SOD323-2~D
2
2
POWER_SW#_MB
1
1
2
Part Number
2
DC02000CS0L
1
@C684
@
C684
100P_0402_50V8J~D
@PWRSW1
@
PWRSW1
SHORT PADS~D
Part Number
Place on Top
DC02000840L
DC020003Y0L
1
1
1
2
2
+5V_RUN_BKT_PWR
Part Number
@ PWRSW2
SHORT PADS~D
DC02000870L
Place on Bottom
Part Number
H-CONN SET ZJX MB-LCD
14 WXGA+(-1ch)
Description
H-CONN SET ZJX
MB-LCD 14 WXGA+(-2ch)
Description
BATT CR2032 3V
220MAH MAXELL
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
4
Description
DELL CONFIDENTIAL/PROPRIETARY
1@ PJP58 PAD-OPEN 4x4m
1
2
Touch PAD/Int KB/LID
Size
3
Document Number
Rev
0.1
LA-5691P
Date:
5
B
H-CONN SET ZJX
MB-B/T-TP-FP
@ RTC BATT
2@ PJP57 PAD-OPEN 4x4m +5V_TP_PWR
1
2
Place close to JTP1 connector
Description
@ LVDS cable
GC20323MX00
+5V_RUN
Description
H-CONN SET ZGX
MB-MDC
@ T/P wire set cable
2
Part Number
HRS_FH12-16S-0P5SH(55)~D
A
38,41 POWER_SW#_MB
+5V_ALW
TP_CLK
TP_DATA
@
PCMCIA TYCO
1759096-1
@ LVDS cable
2
@
Description
@ MDC wire set cable
+5V_TP_PWR
C1413
0.1U_0402_16V4Z~D
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
C678
0.1U_0402_16V4Z~D
38 BC_DAT_ECE1077
38 BC_CLK_ECE1077
38 BC_INT#_ECE1077
+3.3V_ALW
C771
0.1U_0402_16V4Z~D
2
Description
S SOCKET TYCO 1770551-1
10P H5.9 SMART
@PCMCIA BODY
New Keyboard connector assignment
B
Description
SPK PACK ZJX 2.0W 4 OHM FG
PK230003Q0L
Power Switch for debug
1
Description
FAN SET DAQ20 DC5V AB7405HB-HB3 ADDA
DC28A000800
100P_0402_50V8J~D
1
@ C1334
2
CLK_TP_SIO 38
10K_0402_5%~D
DAT_TP_SIO 38
C1704
2
USBP6USBP6+
1
2
3
4
5
6
7
8
9
10
11 G1
12 G2
Part Number
CLK_TP_SIO
1
COEX2_WLAN_ACTIVE
1
2
3
4
5
6
7
8
9
10
11
12
JST_SM(12)B-XSRK-ETB(HF)
C683
10P_0402_50V8J~D
2
C682
10P_0402_50V8J~D
2
1
C681
10P_0402_50V8J~D
1
C680
10P_0402_50V8J~D
C
DAT_TP_SIO
37,41 BT_ACTIVE
37 BT_RADIO_DIS#
35 COEX2_WLAN_ACTIVE
R1407
33P_0402_50V8J~D
TP_CLK
COEX1_BT_ACTIVE
18
18
R614
4.7K_0402_5%~D
TP_DATA
L41
1
2
BLM18AG601SN1D_0603~D
1
2
L42
BLM18AG601SN1D_0603~D
1
R613
4.7K_0402_5%~D
Touch Pad
1
+5V_ALW
18
BT_DET#
35 COEX1_BT_ACTIVE
2
Monday, July 13, 2009
Sheet
1
39
of
51
A
5
4
DC/DC Interface
3
1
2
4
1
3
2
4
1
D
3
3.3V_RUN_ENABLE
S
1
2
G
Q64
SSM3K7002FU_SC70-3~D
2
Discharg Circuit
+3.3VM Source
Q66
SI3456BDV-T1-E3_TSOP6~D +3.3V_M
Q152
SSM3K7002FU_SC70-3~D
S
D
S
1
D
S
Q1
SSM3K7002FU_SC70-3~D
2
G
2
1
1
R1307
20K_0402_5%~D
2
1
2
@
+1.05V_RUN
4
2
Q183
SI4160DY-T1-GE3_SO8~D
1
2
3
1.05V_RUN_ENABLE
3
2
2
G
1
D
2
G
1
1
1
2
@
3
S
1
D
2
G
3
1
@
3
S
2
2
1
3
1
3
1
1
1
2
1
2
1
S
D
2
G
8
7
6
5
R1306
100K_0402_5%~D
A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
+1.05V_RUN_VTT
C1412
2200P_0402_50V7K~D
@
Q79
SSM3K7002FU_SC70-3~D
D
2
G
B
C1411
10U_0805_10V4Z~D
1
+15V_ALW
Q80
@ R636
SSM3K7002FU_SC70-3~D
39_0402_5%~D
+1.05V_RUN_CHG
2
+1.05V_RUN
@ R625
39_0402_5%~D
+3.3V_RUN_CHG
RUN_ON_ENABLE#
Q78
SSM3K7002FU_SC70-3~D
S
@
+DDR_CHG
1
+3.3V_RUN
@ R624
1K_0402_5%~D
D
Q77
SSM3K7002FU_SC70-3~D
3
+0.75V_DDR_VTT
@ R623
1K_0402_5%~D
+1.5V_RUN_CHG
ALW_ON_3.3V# 2
G
Q76
SSM3K7002FU_SC70-3~D
Q81
SSM3K7002FU_SC70-3~D
@
S
@ R622
1K_0402_5%~D
+5V_RUN_CHG
+3.3V_SUS_CHG
A
D
2
G
Q82
@ R628
SSM3K7002FU_SC70-3~D
1K_0402_5%~D
+3.3V_ALWPCH_CHG
@ R627
1K_0402_5%~D
SUS_ON_3.3V#
C1191
4700P_0402_25V7K~D
+1.05V_RUN Source
+1.5V_RUN
+3.3V_ALW_PCH
3
+3.3V_SUS
2
S
Discharg Circuit
+5V_RUN
1
1
D
2
G
2
2
4
2
@
1
S
1.5V_RUN_ENABLE
+1.5V_RUN
R1225
20K_0402_5%~D
1
1
R1224
100K_0402_5%~D
2
D
+1.5V_MEM
Q151
SIS406DN-T1-GE3_POWERPAK8-5~D
1
2
3
5
1
+15V_ALW
3
2
M_ON
2
G
1
4
38,46
2
Q68A
2N7002DW-7-F_SOT363-6~D
M_ON_3.3V#
C696
4700P_0402_25V7K~D
1
B
1
1
6
M_ON_3.3V# 5
3
Q68B
2N7002DW-7-F_SOT363-6~D
2
1
S
3
G
2
3
2
1
2
1
R612
20K_0402_5%~D
M_ENABLE
C
C693
470P_0402_50V7K~D
+1.5V_RUN Source
Q72
@ R616
SSM3K7002FU_SC70-3~D
1K_0402_5%~D
+3.3V_M_CHG
4
C694
10U_0805_10V4Z~D
R610
100K_0402_5%~D
R611
100K_0402_5%~D
6
5
2
1
2
+3.3V_M
D
+3.3V_ALW
1
R607
20K_0402_5%~D
R606
100K_0402_5%~D
+3.3V_RUN
1
1
Q61
SI4160DY-T1-GE3_SO8~D
1
2
3
2
2
8
7
6
5
4
1
4
1
2
+15V_ALW
C692
4700P_0402_25V7K~D
+15V_ALW
+3.3V_ALW2
D
2
D
G
3
1
2
R600
20K_0402_5%~D
+3.3V_RUN Source
+3.3V_ALW
3
2
Q62B
2N7002DW-7-F_SOT363-6~D
6
SUS_ON
+3.3V_SUS
1
38
2
S
1
2
1
SUS_ENABLE
5
27,34,37,45 RUN_ON
2
4
Q62A
2N7002DW-7-F_SOT363-6~D
2
1
Q56A
2N7002DW-7-F_SOT363-6~D
R605
20K_0402_5%~D
6
5
2
1
C690
10U_0805_10V4Z~D
C
Q56B
2N7002DW-7-F_SOT363-6~D
5
6
+3.3V_SUS
Source
Q60
SI3456BDV-T1-E3_TSOP6~D
R603
100K_0402_5%~D
+3.3V_ALW2
SUS_ON_3.3V#
2
1
+3.3V_ALW
R604
100K_0402_5%~D
1
5V_RUN_ENABLE
1
1
1
RUN_ON_ENABLE#
1
+15V_ALW
+5V_RUN
1
2
3
C691
10U_0805_10V4Z~D
4
2
R597
100K_0402_5%~D
R599
100K_0402_5%~D
Q57A
2N7002DW-7-F_SOT363-6~D
2
38 PCH_ALW_ON
R601
20K_0402_5%~D
2
C688
3300P_0402_50V7K~D
6
5
Q55
FDS8878_SO8~D
8
7
6
5
C1190
10U_0805_10V4Z~D
Q57B
2N7002DW-7-F_SOT363-6~D
1
2
3
2
ALW_ON_3.3V#
+5V_ALW
C689
2200P_0402_50V7K~D
C687
10U_0805_10V4Z~D
3
2
ALW_ENABLE
21 ALW_ENABLE
+15V_ALW
2
D
4
G
1
+3.3V_ALW2
C686
10U_0805_10V4Z~D
6
5
2
1
R598
100K_0402_5%~D
+5VRUN Source
Q54
+3.3V_ALW_PCH
SI3456BDV-T1-E3_TSOP6~D
S
+3.3V_ALW
1
+3.3V_ALW2
R602
100K_0402_5%~D
1
+3.3V_ALW_PCH Source
+15V_ALW
D
2
4
3
2
Title
POWER CONTROL
Size
Document Number
Date:
Monday, July 13, 2009
Rev
0.1
LA-5691P
Sheet
1
40
of
51
5
4
3
2
@ H1
H_2P8
@ H2
H_2P2
1
@ H3
H_2P2
@ H4
H_2P2
@ H5
H_2P2N
@ H6
H_2P3
Fiducial Mark
@ FD1
1
1
1
1
1
1
@ H15
H_2P8
@ FD3
1
1
1
@ H16
H_2P8
SATA_LED
MASK_BASE_LEDS#
LED FPC Connector
@H17
@
H17
H_3P3
TYCO_2041070-6~D
@H18
@
H18
H_3P3
D
@ FD4
1
1
FIDUCIAL MARK~D
@ H24
H_3P0x2P2N
1
@H23
@
H23
H_3P3
1
@H22
@
H22
H_2P3
1
@H21
@
H21
H_3P3
1
1
1
@H20
@
H20
H_3P4N
1
2
3
4
5
6
GND
GND
1
1
2 SATA_LED
1K_0402_5%~D
1
R659
1
2
3
4
5
6
7
8
1
1
JLED
WIRELESS_LED
MASK_BASE_LEDS#_Q
BATT_BLUE
BATT_YELLOW
1
Q92
PDTA114EU_SC70-3~D
2
RB717F_SOT323
@ H14
H_2P2
@H19
@
H19
H_3P4N
Q93A
2N7002DW-7-F_SOT363-6~D
1
6
2
3
37 LED_SATA_DIAG_OUT#
@ FD2
1
@ H12
H_2P8
FIDUCIAL MARK~D
1
2
1
@ H11
H_2P8
Power Switch Board
3
5
D99
2
@ H10
H_2P8
FIDUCIAL MARK~D
@ H13
H_2P2
R654
10K_0402_5%~D
37 MASK_SATA_LED#
@ H9
H_2P8
FIDUCIAL MARK~D
TYCO_2041070-6~D
+5V_ALW
1
Q93B
2N7002DW-7-F_SOT363-6~D
4
3
@ H8
H_2P7
1
HDD LED solution for Blue LED
+3.3V_ALW
@ H7
H_2P3
1
38,39 POWER_SW#_MB
1
2
3
4
5
6
GND
GND
1
LAT_ON_SW_BTN#
BREATH_BLUE_LED_PWR
POWER_SW#_MB
38 LAT_ON_SW_BTN#
15 SATA_ACT#_R
1
2
3
4
5
6
7
8
1
PWR_BTN_BD_DET#
37 PWR_BTN_BD_DET#
D
1
JP5
3
+5V_ALW
1
BATT_YELLOW
MASK_BASE_LEDS#_Q
Q142
C
1
Q139
PDTA114EU_SC70-3~D
2
G
37 SYS_LED_MASK#
Q97
PDTA114EU_SC70-3~D
1
2
+3.3V_ALW
1
5
Q98B
2N7002DW-7-F_SOT363-6~D
S
2
G
Q144B
2N7002DW-7-F_SOT363-6~D
4
2
1
3
MASK_BASE_LEDS#
2
SDM10U45-7_SOD523-2~D
Q141
SSM3K7002FU_SC70-3~D
5
31
D
3
SSM3K7002FU_SC70-3~D
D67
4
@R4
@R4
0_0402_5%~D
2
1
BATT_BLUE
+5V_ALW
3
1
1
BAT2_LED
4
U63
NC7SZ04P5X_NL_SC70-5~D
3
@ R9
0_0402_5%~D
2
1
+3.3V_ALW
1
R1007
Q145A
2N7002DW-7-F_SOT363-6~D
2
A
3
Y
1
R1005
100K_0402_5%~D
BAT1_LED
4
1
R666
1
1
1
0.1U_0402_16V4Z~D
U64
NC7SZ04P5X_NL_SC70-5~D
SSM3K7002FU_SC70-3~D
1
2
1
R1002
Q140
PDTA114EU_SC70-3~D
4
3
2
G
Q145B
2N7002DW-7-F_SOT363-6~D
D
S
5
WLAN/WWAN/UWB/BT LED indecator for Blue LED
2
150_0402_5%~D
+3.3V_ALW
Q143
2
BAT1_LED#
+3.3V_ALW
2
3
BAT1_LED#
G
38
2
NC
1
2
MASK_BASE_LEDS#
Q101
PDTA114EU_SC70-3~D
C1059
1
5
2 WIRELESS_LED
1K_0402_5%~D
P
1
R663
R82
47K_0402_5%~D
R10
0_0402_5%~D
2
1
3
WPAN
2
100K_0402_5%~D
2
6
+3.3V_ALW
37 WIRELESS_LED#
6
1
R1004
100K_0402_5%~D
2
G
3
Y
Battery LED
2
1K_0402_5%~D
2
@ R8
0_0402_5%~D
2
1
0.1U_0402_16V4Z~D
1
R665
3
A
NC
2
2
Q99
PDTA114EU_SC70-3~D
+5V_ALW
2
D
37,39 BT_ACTIVE
BAT2_LED#
2
S
LED_WWAN_OUT#
26,37
BAT2_LED#
5
2
R662
100K_0402_5%~D
35,37 LED_WLAN_OUT#
38
P
+5V_RUN_BKT_PWR
6
3
27
+3.3V_ALW
2
100K_0402_5%~D
2
C1058
1
1
C
2N7002DW-7-F_SOT363-6~D
Q98A
2
1 1
BLT_LED#
R1524
10K_0402_5%~D
R89
47K_0402_5%~D
1
Q144A
2N7002DW-7-F_SOT363-6~D
+3.3V_RUN_BKT_PWR
1
R1006
+5V_ALW
+3.3V_ALW
BATT_BLUE_LED
2
150_0402_5%~D
BATT_YELLOW_LED
24
1
37 SYS_LED_MASK#
2
1K_0402_5%~D
1
R1003
B
1
+5V_ALW
24
B
+5V_ALW
3
R999
100K_0402_5%~D
1
1
5
A
Y
4
BREATH_LED#_R
U42
NC7SZ04P5X_NL_SC70-5~D
1
+5V_ALW
24
Q138
PDTA114EU_SC70-3~D
MASK_BASE_LEDS#
1
Q135A
BREATH_BLUE_LED
Q135B
1
R1001
1
2
BREATH_BLUE_LED
2
1K_0402_5%~D
2N7002DW-7-F_SOT363-6~D
4
3 2
5
6
P
2
NC
36,38 BREATH_LED#
X
0
1
G
0
1
1
3
Mask All LEDs (Sniffer Function)
Mask Base MB LEDs (Lid Closed)
Do not Mask LEDs (Lid Opened)
1
R664
37 SYS_LED_MASK#
3
1
LID_CL#
2
0.1U_0402_16V4Z~D
2
SYS_LED_MASK#
1
Q137
PDTA114EU_SC70-3~D
+5V_ALW
2
R1000
100K_0402_5%~D
R90
47K_0402_5%~D
LED Circuit Control Table
2N7002DW-7-F_SOT363-6~D
4
3 2
5
6
C1060
Q134A
2N7002DW-7-F_SOT363-6~D
2N7002DW-7-F_SOT363-6~D
2
1
2
Q134B
+3.3V_ALW
BREATH_BLUE_LED_PWR
2
82_0402_5%~D
+3.3V_ALW
C1061
1
2
A
37 SYS_LED_MASK#
LID_CL#
LID_CL#
2
B
A
0.1U_0402_16V4Z~D
U65
O
3
30,37
1
P
SYS_LED_MASK#
G
5
A
4
MASK_BASE_LEDS#
TC7SH08FU_SSOP5~D
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
1
@ R43
5
4
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
2
0_0402_5%~D
3
2
Title
PAD and Standoff
Size
Document Number
Date:
Monday, July 13, 2009
Rev
0.1
LA-5691P
Sheet
1
41
of
51
5
4
3
2
1
+COINCELL
1
COIN RTC Battery
2
PR1
1K_0402_5%~D
JRTC1
Z4012
+3.3V_RTC_LDO
D
1
2
3
+COINCELL
@ PJP1
1
PR4
100_0402_5%~D
1
2
Z4304
Z4305
Z4306
PR3
100_0402_5%~D
1
2
PR5
100_0402_5%~D
1
2
PBAT_SMBCLK
PBAT_SMBDAT
38
38
PBATT+
PC1
1U_0603_10V4Z~D
PBAT_PRES#
37
PQ1
FDN338P_NL_SOT23-3~D
SUYIN_200277MR009F515ZR~D
PD6
1
2
1
3
3
GND
GND
7
6
5
4
3
2
1
2
PAD-OPEN 4x4m
1
PC3
2200P_0402_50V7K~D
2
1
@ PBATT1
9
8
7
6
5
4
3
2
1
1
PR2
10K_0402_1%~D
2
1
DA204U_SOT323~D
PC2
0.1U_0603_25V7K~D
2
1
@
BAT54CW_SOT323~D
+3.3V_ALW
2
1
@
1
1
Primary Battery Connector
PD4
@
D
1
2
3
2
3
2
3
PD1
PL1
FBMA-L18-453215-900LMA90T_1812~D
1
2
PD3
DA204U_SOT323~D
PBATT+_C
4
5
+RTC_CELL
ESD Diodes
PD2
DA204U_SOT323~D
1
2 G1
3 G2
MOLEX_53398-0371~D
3
2
+3.3V_ALW
DOCK_SMB_ALERT#
36,38
2
2
RB751V-40_SOD323-2~D
GND
36,37,50
PR7
1
2
0_0402_5%~D
SLICE_BAT_PRES#
C
2
1
C
PC4
1500P_0402_7K~D
+5V_ALW
PR9
2.2K_0402_5%~D
1
2
3
2
NB_PSID_TS5A63157
3
NO
IN
GND
V+
NC
COM
6
GPIO_PSID_SELECT
5
+5V_ALW
4
PS_ID
37
38
2
@
1
2
3
PD9
DA204U_SOT323~D
1
PQ3
MMST3904-7-F_SOT323~D
3
S
2
PR14
1
@
2
PSID_DISABLE#
37
10K_0402_5%~D
B
37
PC5
.47U_0402_6.3V6-K~D
1
2
DCIN_CBL_DET#
1
DOCK_PSID
TS5A63157DCKR_SC70-6~D
E
PR13
15K_0402_1%~D
1
2
1
GND
PU1
36
+5V_ALW
+5V_ALW
1
2
G
PR11
100K_0402_1%~D
1
2
3
1
@
@
PD8
SM24_SOT23
PQ2
FDV301N_NL_SOT23-3~D
C
2
B
2
3
PD10
DA204U_SOT323~D
2
+5V_ALW
B
3
D
1
PR10
33_0402_5%~D
1
2
GND
PR12
10K_0402_1%~D
PL2
BLM18BD102SN1D_0603~D
2
1
NB_PSID
PR15
0_0402_5%~D
1
2
PR8
1
2
0_0402_5%~D
1
@
PD7
DA204U_SOT323~D
+3.3V_ALW
DC_IN+ Source
@
+DC_IN
PL3
FBMJ4516HS720NT_1806~D
1
2
+DC_IN_SS
PQ4
FDS6679AZ_SO8~D
1
8
S
D
2
7
S
D
3
6
S
D
4
5
G
D
50
1
2
PC11
10U_1206_25V6M~D
PR17
4.7K_0805_5%~D
2
1
PC9
0.1U_0603_25V7K~D
2
1
PC8
0.1U_0603_25V7K~D
2
1
PC7
0.1U_0603_25V7K~D
2
1
PR16
2
1M_0402_5%~D
PR20
1M_0402_5%~D
2
1
@
PL4
FBMJ4516HS720NT_1806~D
1
2
PC6
0.022U_0805_50V7K~D
1
2
2
PR18
1
2
0_0402_5%~D
SOFT_START_GC
PC13
0.1U_0603_25V7K~D
2
1
A
@
PR19
4.7K_0805_5%~D
2
1
PC10
0.1U_0603_25V7K~D
2
1
1
MOLEX_87438-0743
7
7
6
6
-DCIN_JACK
5
5
4
4
+DCIN_JACK
3
3
2
2
1
1
@ PJPDC1
PD11
VZ0603M260APT_0603
PC12
0.1U_0603_25V7K~D
2
1
1
+DC_IN
A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
2
+DCIN
Size
Document Number
Date:
Monday, July 13, 2009
Rev
0.1
LA-5691P
Sheet
1
42
of
51
5
4
3
2
1
+3.3V_ALWP/ +5V_ALWP/ +5V_ALW2 / +15V_ALWP/ +3.3V_RTC_LDO
@ PL17
FBMJ4516HS720NT_1806~D
1
2
+DC1_PWR_SRC
PJP2
1
+PWR_SRC
2
@ PR25
0_0402_5%~D
1
2
PC23
10U_1206_25V6M~D
2
1
2
1
PC22
10U_1206_25V6M~D
2
1
PC21
10U_1206_25V6M~D
PC19
2200P_0402_50V7K~D
2
1
3
2
1
+3.3V_ALWP
@ PR40
0_0603_5%~D
1
2
@ PR38
4.7_1206_5%~D
1
+3.3V_ALW_LGATE
@
+5V_ALW_LGATE
PC37
330U_D2E_6.3VM_R25~D
4
PC38
0.1U_0402_10V7K~D
2
1
PQ8
SI4134DY-T1-GE3_SO8~D
@ PC32
0.1U_0603_25V7K~D
PR34
0_0603_5%~D
1
2
1
GNDA_3V5V
2
1
PR37
1_0603_5%~D
+3.3V_ALW_BOOT 1
2
C
+3.3V_ALWP
PL6
4.7UH +-20% FDVE1040-H-4R7M=P3 10A
2
1
2
GNDA_3V5V
PR36
1_0603_5%~D
1
2+5V_ALW_BOOT
SN0608098_QFN32_5X5~D
4
GNDA_3V5V
5
6
7
8
32
31
30
29
28
27
26
25
3
2
1
REFIN2
TRIP2
VOUT2
SKIPSEL
PGOOD2
EN2
DRVH2
LL2
PC34
0.1U_0603_25V7K~D
17
18
19
20
21
22
23
24
PAD
33
PC33
0.1U_0603_25V7K~D
2
1
1
2
3
4
REFIN2
8
7
6
5
4
3
2
1
VSW
VOUT1
VFB1
TRIP1
PGOOD1
EN1
DRVH1
LL1
3.3 Volt +/-5%
Thermal Design Current: 3.133A
Peak current: 4.475A
OCP_MIN:5.37A
PQ6
SI4128DY-T1-GE3_SO8
@
2
1
2
3
9
10
11
12
13
14
15
16
5
@ PR33
0_0603_5%~D
1
2
PC31
0.1U_0603_25V7K~D
2
2
1
+5V_ALW_PHASE
PQ7
FDMS7692 1N POWER56-8
PR35
4.7_1206_5%~D
1
2
+5V_ALW_UGATE
@
PR39
0_0603_5%~D
1
2
+
PC36
0.1U_0402_10V7K~D
2
1
PC35
330U_D2E_6.3VM_R25~D
1
EN_3V_5V
PL5
3.3UH_FDVE1040-H-3R3M=P3_11.3A_20%~D
2
1
+5V_ALWP
BYP
+5V_OUT1
+5V_FB1
2
POK1
PR31
232K_0402_1%~D
1
GNDA_3V5V
PR29
@
1
2
0_0402_5%~D
PR30
178K_0402_1%~D
1
2
+3.3V_OUT2
2 PR32 0_0402_5%~D
1
POK2
EN_3V_5V
+3.3V_ALW_UGATE
+3.3V_ALW_PHASE
VBST1
DRVL1
V5DRV
SECFB
GND
PGND
DRVL2
VBST2
+5V_ALWP
C
SECFB
+5V_ALWP
PC29
0.1U_0402_10V7K~D
4
PR28
0_0402_5%~D
5
6
7
8
@ PR27
0_0603_5%~D
LDOREFIN
LDO
VIN
VREF3
EN_LDO
V5FILT
TONSEL
VREF2
PU2
2
1
@
GNDA_3V5V
GNDA_3V5V
2
PC30
0.1U_0402_10V7K~D
2
1
1
1
PC28
0.1U_0603_25V7K~D
1
2
2
5V_3V_REF
8
7
6
5
LDOREFIN
+5V_ALW2P
VIN
+3.3V_ALW2
EN_3V_5V
@ PR26
0_0402_5%~D
1
2
GNDA_3V5V
@
PC27
1U_0603_10V6K~D
2
1
PC26
1U_0603_10V6K~D
2
1
PR24
0_0402_5%~D
2
1
PC25
0.1U_0603_25V7K~D
2
1
+3.3V_ALW2
+3.3V_RTC_LDO
PQ5
SI4134DY-T1-GE3_SO8~D
@ PR23
10_0603_5%~D
2
1
PAD-OPEN1x1m
@
5 Volt +/-5%
Thermal Design Current:4.854A
Peak Current:6.935A
OCP_MIN:8.322A
D
+5V_VCC1
2
PC20
0.1U_0805_50V7M~D
2
1
PJP3
1
+5V_ALW2
PC24
4.7U_0805_6.3V6K~D
2
1
PC18
10U_1206_25V6M~D
2
1
PC17
10U_1206_25V6M~D
2
1
PC16
10U_1206_25V6M~D
2
1
PC15
0.1U_0805_50V7M~D
2
1
PC14
2200P_0402_50V7K~D
2
1
PR22
0_0805_5%~D
1
2
PR21
0_0805_5%~D
1
2
PAD-OPEN 4x4m
D
1
+
2
GNDA_3V5V
GNDA_3V5V
2
+5V_ALW2
2
PR46
0_0402_5%~D
2
1
1
+3.3V_ALW
PAD-OPEN 4x4m
ALW_PWRGD_3V_5V
38
PR47
200K_0402_1%~D
2
1
+15V_ALWP
(100mA,20mils ,Via NO.=1)
PJP8
B
2
2
PAD-OPEN1x1m
1
POK2
PC43
0.1U_0603_25V7K~D
2
1
+15V_ALW
+5V_ALW
@
POK1
PAD-OPEN 4x4m
+3.3V_ALWP
PD14
BAT54CW_SOT323~D
VOUT2=3.3V
L=2.8uF
Fsw=300KHz
D=0.169
Input Ripple Current=TDC*(D*(1-D))^0.5=2.051A
Output ripple current=(19-3.3)*0.173/3u/300K=3.264A
Output ripple Voltage=3.264*25=81.6mV
PR48
39K_0402_5%~D
1
PR44
0_0402_5%~D
2
1
+3.3V_ALWP
PAD-OPEN1x1m
GNDA_3V5V
PD13
BAT54SW-7-F_SOT323-3~D
PJP7
2
+3.3V_ALWP
PR42
100K_0402_1%~D
1
2
2
1
PC41
0.1U_0603_25V7K~D
2
1
PR43
2K_0402_5%~D
2
1
ALWON
PJP6
1
PC42
0.1U_0603_25V7K~D
1 1
2
2
3
23 THERM_STP#
+5V_ALWP
PD12
BAT54SW-7-F_SOT323-3~D
3
38
3
PJP4
1
PR45
200K_0402_5%~D
1
2
B
2
PR41
100K_0402_1%~D
1
2
+5V_ALWP
VOUT2=5V
L=2.8uF
Fsw=400KHz
D=0.256
Input Ripple Current=TDC*(D*(1-D))^0.5=3.641A
Output Ripple Current=(19-5)*0.263/3u/400K=3.32A
Output Ripple Voltage=3.32*25m=83mV
PC39
0.1U_0603_25V7K~D
1 1
2
PC40
4.7U_0603_6.3V6K~D
2
1
GNDA_3V5V
GNDA_3V5V
A
A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
3
2
DC/DC +3V/ +5V
Size
Document Number
Date:
Monday, July 13, 2009
Rev
0.1
LA-5691P
Sheet
1
43
of
51
5
4
3
2
1
+1.5V_MEN_P(VT356)
PL7
FBMJ4516HS720NT_1806~D
1
2
DC_5V_ALW1
+5V_ALW
C
GNDA_1.5V
VSENSE- 2
PC61
6800P_0402_25V7K~D
2
1
@
PC60
0.1U_0603_25V7K~D
2
1
PC59
22U_1206_6.3V6M~D
2
1
PC58
22U_1206_6.3V6M~D
2
1
PC57
22U_1206_6.3V6M~D
2
1
2
PAD-OPEN1x1m
PC56
22U_1206_6.3V6M~D
2
1
PR58
0_0402_5%~D
PC55
22U_1206_6.3V6M~D
2
1
1
VSENSE+
PC54
22U_1206_6.3V6M~D
2
1
PR56
0_0402_5%~D
2
1
1
@ PR53
7.68K_0805_1%~D
1
PR57
2
1
33.2K_0402_1%~D
+1.5V_MEN_P
PC50
0.1U_0603_25V7K~D
PC53
10U_0603_6.3V6M~D
2
1
VT356FCX-ADJ_CSP20~D
@
PC52
10U_0603_6.3V6M~D
2
1
C1
2
C2
1
C3
STAT
B5
B4
B3
B1
1
PL8
0.42UH_MPC0740LR42C_20A_20%~D
+1.5V_VX +1.5V_VX
2
1
PR52
44.2K_0402_0.5%~D
PJP10
VSENSE-
C4
2
GND
TEMP
OE
AVDD
GND
C5
2
D2
D3
D4
D1
VX
VX
VX
D5
GND
VSENSE+
2
2
PR51
1
PR55
54.9K_0402_1%~D
2
1
PR54
287K_0402_1%
2
1
VDES
1.5V_SUS_PWRGD
@
5.9K_0402_1%~D
A5
VX
VX
A4
VDD
IRIPL
A3
VDD
R_SEL/ILOAD
AGND
+1.5V_VDES
BIAS
AVDD1
GNDA_1.5V
PC51
2200P_0402_50V7K~D
2
1
PC186
0.01U_0402_25V7K~D
A2
DDR_EN
2
C
DDR_ON
A1
B2
BIAS
+1.5V_R_SEL/LOAD
VSENSE+
1
38,45
1.5 Volt +/-5%
Thermal Design Current: 5.775A
Peak current: 8.25A
OCP_MIN:9.9A
PU3
GNDA_1.5V
PR50
0_0402_5%~D
1
2
PC48
0.1U_0603_25V7K~D
2
1
PC49
0.22U_0402_10V6K~D
2
1
@
PC47
1U_0603_25V6-K~D
2
1
AVDD1
PC46
10U_1206_25V6M~D
2
1
PC44
10U_1206_25V6M~D
2
1
1
PR49
10_0402_1%~D
PC45
10U_1206_25V6M~D
2
1
D
2
D
1
PR59
0_0402_5%~D
PJP11
1
+3.3V_ALW
2
PAD-OPEN 4x4m
PR60
150K_0402_5%~D
2
1
PJP12
B
1.5V_SUS_PWRGD
+1.5V_MEN_P
1
2
+1.5V_MEM
PAD-OPEN 4x4m
B
1.5V_SUS_PWRGD 38
A
A
DELL CONFIDENTIAL/PROPRIETARY
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
3
2
Compal Electronics, Inc.
+1.5V_MEM
Size
Document Number
Date:
Monday, July 13, 2009
Rev
0.1
LA-5691P
Sheet
1
44
of
51
5
4
3
2
1
+1.8V_RUN
1.8 Volt +/-5%
Thermal Design Current: 0.894A
Peak current: 1.277A
OCP_min:1.532A
D
D
PU4
@ PJP13
BST
B3
EN
I.C.
MAX15050EWE+_WLP16~D
33P_0402_50V8J~D
GNDA_1.8V
1
2
1.8V_RUN_PWRGD 37
C
@
2
PR66
100K_0402_5%~D
PC70
0.1U_0402_10V7K~D
2
1
@
PC69
22U_0805_6.3V4Z~D
2
1
PC71
1
2
4.02K_0402_1%~D
2
6.98K_0402_1%~D
D1
1
2
1000P_0402_50V7K~D
A2
PR63
PWRGD
PR62
1
2
GND
PC67
1
2
D3
8.06K_0402_1%~D
COMP
D2
1
GND
C3
PR67
FB
1
A1
REFIN/SS
+1.8V_RUNP
C2
PR61
40.2_0402_1%~D
I.C.
D4
PL9
2UH_#A915AY-H-2R0M=P3_3.3A_20%~D
2
1
2
PR64
0_0402_5%~D
LX
2
1
B2
VDD
1
27,34,37,40 RUN_ON
PC65
2.2U_0603_10V6K~D
B1
LX
PC72
820P_0402_50V7K~D
2
C4
PC66
0.022U_0402_16V7K~D
2
1
2
1
B4
LX
IN
1
PC64
0.1U_0603_25V7K~D
2
1
PC63
22U_0805_6.3V4Z~D
2
1
PAD-OPEN 2x2m~D
A4
C1
IN
2
A3
PC68
680P_0603_50V8J~D
+1.8V_PWR_SRC
1
1
2
PR65
4.7_1206_5%
+3.3V_ALW
PC62
0.1U_0603_25V7K~D
1
2
C
GNDA_1.8V
+3.3V_RUN
@ PJP14
1
2
PAD-OPEN1x1m
GNDA_1.8V
@ PJP33
+1.8V_RUNP
2
1
+1.8V_RUN
PAD-OPEN 2x2m~D
B
B
+0.75V_DDR_VTT
DDR3 Termination
+V_DDR_REF
10
8
6
VTT
PGND
VTTSNS
S5
S3
9
PR256
0_0402_5%~D
2
1
DDR_ON
38,44
7
PR68
0_0402_5%~D
2
1
@PJP35
@
PJP35
2
1
+0.75V_P
+0.75V_DDR_VTT
PAD-OPEN 2x2m~D
1
GND
VTTREF
+3VALW
1
PC75
1U_0603_10V6K~D
VIN
VLDOIN
4
1
2
5
VDDQSNS
2
2
A
3
PC77
10U_0805_10V6K~D
PC76
10U_0805_10V6K~D
2
1
+0.75V_P
2
GND
1
PC73
10U_0805_10V6K~D
11
1
1
2
PAD-OPEN 2x2m~D
2
PU5
RT9026_MSOP10
@ PJP34
+1.5V_MEM
0.75Volt +/-5%
Thermal Design Current: 0.525A
Peak current: 0.75A
OCP mini: 0.9A
PC78
0.1U_0402_16V7K~D
A
0.75V_DDR_VTT_ON 37
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
+1.8V_RUN/+0.75V_DDR_VT
Size
Document Number
Date:
Monday, July 13, 2009
Rev
0.1
LA-5691P
Sheet
1
45
of
51
5
4
3
1.05 Volt +/-5%
Thermal Design Current: 1.51A
Peack current: 2.17A
2
1
1.05 Volt +/-5%
Thermal Design Current: 15.9A
Peack current: 22.7A
+1.05V_M/+1.05VTT_RUN
PR69
4.3K_0402_5%~D
1
2
PR71
1
PC82
1
2
2
100_0402_1%~D
PC80
33P_0402_50V8J~D
1
2
PR72
1
820P_0402_50V7K~D
PC83
1
2
2
51K_0402_1%~D
PC81
22P_0402_50V8J~D
1
2
VTT_B+
PC84
1
2
470P_0402_50V7K~D
1
PR73
1
470P_0402_50V7K~D
PR70
4.3K_0402_5%~D
2
PC85
1
2
2
82K_0402_1%~D
PR74
1
820P_0402_50V7K~D
2
PR75
0_0402_5%~D
2
1
180_0402_1%
VTT_SENSE
12
D
2
2
D
1
PR78
2
PR77
13.7K_0402_1%~D
20_0603_1%~D
1
1
PR76
13.7K_0402_1%~D
PC86
1
2
GNDA_VTT
GNDA_VTT
1
PQ10
SIS412DN-T1-GE3_POWERPAK8-5
1
PC93
0.1U_0603_25V7K~D
2
1
PC94
0.1U_0603_25V7K~D
2
1
2
NCP5222_CS1-/Vo1
1
+
2
1
+
2
PC111
330U_D2_2VM_R6M~D
PR89
44.2K_0402_1%~D
@
1
+
2
B
1
+5V_ALW
PR95
28.7K_0402_1%~D
2
@ PC116
1000P_0402_50V7K~D
BRIDGE_G
@
PC107
0.1U_0402_10V7K~D
2
1
@
PC106
10U_0805_6.3V6M~D
2
1
2
1
1
PR98
0_0402_5%~D
1
H_VTTPWRGD
H_VTTPWRGD high level:1.1V
8
2
PR99
1K_0402_1%~D
2
0_0402_5%~D
PC115
3.3U_0603_10V6K~D
2
@
PR97
2 PR96
2
NCP5222_CS1+
2
38 1.05V_M_PWRGD
1
1
PC104
0.1U_0603_25V7K~D
PC103
10U_0805_6.3V6M~D
2
1
@
1
2
GNDA_VTT
1
PR94
100K_0402_1%~D
2
PR86
4.75K_0402_1%~D
1
2
1
PC114
1U_0603_16V6K~D
2
+3.3V_ALW
2
B
3
+1.05VTTP
+5V_ALW
0_0402_5%~D
20_0603_1%~D
1
RB751V-40_SOD323-2~D
1NCP5222_DRVS/2CH
PR93
0_0402_5%~D
2
1
+5V_ALW
4
PC110
330U_D2_2VM_R6M~D
RB751V-40_SOD323-2~D
PR92
1
2
@
1
1
PR90
4.7_1206_5%~D
NCP5222_CS2+
2
C
PC105
10U_0805_6.3V6M~D
2
1
PC102
1000P_0402_50V7K~D
2
1
4
PD16
2
PC92
10U_1206_25V6M~D
1
2
PC91
10U_1206_25V6M~D
1
2
5
PGND1
4
PQ13
AON6704L_DFN8-5
PD15
1
+PWR_SRC
PL11
0.56UH +-20% MPC1040LR56 23A
6.49K_0402_1%~D
+1.05V_MP
2
PAD-OPEN 4x4m
5
NCP5222_LGATE1
5
NCP5222_PHASE1
22
4
3
2
1
1
23
4
PQ16
SIS412DN-T1-GE3_POWERPAK8-5
5
NCP5222_FB1
2
FB1
ICS1
NCP5222_UGATE1
3
2
1
NCP5222_COMP1
2
NCP5222_VIN
PGOOD1
24
@ PQ11
AON6704L_DFN8-5
GNDA_VTT
PR85
PC96
2_0603_5%~D 0.1U_0603_25V7K~D
25 NCP5222_BST1 2
1
1
2
26
NCP5222MNR2G_QFN28_4X4~D
21
AGND
29
PQ12
AON6704L_DFN8-5
27
1
PC109
330U_D2_2VM_R6M~D
2
NCP5222_LGATE2
28
PJP18
VTT_B+
PR91
4.7_1206_5%~D
1
4
DL1
PR83
0_0402_5%~D
NCP5222_EN1/SKIP1 1
2
3
2
1
PR88
SWN1
DL2
37
3
2
1
2
0.1U_0603_25V7K~D
3
SWN2
NCP5222_PGD1 20
@
COMP1
DH1
1
2
3
PC108
1
PR87
4.32K_0402_1%~D
1
2
PC101
1
2
1000P_0402_50V7K~D
+
2
NCP5222_COMP2
DH2
2
PC100
220U_X_2VM_R7M~D
PC98
220U_X_2VM_R7M~D
PC99
0.1U_0402_10V7K~D
2
1
PC113
10U_0805_6.3V6M~D
2
1
PC112
10U_0805_6.3V6M~D
2
1
@
+
2
1
4
BST1
5
14
EN1/SKIP1
BST2
VCCP
13
EN2/SKIP2
19
NCP5222_PHASE2
NCP5222_CS1+
CS1+
DRVS/2CH
12
NCP5222_CS1-/Vo1
CS1-/Vo1
VCC
NCP5222_UGATE2
CPU_VTT_ON
NCP5222_ICS1
CS2+
18
PC95
PR84
10
0.1U_0603_25V7K~D
2_0603_5%~D
1
2
2
1NCP5222_BST2 11
GNDA_VTT
PR81 @
0_0402_5%~D
CS2-/Vo2
17
4
PL10
0.6UH_MPC0750LR60C_17A_20%~D
2
1
1
5
ICS2
9
PGOOD2
8
PGND2
PQ9
SIR472DP-T1-GE3 1N DFN8-5
1
2
3
5
PC90
10U_1206_25V6M~D
1
2
NCP5222_EN2/SKIP2
15
+1.05V_MP
PC89
10U_1206_25V6M~D
1
2
C
PC88
0.1U_0603_25V7K~D
2
1
PC87
0.1U_0603_25V7K~D
2
1
NCP5222_CS2+
VIN
PU6
VTT_B+
NCP5222_VCC
+1.05V_MP
7
NCP5222_ICS2
COMP2
1
2
@ PR82
0_0402_5%~D
2
1
17,37 SIO_SLP_M#
NCP5222_FB2
@ PR80
0_0402_5%~D
FB2
PR79
0_0402_5%~D
2
1
M_ON
NCP5222_PGD2 16
38,40
6
1500P_0402_7K~D
1
4
GNDA_VTT
5
3
2
1
Sharing MOSFET gate driver
+15V_ALW
PQ14
FDMC7664 1N MLP-8
+5V_ALW
@
GNDA_VTT
2
5
PC118
0.01U_0402_25V7K~D
PQ15A
2N7002DW-T/R7_SOT363-6~D
2 NCP5222_DRVS/2CH
@
2
+1.05VTTP
Current Sharing
@
2
1
1
1
A
1
2
2
+1.05V_RUN_VTT
DELL CONFIDENTIAL/PROPRIETARY
JUMP_43X79
@
Compal Electronics, Inc.
PJP22
2
Title
JUMP_43X79
Size
Document Number
Date:
Monday, July 13, 2009
1
2
+1.05V_M/+1.05V_RUN_VTT
PAD-OPEN1x1m
4
Rev
0.1
LA-5691P
GNDA_VTT
5
2
PJP21
1
PJP23
2
JUMP_43X79
NCP5222_ICS1
499K_0603_1%~D
PJP20
1
PR102
1
PQ15B
6
2N7002DW-T/R7_SOT363-6~D
BRIDGE_G
1
PC117
0.01U_0402_25V7K~D
NCP5222_ICS2
1
A
PR101
47K_0402_5%~D
2
PR100
100K_0402_5%~D
2
1
+1.05V_M
1
2
2
PAD-OPEN 4x4m
1
1
3
+1.05V_MP
PJP19
4
@
3
2
Sheet
1
46
of
51
6
5
1
1
3210_OD#
PR130
0_0603_5%~D
2
PC125
100U_25V_M~D
PC124
100U_25V_M~D
PC123
100U_25V_M~D
2
1
PC122
10U_1206_25VAK~D
2
1
PC121
10U_1206_25VAK~D
2
2
PC127
1000P_0603_50V7K~D
3210_CS_PH1
3210_CSREF 1
1
2
1
PC134
10U_1206_25VAK~D
2
1
2
2
2
PC141
1000P_0603_50V7K~D
SYNC
SW
AGND
VCC
GND
GND
GND
GND
25
26
3210_CSREF 1
1
+5V_ALW
2
11
1
@
@
B
PR278
10_0402_1%~D
PR255
0_0402_5%~D
@
+VCC_CORE
1
20
19
18
17
16
15
14
13
12
2
GNDA_VCORE
10
PC152
1U_0603_25V6-K~D
GND
GND
GND
GND
GND
GND
GND
GND
GND
21
1
22
2
3210_PH3
2
SW
24
3210_CSREF 1
N/C
PL14
0.3UH_HCB1050-301L1-F_25A_20%~D
1
2
23
2
SW
2
3
2
4
30
29
28
27
9
8
SW
PG
1
5
PWM
1
1
PC235
0.1U_0603_25V7K~D
1
2
1
MP8698DU-LF-Z_QFN18_5X5~D
PR157
1K_0402_1%~D
1
PR156
249K_0402_1%~D
2
1
2
7
EN
IN
IN
IN
IN
IN
BST
PR159
0_0402_5%~D
1
23210_PWM3 6
A3210_PWM3
1
PC149
10U_1206_25VAK~D
2
1
PR151
0_0402_5%~D
1
2
C
3210_CS_PH3
3210_OD#
PC148
10U_1206_25VAK~D
PR149
105K_0603_1%~D
2 3210_CS_PH3
2
1
PC151
1000P_0603_50V7K~D
PR148
105K_0603_1%~D
2 3210_CS_PH2
D
+CPU_PWR_SRC
1
1
@
2
PR144
105K_0603_1%~D
2 3210_CS_PH1
@
+VCC_CORE
PR275
10_0402_1%~D
PR254
0_0402_5%~D
3210_CS_PH2
Place PH4 close to
PHASE1 inductor
on the same layer
@
PR160
2.2_1206_1%~D
1
20
19
18
17
16
15
14
13
12
470K_0402_5%_ERTJ0EV474J~D
2
GND
GND
GND
GND
GND
GND
GND
GND
GND
PH4
11
2
GND
10
1
GND
2
PC144
1U_0603_25V6-K~D
GND
PC146
0.1U_0603_25V7K~D
2
1
2
VCC
GND
3210_PH2
PR142
2.2_1206_1%~D
SW
AGND
2
21
1
PR141
165K_0402_1%~D
2
1
PC142
1500P_0402_7K~D
PC143
20P_0402_50V8
1
2
2
1
22
PR152
0_0603_5%~D
2
PR158
47.5K_0402_1%
2
1
1
+5V_ALW
26
1
SYNC
25
1
SW
2
N/C
24
1
SW
PL13
0.3UH_HCB1050-301L1-F_25A_20%~D
1
2
23
SW
PG
2
1
3
3210_CSCOMP
E
PC234
0.1U_0603_25V7K~D
1 1
2
PD18
RB751V-40_SOD323-2~D
7
GNDA_VCORE
+CPU_PWR_SRC
DELL CONFIDENTIAL/PROPRIETARY
GNDA_VCORE
A
A
Compal Electronics, Inc.
Title
2
+VCC_CORE
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
PAD-OPEN1x1m
GNDA_VCORE
8
F
4
30
29
28
27
9
8
PU8
PR137
0_0402_5%~D
1
23210_PWM2 6
PWM
A3210_PWM2
EN
IN
IN
IN
IN
IN
BST
PR133
1K_0402_1%~D
1 3210_CS_PH2
PU9
PR155
30.1K_0402_1%~D
2
1
@
+VCC_CORE
PR274
10_0402_1%~D
PR253
0_0402_5%~D
PC133
10U_1206_25VAK~D
PR128
0_0402_5%~D
1
2
VCCSENSE
PR154
80.6K_0402_1%~D
2
1
@
PC132
2200P_0402_50V7K~D
2
1
PQ29
RHU002N06_SOT323
PR134
1K_0402_1%~D
2
1 3210_CS_PH3
PC153
1000P_0402_50V7K~D
+
2
PL12
0.3UH_HCB1050-301L1-F_25A_20%~D
1
2
3210_PH1
@
PC147
2200P_0402_50V7K~D
2
1
S
2
G
GNDA_VCORE
B
2
1
G
PR124
2.2_1206_1%~D
2
20
19
18
17
16
15
14
13
12
8
ADP3210JCPZ-RL_QFN40_6X6~D
PC145
1U_0402_6.3V6K~D
+
PR150
1
+1.05V_RUN_VTT
PR131
1K_0402_1%~D
2
1 3210_CS_PH1
PR143
475K_0402_1%~D
1
2
PC120
2200P_0402_50V7K~D
2
1
1
11
2
GND
1
GND
GND
10
PC128
1U_0603_25V6-K~D
GND
2
2
VCC
PD17
RB751V-40_SOD323-2~D
SW
AGND
+5V_ALW
26
1
SYNC
25
PC131
0.1U_0603_25V7K~D
2
1
1
H_PROCHOT#_R
DCM#
3210_OD#
A3210_PWM1
A3210_PWM2
A3210_PWM3
2
2
1
4
30
29
28
27
9
8
SW
PD19
RB751V-40_SOD323-2~D
3210_CSCOMP
N/C
24
GND
GND
GND
GND
GND
GND
GND
GND
GND
1
2
1
1
PC130
0.01U_0402_25V7K~D
H_PROCHOT#
D
3
30
29
28
27
26
25
24
23
22
21
+
+CPU_PWR_SRC
68_0402_5%~D
2
VSSSENSE
@ PJP25
1
+PWR_SRC
PC233
0.1U_0603_25V7K~D
1
2
100K_0603_5%_ERTJ1VV104J~D
5
1
GNDA_VCORE
SW
GNDA_VCORE
PR147
0_0402_5%~D
3210_CSREF
1
2
12
PC119
0.1U_0603_25V7K~D
2
1
1
2
1
2
2
2
PSI#
40
39
38
37
36
35
34
33
32
31
VID0
VID1
VID2
VID3
VID4
VID5
VID6
PSI#
NC
VCC
11
12
13
14
15
16
17
18
19
20
1
2
PR259
1K_0402_1%~D
1
2
PR260
1K_0402_1%~D
1
2
PR140
0_0402_5%~D
+1.05V_RUN_VTT
12
2
PH2
3210_CSCOMP
H_DPRSLPVR
12
GNDA_VCORE
1
23
SW
PG
Place PH2 close to hot spot
MP8698DU-LF-Z_QFN18_5X5~D
C
GNDA_VCORE
PC129
1U_0603_10V6K~D
1
@
PR123
7.32K_0402_1%~D
1
2
TTSNS
VRTT
DCM#
OD#
PWM1
PWM2
PWM3
SW1
SW2
SW3
PR136
5.49K_0402_1%
2
1
GNDA_VCORE
2
2
2
@ PR139
27.4_0402_1%~D
1
@ PR138
27.4_0402_1%~D
22
21
EN
PWRGD
IMON
CLKEN#
FBRTN
FB
COMP
NC
TRDET#
DPRSLP
AGND
1
3
1
1
1
1
1
1
1
PR146
0_0402_5%~D
2
PR145
0_0402_5%~D
41
1
DCM# 5
1K_0402_1%~D
ILIM
IREF
RPM
RT
RAMP
LLINE
CSREF
CSSUM
CSCOMP
GND
1
PR125
2
1
2
1
1
1
2
PC140
150P_0402_50V8F~D
2
1
PR135
39.2K_0402_1%~D
2
VCC_SEN
VSS_SEN
D
PC137
27P_0402_50V8J~D
2
1
1
PC136
150P_0402_50V8F~D
VCC_SEN_C
PR132
1.65K_0402_1%~D
PU10
1
2
3
4
5
6
7
8
9
10
CLKEN
PC139
1000P_0402_50V7K~D
3.3K_0402_1%~D
PR127
0_0402_5%~D
1
2
IMVP_PWRGD
PC135
0.1U_0402_10V7K~D
PR126
36.5K_0402_1%~D
2
1
1
1
2
2
2
PR129
6.49K_0402_1%~D
MP8698DU-LF-Z_QFN18_5X5~D
PR246
2
+3.3V_RUN
8,37
7
PR121
10_0402_1%~D
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
CLKEN
+1.05V_RUN_VTT
IMVP_IMON
12
EN
IN
IN
IN
IN
IN
BST
2
2
2
2
1
1
1
1
1
2
2
+5V_ALW
PU7
PR122
0_0402_5%~D
1
23210_PWM1 6
PWM
A3210_PWM1
H_PSI#
2
PR117
0_0402_5%~D
1
2
PR120
0_0603_5%~D
2
1
PR257
1
1
2
2
2
2
2
2
2
1
PR119
2
3.3K_0402_1%~D
PR267
PR266
PR265
PR264
PR263
PR262
PR261
PR251
0_0402_5%~D
1
2
CLK_EN#
E
IMVP_VR_ON
0_0402_5%~D
F
1
@ PJP24
1
@ PR153
1K_0402_1%~D
2
1 +1.05V_RUN_VTT
PSI#
GNDA_VCORE
H
+CPU_PWR_SRC
1K_0402_1%~D
1K_0402_1%~D
1K_0402_1%~D
1K_0402_1%~D
1K_0402_1%~D
1K_0402_1%~D
+3.3V_RUN
12,23
1
@ PL18
FBMJ4516HS720NT_1806~D
1
2
PR112
G
PR111
@
PR116
@
PR115
2
0_0402_5%~D
PR114
1
PR118
PR113
@
37 IMVP_VR_ON
6
2
2
1
1
1
2
1
2
2
1K_0402_1%~D
1K_0402_1%~D
2
PR109
VID0
PR108
12
3
I_TDC=33.6A
Iccmax= 48A
OCP=57.6A
Load line : -1.9 mV/A
@
@
1K_0402_1%~D
VID1
4
PAD-OPEN 4x4m
PR110
12
1K_0402_1%~D
VID2
@
PR107
VID3
12
1K_0402_1%~D
12
PR106
VID4
1K_0402_1%~D
VID5
12
@
PR105
12
1K_0402_1%~D
VID6
1K_0402_1%~D
12
PR104
H
PR103
1
+1.05V_RUN_VTT
2
7
2
8
7
6
5
4
3
Size
Document Number
Date:
Monday, July 13, 2009
Rev
0.1
LA-5691P
2
47
Sheet
1
of
51
5
4
3
2
1
PD20
2
1
3
+SDC_IN
PDS5100H-13_POWERDI5-3~D
+PWR_SRC
PR161
0.01_1206_1%~D
CHAGER_SRC
S
D
0_0402_5%~D
2
G
PQ19
S
NTR4502PT1G_SOT23-3~D
@
PC160
10U_1206_25V6M~D
2
1
PQ18
NTR4502PT1G_SOT23-3~D
PC159
10U_1206_25V6M~D
2
1
D
2
G
PC158
0.1U_0603_25V7K~D
2
1
1
@
0_0402_5%~D
2
2
PC157
2200P_0402_50V7K~D
2
1
2
PAD-OPEN 4x4m
PC155
0.1U_0603_25V7K~D
2
1
1
1
CSS_GC
1
2
1
50 DC_BLOCK_GC
50
1
3
PC156
47P_0402_50V8J~D
2
1
4
2
PR163
PR162
D
4
3
1
+DC_IN_SS
PC154
0.1U_0603_25V7K~D
PJP26
PQ17
SI4835DDY-T1-E3_SO8~D
8
1
7
2
6
3
5
D
3
PQ20A
NTGD4161PT1G_TSOP6~D
D
S
5
6
36
DOCK_DCIN_IS-
36
1
G
DOCK_DCIN_IS+
100K_0402_1%~D
PR167
100K_0402_1%~D
2
1
2
PC162
0.1U_0603_25V7K~D
4
3
PR166
1
PR165
2
1
0_0402_5%~D
PR168
100K_0402_1%~D
1
2
DK_CSS_GC
Maximum charging current is 4.8A
BOOT 1
DCIN_A
25
CSSP
VDDP
24
VREF
ICOUT
ICREF
CSOP
9
ACIN
CSON
10
EAO
VFB
BQ24765_LDO
@ PR176
33_0603_1%~D
23
1
22
@ PC173
1U_0603_10V6K~D
1
2
ACAV_IN
@ PQ21
RHU002N06_SOT323-3~D
GNDA_CHG
ACOK#
ACAV_IN
PR180
10K_0402_5%~D
@
@ PR181
10K_0402_1%~D
B
BQ24765_LDO
PR187
100K_0402_5%~D
1
2
1
2
PR186
100K_0402_5%~D
8
O
IN-
7
ACAV_IN_NB
1
2
PR191
0_0402_5%~D
37,38,50
PU12B
LM393DR_SO8~D
4
PC187
0.1U_0603_25V7K~D
IN+
2
GNDA_CHG
IN-
O
3
PU12A
LM393DR_SO8~D
1
P
IN+
PC188
1U_0603_10V6K~D
8
2
1
2
+3.3V_ALW
@
G
1
38 CHARGER_SMBCLK
6
PR195
42.2K_0402_1%~D
2
1
PBATT+
38 CHARGER_SMBDAT
GNDA_CHG
+5V_ALW
5
PC178
100P_0402_50V8J
2
1
VFB
PR196
100_0402_5%~D
1
2
PR182
1M_0402_5%~D
2
P
PC224
1U_0603_25V6-K~D
1
2
DCIN_A
1
G
0_0402_5%~D
BQ24765_REF
+3.3V_ALW
+DC_IN BQ24765_REF
2
PR185
47K_0402_1%~D
2
1
1
PR184
232K_0402_1%~D
2
1
50 +CHGR_DC_IN
4
BQ24765_REF
PC180
100P_0402_50V8J
2
1
BQ24765RUVR_QFN34_7X3P5~D
23,38,50
2
PR178
0_0402_5%~D
1
2
PC179
100P_0402_50V8J~D
2
1
PC185
0.1U_0402_10V7K~D
2
1
PC184
1U_0603_10V6K~D
2
1
PC183
0.01U_0402_25V7K~D
2
1
@
S
GNDA_CHG
PR192
@
D
2
G
1
18
2
19
BQ24765_IINP
@
PC171
1
2
20 VFB
1
SCL
VDDSMB
17
SDA
VICM
ACOK
PC172
1U_0603_10V6K~D
1
2
21
PR179
15.8K_0402_1%~D
2
1
23
PC175
2200P_0402_50V7K~D
16
PR189
10K_0402_5%~D
1
2
14
PR188
7.5K_0402_5%~D
1
2
13
CE
1
PC177
120P_0402_50VNPO~D
1
2
@
FBO
PR171
1.8K_1206_5%~D
2
1
1
DCIN_A
2
CSSN
6
AGND
2
1
BAT54HT1G_SOD323-2~D
1
2
0.1U_0603_25V7K~D
5
EAI
PC170
0.1U_0603_25V7K~D
1
2
PD21
PR174
2.2_0603_1%~D
2 BOOT_D
@
1
26
C
3
27
BOOT
PC169
10U_1206_25V6M~D
2
1
PHASE
DCIN_P
@ PR173
4.7_1206_5%~D
PC168
10U_1206_25V6M~D
2
1
DCIN_P
4
PC165
0.047U_0603_25V7K~D
2
PC167
10U_1206_25V6M~D
2
1
3
3
PR172
0_0402_5%~D
2
1
28
@ PC163
0.1U_0603_25V7K~D
2
PHASE
7
PC164
220P_0402_50V7K~D
2
1
30
31
PHASE
DCIN_P
PR194
8.45K_0402_1%~D
2
1
PC176
56P_0402_50V8~D
1
2
2
PC182
0.01U_0402_25V7K~D
2
1
PR190
4.7K_0402_5%~D
2
1
PHASE
2
12
PR183
200K_0402_5%~D
1
2
PC181
0.01U_0402_25V7K~D
2
1
32
29
11
@
33
PHASE
15
1
0.01U_0402_25V7K~D
B
PGND
8
PC174
2
@
1
+VCHGR
PR170
PL15
0.01_1206_1%~D
3.3UH_SPC-1040R-3R3 GP_7.5A_30%
1
2+VCHGR_L 4
1
+VCHGR_B
PR193
21.5K_0402_1%
2
1
BQ24765_REF
1
PR177
49.9K_0402_1%~D
2
1
PGND
34
TP
PR175
309K_0402_1%
2
+SDC_IN
PGND
35
GNDA_CHG
PU11
GNDA_CHG
PGND
PAD-OPEN1x1m
CSSN_1
CSSP_1
C
2
PC166
0.1U_0603_25V7K~D
2
1
PR169
0_0603_5%~D
2
1
PJP27
1
@
1
50
2
2
D
1
2
G
PC161
0.1U_0603_25V7K~D
1
2
PQ20B
NTGD4161PT1G_TSOP6~D
S
@ PR164
10K_0402_5%~D
2
1
+5V_ALW
GNDA_CHG
A
A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
2
Charger
Size
Document Number
Date:
Monday, July 13, 2009
Rev
0.1
LA-5691P
Sheet
1
48
of
51
5
4
D
12
3
PR258
0_0402_5%~D
2
1
GFX_VR_ON
12 GFX_DPRSLPVR
GFX_CLK_EN#
2
PR197
0_0402_5%~D
2
1
GFX_VID6
12
PR198
0_0402_5%~D
2
1
GFX_VID5
12
PR199
0_0402_5%~D
2
1
GFX_VID4
12
PR200
0_0402_5%~D
2
1
GFX_VID3
12
PR201
0_0402_5%~D
2
1
GFX_VID2
12
PR202
0_0402_5%~D
2
1
GFX_VID1
12
PR203
0_0402_5%~D
2
1
GFX_VID0
12
1
GPU_CORE
Thermal Design Current:12A
Peak current: 22A
OCP min: 26.4A
D
+3.3V_ALW
@ PJP28
@ PJP30
A
+VCC_GFXCORE
1
2
PC191
0.1U_0603_25V7K~D
1
2
PC190
10U_1206_25VAK~D
@ PR211
2.2_1206_1%~D
+
2
1
+
2
PC198
2200P_0402_50V7K~D
2
1
@ PC195
1000P_0603_50V7K~D
+VCC_GFXCOREP
1
PC196
330U_D2_2VM_R6M~D
1 2
1
3
2
PQ24
BSC882N03MS G 1N PG-TDSON-8
5
3
2
1
PQ23
BSC882N03MS G 1N PG-TDSON-8
@
4
2
PC200
330U_D2_2VM_R6M~D
3
2
1
5
3
2
1
4
1
PC201
0.1U_0402_10V7K~D
2
1
1
+5V_ALW
C
12
B
1
@ PR228
442_0402_1%~D
2 1
2
1
GFX_ISUM+
1
2
PR224
2.61K_0402_1%~D
2
PH3
10K_0603_1%_ERTJ1VG103FA~D
1
PR225
11K_0402_1%~D
2
1
@
PR222
3.65K_0402_1%~D
1
2
GFX_ISUM
PC214
0.1U_0402_16V7K~D
2
2
@ PC215
180P_0402_50V8J~D
PAD-OPEN 43X118
PC189
10U_1206_25VAK~D
2
5
1
2
1
1
2
PAD-OPEN 43X118
+GPU_PWR_SRC
PR219
1_0402_5%~D
1
2
PC192
2200P_0402_50V7K~D
12
VSS_AXG_SENSE
PR217
0_0402_5%~D
1
2
1
GNDA_VGFX
PR227
2.1K_0402_1%~D
2
1
1
GFX_IMON
+PWR_SRC
2
PC209
0.22U_0603_25V7K~D
PC212
0.047U_0603_16V7K~D
2
1
PC213
0.01U_0402_25V7K~D
2
1
2
@ PJP29
+VCC_GFXCOREP
2
BOOT
IMON
14
VIN
GNDA_VGFX
1
PC193
1U_0603_10V6K~D
VID2
VID3
VID4
VID5
1
PC206
330P_0402_50V7K~D
1
GNDA_VGFX
PC207
1000P_0402_50V7K~D
1
2
2
GNDA_VGFX
PR221
10_0402_5%~D
1
2
PC208
1U_0603_10V6K~D
PR220
0_0402_5%~D
1
2
2
12 VSS_AXG_SENSE
PR223
82.5_0402_1%~D
12 VCC_AXG_SENSE
PC205
330P_0402_50V7K~D
1
2
PR218
0_0402_5%~D
1
2
1
+VCC_GFXCOREP
PR216
10_0402_5%~D
1
2
PQ22
SIR472DP-T1-GE3 1N POWERPAK SO8
2
22
23
24
25
26
28
27
VID6
VR_ON
GNDA_VGFX
2
B
4
PR214
PC203
2.2_0603_1%~D 0.22U_0603_10V7K~D
2
1
1
2
2
PR213
8.66K_0402_1%~D
2
1
GFX_LGATE
PC204
0.22U_0402_10V6K~D
2
PR212
825K_0402_1%~D
ISL62881HRZ-T_QFN28_4X4~D
2
PAD-OPEN 43X118
PL16
0.56UH_MPC1040LR56_23A_20%~D
15
PC210
0.15U_0402_10V6K~D
PR226
2
1
0_0402_5%~D
2
1
PC211
0.1U_0603_25V7K~D
2
1
1
1
GFX_PHASE
16
PR215
18.7K_0402_1%~D
2
PC202
100P_0402_50V8J~D
PR210
17.8K_0402_1%~D
13
PC199
15P_0402_50V8J~D
1
PC197
100P_0402_50V8J~D
2
1
2
1
12
GNDA_VGFX
2
UGATE
VDD
1
PHASE
VSEN
29
@
GNDA_VGFX
17
VSSP
FB
4
18
LGATE
COMP
AGND
7
VW
GFX_UGATE
19
VCCP
11
6
RBIAS
ISUM+
5
20
VID0
10
4
21
VID1
PGOOD
ISUM
3
CLK_EN#
RTN
GNDA_VGFX
2
DPRSLPVR
2
PU13
9
1
2
PR207
47K_0402_1%~D
1
2
PR209
8.06K_0402_1%~D
2
1
C
PR206
1.91K_0402_1%~D
PR252
0_0402_5%~D
1
2 1
PC194
1000P_0402_50V7K~D
PR208
8.06K_0402_1%~D
2
1
2
PR205
10K_0402_5%~D
8
GFX_PGOOD
PR204
0_0603_5%~D
1
1
1
1
+GPU_PWR_SRC
PC225
10U_1206_25VAK~D
2
1
+5V_ALW
A
GNDA_VGFX
@ PJP31
1
2
PAD-OPEN 43X118
DELL CONFIDENTIAL/PROPRIETARY
@
2
PJP32
PAD-OPEN1x1m
GNDA_VGFX
Compal Electronics, Inc.
1
Title
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
+VCC_GFXCORE
Size
Document Number
Date:
Monday, July 13, 2009
Rev
0.1
LA-5691P
Sheet
49
of
51
5
4
3
2
1
PD22
B540C-13-F_SMC2~D
2
1
8
7
6
5
+DOCK_PWR_BAR
D
D
D
D
1
2
3
4
S
S
S
G
1
1
D
FDS6679AZ_SO8~D
2
2
PR229
330K_0402_5%~D
PC216
0.47U_0805_25V7K~D
PQ25
D
PR230
2
STSTART_DCBLOCK_GC
1
0_0402_5%~D
PD23
2
1
PR231
330K_0402_5%~D
3
PDS5100H-13_POWERDI5-3~D
48
2CD3301_DCIN
47_0805_5%~D
B
+SDC_IN
1
PR241
ACAVDK_SRC
2
0_0402_5%~D
ERC1
2
0_0402_5%~D
CD3301_SDC_IN
48 DC_BLOCK_GC
23,38,48 ACAV_IN
1
PR244
1
2
3
4
5
6
7
ACAVIN 8
P33ALW2 9
2
0_0402_5%~D
PD24
+3.3V_ALW2
2
37
1
DC_IN
SS_GC
ERC1
ACAVDK_SRC
GND
SDC_IN
DC_BLK_GC
ACAV_IN
P33ALW2
TP
2
48
CSS_GC
48
DK_CSS_GC
PBATT_OFF
27
26
25
24
23
22
21
20
19
DK_AC_OFF
3301_ACAV_IN_NB
1
PR242
2
0_0402_5%~D
1
PR243
BLKNG_MOSFET_GC
DK_AC_OFF_EN
SL_BAT_PRES#
1
PR247
GPIO Input from NB
Embedded Controller
37
DOCK_AC_OFF 36,37
2
0_0402_5%~D
2
0_0402_5%~D
ACAV_IN_NB
2
0_0402_5%~D
B
37,38,48
DOCK_AC_OFF_EC 37
SLICE_BAT_PRES# 36,37,42
+NBDOCK_DC_IN_SS
CD3301RHHR_QFN36_6X6~D
P33ALW
1
PR248
2
+3.3V_ALW
0_0402_5%~D
ERC3
PC222
0.047U_0603_25V7K~D
2
1
1
A
PC221
0.1U_0603_25V7K~D
2
1
PR268
180_0402_1%~D
+5V_ALW
1 PR240 2
0_0402_5%~D
1
PR245
10
11
12
13
14
15
16
17
18
RB751S40T1_SOD523-2~D
PR236
1
2
0_0402_5%~D
CD_PBATT_OFF 1 PR238 2
0_0402_5%~D
P50ALW
PBATT_OFF
DK_AC_OFF_EN
ACAV_IN_NB
GND
DK_AC_OFF_EN
SL_BAT_PRES#
BLKNG_MOSFET_GC
NBDK_DCINSS
ERC2
1
PR239
2
36
35
34
33
32
31
30
29
28
42 SOFT_START_GC
36 ACAV_DOCK_SRC#
P50ALW
NC
CHARGERVR_DCIN
DC_IN_SS
DK_PWRBAR
GND
NC
BLK_MOSFET_GC
DSCHRG_MOSFET_GC
PBatt+
PU14
CSS_GC
DK_CSS_GC
ERC3
ERC2
GND
PWR_SRC
SS_DCBLK_GC
EN_DK_PWRBAR
P33ALW
PC236
0.1U_0603_50V4Z~D
PC223
0.1U_0402_25V4Z~D
2
1
100K_0402_5%~D
2
2
+3.3V_ALW2
+CHGR_DC_IN
1
1
PR237
+DC_IN
PR281
1
C
PR235
0_0402_5%~D
DSCHRG_MOSFET_GC
PR280
0_0402_5%~D
1
2
+DC_IN_SS
+PWR_SRC
1
PR279
0_0402_5%~D
1
2
+DOCK_PWR_BAR
1
2
3
4
PC218
0.1U_0603_25V7K~D
2
1
1
2
0_0402_5%~D
S
S
S
G
FDS6679AZ_SO8~D
2
1
BLK_MOSFET_GC
2
2
1
D
D
D
D
PC220
1U_0603_25V6-K~D
1
0_0402_5%~D
PR234
PR233
1K_1206_5%~D
4
2
C
PQ28
8
7
6
5
PBATT_IN_SS
1
PR232
2
PC217
2200P_0402_50V7K~D
2
1
PQ27
FDS6679AZ_SO8~D
1 S
D 8
2 S
D 7
3 S
D 6
4 G
D 5
PC219
1U_0603_25V6-K~D
+VCHGR
1
PBATT+
PQ26
SI4835DDY-T1-E3_SO8~D
8
1
7
2
6
3
5
@
EN_DK_PWRBAR 1
PR249
2
0_0402_5%~D
EN_DOCK_PWR_BAR 37
STSTART_DCBLOCK_GC
A
3301_PWRSRC
1
PR250
2
0_0402_5%~D
+PWR_SRC
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Selector
Size
Document Number
Date:
Monday, July 13, 2009
Rev
0.1
LA-5691P
Sheet
1
50
of
51
5
4
3
CPU
15
16
17
D
PM_DRAM_PWRGD
2
GFX_VR_ON
ISL62881
SM_DRAMPWROK
1
+1.05V_RUN_VTT
+VCC_GFXCORE
PCH
VCCDMI
VAXG
V_CPU_IO
+1.05V_RUN_VTT
H_CPUPWRGD
VCCPWRGD_0/1
PCH_PLTRST#_R
RSTIN#
SLP_S5#
VCCME
+VCC_CORE
SLP_S4#
+1.05V_RUN
VCC
SLP_S3#
VCCIO
SLP_M#
+1.5V_MEM
VDDQ
+3.3V_M
H_VTTPWRGD
VTTPWRGOOD
12
2BAT
+15V_ALW
+3.3V_RUN
SN0608098
+5V_ALW
+3.3V_ALW
ALW_PWRGD_3V_5V
7
+5V_ALW
C
DDR_ON
BATTERY
1.5V_SUS_PWRGD
PCH_RSMRST#
M_ON
SIO_SLP_LAN#
10
PCH_ALW_ON
VTT
VDDQ
DDR
RT9026
SI3456BD
B
14
5
RUN_ON
CTRL_1P0
SIO_SLP_S3#
DCP69
6
SIO 5028
14
PM_DRAM_PWRGD
15
16
H_CPUPWRGD
+1.0V_LAN
5
+1.5V_MEM
SIO_SLP_M#
SIS406DN
SIO_SLP_LAN#
+1.5V_RUN
+1.05V_RUN_VTT
3
+3.3V_ALW_PCH
+5V_RUN
FDS8878
SIO_SLP_S4#
+3.3V_LAN
+1.05V_RUN
0.75V_DDR_VTT_ON
SI3456BD
+3.3V_SUS
SIO_SLP_S5#
9
+5V_ALW
12
+1.05V_RUN_VTT
NCP5222MNR2G
+1.05V_M
1.05V_M_PWRGD
B
+3.3V_ALW
CPU_VTT_ON
M_ON
10
RESET_OUT#
11
+3.3V_ALW
SUS_ON
PM_MEPWROK
C
SI4160DY
RESET_OUT#
SIO_SLP_LAN#
+5V_ALW
+3.3V_M
SI3456BD
DRAMPWROK
D
5
SIO_SLP_M#
DDR_ON
REGCTL_PNP10
82577
+3.3V_ALW
PM_MEPWROK
+3.3V_ALW
+3.3V_LAN
+3.3V_ALW
PLTRST#
PROCPWRGD
+0.75V_DDR_VTT
+1.5V_MEM
VT356FCX
4
PCH_PLTRST#
17
ADAPTER
ALWON
SIO_SLP_S3#
PWROK
BAT54
1AC
SIO_SLP_S4#
MEPWROK
VCC3_3
2AC
EC 5045
SLP_LAN#
4
SIO_SLP_S5#
+3.3V_ALW_PCH
VCCSUS
Power Button
1BAT
VCCME3_3
PCH_RSMRST#
RSMRST#
+1.05V_M
VTT
SIO_PWRBTN#
PWRBTN#
6
IMVP_VR_ON
+3.3V_ALW
8
+3.3V_WLAN
+3.3V_RUN
MAX15050
+1.8V_RUN
1.8V_RUN_PWRGD
1.8VRUNPWROK
H_VTTPWRGD
SI4160DY
+3.3V_ALW
ADP3210
+VCC_CORE
13
IMVP_PWRGD
AUX_EN_WOWL
SI3456BD
+3.3V_RUN
11
BC BUS
A
RUNPWROK
A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Title
Power Sequence
Size
4
3
2
Rev
0.1
LA-5691P
Date:
5
Document Number
Monday, July 13, 2009
Sheet
1
51
of
51