Quantum Optics Group
ETH Zurich
A low-noise and scalable FPGA-based analog
signal generator for quantum gas experiments.
D. Pahl*, L. Pahl*, E. Mustafa*, Z. Liu†, P. Fabritius†, J. Mohan†, P. Clements†, A. Akin†, T. Esslinger†
Department of Information Technology and Electrical Engineering, ETH Zurich, Switzerland
†
Department of Physics, ETH Zurich, Switzerland
*
1 Introduction
• Each contains all
metadata for its channel
State-of-the-art quantum gas experiments rely on the precise and dynamical
control of experimental parameters like magnetic fields and laser powers to
probe quantum systems. Achieving high fidelity for such tasks imposes strict
requirements on the stability of surrounding electronics. To address these
challenges, we propose a scalable analog signal generator based on a
field-programmable gate array (FPGA) development board and a custom PCB
hosting a digital-to-analog converter (DAC) with 20-bit precision at 1MSPS.
• Each event is specified by
the number of samples
( ) and • This pair of data is used by
module to control
data flow of corresponding
sample data from DDR3 belonging to that event
2 System Overview
• PC transmits user defined
waveforms for each channel
via TCP/IP connection
• FPGA write waveforms to
on-board RAM, parses the
data structure, and streams
samples as SPI signals at runtime
• Breakout boards distribute
signals over LVDS Ethernet
cables to DAC boards
• DAC chips convert digital
signals to analog signals and
drive devices
Figure 1: System overview
Event sequence for
multiple channels
• Arbitrary waveforms
can be generated
• Each channel is subdivided into events that
are defined by sampling
frequency and signal
length specified in metadata
• Events for all channels
are concatenated into
data packets for transmission to FPGA
Event 1
Event 2
Event 3
Event 4
• indicates necessary
repetitions for each sample
to scale sampling frequency
Figure 4: Internal structure of
and DDR3
sample readout starts
24 clock cycles (4 bit config + 20 bit sample)
• Initially, all modules are triggered simultaSCLK
neously to read 20 bits
from FIFO and prepend
MOSI
4-bit DAC control header
• low opens sample
readout window, where
sample is transmitted bitwise over 24 clock cycles,
high triggers DAC to
update analog output
read MSB
0
1
read MSB-1
0
read LSB
1
1
SYNC
min SYNC high: 48ns
ACLK
Load one word + hold time = 1µs
1 MHz sample freq.
Figure 5: Timing diagram
Event 5
• 54 MHz FPGA clock () is converted into 27 MHz SPI clock ()
CH 1
Event 1
Event 7
CH 2
Event 1
CH 3
Event 1
Variation of sampling
frequency at arbitrary
point in the waveform
Asynchronous switching to
next waveform across channels,
while maintinaing synchronous
sample output
Signals have 20-bit precision and
up to 1 MSPS sampling frequnecy
• Using counters, module tracks of Samples for each event
• External triggers and shared clock improve synchronization over multiple
channels and FPGAs
4 Hardware
Non-Isolated Region
CH 4
for each sample and Number
Isolated Region
Power
Regualtion
Figure 2: Example sequence of events
20-bit DAC
Connector
time
3 FPGA
Figure 3: FPGA
Design overview
ETH Port
LVDS
Receiver
Power Management and
Isolation Unit
Power Regualtion
Voltage Reference
Figure 6: The DAC board
• LVDS carried by shielded, twisted pairs in Ethernet cables are noise resistant
• Isolation of grounds on PCBs remove ground loops
• Credit card sized PCB requires no or very short wires to connect to devices
5 Conclusion
• Metadata is written to , waveform sample data is written to DDR3
• DMA modules read DDR3 sample data for their channels, FIFOs ensure interruption-free data streaming
• modules read metadata from to independently control
the SPI modules
We designed an analog signal generator platform which will be able to control
a quantum gas experiment with high precision at high speeds. The FPGA-based digital hardware is verified in real-time, and the DAC cards will be verified
together with the digital system when they are manufactured. In the future,
we plan to extend the system to have more analog output channels at lower
sampling rates and high precision data acquisition.