UNIT-V
PART-II
Combinational & Sequential
Circuits using TTL 74XX ICs &
CMOS 40XX ICs
By
K. Sai Krishna
Assistant Professor
Classification of ICs
CMOS Series
 Two categories of CMOS in terms of DC supply voltage are 5V
CMOS and 3.3V CMOS.
 74 and 54 series
 Basic CMOS series for 5V category
 74HC and 74HCT  High-speed CMOS (T – TTL Compatibility)
 74AC and 74ACT  Advanced CMOS
 74AHC and 74AHCT  Advanced High-speed CMOS.
 Basic CMOS series for 3.3V category
 74LV, 74LVC  Low-voltage CMOS
 74ALVC Advanced Low-voltage CMOS
 Basic BiCMOS series
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74BCT  BiCMOS
74ABT  Advacned BiCMOS
74LVT  Low-voltage BiCMOS
74ALB  Advacned Low-voltage BiCMOS
TTL Series
 All TTL logic gates operate from 5V dc supply.
 74 and 54 series
 Basic TTL series
74  Standard TTL
 74S  Schottky TTL
 74AS  Advanced Schottky TTL
 74LS  Low-power Schottky TTL
 74ALS  Advanced Low-power Schottky TTL
 74F  Fast TTL.
Combinational Circuits using
TTL 74XX ICs
COMBINATIONAL CIRCUITS USING TTL
74XX ICS
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Study of logic gates using 74XX ICs,
Four-bit parallel adder(IC7483),
Comparator(IC 7485),
Decoder(IC 74138, IC 74154),
BCD-to-7-segment decoder(IC 7447),
Encoder(IC 74147),
Multiplexer(IC74151),
Demultiplexer (IC 74154).
Study of Logic gates
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NOT Gate
AND Gate
OR Gate
NAND Gate
NOR Gate
EX-OR Gate
EX-NOR Gate
List of Ic’s used for Logic Gates
NOT (Inverter) Gate
• The Inverter performs the operation called
inversion (or) complementation.
• Inverter changes one logic level to opposite
level.
• In terms of bits, it changes a 1 to 0 and a 0 to 1.
• Negation indicator is a “bubble” (o), indicates Inversion or
complementation when it appears on the input or output of any
logic element.
• Polarity (or) Level indicator is a “triangle” ,indicates inversion
when it appears on the input or output of a logic element.
• When appearing on the input, means that a Low level is the active
or asserted input state.
• When appearing on the output, means that a Low level is the
active or asserted output state.
Pin Diagram-7404HEX Inverter
Logic Diagram
Application
• Circuit for producing 1’s complement of an 8bit binary number.
• Bits of the binary number are applied to the
inverter inputs and 1’s complement of the
number appears on the outputs.
AND Gate
• It is one of the basic gates that can be
combined to form any logic function.
• It has two or more inputs and performs
“logical multiplication”.
Pin Diagram
Logic Diagram
1) 7408-Quad 2-input AND gate
2) 7411-Triple 3-input AND gate
3) 7421-Dual 4-input AND gate
OR Gate
• It can have two or more inputs and performs known as logical
addition.
Pin Diagram
7432-Quad 2-input OR gate
Logic Diagram
NAND Gate
Pin Diagram
Logic Diagram
1) 7400-Quad 2-input NAND gate
2) 7410-Triple 3-input NAND gate
3) 7420-Dual 4-input NAND gate
NOR gate
Pin Diagram
1) 7402-Quad 2-input NOR gate
2) 7427-Triple 3-input NOR gate
Logic Diagram
EX-OR gate
Pin Diagram
7486/74386-Quad EX-OR gate
Logic Diagram
EX-NOR gate
Four-bit Parallel Adder
IC 7483
• 1-bit Full adder
Logic Symbol
Truth Table
Logic Diagram
• Four-bit parallel adder
Block diagram
Logic symbol
• Truth table
• IC’s used are:
1) 74LS83A
LS:Low power Schottky TTL
2) 74LS283
Pin Diagram
Logic Diagram
• Adder Expansion
4-bit Parallel adder can be expanded to handle the addition of two 8-bit
numbers by using two 4-bit adders.
Carry input of Low-order adder(co) is connected to ground because there is
no carry into least significant bit position.
Carry output of Low-order adder is connected to carry input of high-order
adder.
Example
• Show how two 74LS83A adders can be connected to form an
8-bit parallel adder. Show output bits for the following 8-bit
input numbers:
A8A7A6A5A4A3A2A1=10111001, B8B7B6B5B4B3B2B1=10011110
Subtractor
Difference  A  B  A  B  1
•This operation can be done in a parallel n-Bit
FA by inverting (B1 to Bn) and connecting CIN
at the LSB Stage to +5 V.
•The circuit can be modified to allow either
the ADD or SUBTRACT operation to be
performed.
Subtractor
Parallel Binary Adder/Subtractor
Parallel Binary Adder/Subtractor
Arithmetic and logic Unit
• ALU is a combinational circuit that can
perform any of a number of different
arithmetic and logic operations on a pair of bbit operand.
• The operation to be performed is specified by a
set of function-select input.
74181 4-bit ALU
Functions performed by 74381
&74382 4-bit ALUs
Comparators
Equality
Basic Comparator operation
Inequality
Comparator (IC 7485)
• Basic function:
Compare the magnitudes of two binary numbers to determine relationship of those
quantities.
74HC85 is a 4-bit comparator
Pin diagram
Logic diagram
Cascading inputs: These inputs allow several comparators to be cascaded for
comparison of any number of bits greater than four.
Functional table for 74LS85
Cascading comparator
•
To expand the comparator, A<B, A=B and A>B outputs of Lower-order comparator are
connected to the corresponding cascading inputs of the next higher-order comparator.
• Condition:
Lower-order comparator A=B input=HIGH
A<B and A>B inputs=LOW
Use 74HC85 comparators to compare the magnitudes of two 8-bit numbers. Show the
comparator with proper interconnections
Expand for 16-bit comparator?
8-bit magnitude Comparator
4-bit Magnitude Comparator
74HC85
8-bit magnitude comparator using
two 74HC85s
Problems
1) The binary numbers A=1011 and B=1010 are applied to the
inputs of 74LS85. Determine the outputs.
2) The binary numbers A=11001011 and B=11010100 are applied
to 8-bit comparator. Determine the states of output pins 5,6
and 7 on each 74LS85.
Decoder(IC 74138, IC 74154)
Basic function:
To detect the presence of a specified combination of bits(code)
on its inputs and to indicate the presence of that code by a
specified output level.
It has n inputs to handle n bits and from one to 2n output lines to
indicate the presence of one or more n-bit combinations.
Applications:
1) It is used to implement Combinational circuit.
2) It is used to convert BCD to 7-segment code.
3) It is used in memories to select particular register.
DECODERS
Converts binary information from n input lines to a maximum of 2n
output lines.
74139 Dual 2-to-4 Decoder
• Two independent and identical 2-to-4 decoders
are contained in a single 74139 (MSI)
Logic Symbol
Logic Diagram
74139 Dual 2-to-4 Decoder
Truth Table
74138 3-to-8 decoder
• Commercially available MSI 3-to-8 decoder.
3-line to 8-line decoder(3 X 8)-74HC138
Pin Diagram
Logic Diagram
Truth table of 74138 decoder
4-line to 16-line decoder(4 X 16)-74HC154
Pin Diagram
Logic Diagram
Function table
Cascading Decoders-cascading 5-bit number
A4
74HC154 can handle only 4 bits.
5th bit,A4 is connected to chip
select inputs, CS1 and CS 2 of
one decoder
A4 is connected to chip select
inputs, CS1 and CS 2 of other
decoder .
BCD-to-7 segment Decoder (IC 7447)
Logic diagram of Basic 7-segment decoder Pin Diagram
= lamp test
= ripple blanking input
=blanking input/ripple
blanking output
LT
RBI
BI RBO
Pin Diagram-7447
Logic Diagram-7447
BCD to 7 segment Decoder/Driver
Encoder(IC 74147)
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It has 2n input lines and n output lines.
Logic diagram of Decimal
to BCD encoder
Truth table for Decimal
to BCD encoder
Gate level diagram of
Decimal to BCD encoder
74HC147- priority encoder
• It is also called as 10-line-to-4-line encoder.
• 74HC147 is a priority encoder with active-low inputs (0) for decimal digits 1
to 9 and active-low BCD outputs.
Pin Diagram-74147
Logic Diagram-74147
Truth table-74147
Decimal to BCD Encoder
(74147)
Code Converters
• BCD to Binary Conversion
• Binary to Gray and Gray to binary
Note: Refer Text book
Multiplexer
• A digital multiplexer is a combinational circuit
that selects binary information from one of
many input lines and directs it to single output
line.
• The selection of particular line is controlled by
a set of selection lines.
• Has 2n input lines, n selection lines whose bit
combinations determine which input is
selected.
• Also called data selector.
Multiplexer(IC 74151)
• “It is a device that allows digital information from several sources to one
line”.
Logic Diagram
Waveforms
Truth table
Gate level Diagram
8 to 1 MUX-74LS151
Pin Diagram-74LS151
Logic Diagram
G
0
7
• Enable =LOW, allows the selected input data to pass through to the output.
•
G
0
7
indicates AND relationship between data select inputs and each of the data
inputs 0 through 7.
Truth table
Quad 2-input Multiplexer-IC 74HC157
• It contains 4-separate 2-input multiplexers.
• All the multiplexers share common data select line and a common Enable.
• Enable =LOW, allows selected input data to pass through to the output.
• Enable =HIGH, prevents data from going through to the output (disables the
multiplexer).
Pin Diagram
Logic Diagram
• G1=indicates AND relationship between data select input and data inputs.
• When data slect=HIGH, B inputs of the multiplexer are selected.
• When data slect=LOW, A inputs of the multiplexer are selected
Demultiplexer
• Demultiplexer
(DEMUX)
reverses
the
multiplexing function.
• It takes digital information from one line and
distributes it to a given number of output
lines.
• Also known as data distributor.
DEMUX Logic Circuit
Demultiplexer
Demultiplexer
Decoder with enable
• A decoder can be used as a multiplexer if E line is
taken as data line and A,B are taken as select lines.
• Input variable E has path to all four outputs, but the
input information is directed to only one of the
output lines, as specified by the binary value of the
two selection lines A,B.
74154 as DEMUX
• 74154
decoder can be used as a
multiplexer if input lines are used
as data-select lines.
• One of the chip select inputs
(CS1 or CS2) is used as data-input
line. Other chip select input is held
low.
1 to 16 line demultiplexer-74154
Logic Diagram
Sequential Circuits
using TTL 74XX ICs
SEQUENTIAL CIRCUITS USING TTL
74XX ICS
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Flip Flops (IC 7474, IC 7473),
Shift Registers
Universal Shift Register(IC 74194)
4- bit asynchronous binary counter(IC 7493).
UP/Down Counter
Flip Flops (IC 7474, IC 7473)
Difference between Latch and Flip-flop
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Latches are controlled by Enable signal and they are Level triggered, either positive or
negative level triggered.
Flip-flops use Pulse or Clock and it is Edge triggered.
In Latches, output state is free to change according to input values, when active level is
maintained at Enable input.
In Flip-flops, output responds to the changes in input only at positive or negative
edge of clock pulse at the clock input.
• FLIP-FLOP:
Flip-flops are synchronous bistable devices, also known as bistable
multivibrator.
Synchronous means output changes state only at a specified point on a
triggering input called Clock(CLK), which is designated as a control input.
• Types:
1.
2.
3.
4.
S-R Flip flop
J-K Flip flop
D Flip flop
T Flip flop
SR Flip-Flop
Truth Table
S
CP
R
Logic Diagram
Characteristic Equation
ExcitationTable
Logic Symbol
Characteristic Table
JK Flip-Flop
Truth Table
Logic Diagram
Characteristic Table
Characteristic Equation
ExcitationTable
Logic Symbol
T Flip-Flop
Truth Table
Logic Diagram
Characteristic Equation
ExcitationTable
Characteristic Table
D Flip-Flop
Truth Table
Logic Diagram
Characteristic Equation
ExcitationTable
Logic Symbol
Characteristic Table
Edge Triggered SR Flip-Flop
Pulse Transition Detector
Edge Triggered D Flip-Flop
Edge Triggered JK Flip-Flop
Asynchronous Preset and Clear Inputs
Dual JK Flip-Flops with clear
(7473)
Logic symbol
Pin Configuration
Truth Table
Dual JK Flip-Flops
(74HC112)
74AHC74 - Dual D Flip-Flops
Logic symbol
Pin Configuration
Truth Table
Sequential Circuit - Registers
Contents
• Register Introduction
– Simple register
– Register with parallel load
• Shift Register
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Shift Register Serial In/Serial Out
Shift Register Serial In/Parallel Out
Shift Register Parallel In/Serial Out
Shift Register Parallel In/ Parallel Out
• Two way shift register
• Random Access Memory
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SHIFT REGISTERS
• Shift registers consist of an arrangement of flipflops which are used for storage and transfer of
data.
• A Register, unlike counter has no specified
sequence of states.
• A Register is used for storing and shifting data (1s
and 0s) entered into it from an external source.
• DOES TWO FUNCTIONS
– DATA STORAGE [DONE BY FLIP-FLOPS]
– DATA MOVEMENT[LEFT, RIGHT AND DOWN]
FLIP FLOP AS A STORAGE DEVICE
DATA MOVEMENT IN SHIFT REGISTERS
CLASSIFICATION OF SHIFT REGISTERS
• SERIAL IN/SERIAL OUT SHIFT REGISTER
• SERIAL IN/ PARALLEL OUT SHIFT REGISTER
• PARALLEL IN/ SERIAL OUT SHIFT REGISTER
• PARALLEL IN/ PARALLEL OUT SHIFT REGISTER
SERIAL IN / SERIAL OUT SHIFT REGISTER
SERIAL IN /PARALLEL OUTSHIFT REGISTER
PARALLEL IN / SERIAL OUTSHIFT REGISTER
PARALLEL IN/ PARALLEL OUT SHIFT
REGISTER
8-bit Serial in/Parallel out Shift register
(74HC164)
Two gated serial inputs A & B. Serial input data
on A are shifted into and through the register
after input goes high.
8-bit parallel load shift register
4-bit parallel access shift register
Universal Shift Register(IC 74HC194)
Pin Diagram
Logic Diagram
Truth table
Sequential Circuit - Counters
Contents:
• Introduction to Counter
• Asynchronous Counter - Ripple
• Asynchronous Down Counter
• Synchronous Counter – Parallel
• Synchronous Counter Up/Down
• Designing Synchronous Counter
• Counter with Parallel Load
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Counters
• Flip-flops can be connected together to perform counting
operations, such a group of flip-flops is called as counter.
• Types:
1. Asynchronous counters
2. Synchronous counters.
• Asynchronous counter:
It is also called as Ripple counter.
In this, first flip-flop is clocked by the external clock pulse and
then each successive flip-flop is clocked by the output of
preceding flip-flop.
• Synchronous counter:
In this, clock input is connected to all of the flip-flops so that
they are clocked simultaneously.
Asynchronous counter
1) 2-bit asynchronous binary counter
2) 3-bit Asynchronous counter
3)4- bit asynchronous binary counter
(IC 7493)
Logic Diagram
CLR
A gated reset inputs, Ro(1) and R0(2).
When Ro(1) and R0(2)=HIGH, counter is reset to 0000 CLR
state
Pin Diagram
Truth table
IC 74LS93A
Sequential Circuit: Counter
Asynchronous Down Counter
• The previous example is up asynchronous counter
• Down asynchronous counter count from large to zero and
repeat
• Example: 3-bit binary down counter
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Sequential Circuit: Counter
Asynchronous Down Counter
• Example: 3-bit binary down counter (MOD 8)
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4 Bit Binary Counter IC
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Sequential Circuit: Counter
Synchronous Counter (Parallel)
• Synchronous counter: flip-flop with the same synchronous
clock signal
• We can build synchronous counter using process to design
sequential circuit
• Example: 2-bit synchronous binary counter (using T flip-flop
or JK)
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Sequential Circuit: Counter
Synchronous Counter (Parallel)
• Example: 2-bit synchronous binary counter (using T flip-flop
or JK) cont….
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Sequential Circuit: Counter
Synchronous Counter (Parallel)
• Example: 2-bit synchronous binary counter (using T flip-flop
or JK) cont….
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Sequential Circuit: Counter
Synchronous Counter (Parallel)
• Example: 2-bit synchronous binary counter (using T flip-flop
or JK) cont….
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Sequential Circuit: Counter
Synchronous Counter (Parallel)
• Example: 2-bit synchronous binary counter (using T flip-flop
or JK) cont….
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Sequential Circuit: Counter
Synchronous Counter (Parallel)
• Example: BCD Synchronous Counter
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Sequential Circuit: Counter
Synchronous Counter (Parallel)
• Example: BCD Synchronous Counter
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Sequential Circuit: Counter
Up/Down Synchronous Counter
• Up/Down Synchronous Counter: two way counter which
able to count up or down
• Up/Down control input line which determine the counter
– Up/Down = 1 (count up)
– Up/Down = 0 (count down)
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Sequential Circuit: Counter
Up/Down Synchronous Counter
• Example: 3-bit Up/Down Synchronous Counter
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Sequential Circuit: Counter
Up/Down Synchronous Counter
• Example: 3-bit Up/Down Synchronous Counter (cont)
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Sequential Circuit: Counter
Designing Synchronous Counter
• See sequential logic lecture notes
• Example: 3-bit Gray Code Counter (using JK flip-flop)
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Sequential Circuit: Counter
Designing Synchronous Counter
• 3-bit Gray Code Counter: flip-flop input
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Sequential Circuit: Counter
Designing Synchronous Counter
• 3-bit Gray Code Counter: logic diagram
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Sequential Circuit: Counter
Counter with Parallel Load
• Counter with Parallel Load able to
– Count at different condition
– Count in different sequence
– For increment/decrement function
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Sequential Circuit: Counter
Counter with Parallel Load
• Different method to get MOD-6 counter
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MOD-6 counter IC
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Sequential Circuit: Counter
Counter with Parallel Load
• Counter with 4-bit parallel
load
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Thank You