1. Draw a circuit to realize the function: F = ABC + A′ BC + AB ′ C + ABC′ (Use Boolean algebra,
do not use K-map or Q-M method)
a. Using one OR gate and three AND gates. The AND gates should have two inputs.
b. Using two OR gates and two AND gates. All of the gates should have two inputs.
2. Realize 𝑎𝑎′ 𝑏𝑏 ′ 𝑐𝑐 ′ + 𝑎𝑎′ 𝑏𝑏𝑏𝑏 + 𝑎𝑎𝑎𝑎 ′ 𝑐𝑐 + 𝑎𝑎𝑎𝑎𝑎𝑎′ using only two-input equivalence [exclusive NOR] gates.
3. Design a circuit which will perform the following function of three 4-bit numbers:
(X 3 𝑋𝑋2 𝑋𝑋1 𝑋𝑋0 + 𝑌𝑌3 𝑌𝑌2 𝑌𝑌1 𝑌𝑌0 ) − 𝑍𝑍3 𝑍𝑍2 𝑍𝑍1 𝑍𝑍0
Use eight full adders and any other type of gates. Assume that negative number are
represented in 2’s complement.
4. Given 𝐹𝐹1 = ∏ 𝑀𝑀(0, 4, 5, 6) and 𝐹𝐹2 = ∏ 𝑀𝑀(0, 4, 7), find the maxterm expansion for 𝐹𝐹1 + 𝐹𝐹2 .
State a general rule for finding the maxterm expansion of 𝐹𝐹1 + 𝐹𝐹2 , given the maxterm
expansion of 𝐹𝐹1 and 𝐹𝐹2 .
Prove your answer by using the general form of the maxterm expansion.
5. Design a circuit which will add a 4-bit binary number to a 5-bit binary number. Use five full a
dders. Assume that negative numbers are represented in 2’s complement.
6.
A logic circuit realizes the function F(a, b, c, d) = 𝑎𝑎′ 𝑏𝑏 ′ + 𝑎𝑎′ 𝑐𝑐𝑐𝑐 + 𝑎𝑎𝑐𝑐 ′ 𝑑𝑑 + 𝑎𝑎𝑏𝑏 ′ 𝑑𝑑′ . Assuming
that a = c never occurs when b = d = 1, find a simplified expression for F.
7. Find all prime implicants of the following function using Q-M method, and then find all
minimum solutions using Petrick’s method.
f(A,B,C,D) = Σm(7,12,14,15) + Σd(1,3,5,8,10,11,13)
8. Find a minimum two-level, multiple-output AND-OR gate circuit to realize these functions.
f1(a,b,c,d) = Σm(10,11,12,15) + Σd(4,8,14)
f2(a,b,c,d) = Σm(0,4,8,9) + Σd(1,10,12)
f3(a,b,c,d) = Σm(4,11,13,14,15) + Σd(5,9,12)
9. Consider the following logic function.
𝐹𝐹(𝐴𝐴, 𝐵𝐵, 𝐶𝐶, 𝐷𝐷) = � 𝑚𝑚(0, 2, 5, 6, 7, 8, 9, 12, 13, 15)
a. Find two different minimum AND-OR circuits which implement 𝐹𝐹. Identify two hazards in
each circuit. Then find an AND-OR circuit for 𝐹𝐹 that has no hazards.
b. The minimum OR-AND circuit for 𝐹𝐹 has one hazard. Identify it, and then find an OR-AND
circuit for 𝐹𝐹 that has no hazards.
10. Make a circuit which gives the absolute value of a 4-bit binary number. Use four full adders,
four multiplexers, and four inverters. Assume negative numbers are represented in 2’s
complement.