School of Information Technology and Engineering (SITE)
Course: SWE1003 – Digital Logic & Microprocessor
Experiment No: 3
Design a Half adder and verify the circuit using Multisim.
Design a Full adder and verify the circuit using Multisim.
Design a Half Subtractor and verify the circuit using Multisim.
Design a Full Subtractor and verify the circuit using Multisim.
A combinational logic circuit has four inputs ( A , B , C , and D ) and one output Z. The output is 1
iff the input has three consecutive 0’s or three consecutive 1’s. For example, if A = 1, B = 0, C = 0,
and D = 0, then Z = 1, but if A = 0, B = 1, C = 0, and D = 0, then Z = 0. Design the circuit using
NAND implementation.
6. Design 4-bit combinational circuit for a 2’s complementer, (The output generates the 2’s
complement of the input binary number). Show that the circuit can be constructed using logic
gates.
7. A bank wants to install an alarm system with movement sensors. The bank have 3 sensors
(A,B,C).To prevent false alarms produced by a single sensor activation, the alarm will be
triggered only when at least two sensors activate simultaneously.
8. The Dual-Function Gate can perform 2 different logical operations on the data inputs, A and B,
depending on the select input X.
1.
2.
3.
4.
5.
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X=0 NAND
X=1 NOR
9. Design a circuit that compares two 2-bits natural numbers A (A1,A0) and B (B1,B0) providing an
output C such that
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
C = 1, if A > B
C = 0, otherwise
10. If the circuit is Armed (A=1) and either B=1 or C=1 then Z=1, otherwise Z=0
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C : Door Open Sensor
B : Motion Sensor
A : Arm Alarm
Z : Alarm