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Input Impedance of Series Schottky Diode Detector at Low and High Power
Research · May 2015
DOI: 10.13140/RG.2.1.4530.9600
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DOI: 10.13140/RG.2.1.4530.9600
Input Impedance of Series Schottky Diode
Detector at Low and High Power
Xavier Le Polozec
Abstract—Based on the Ritz-Galerkin method, this paper
provides accurate approximation of the differential input
impedance for extremely low and extremely high RF input power.
Evolution of the input impedance with frequency and associated
cut-off frequencies are provided. Calculated results are presented
for several circuit configurations and confirmed for some of them
by ADS.
Index Terms— Schottky diode, detector model, input
impedance, sensitivity, power conversion efficiency, frequency
response
I.
INTRODUCTION
I
t has been shown [1] that the Ritz-Galerkin (R-G) averaging
method can be used to calculate the transfer function of a
diode detector with a good accuracy. This method was
improved in [2] using a Schottky-diode model that included an
accurate representation of the temperature-dependence of the
saturation current. The Ritz-Galerkin method with up to three
weighted residuals was used in [3] to calculate frequency
response and input differential impedance. The analysis
presented in this paper explores the limits reached by the input
differential impedance of a series diode detector for very high
and very low RF input power. Simplified expressions are given
and compared to each other.
Variations of the input differential impedance with
frequency and output DC voltage are plotted highlighting some
cut-off frequencies. The observed behavior reported in [3] is
analytically justified in the present paper. Variations of
amplitude components and phase of the ripple signal with the
RF input power are shown as well. The predicted results are
found to be in very good agreement with ADS [4] simulations.
II.
NONLINEAR ANALYSIS
Fig. 1(a) shows a typical model of a microwave AC-coupled
series diode detector. This circuit is divided into two parts, the
first being the input network, the nonlinear second part
including the diode and the output network. The input network
ensures that the detector’s input is effectively shorted for DC
(providing a return current path for the diode) and at all RF
frequencies except the fundamental to which it is tuned. The
diode can be biased by the external current source I0.
X. Le Polozec is with the Engagement Practice IP & Transport, Ericsson,
91348 Massy, France (e-mail: xavier.le-polozec@ericsson.com).
A. Schottky Diode Characteristic
The Schottky diode is modeled as a varistor element that
obeys the following i-v law:
i = I s exp (v / n) − 1
(1)
where  = q/(kT) is the reciprocal of the thermal voltage, q is
the electronic charge, k is the Boltzmann’s constant, T is the
physical temperature in Kelvins, and n is the diode ideality
factor assumed to be temperature independent.
The diode model includes a series resistance Rs assumed
independent of both voltage and temperature. The junction
capacitance Cj is also assumed temperature-independent but
voltage dependent according to
C j (V ) = C j 0 (1 − V / V )
−M
(2)
where V is the DC voltage across the junction, Cj0 is the
junction capacitance value when V = 0, M is the junction
grading coefficient and V is the junction potential.
In Fig. 1(a), the DC voltage across the diode is
V = −(V0 / RL + I 0 )  (Rs + Rt (1 + Rt Gt )) − V0 ,
(3)
where V0 is the DC component of the output voltage v0.
The saturation current Is at temperature T is given by [2]:
I s (T ) = I s (T0 )  (T / T0 ) exp (− (q ms / k ) (1/ T − 1/ T0 ))
2/ n
(4)
where T0 is a reference temperature and ms is the metal–
semiconductor Schottky barrier height (energy gap) at
temperature T0.
B. Differential Equation
A simple analysis of the circuit in Fig. 1(a) gives the
following equations:
id = i + C j dv / dt
(5)
id = CL dv0 / dt + v0 / RL + I 0
(6)
v = ve − Rs id − v0
(7)
Using (1), (5), (6) and (7) gives the following differential
equation:
DOI: 10.13140/RG.2.1.4530.9600


 
o

a exp  x − y − b y + y  −   − 1
(8)



 

 o o  oo o  o
+ g  x − y − b y + y  − y − y − a = 0



where x=(/n)ve is an input forcing function provided by the
input network, and y=(/n)v0 is the normalized output voltage.
The other quantities are a = (/n)RLIs , b = Rs /RL , g = Cj /CL ,
 = I0/Is , and  = (/n)RsIs.
The symbols “°” and “°°” indicate d/d and d2/dt2 respectively,
where  = t/(RLCL).
In Fig. 1(b) voltage ve consists of AC and DC components
named veAC and VeDC respectively. The DC component due to
the voltage drop across Rt and Gt , is found by analyzing the
circuit in Fig. 1(a). Finally, assuming an RF source of angular
frequency , with veAC = VeAC cos ( t), the normalized forcing
function is:
x = X cos( ) − Y0 − a
(9)
where  =  RLCL , X = (/n)VeAC , Y0 = (/n)V0 , and
 = Rt/[RL(1+RtGt)]
Y1 = 2aK 4 (1 + b ) + K 2 
sin ( )

+ gK 2 (1 + b )cos( )
Y2 = (2abK 4 + K 2 ) sin( ) + gbK 2 cos( )
(15)
(16)
X = K 2 cos( ) + Y1 (1 + b) + bY2
(17)
with K1, K3, K4 and  defined by:
K1 = II1 (K 2 )
K 3 = exp Y0 (1 + b +  ) +  ( + a )
(18)
K 4 = K1 / K 3
(20)
(
(19)
(
(
))
2aK 4 −gK 2 1 + b 1 + 2
(21)
2aK 4 1 + b 1 + 2 + K 2 1 + 2 (1 + g )
where
is the first order modified Bessel function of the first
kind and K2 respecting the following relation
 = arctan
(
(
II 0 (K 2 ) = (Y0 / a +  + 1)K 3
where
kind
))
)
(22)
is the zero order modified Bessel function of the first
The modeled complex differential input impedance Ze can
be written
(23)
Z e = Re / (1 + jReCe )
where j2=-1
The nonlinear model shown in Fig. 1(b) obeys the relation:

C
RL
n 
im =
X cos( ) − e X sin ( ) + a  .
Y0 +
RL 
Re
CL

(10)
Here, the output consists of a DC voltage V0 and a ripple
voltage whose fundamental component of which is at the RF
source frequency . Thus one may assume the solution to be
(11)
y = Y0 + Y1 cos( ) + Y2 sin ( )
where Y0, as previously defined, is the normalized DC output
voltage and Y1= (/n)V1 and Y2= (/n)V2 are the normalized
magnitudes of the output voltage ripple components V1 and V2.
C. Differential Input Impedance
Using (6), which gives the current passing through the
detector and (11), which defines the normalized approximated
output voltage, the approximated input current is given by:
n Y0 + (Y1 + Y2 ) cos( ) 
(12)
id =


RL + (Y2 − Y1 )sin ( ) + a 
Comparing (12) and (10), Re and Ce must have the values:
Re = RL X / (Y1 +Y2 )
(13)
and
(14)
Ce = (CL /X )  (Y1 − Y2 )
Where Y1, Y2 and X, which are the values satisfying the RitzGalerkin conditions with (8), are expressed as below [3]:
D. Solution
Expressions (15) to (20) are used to calculate the detector
transfer function [3] and finally the components of Ze given by
(13) and (14).
For zero RF input power the normalized output voltage
Y0(0) = (/n)V0(0) is found by solving (22) with K2 set to 0
(i.e. with II0(0) = 1).
The following procedure gives VeAC , Re , Ce and ripple
components as function of the DC output voltage V0.
-Choose V0 and calculate Y0 = Y0(0)+(/n)V0
-Hence calculate K3 from (19)
-Knowing K3 and Y0, solve (22) for K2. This can be done
using a suitable root-finding function, available in typical
mathematical software.
-Using K2, calculate K1 from (18)
-from K1 and K3, calculate K4 from (20)
-Calculate g using Cj (V) and V as defined in (2) and (3)
respectively
-Knowing K2, K4, and g, calculate  from (21)
-From K2, K4, , and g, calculate Y1 and Y2 from (15), (16)
-Knowing Y1, Y2, and , calculate X from (17)
-Finally calculate VeAC = (n/)X and Ze from (23).
The relationship between VeAC and Vg can be expressed as
an ABCD (chain) matrix for the input circuit of Fig. 1(a),
loaded by the differential impedance Ze of the nonlinear part.
Since no direct current is drawn from the loaded input circuit,
we can write:
DOI: 10.13140/RG.2.1.4530.9600
vg   A B  veAC 
i  = 
     Vg = VeAC  A
 rf  C D   0 
with
 A B 
C D  =

 
(24)
(25)
0
1  
 1

1
0
1
0 

1 R g  1
1
 1  





jC

   1
0 1  
1 

 0 1   jL + Ra   jC t  + Gt 1  Z  


 e  
The relation between Pin (the maximum available power
from the RF source into a load equal to the internal source
resistance Rg) and the source voltage Vg is
2
(26)
Vg / 2 = 4Rg Pin  Pin = Vg / 8Rg
Using (28) and (29) in (13) and (17) gives
R K cos ( )
Re  L 2
  Y2
Using (16) in (30) gives
RL
Re 



K
  2ab 4 + 1  tan( ) + gb
K2



Using (18) and (20) in (31) gives after denormalizing
1
Re 
I s II 1 (K 2 )
2
2
+ R s (C j   )
n K3K2
(30)
(31)
(32)
We point out that Pin is not the power absorbed by the
detector.
The overall detector input impedance (and consequently the
reflection coefficient) seen by the generator can be deduced
from the ABCD matrix by using
(27)
Z in = A / C − Rg ,
where A is dependent on Ze .
The above procedure is easily implemented in typical
mathematical software.
E. Simplification of Re expression
If Rs , and impedance of CL , are both very small compare to
RL and I0=0 then, the relation (28) below is verified for any
input power level as it is shown in Fig. 2 for circuit A4 taken
as example.
Y2  Y1
(28)
Fig. 3. Theoretical evolution of K2cos( ), Y1(1+b) and bY2 with the RF
input power Pin at 2 GHz, for circuit configuration A4, see Table I.
Finally, Re is equal to
Re 
R j0
II (K )
2
2 1 2 + R j 0 R s  (C j   )
K3K2
(33)
where Rj0=n/(Is)
The simplified relation (33) gives results similar to (13) as
long as the assumed hypotheses (28) and (29) are respected.
F. Re at low power
Fig. 2. Theoretical evolution of Y1 and Y2 with the RF input power Pin at 2
GHz, for circuit configuration A4, see Table I.
Under the same conditions, the relation (29) below is
verified for any input power level as it is shown in Fig. 3 for
circuit A4 taken as example.
K 2  cos( )  Y1  (1 + b) +   b  Y2
(29)
At low power X → 0; that means K2 → 0, and, according to
properties of the zero and first order modified Bessel functions
of the first kind [5]; both relations below are verified
II 1 (K 2 ) 1
(34)
→
K2
2
(35)
II 0 (K 2 ) → 1
Using (22) and (35) we can write

Y
1
1 V
→ 0 +  + 1 =  0 + I 0 + I s 
K3
a
Is  RL

Using (34) and (36), for I0=0, give:
(36)
DOI: 10.13140/RG.2.1.4530.9600
II 1 (K 2 )
1
→
K3K2
2I s
 V0

 + I s 
R
 L

Finally, at extremely low poser Re is reduced to
Rj
Re 
2
1 + R j  R s  (C j   )
(38)
Relation (46) can be simplified by observing that the
relation V0/(nK2) equals “1” for extremely high power level
as it is shown for circuit A4 taken as example in Fig. 4.
The cut off frequency of (38) is given by
1
2 .C j
1
R j 0 Rs
(46)
Re 
Where Rj is the well-known expression for the dynamic small
signal junction resistance when I0=0.
R j0
(39)
Rj =
 V0


+ 1
 RL I s

f c1 =
RL
(37)
(40)
If Rs=0 or the frequency is very low then Re reduces to Rj .
A straight basic analysis of circuit shown in Fig. 1(a) leads to
this result if, Rs is very small compare to Rj0 and can be
neglected, and CL is big enough to short-circuit RL and I0=0 .
 V0
2
2
+ R L R s (C j   )
n K2
Finally, at extremely high input power Re is reduced to
RL
(47)
Re 
2
(
)
2 + RL Rs C j  
The cut off frequency of (47) is given by
1
2
fc2 =
2 .C j RL Rs
(48)
If Rs=0 then
R
Re  L
2
(49)
This result is only available at low power level.
G. Re at high power
At extremely high power X → ∞, that means:
V0 → ∞, K2 → ∞, K1 → ∞
For extremely high z value the zero and first order modified
Bessel functions of the first kind can be approximated [5] by
the two following expressions
II 0 z. = Exp (z ) / 2 .z
(41)
II1 z. = Exp (z ) / 2 .z
(42)
Using (41) gives
II 1 (K 2 )
3/ 2
→ Exp (K 2 ) K 2
2
K2
(
)
H. Simplification of Ce expression
Using (29) in relation (14) gives
(43)
Ce  C L
Using (41) in (22) gives
V0
Y0 / a
RL I s
1
→
=
K3
Exp (K 2 ) 2K 2 Exp (K 2 ) 2K 2
(44)
Using (41) in (32) gives
(45)
Y1 −
Y2

K 2 cos ( )
(50)
Using (15) and (16) gives
Y1 −
Using (43) and (44) gives:
V0
II 1 (K 2 )
→
K3K2
K 2 RL I s
Fig. 4. Theoretical evolution of V0/(nK2) with the RF input power Pin at 2
GHz, for circuit configuration A4, see Table I. At high power level V0/(nK2)
is equal to “1”.
Y2

=
2aK 4

sin ( ) + gK 2 cos( )
Using (51) in (50) gives
 2aK 4

C e  C L 
tan( ) + g 
 K 2

Using (21) in (52) gives
(51)
(52)
DOI: 10.13140/RG.2.1.4530.9600
 2abK 4 
(53)

C e  C L g  1 −
K 2 

Relation (53) can be simplified by observing that the
relation 2abK4/K2 is much lower than “1” for all power levels
as it is shown for circuit A4 taken as example in Fig. 5 below.
Finally
(54)
Ce  C L g = C j
The theoretical variation of r can be important if the RF
input power increases as shown in Fig. 7 and cannot be
neglected as assumed in [6].
Fig. 7. Theoretical evolution of the phase of the ripple voltage with the RF
input power Pin at 2 GHz, for circuit configuration A4, see Table I.
III.
Fig. 5. Theoretical evolution of 2abK4/K2 with the RF input power Pin at 2
GHz, for circuit configuration A4, see Table I.
I. Ce at high and low power
Expression (54) indicates that Ce equals Cj defined in (2) for
any input RF power.
J. Amplitudes and phase of the ripple
The ripple components V1= Y1(n/) and V2=Y2(n/)
calculated with the R-G method are shown in Fig. 6
The phase r of the ripple signal referred to the input RF
source signal is given by the following relation.
Y 
V 
(55)
 r = arctan 2  = arctan 2 
Y
V
 1
 1
A. Test Circuits
Table I lists specific parameters for the different versions of
the circuit in Fig. 1(a), as identified in column 1. The
parameters of the modeled diode (HSMS 2860 from Avago
Technologies) are: Iso = 50nA, n = 1.08, Rs = 6 Ohms, ms =
0.69V, V = 0.65V, M = 0.5, Cjo = 0.18pF.
Parameter values used in these simulations are: operating
central frequency 2GHz, Rg,=50 , C=10 µF, CL = 10 µF,
Gt=0, Rt = 0, Lt = 79.57 pH, Ct = (79.57 pF - Cjo) = 79.39 pF,
I0=0. In keeping with the spirit of this paper, these values were
chosen to illustrate a range of different operating scenarios.
They are not intended to be a guide to actual detector design
and manufacture.
TABLE I
PARAMETERS FOR DIFFERENT VERSIONS OF THE CIRCUIT IN FIG. 1
Version
RL ()
A1
A2
A3
A4
A5
Fig. 6. Theoretical evolution of the output voltage V0 and the two ripple
components V1 and V2 with the RF input power Pin at 2 GHz, for circuit
configuration A4, see Table I.
RESULTS
2x107
2x105
2x104
2x103
2x102
B. Differential Input Impedance
Calculated variations of Re and Ce (defined in (13) and (14))
with RF input power are shown in Fig. 7 and 8 respectively for
all circuit versions.
When the RF input power decreases, below -20 dBm, Re
and Ce reach the expected values given respectively by (38)
and (54).
When the RF input power exceeds 15 dBm, Re equals the
value given by (47) and Ce decreases continuously as expected
and given by (54).
DOI: 10.13140/RG.2.1.4530.9600
DC output voltages and near RL/2 for high voltages. For
frequencies between 100 MHz and 11.7 GHz, Re remains close
to RL/2 at high DC output voltages, but at low output voltages
Re decreases with frequency. This is due to the influence of Rs
and Cj.
It can be seen in Fig. 10(a) that each curve is crossing each
other at a specific frequency (11.7 GHz for circuit A4). At this
frequency Re is constant and close to RL/2 for any DC output
voltage. The crossing frequency fcc can be easily determined
by finding out the frequency that makes (38) equals to (47).
Results given by equations (38) and (47) are plotted in Fig. 11.
The crossing frequency is given by
Fig. 7. Theoretical evolution of the shunt equivalent input resistance Re with
the RF input power Pin at 2 GHz, for circuit configurations A1 to A5, see
Table I. Solid lines give results calculated with the Ritz-Galerkin method, and
symbols with ADS.
f cc =
1
2
2 R j 0 − RL
C j0 − C j
2
2
s
1
Rs R j 0 RL
(56)
For frequencies between 11.7 GHz and 1 THz Re decreases
continuously. Finally, at extremely high frequency (above 1
THz) Re equals Rs whatever the output DC voltage.
Fig. 10(b) shows that over a large frequency range, Ce
remains close to Cj as given by (2), for any V0 from 10-6 V to
10 V, as would be expected.
Fig. 8. Theoretical evolution of equivalent shunt input capacitance Ce with
RF input power Pin at 2 GHz, for circuit configurations A1 to A5, see Table I.
Solid lines give results calculated with the Ritz-Galerkin method, and
symbols with ADS.
The validity domains for the various expressions of Re
provided in this paper can be seen in Fig. 9. The black curve
(hidden by the red curve) being the reference.
The R-G method reveals, as well, how Re and Ce vary with
frequency and DC output voltage. These variations are shown
in Figs. 10(a) and 10(b) respectively, using circuit A4 as an
example. These two somewhat unusual representations are
useful in that they provide the domain of possible Re and Ce
values.
The borders of this domain can be easily determined by
using relation (38) and (47) only without resorting to either
ADS or the R-G method
Fig. 10(a) demonstrates that for circuit A4 operating
between 2 MHz and 100 MHz, Re remains close to Rj0 for low
Fig. 9. Theoretical evolution of equivalent shunt input capacitance Re with
RF input power Pin at 2 GHz, for circuit configuration 4, see Table I. The
curves are calculated with the different equations defined in this paper.
Fig. 10(a) and Fig. 10(b) show an important observed
behavior as well.
Ce and Re calculated with (13) and (14) are exactly equal to
the equivalent input shunt resistance Rm and capacitance Cm of
the circuit structure shown in Fig. 12 when R (highlighted in
yellow) is replaced by a resistance equal to RL/2 and Rj0 for
extremely high and low input RF power level conditions
respectively.
DOI: 10.13140/RG.2.1.4530.9600
IV. CONCLUSION
Several expressions for the limits reached by the input
differential impedance of a series diode detector for very high
and very low RF input power are given in the present paper.
Cut-of frequencies at which the input shunt resistance
variations occur have been determined.
Calculation of the ripple signal characteristic has shown that
its phase can become important when RF input power
increases.
It has been shown that the differential input impedance of
the detector becomes independent of Rj0, when input power is
very high but is dependent on RL/2 over a large frequency
band.
REFERENCES
[1]
[2]
[3]
[4]
[5]
[6]
Fig. 10. Theoretical evolutions for circuit A4 of (a) the shunt equivalent input
resistance Re (Ohm) and (b) the shunt equivalent capacitance Ce (in F) with
the frequency (in Hz) calculated for various DC output voltage levels set as
parameters. Solid lines give results calculated with the Ritz-Galerkin method,
and symbols with ADS. Red and blue triangles are the equivalent input shunt
differential resistance and capacitance values Rm and Cm for the circuit shown
in Fig. 12 when replacing the varistor element by a resistance equal to RL/2
and Rj0 respectively.
fcc
fc1
fc2
Fig. 11. Calculated results given by equations (38) and (47) showing the cutoff frequencies at low power (fc1) and at high power (fc2). Image of Fig. 10(a)
is set as background for comparison purpose.
R. G. Harrison, “Full nonlinear analysis of a detector circuit using the
Ritz-Galerkin theory,” IEEE MTT-S Symposium Digest, Albuquerque,
NM, USA, pp. 267-270, June 1992,
DOI: 10.1109/MWSYM.1992.187963
R. G. Harrison and X. Le Polozec, “Nonsquarelaw behavior of diode
detectors analysed by the Ritz-Galerkin method,” IEEE Trans.
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Input circuit
id
irf
C
Rg R
t
Cj
Ct
Ze
vg
Nonlinear part
Rs i
ve
CL
v0
v
I0
RL
1/Gt
Lt
id=v0 /RL+CL dv0 /dt+I0
(a)
Input circuit
Nonlinear model
irf
VeDC =-Rt(V0 /RL+I0)/(1+ Gt Rt)
C
Rg R
t
vg
Ct
1/Gt
Lt
ve=veAC
+VeDC
Ce
Re
veAC
Ze
I0
V0/RL
im=V0 /RL+Ce d veAC /dt+ veAC /Re+I0
(b)
Fig. 1. (a) Structure of the series Schottky diode detector considered for analysis. Current source I0 provides external diode biasing. Tank circuit Lt , Ct , Rt , Gt
ensures that the detector input is effectively shorted at DC and all frequencies except the fundamental to which it is tuned.
(b) The detector model. The two current sources emulate the DC current passing through the detector. Voltage source VeDC provides an offset voltage such that
only the AC component of ve appears across the differential input impedance VeDC simulated by Re and Ce . For AC analysis, the model reduces to Re and Ce.
Rs
Cm(R , Cj)
Ze
Rm(R , Cj)
R
Cj
CL
Ze
RL
Fig. 12. Circuit structure giving exactly the same figures for Ce and Re (calculated by the R-G method) when replacing the varistor element (highlighted in
yellow) by a resistance equal to RL/2 for extremely high input RF power level and Rj0 for extremely low input RF power level conditions
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