TON DUC THANG UNIVERSITY FACULTY OF ELECTRICAL & ELECTRONICS ENGINEERING DEPARTMENT OF ELECTRONICS & TELECOMMUNICATIONS ENGINEERING CHAPTER 3: LOGIC GATES DIGITAL SYSTEM DESIGN 1 402061 ACKNOWLEDGEMENT The picture content of this slide is from Thomas L. Floyd, [2015],Digital Fundamentals, 11e. Prentice Hall. 3/24/2016 402061 - CHAP 3: LOGIC GATES 2 OUTLINE 1. The inverter 2. The AND gate 3. The OR gate 4. The NAND gate 5. The NOR gate 6. The Exclusive-OR gate 7. Fixed-Function logic 3/24/2016 402061 - CHAP 3: LOGIC GATES 3 OBJECTIVES Describe the operation of logic gates Express the operation of logic gates with Boolean algebra Recognize and use both the distinctive shape logic gate symbols and the rectangular outline logic gate symbols of ANSI/IEEE Standard 91-1984 3/24/2016 402061 - CHAP 3: LOGIC GATES 4 OBJECTIVES Construct timing diagrams showing the proper time relationships of inputs and outputs for the various logic gates Comparison between CMOS & bipolar (TTL) ICs Use logic gates in simple applications 3/24/2016 402061 - CHAP 3: LOGIC GATES 5 INTRO TO BOOLEAN ALGEBRA Wikipedia: George Boole. Wikimedia Foundation, Inc. 22 July. 2015. Web 20 Jan. 2016 <https://en.wikipedia.org/wiki/George_Boole> 3/24/2016 402061 - CHAP 3: LOGIC GATES 6 INTRO TO BOOLEAN ALGEBRA Constants and variables have only two values: 0 or 1 Operations of Boolean Algebra: AND OR NOT (complement) 3/24/2016 402061 - CHAP 3: LOGIC GATES 7 INTRO TO BOOLEAN ALGEBRA There are 3 ways to describe a digital circuit: Schematic diagram The distinctive shape symbol The rectangular outline symbol Truth table Boolean expression 3/24/2016 402061 - CHAP 3: LOGIC GATES 8 INVERTER 3/24/2016 402061 - CHAP 3: LOGIC GATES 9 AND GATE 3/24/2016 402061 - CHAP 3: LOGIC GATES 10 OR GATE 3/24/2016 402061 - CHAP 3: LOGIC GATES 11 EXCLUSIVE-OR GATE Ex-OR gate, XOR gate 3/24/2016 402061 - CHAP 3: LOGIC GATES 12 THE COMPLEMENT OF BASIC LOGIC GATES NAND gate NOR gate XNOR gate Truth table, Boolean expression, and waveform? 3/24/2016 402061 - CHAP 3: LOGIC GATES 13 ENABLE/DISABLE USING AND GATE 3/24/2016 402061 - CHAP 3: LOGIC GATES 14 ENABLE/DISABLE USING OR GATE 3/24/2016 402061 - CHAP 3: LOGIC GATES 15 FIXED FUNCTION LOGIC Two major fixed function logic families are TTL and CMOS. A third technology is combines TTL & CMOS. BiCMOS, which ASSIGNMENT: What is CMOS made of? What is TTL made of? Which one consume less power? 3/24/2016 402061 - CHAP 3: LOGIC GATES 16 FIXED FUNCTION LOGIC Some common gate configurations: 3/24/2016 402061 - CHAP 3: LOGIC GATES 17 SIMPLE APPLICATION An OR gate is used to detect exceed of temperature or pressure and produce command signal for the system to take required actions 3/24/2016 402061 - CHAP 3: LOGIC GATES 18 SIMPLE APPLICATION Burglar alarm: Switch is closed one input of the NAND gate is LOW. LDR is in the light the other input is LOW. Output is HIGH and the buzzer sounds. 3/24/2016 402061 - CHAP 3: LOGIC GATES 19 SUMMARY In this chapter, we have learned: the description on the operation of logic gates the operation of logic gates with Boolean algebra different standards of logic gate symbols timing diagrams of different logic gates the comparison between CMOS & bipolar (TTL) ICs the use of logic gates in simple applications 3/24/2016 402061 - CHAP 3: LOGIC GATES 20 HW #3 DIGITAL FUNDAMENTALS 11th edition (borrow from the library) Prob: pg 170 – 174 every even problem Prepare chap 4: Boolean algebra simplification 3/24/2016 402061 - CHAP 3: LOGIC GATES 21