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CONTENT
New Technology Enables Paralleled UPS Modules
Inductor dc resistance is utilized in a current sensing scheme.
John Tracy and Fred Tassitino, Invensys Power Systems, Raleigh, N.C.
JUL 01, 2001
The focus on the role of power quality in maintaining system availability has been driving
innovation in power technology. A new development is Hot Sync®, a patented paralleling
technology that eliminates system-level single-point-of-failure. This enables UPS modules to
work in parallel with complete synchronization for redundant and capacity systems. The
system features two identical modules arranged in a parallel redundant configuration and a
parallel tie cabinet connecting the modules to the critical bus. A common bypass input source
allows the modules to synchronize their outputs, even when one or both of the parallel
system cabinets are open for maintenance. Parallel or capacity systems permit the paralleling
of more than two modules, allowing a system load greater than any one module. The Photo
shows two-paralleled Powerware 9315 units equipped with Hot Sync.
This technology overcomes a problem faced by power technology engineers: how to parallel
UPS modules to provide N+1, N+2, or higher redundancy without introducing a single-pointof-failure. It eliminates the communication wires between the UPS modules, and employs an
algorithm that constantly checks each UPS output for any variation. Each UPS operates
independently, but in complete synchronization with the other UPS in the system.
The result of this operation is that the UPS modules automatically share the critical load, and
they can selectively trip and remove themselves from the critical output bus if an inverter
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failure or some other critical event occurs. The paralleled outputs, called the critical bus,
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drive the load.
Synchronization
For two modules in parallel to equally share the critical load, their output waveforms must
closely match with respect to frequency and phase angle for all three phases. Unlike
traditional, wired paralleling systems, Hot Sync accomplishes this without any
communications between the two modules using only the module's output power level. All
necessary information for load sharing is available in the module's output power level.
Failures in the other module's circuitry, interface circuitry, or system control wiring will not
affect the module's output power level.
A Hot Sync system takes advantage of the relationship between the phase angle displacement
between two modules and the corresponding power assumed by each module. For instance, if
you perfectly match the output waveforms of two modules in parallel, they will equally share
the load on the common bus. However, if one module's output phase shifts forward relative
to the other module, it will assume more of the common load. This relationship between
phase and power is at the heart of Hot Sync load sharing controls.
Load sharing between two modules is very sensitive to the phase angle difference between
the two modules. Just a 1° difference in phase angle between two modules results in a 50%
load imbalance between them. The load sharing algorithms of a Hot Sync system take
advantage of this sensitivity to minimize the phase angle difference between two modules.
Self-Adjusting Modules
In a Hot Sync system, each module monitors its own output 3000 times per second. You can
call ΔP the difference in a module's output power between two successive samples. While
paralleling, if the first module's ΔP increases its frequency higher than a second module, the
first module will proportionally reduce its output frequency. These frequency adjustments
are on the order of just a few milliHertz and act as a forcing function for load sharing. In this
manner, each module only needs to look at its own output power to remain phase locked with
the other module.
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This wireless paralleling method doesn't rely on the sharing of information between the two
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modules and thereby eliminates the need for intermodule communication. In fact, the
modules can operate in parallel or alone.
During steady state operation, the modules don't adjust their output frequencies due to the
load. The module considers the ΔP value to be zero even with large 100% nonlinear loads.
However, during sudden load applications or removals, both modules see the same transient
and make a onetime frequency adjustment (backward or forward) to compensate. Again,
these output frequency adjustments are on the order of a few milliHertz.
Direct Digital Synthesis
This precise type of paralleling control wouldn't be possible without sophisticated control
algorithms in the UPS modules, which are less than two pages of code. To balance the power
levels between the two modules, the inverter must constantly make minute frequency
changes, as much as 3000 per second in increments as small as 3×10-6 Hz. Such load share
control is only possible in modules that employ digital signal processing to control inverter
frequency. This technique, using a circular accumulator, updates periodically. The length of
the accumulator determines the frequency resolution.
Each module in the Hot Sync system employs a unique load sharing approach. The load
share control algorithm maintains synchronization and load share using a stable linear
algorithm. The predictability of the algorithm allows a module to simultaneously synchronize
its common output to another source, such as bypassing while maintaining load share. The
ΔP term maintains load share while the modules in the system are synchronizing to a moving
source (such as a generator), and when the modules are synchronizing to different sources.
Selective tripping removes a faulty module from the critical bus before the output is out of
specification. This is a two-part process:
Identify module outputs that are out of specification limits.
Remove the faulty module from the critical bus.
To identify a module failure, the selective trip method looks for changes in module output
voltage and current relative to recent output voltage and current. The controls within each
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module store the output current and voltage waveforms on each of the three phases for the
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previous cycle. You can compare the moving average of the last five cycles with the present
waveforms. From this information, modules can determine if they are the cause for
deteriorating conditions. Then, the system removes the faulty module from the line.
A failure that doesn't affect the critical bus is less serious than one that does. For example, if
a module failure such as an overtemperature condition due to a clogged air filter occurs, the
failure will not impact the critical bus. The other module assumes the balance of the load,
and the failed module is isolated from the critical bus. The time required to isolate the failed
module from the critical bus isn't significant.
Though most module failures are benign, there are several failure modes that affect the
critical bus. Component failure, such as a shorted IGBT, appears as a fault on the critical bus.
For these types of failures, it's essential to quickly identify the failure and isolate the failed
module for the critical bus. Selective tripping in Hot Sync addresses this issue.
The selective tripping algorithm has been extensively hardware tested. More than 1000
different types of “fault inserted” selective trips were completed during qualification testing.
In every case, the selective trip controls successfully identified failure conditions, and just as
important, never mistakenly identified normal and faulty conditions.
When a module removes itself from the critical bus, it continues to monitor the critical bus
voltage. If the critical bus voltage stays within system specifications, it knows the other
module is supporting the critical bus. However, if the critical bus voltage drops when the
faulty module isolates itself, it knows the other module is off-line and the critical bus needs
support. The faulty module will then close its bypass path, and the resulting bus interruption
will not exceed 0.004 sec.
How It Works
Hot Sync's load sharing technique employs a current transformer connected to the input
terminal of the IGBT inverter (Fig. 1). This enables detection of the dc input current flowing
into the IGBT inverter. The detected dc input current and voltage signals are then sent to
respective A/D converter channels of a 16-bit high-speed microcontroller where they are
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sampled. The micrcontroller output controls the 3-phase output frequency of the IGBT
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inverter, which enables the paralleled power system to share the load equally. The sample
rate for this power information should be above 2 kHz and can use the ac output of the UPS
inverter instead of the dc input for sampling power. In addition, the microcontroller also
provides a trip signal to remove the power system from the power supply circuit if a fault
occurs.
The microcontroller controls load sharing in response to processing of the sampled dc input
current and voltage signals (Fig. 2). In the preferred configuration, the microcontroller
processes the received dc current and voltage samples. It then provides the resulting gate
drive signal to the IGBT inverter in a manner that forces it to load share with the other
parallel power systems. Alternatively, you can sample the power level directly using a power
transducer and then provide it to the microcontroller. Preferably, this is implemented in the
firmware of the microcontroller, although it can be implemented in software or special
purpose hardware as desired.
In the first step of the flowchart load sharing process (Fig. 2), the microcontroller receives
digitized dc voltage and dc current samples. Next, it multiplies them together in Step 2 to
compute the dc input power to the IGBT inverter. Thus:
pn=Vn×In (1)
Pn=K2×pn (2)
Where:
Vn=Digitized dc voltage samples received by the microcontroller
In=Digitized dc current samples received by the microcontroller
pn=dc input power to the IGBT inverter
Pn=Output power of IGBT inverter
K2=Constant gain that defines the dynamic response of the inverter.
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Step 3 computes:
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Δpn=pn-pn-1 (3)
Where:
Δpn=change in input power
pn-1=Input power of the previous dc input samples
In Step 4, the change in input power is integrated over the inverter's input frequency range to
yield:
fn=fn-1- (K1×Δpn)-(K2×pn)
Where:
Δpn=Change in input power
fn=Inverter frequency
fn-1=Inverter frequency for the previous dc input samples
K1 and K2=Constants that define the dynamic response of the power system
The microcontroller then outputs an IGBT gate drive signal to IGBT inverter in Step 5 to
drive output power to the frequency, fn. Then, the load share routine exits in Step 6.
We use the rate of change for the output power to force the frequencies of the respective
inverters together to a fixed frequency or a frequency of an alternate power source for the
respective power systems. The power levels of the power systems will change due to differing
power system frequencies. The power level itself biases the inverter output frequency to
correct for steady state load errors for load sharing. The system doesn't need a digital
synchronizing signal or difference from average analog signal to change an inverter's output
frequency.
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Hot Sync controls the IGBT inverter's output frequency to either run at a fixed frequency or
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to synchronize to an alternate power source. In the ideal configuration, the frequency
updates at a 3 kHz rate due to the input power level of the IGBT inverter. The frequency also
updates once per ac output voltage cycle to either run at a fixed frequency or to synchronize
(e.g. phase lock) to an alternate voltage source.
For more information on this article, CIRCLE 336 on Reader Service Card
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TECHNOLOGIES > POWER ELECTRONICS SYSTEMS
Design a PFC Resonant Coupled Inductor That Doesn’t Distort Power
Factor
Here’s a step-by-step design of a resonant-coupled inductor employed in a PFC EMI
lter that doesn’t impact power factor.
Harry Dellamano
JUL 01, 2015
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Over the past 40 years many of my designs included Power Factor Correction (PFC) ranging
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from 50 W to over 5.0 kW and operating from 30 kHz to 150 kHz switching frequency,
utilizing CCM, CrCM and DCM modes and 50 Hz to 850Hz input power.
Recently, I was designing a PFC unit for 800 Hz operation and had difficulty designing the
input filter that eliminates EMI, but does not distort the power factor caused by the large
currents in the X capacitors. My challenge was that I could not divert the switching current
from the input filter and circulate it in another loop. Then I remembered Lloyd Dixon’s
seminars for Unitrode that covered coupled inductors and “current steering”. That is what I
needed but did not understand the theory at that time. So I went back and searched the many
papers on the subject, finding lots of higher math and transformer equivalent circuits. There
is a coupled inductor where one winding has only AC current and the other with DC current.
Why were they all using transformer circuits to describe this coupled inductor? In
transformers, current goes in the primary dot and out the secondary dot. This design has the
current being shared (split into ac and dc) by the primary and secondary.
So back to the bench, declaring that if two inductors share the same core the inductance is
either mutual or leakage. I measured the total inductance of each inductor and their mutual
inductance, and Figure 5 (see all figures below):
Ldc = Lm + LdL
(1)
Lac = Lm + LaL
Where:
Ldc = Total inductance of dc winding
Lm = Mutual inductance between LAC and LDC windings
Lac = Total inductance of ac winding
LdL = Leakage inductance in the LDC winding
LaL = Leakage inductance in the ac winding
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Using SPICE simulation, I realized the simplicity of this inductor configuration. If this is true,
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then why is it not in general use, why can’t I buy these Resonant Coupled Inductors (RCIs)
off the shelf? The PFC Inductors I can buy are single windings of high power dissipation due
to high resistance at the switching frequency (Rac losses). The designer did not have a good
understanding of skin effect nor proximity losses. I believe that the previous papers have
made this design very difficult to understand and scared off the engineers and magnetics
manufacturers. This is not just about PFC inductors but input and output filters. Any place
we have an ac and dc current component in an inductor winding, we should look at this
topology to reduce the filter components.
To meet this design problem I came up with a solution and patented it. The RCI patent is
currently pending (US 62/170,844) and the search results are very promising. I would like to
hand off this design to the right company. Why did I patent this configuration when so many
papers have been written on it? Yes, there is lots of prior art but the theory given is very
confusing. Maybe I can educate the engineering community and reap some small benefits.
This design has been simulated in SPICE and bench tested on a T.I. Eval board. The Eval’s
improvement was evident and all readings and waveform match the SPICE simulation. There
is no magic, just solid engineering.
Patent Features:
1. The RCI will divert >30db of switching current from the input filter.
2. The resultant magnetic package is about the same volume as a standard PFC inductor
but in a lower profile that aids system packaging, thermal flow and noise shielding.
3. Due to the separation of ac and dc currents, a higher efficiency unit can be made in
the same volume.
4. Manufacturing costs are similar to a PFC inductor.
5. Core magnetics with some needed cutting are readily available.
6. This device will operate in CCM, CrCM and DCM of operation.
7. Can be used in any topology, input or output, diverting switching current to ground.
Figure 1 is prior art for reference only. Figure 2 shows both a two-winding and threewinding PFC circuit to help explain the RCI operation, but there can be many implications as
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shown in Fig. 3.
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In Fig. 4, L2 has three windings and in Fig. 5, L2 is a two winding device. Both two- and
three-winding devices operate in the same manner as explained below:
Ldc and Lac, which when loosely coupled (0.5< K<0.90) each form a leakage inductance.
(LdL + LaL) that reduce their original (K=1) inductance such that:
Ldc = Lm + LdL
(2)
Where:
K = Magnetic coupling factor
And:
Lac = Lm + LaL
(3)
Where:
Therefore:
Ldc > Lac for best results
Lm = K (Lac × Ldc)0.5
K = Lm/(Lac × Ldc)0.5
Cr = Resonant capacitor
LdL impedes the flow of ac current to the external circuit, but has low resistance to Idc,
current in the dc winding. LaL resonates with the resonant capacitor (Cr) to form a lowimpedance series resonant circuit at the switching frequency and shunts the ac current to
ground, away from the output and the IDC current is blocked by Cr. The ac winding carries
high ac current so its resistance at the switching frequency (Rac) must be constructed as low
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as possible, so Litz wire is sometimes used. The dc winding only requires a low dc resistance,
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so normal wire is used. The placement of core gaps is also important to Rac.
Ldc > Lac improves the ac rejection ratio at the operating frequency of Iac (current in ac
winding). As the K factor is reduced, Lm gets smaller and the leakage inductances get larger.
As Lm is reduced, the IAC component increases, affecting the external circuit. A K of ~0.6 is a
good tradeoff.
The ac winding is sized according to the needs of the converter, which is known by those in
the art. It has typical values of 500µH to control ripple current in the winding and switching
device.
A low coupling factor (K) is obtained by placement of the two windings on opposite sides of
the core and gap. The gap should be placed away from the windings or the fringing flux will
increase winding resistance. Prior art coupled inductors were composed of one winding
containing both ac and dc currents. This caused the winding to be large and difficult to
package and keep cool. This unit with its smaller dual windings or triple windings can be
packaged in a lower profile package, allowing better thermal flow. Full complete winding
rows offer the best results.
Resonant Capacitor Calculations
Determine this capacitor value to resonate with Lac, leakage inductance.
1. Using an LCR meter, measure LAC, Ldc, and Lm. You can directly measure Lm with most
LCR meters with four leads. Attach the drive leads across Ldc, the sense leads across Lac and
read Lm directly. The sign displayed is the phase.
2. LaL= Lac – Lm
Use LaL to calculate Cr at the switching frequency:
Cr = 1/[(2pF)2 × LaL]
(4)
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It is important to note that a custom device is not necessary to get good results. You could
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obtain a coupled inductor (K>0.95) that has suitable ac and dc windings with the inductance
to maintain proper PFC operation. Then add a low-frequency inductor (Powder Iron to
operate at 120Hz) to connect the dc winding to the bridge. Then add a high-frequency
(Ferrite) core to the ac winding and terminate with the resonant capacitor. These three
devices would simulate the RCI. Not a pretty package, but a good start in understanding this
topology.
The word PFC (Power Factor Correction) is used throughout this document to denote one
configuration that is widely known to the profession, but the RCI can be used in many
different configurations as shown in Fig. 3 in both two and three winding packages.
Additionally, any electronic device that draws more than 25 Watts off line should be power
factor corrected. The RCI will scale from 25 watts to kW and it will operate from 50Hz to over
850 Hertz, filling the needs of commercial and military devices.
Figures 6 and 7 are SPICE simulations for the RCI. Figures 8 to 14 are data taken from a TI
UCC3817 (250W) demo board rev 5 with the original TI inductor (L1) and a two-winding
RCI.
1. Prior art for an EMI filter. (Click for enlarged view).
2. Two winding PFC input circuit. 2a. Three winding PFC input circuit. (Click for enlarged
view).
3. Resonant-coupled inductor circuits. (Click for enlarged view).
4. Three winding resonant inductor with three windings for Lac. (Click for enlarged view).
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5. Two winding resonant inductor with two windings for Lac. (Click for enlarged view).
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6. SPICE simulation containing the measured values with the K and Cr values calculated as
shown above. (Click for enlarged view).
7. SPICE simulation using the calculated leakage inductance values as shown above and the
coupling factor set to 1. Note both SPICE simulations contain the same results proving the
theory. (Click for enlarged view).
8. Showing three full cycles of the switching waveforms. Note the slope of the ac current: if
Ton Ã
Ein/dI =Lm Then: 4µH Ã
400V/4.8A = 333µH (same value shown in 7). (Click
for enlarged view).
9. Top is the current in the LDC winding at about 2.2 Adc with low switching ripple. (Click for
enlarged view).
10. Input current of the RCI unit. (Click for enlarged view).
11. Input current of the original unit. (Click for enlarged view).
12. Data taken from the RCI inductor top and original inductor on the bottom.
13. Prototype RCI.
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Latest Comments
Posted by td2k
Aug 23rd, 2015 8:33am
If any company is interesting in all rights to the RCI, please contact;
Harry Dellamano tdsystems.org harryd@tdsystems.org
td2k@roadrunner.com
Posted by td2k
Jul 28th, 2015 7:38am
Thanks for reading the complete article and comment. As you correctly pointed out the
core must have a gap to support the DC current component. Figure #12 shows two 0.015"
gaps in the core. As with all magnetic design there is so much to cover we sometimes hide
behind "known by those in the art" but it never impressed any of my teachers.
Ciao, Harry Dellamano td2k@roadrunner.com
Posted by je .lawton
Jul 27th, 2015 11:56pm
Your writeup doesn't mention it but doesn't the design of the AC side of the magnetic
circuit (core section, gap) need to be su cient to avoid saturation? If you get core
saturation your resonant circuit will see losses and become low-Q and the winding might
even heat up, You might have intended to cover this with "sized according to the needs of
the converter, which is known by those in the art" (which is a bit elitist after all!) but it
doesn't appear anywhere explicitly in the article.
Posted by td2k
Jul 23rd, 2015 6:48am
Please, I am not a doctor but your question is a familiar one. There is no place to obtain a
resonate coupled inductors at this time but I believe there is a big market out there waiting
to be tapped. We just need some magnetics house to productise it and add it to their line.
Small size and high e ciency is an easy sale these days.
Ciao,
Harry Dellamano
TdSystems.org
Posted by powelec
Jul 22nd, 2015 5:57am
Thank you for the excellent article Dr. Dellmano--especially appreciate the photos and
thorough explanation.
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Your method would be very useful for a new design I am working on. I need a 250W
Universal input PFC circuit. Where can I buy or obtain the RCI part?
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