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Cascade of amplifiers
A1 and A2 are
ideal voltage
amplifiers
R1 and R2 model the
output resistance of
each stage
Cin and CN represent the input
capacitance of each stage, and
CP
denotes
the
load
capacitance
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The overall transfer function can be written as
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The location of the poles is difficult to
calculate because R3 and C3 create
interaction between X and Y.
Nevertheless,
in
many
circuits,
association of one pole with each node
provides an intuitive approach to
estimating the transfer function:
we simply multiply the total equivalent
capacitance by the total incremental
(small-signal) resistance (both from the
node of interest to ground), thus
obtaining an equivalent time constant
and hence a pole frequency.
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Gain
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Common-Source Stage
The
common-source
topology
exhibits
a
relatively high input
impedance
while
providing voltage gain
and requiring a minimal
voltage headroom.
As such, it finds wide
application in analog
circuits
and
its
frequency response
is of interest.
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Fig. is a common-source stage
driven by a finite source resistance,
RS .
We identify all of the capacitances in
the circuit, noting that CGS and CDB are
“grounded” capacitances while CGD
appears between the input and the
output.
In reality, the circuit also drives a load
capacitance, which can be merged
with CDB.
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Miller’s Approximation
Assuming that λ = 0
and M1 operates in
saturation, let us first
estimate the transfer
simplified circuit using Miller’s approximation.
function
by
associating one pole
with each node.
The total capacitance
seen from X to ground
is equal to CGS plus the
Miller multiplication
of CGD, namely, CGS +
(1 − Av)CGD, where Av
= −gm RD.
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≈ CDB + CGD
1 Pole frequency
At the output node, the total capacitance seen to ground is equal to CDB plus
the Miller effect of CGD, i.e., CDB + (Av-1/Av)CGD ≈ CDB + CGD (if Av >> 1).
Thus,
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2 Pole frequency
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Another approximation of the output pole can be obtained if RS is relatively
large. Simplifying the circuit as shown in figure below, where the effect of RS is
neglected.
Thus, the output pole is roughly equal to
Model for
calculation of
output
impedance.
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We then surmise that the transfer function is
The primary error in this estimation is that we have not considered the
existence of zeros in the circuit.
Another concern stems from approximating the gain of the amplifier by −gm RD
whereas in reality the gain varies with frequency (for example, due to the
capacitance at the output node).
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Direct Analysis
We now obtain the exact transfer function, by using the equivalent circuit
depicted in Fig. we can sum the currents at each node:
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Find VX
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Substitute Vx,
which yields,
That is,
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zero
pole
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Note that the transfer function is of second order even though the circuit
contains three capacitors. This is because the capacitors form a “loop,”
allowing only two independent initial conditions in the circuit and hence
yielding a second-order differential equation for the time response.
Special Cases:
the denominator appears rather complicated, it can yield intuitive
expressions for the two poles, ωp1 and ωp2, if we assume that |ωp1|<<
|ωp2|. This is called the “dominant pole” approximation.
Writing the denominator as
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we recognize that the coefficient of s is approximately equal to 1/ωp1 if ωp2 is
much farther from the origin.
Therefore, the dominant pole is given by
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As a special case, if CGS >> (1+gm RD)CGD + RD(CGD +CDB)/RS, then
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The transfer function exhibits a zero given by ωz = +gm/CGD, an effect
not predicted by Miller’s approximation.
The transfer function exhibits a zero given by ωz = +gm/CGD. Located in the right half
plane, the zero arises from direct coupling of the input to the output through CGD at very high
frequency. Note that a zero in the right half plane introduces stability issues in feedback
amplifiers
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Calculation of the zero in
a CS stage.
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In high-speed applications, the input impedance of the common-source stage is
also important. With the aid of Miller’s approximation, we have from Fig.
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