Flyback with Active Clamp: a suitable topology for Low Power
and Very Wide Input Voltage Range applications
P. Alou (1), O. García (1), J.A. Cobos (1) , J. Uceda (1) and M. Rascón (2)
(2)
Universidad Politécnica de Madrid (UPM)
c/ José Gutiérrez Abascal, 2
28006 Madrid SPAIN
Phone: 34-91-411 75 17 Fax:: 34-91-564 59 66
e-mail: alou@upmdie.upm.es
Abstract- The goal of this paper is to design and test a
“universal” low power (10W) converter that can be fed from a
very wide input voltage range (36V-373V), being possible to
plug it in different power systems. Flyback with Active Clamp
shows very good performance for this application and is used to
test a 150kHz - 5V - 10W prototype that operates even for a 1:20
input voltage ratio (18V-373V).
I. INTRODUCTION
The new power systems have to supply different kind of
loads, being necessary the coexistence of different voltage
levels in the same system. The Telecom world is a clear
example of this trend [1], where Datacom equipment is
widely used and has to coexist with the Telecom equipment.
The 48V DC distribution is considered as a standard in the
Telecom world, however the Datacom equipment is usually
fed from AC mains. Both voltage levels should be in the
same system, and different power supplies are necessary for
each application. Power supplies that can be fed either from
48VDC batteries or from the universal rectified AC mains
would be an interesting alternative to reduce stocks and costs.
The portable equipment is other example where a
“universal” power supply that can be fed from both sources
would provide a high flexibility to the users, being able of
plugging their equipment in different places and countries.
This paper describes the design and the experimentation of
a low power DC/DC converter able to work with any of these
inputs, this is, 48V and rectified universal AC line voltage.
Efficiency of the converter is clearly penalized by extending
its input voltage range.
Flyback with Active Clamp topology is selected among
other topologies to design and test a 5V-10W power
converter that operates with a very wide input voltage range
(36V – 373V, 1:10 ratio).
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II. SELECTION OF THE TOPOLOGY
The main goals in the design of this power converter are
the size and the cost since the power is very low (10W).
Hence, simplicity is an important criterion in order to select a
suitable power topology. Isolation becomes also mandatory
to convert from 373V to 5V. Regulation capability of the
topology is other important issue since the input voltage
range is very wide (1:10). Topologies considered in the
comparison are:
1.
2.
3.
Flyback.
Flyback with Synchronous Rectification
Flyback with Active Clamp
Buck type topologies are not proper because the duty cycle
would vary widely (9%-90%), worsening the efficiency and
making the design very complex. Flyback topologies are
more interesting since the gain is d , keeping a smaller
1− d
variation of the duty cycle (24%-76%), see figure 1.
0.24
0.76
4
d
1− d
3.167
Vin(d)
(1)
)
2
0.316
0
0
0.2
0.4
0.6
0.8
1
d
24% < d < 76%
Figure 1. Variation of the duty cycle in Flyback topology (CCM) to regulate
a 1:10 input voltage ratio.
3.
4
Losses (W)
dmin
dmax
Main drawback of the Flyback with Synchronous
Rectification is the driving of the Synchronous Rectifier. It
should be externally driven since input voltage range is very
wide to apply Self-Driven Synchronous Rectification
techniques. This externally driving adds complexity to the
topology, being an interesting topology to optimize the
efficiency at low voltage applications (1.5V, 3.3V).
No ZVS
2
0
ZVS
0
0.25
0.5
Duty cycle
Conduction losses of the rectifier are strongly reduced at
low voltage applications
0.75
A third topology that appears as a middle point between
the two previous topologies is the Flyback with Active
Clamp ([4] and [5]), see figure 3. The two most important
advantages are:
1
d
Figure 2. Losses calculation for a Flyback converter with
and without ZVS.
The operation in Continuous Conduction Mode (CCM) is
related with the regulation capability, topologies that can
enter into Discontinuous Conduction Mode (DCM) worsen
the regulation capability since gain in DCM also depends on
load. Therefore, those topologies that can go into DCM
would not regulate further than a minimum load.
Zero Voltage Switching becomes other important criterion
to select the topology since input voltage can be very high
(373V), obtaining big losses in the primary switch under hard
switching conditions. Figure 2 shows a calculation of the
losses in a Flyback converter, designed for this application,
with and without ZVS. Around 1W is saved with ZVS at high
input voltage, calculated total losses at 373V are 2.4W with
ZVS and 3.3W without ZVS.
Regarding all these issues, a low number of topologies can
be applied to this application. Besides, if simplicity is
prioritized, some double stage solutions and other complex
options are discarded, being the Flyback topology a very
interesting candidate.
Standard Flyback topology is the simplest one. However,
we have not selected this alternative because it has two
drawbacks:
1.
It goes into DCM at low load, hence a minimum load is
necessary. To reduce the minimum load, the size of the
transformer has to be increased.
2.
ZVS is not possible, increasing the losses in the primary
switch.
1.
Active clamp circuit allows magnetizing current to be
negative, hence DCM is avoided and the output voltage
is regulated even under no load conditions.
2.
ZVS can be achieved with a proper design.
We have selected this topology, Flyback with Active
Clamp, because it keeps wide regulation capability and ZVS
with a medium complexity.
III. FLYBACK WITH A CTIVE CLAMP :
OPERATION AND DESIGN
Figure 3 shows the Flyback with Active Clamp circuit.
Main and auxiliary MOSFETs are driven complementary
with small dead times in between to allow for ZVS. There
exist two different ways to achieve ZVS in this topology:
1.
With a inductance in series with the primary winding.
This option is widely analyzed in [4]. Usually, the
leakage inductance of the transformer is not enough and
a series inductance should be added.
2.
With the magnetizing inductance [5]. Magnetizing
current should be negative to provide ZVS. Although no
extra components are needed to achieve ZVS, a high
current ripple is necessary. In low power, low current
applications the needed current ripple is smaller, hence,
conduction losses due to the magnetizing current ripple
are low.
iPRIM
CCLAMP
A very interesting solution is the Flyback with
Synchronous Rectification ([2] and [3]). Synchronous
Rectification provides three important benefits to the Flyback
topology:
1.
Magnetizing current can be negative, hence DCM is
avoided and the output voltage is regulated even under
no load conditions.
2.
ZVS can be achieved with a proper design.
VCLAMP
LPRIM
iCLAMP
V IN
n:1
C OUT
LSEC
MAUX
iDIODE
MMAIN
VDS
Figure 3. Flyback with Active Clamp topology.
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VOUT
VGS_MAIN
VGS_AUX
SEL>>
0V
0V
VGS of main and aux MOSFETs
i PRIM
0A
75V
65V
75V
VCLAMP
65V
0V
3A
VDS of main MOSFET
iDIODE
7.9150ms
Diode current
7.9160ms
7.9170ms
7.9180ms
i PRIM
iPRIM
Soft turn-off
7.9190ms
7.9200ms
Vclamp
Vclamp
500V
ZVS
VDS_MAIN
5.0A
2.5A
0A
VGS of main and aux MOSFETs
70V
V CLAMP
375V
250V
125V
0V
VGS_AUX
0A
i PRIM
70V
VGS_MAIN
10V
1.0V
VDS_MAIN
ZVS
VDS of main MOSFET
i DIODE
0A
7.9150ms
7.9210ms
Diode current
7.9160ms
7.9170ms
Time
a) CCLAMP = 100nF
7.9180ms
Time
7.9190ms
7.9200ms
7.9210ms
b) CCLAMP = 1000nF
Figure 4. Simulation of Flyback with Active Clamp:
ZVS is achieved by means of negative magnetizing current.
In a low power, low current application like this one, using
a small magnetizing inductance to achieve ZVS is more
appropriate and it has been the option selected.
ZVS with negative magnetizing current. Besides, current
through the rectifier diode is a resonant waveform, being
possible the elimination of the turn-off losses of this diode.
Being the input voltage range so wide, turns ratio selection
affects strongly the performance of the power supply. Its
value determines the operating duty cycle and therefore,
voltage and current through the semiconductors. High duty
cycles (>80%) are not suitable for a Flyback topology since
secondary RMS current increases too much, increasing losses
and size of the output capacitors. Selected turns ratio is 12:1,
which provides a proper duty cycle variation (theoretically,
14% at 373V and 64% at 36V). Maximum voltage in main
and auxiliary MOSFETs is 425V and it is 40V in the rectifier
diode.
To study how the diode current resonates, the operation of
the circuit during the reset time (auxiliary switch is on) is
analyzed in detail. Figure 5 shows the equivalent circuit (seen
from primary) during the reset time. CCLAMP is the clamp
capacitor, LLK is the leakage inductance of the transformer
and LMAG is the magnetizing inductance of the transformer.
The output capacitance behaves as a voltage source with
value n·VOUT.
To design properly this power topology is very helpful the
use of simulations since a resonance between the leakage
inductance and the clamp capacitance takes place when the
transformer is reset.
Magnetizing inductance should be designed together the
switching frequency in order to provide ZVS at high input
voltage and keep small size and losses in the transformer.
Selected switching frequency is 150kHz and magnetizing
inductance in primary is 250µH. This design provides ZVS at
input voltages higher than 60V, while transformer core is a
low profile RM6. Transformer leakage inductance is 1.8µH,
measured from primary.
In a standard Flyback, the current through the rectifier
diode is just the magnetizing current, however, in the Flyback
with Active Clamp, the current through the diode (iDIODE /n) is
the magnetizing current (iMAG) minus the current through the
clamp capacitor (iCLAMP ). The current through the clamp
capacitor depends on the resonance between the leakage
inductance and the clamp capacitor, while the diode conducts
(Figure 5). Therefore, the current through the diode depends
on the value of the clamp capacitor, becoming other
important design parameter. Figure 6 shows how the current
waveform through the diode changes for two different clamp
capacitance values. The diode current becomes easier to filter
and has a smaller RMS value when CCLAMP = 1000nF than
when CCLAMP = 100nF. Hence, the clamp capacitance can
affect not only the small signal transfer function [6] but also
the efficiency and size of the power converter.
The output capacitors are 3 x 680µF-6.3V-17mΩ, keeping
a 50mV peak to peak switching ripple.
The value of the clamp capacitance affects the current
waveform in secondary. Two different values for this
capacitance are considered to analyze its effect: 100nF and
1000nF. Figure 4 shows the main waveforms obtained from
the simulation of this design with both values for the clamp
capacitance. The topology operates as expected, achieving
VCLAMP
L LK
CCLAMP
iCLAMP
LMAG
nVOUT
i MAG
iDIODE/n
Figure 5. Operation of Flyback with Active Clamp:
Equivalent circuit during the reset time when the diode conducts.
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0.8A
0.8A
iMAG
iMAG
0A
0A
-0.8A
0.8A
-0.8A
Magnetizingcurrent
0.8A
iCLAMP
iCLAMP
0A
-0.8A
Magnetizing current
0A
-0.8A
Clamp current
6A
Clamp current
6A
iDIODE
iDIODE
0A
0A
7.9150ms
Diode current
7.9160ms
7.9170ms
7.9180ms
7.9190ms
7.9200ms
7.9210ms
7.9150ms
Diode current
Time
7.9160ms
7.9170ms
7.9180ms
7.9190ms
7.9200ms
7.9210ms
Time
a) CCLAMP = 100nF
b) CCLAMP = 1000nF
Figure 6. Simulation of Flyback with Active Clamp:
Influence of the Clamp Capacitor.
The diode can be turned off in two different ways
depending on the value of the clamp capacitor. In both cases
the diode is turned off softly since current through the diode
is zero before turning on the main switch. The two different
possibilities are analyzed below with experimental
measurements:
1.
2.
CCLAMP = 100nF: due to the resonant evolution, current
through the diode is already zero before turning the
auxiliary switch off (tA ), figure 7 a). Before turning the
main switch on (tB), the magnetizing inductance has
discharged the parasitic capacitances, achieving ZVS at
tB.
CCLAMP = 1000nF: the diode is still conducting when the
auxiliary switch is turned off (tA ), figure 7 b). To
understand this transition, the corresponding equivalent
circuit is shown in figure 8, which is valid while the
tA
diode conducts and the auxiliary and main switches are
off. This interval is very short and magnetizing
inductance can be considered as a current source and the
clamp capacitor as a voltage source. When the auxiliary
switch is turned off (tA ), the current through the leakage
inductance (iLK ) decreases since it is resonating with the
parasitic capacitances (Cequiv ). The current through the
diode ( idiode = i LK − IMAG ) decreases as the leakage
n
d(i diode / n) d (i LK )
). When
=
dt
dt
inductance current does (
the leakage inductance current (iLK ) equals the
magnetizing current (IMAG), the current through the diode
becomes zero before turning the main switch on.
Besides, the magnetizing current keeps charging and
discharging parasitic capacitances achieving ZVS at t
tB
tA
VGS
VGS
iDIODE
i DIODE
VDS
VDS
a) CCLAMP = 100nF, VIN = 373V
tB
b) CCLAMP = 1000nF, VIN = 373V
Figure 7. Analysis of diode turn-off: measured VGS (top), iDIODE (medium) and VDS (bottom) for CCLAMP = 100nF and CCLAMP = 1000nF
VGS (10V/div, 2µs/div), iDIODE (2A/div, 2µs/div), VDS (200V/div, 2µs/div).
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VL
Power density of the converter is 8W/inch3 , being the
dimensions 40mm x 35mm x 16mm.
i LK
LLK
VCLAMP
IMAG
Switching frequency is 150kHz. Transformer core is a low
profile RM6 with 24 turns in primary (LMAG = 250µH) and 2
turns in secondary. Transformer leakage inductance is 1.8µH,
measured from primary.
nVOUT
Cequiv
i DIODE/n
VC
Main and auxiliary MOSFETs are PHB7N60E (SOT 404,
600V, 7A, 1.2Ω). The rectifier diode is PBYR745B (SOT
404, 45V, 7A, 0.57V). The output capacitors are 3 x 680µF6.3V-17mΩ.
iDIODE/n = iLK - IMAG
d(iDIODE/n)/dt = di LK/dt
Figure 8. Operation of Flyback with Active Clamp:
Equivalent circuit during diode turn-off.
Figure 9 shows how the diode current changes under
different clamp capacitance values when the input voltage is
high. RMS value of the diode current is smaller when clamp
capacitance is higher (1000 nF).
IV. EXPERIMENTAL RESULTS
The circuit simulated in the previous section has been
tested in an actual prototype. Although the circuit was
designed to operate in a 1:10 ratio (36V to 373V), it also
operates even in a 1:20 ratio (18V to 373V).
However, at low input voltage the influence of the clamp
capacitor is smaller (figure 10), being very similar the diode
current with both capacitance values.
VGS
VGS
i DIODE
iDIODE
VDS
VDS
a) CCLAMP = 100nF
b) CCLAMP = 1000nF
Figure 9. Measured VGS(top), iDIODE (medium) and VDS (bottom) at VIN = 373V for different CCLAMP values.
VGS (10V/div, 2µs/div), iDIODE (2A/div, 2µs/div), VDS (200V/div, 2µs/div)
VGS
VGS
iDIODE
iDIODE
VDS
VDS
a) CCLAMP = 100nF
b) CCLAMP = 1000nF
Figure 10. Measured VGS(top), iDIODE (medium) and VDS (bottom) at VIN = 36V for different CCLAMP values
VGS (5V/div, 1µs/div), iDIODE (5A/div, 1µs/div), VDS (50V/div, 1µs/div).
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C = 1000nF
C = 100nF
Figure 13 shows the losses of the power stage at full load
(I = 2A) and no load (I = 0A). Figure 14 shows the efficiency
of the power stage for different loads. At high input voltages,
the circulating energy to achieve ZVS is big, producing high
losses even under no load conditions. However, at low input
voltage (battery range) the efficiency at low load keeps high
because 1) the circulating energy is small at low input voltage
and 2) the secondary RMS current is small at low load,
reducing the losses at low input voltage.
Efficiency (%)
85
80
75
70
65
60
18V
36V
48V
176V
311V
373V
Input voltage (V)
Full load
Figure 11. Measured efficiency with CCLAMP = 100nF and CCLAMP = 1000nF
NO load
The output capacitors needed to filter the diode current are
the same with CCLAMP = 100nF and CCLAMP = 1000nF since
the worst condition is at low input voltages where the
influence of the clamp capacitance is negligible.
The selected clamp capacitance for this particular design is
100nF for the sake of size. Figure 12 shows the current
through the diode and the drain to source voltage of the main
MOSFET when CCLAMP = 100nF at different input voltages
(18V, 36V and 373V). ZVS is achieved at voltage higher
than 80V. At low voltage (18V, 36V), some ZVS would be
possible with the magnetizing inductance energy, however
dead times are adjusted to optimize the higher input voltages.
RMS diode current is very high at low voltage, it explains
the reduction of efficiency at low voltage. The resistive
elements in secondary are the diode resistance (DC resistance
is around 7mΩ), the secondary winding resistance and the
ESR of the output capacitors. RMS diode current is around
7.5A at 18V and 5A at 36V. However, RMS diode current at
373V is around 2.5A.
4
3
2
1
0
18V
36V
48V
176V
311V
373V
Input voltage (V)
Figure 13. Measured efficiency versus input voltage at full load (2A) and no
load (0A) (CCLAMP = 100nF).
90
Vin = 18V
80
Efficiency (%)
Figure 11 shows the measured efficiency of the power
stage at full load (2A) with CCLAMP = 100nF and CCLAMP =
1000nF. Efficiency is very high, regarding the very wide
input voltage range (18V-373V). At high input voltages,
measured efficiency is higher with CCLAMP = 1000nF since
RMS current value is smaller.
Losses (W)
5
Vin = 36V
70
Vin = 48V
60
Vin = 176V
50
Vin = 311V
40
Vin = 373V
30
0.25
0.5
0.75
1
1.25
1.5
1.75
2
Output current (A)
Figure 14. Measured efficiency versus load at different input voltages
(CCLAMP = 100nF).
iDIODE
i DIODE
iDIODE
VDS
V DS
a) VIN = 18V
iDIODE (5A/div, 1µs/div), VDS (50V/div, 1µs/div)
VDS
b) VIN = 36V
iDIODE (2A/div, 1µs/div), VDS (50V/div, 1µs/div)
c) VIN = 373V
iDIODE (2A/div, 2µs/div), VDS (200V/div, 2µs/div)
Figure 12. Measured iDIODE (top) and VDS (bottom) for CCLAMP = 100nF at different input voltages.
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V. CONCLUSIONS
REFERENCES
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Flyback with Active Clamp since it presents a good trade-off [2] M. T. Zhang, M. M. Jovanovic and F. C. Lee, "Design Considerations
and Performance Evaluation of Synchronous Rectification in Flyback
between simplicity and efficiency. This topology provides 1)
Converters", IEEE Applied Power Electronics Conference (APEC’97),
a wide regulation capability even at no load, 2) ZVS
1997.
capability and 3) soft turn-off in the rectifier diode. The
[3] S. Ollero, E. de la Cruz, L. Alvarez and C. García, “New post-regulation
topology is analyzed in detail, highlighting the influence of
and protection methods for multiple output power converters with
the clamp capacitor.
synchronous rectification” International Telecommunication Energy
Conference INTELEC 1996, pp. 462-469.
Operating between 36V and 373V, the efficiency is higher
than 75% at full load (2A) for the whole input voltage range. [4] R. Watson, F. C. Lee and G. C. Hua "Utilization of an Active-Clamp
Circuit to Achieve Soft-Switching in Flyback Converters", IEEE Power
Maximum efficiency (81%) is around 170V. The converter
Electronics Specialists Conference (PESC94), 1994.
also works properly down to 18V, in this case, the current
P. Henze, H. C. Martin and D. W. Parsley, "Zero-Voltage Switching
peak penalized the efficiency (69% at 18V), however the [5] C.
in high Frequency Power Converters using Pulse Width Modulation",
operating range is very wide (1:20).
IEEE Applied Power Electronics Conference (APEC’88), 1988.
[6]
A CKNOWLEDGMENTS
Authors wish to thank Teresa Crespo and Andrés Soto for
their collaboration in this work.
G. Stojcic, F. C. Lee, S. Hiti, “Small-Signal Characterization of Active
Clamp PWM Converters” Virgina Power Electronics Conference, VPEC
Seminar, 1995.
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