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BJT AC SMALL SIGNAL ANALYSIS

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BJT AC SMALL SIGNAL
ANALYSIS
LECTURE 1: EQUIVALENT CIRCUIT MODELLING AND TWO PORT
ANALYSIS
EE320 ANALOGUE ELECTRONICS 2020/2021
Understanding equivalent circuit modelling.
• Modelling is a combination of circuit elements properly chosen to
best approximate the behavior of the actual circuit component under
specific conditions.
• In electrical/electronics engineering, modelling can take the form of
an equivalent or approximate circuit representation or a series of
mathematical expressions simulating the behavior of the system.
• In this section of the study, we will look at two models and compare
them to each other.
I. The re model
II. The hybrid model
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Brief comparison between re and hybrid
Table 1: re and hybrid compared
re model
Hybrid model
Used in design calculations from first principles
Heavily used in practice due to model reference in
manufacturer spec sheets.
Can be determined for any region of operation within
the active region.
Limited to a particular set of operating conditions.
Does little to account for output impedance level and
feedback effects.
Considers to a great extent the output impedance and
feedback conditions
Applying a small AC signal to a DC circuit with a BJT configuration, results in an AC output dependant on the DC
signal. Amplification of the the AC signal may result to extra input power provided by the DC voltage level.
However, due to the principle of superposition it is possible to perform and AC analysis of the circuit completely
independent of the DC conditions.
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Procedure for deriving and equivalent circuit
model.
To allow the AC analysis of the circuit, it is necessary to take the
following steps before the semiconductor is replaced by the model (re
or hybrid).
1. Set all DC sources to zero by replacing them with short circuit
equivalents connected to ground.
2. Replace all capacitances by short circuits equivalents. ( mainly due
to the low resultant reactances at amplifier frequencies)
3. Remove all elements by-passed by short circuit equivalents
introduced in steps 1 and 2 above.
4. Redrawing the network in a more convenient and logical form.
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Working area
EE320 ANALOGUE ELECTRONICS 2020/2021
Working area
EE320 ANALOGUE ELECTRONICS 2020/2021
Two-port system analysis
• Given an electronics box with no prior knowledge of what is going on
inside, it is possible to figure out the function of the box by
performing a two port analysis.
• The following parameters can be derived:
a) Input impedance Zi
b) Output impedance Z0
c) Voltage gain Av
d) Current gain Ai
EE320 ANALOGUE ELECTRONICS 2020/2021
A. Input Impedance Zi
• This is the impedance that is obtained by looking into the circuit. It is
purely resistive and can exist between a few ohms to megaohms.
• By ohms law this can be defined as the input voltage divided by the
input current.
𝑍! =
"!
#!
(1.1)
• Quick question: Can an ohmmeter by used to simply measure the
input impedance?
• Once the input impedance is determined, it can then be used for
varying ac signals fed into the circuit.
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Working area
EE320 ANALOGUE ELECTRONICS 2020/2021
Working area
EE320 ANALOGUE ELECTRONICS 2020/2021
B. Output Impedance Zo
• We can start by considering an amplifier as a voltage source. The
amplified output voltage can be considered as a source.
• Therefore, Zo can be taken as the internal resistance of the amplifier
itself.
• Quick question: Given a battery, how can you measure the internal
resistance?
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Working area
EE320 ANALOGUE ELECTRONICS 2020/2021
Output impedance conclusions
• The output impedance is determined at the output terminals looking
back into the system with the applied signal set to zero.
• Can range from a few ohms to 2MΩ
• Again here an ohmmeter can not be used
Note: In the course of this study, I will highlight design notes to take
into consideration when building circuits.
DN1: To deliver a high current gain to a load connected at the output of
an amplifier, design the amplifier such that Zo is as high as possible.
Usually Zo is so large it is considered as an open circuit.
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Working area
EE320 ANALOGUE ELECTRONICS 2020/2021
C. Voltage Gain Av
• This is a critical parameter of an amplifier.
• For a small signal amplifier, the voltage gain is simply the ratio of
output voltage Vo to the input voltage Vi .
𝐴$ =
""
"!
(1.3)
• An amplifier connected to no load is provided with what is referred to
as the no-load voltage gain AVNL .
• How is the no-load voltage gain related to the loaded voltage gain?
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Working area
EE320 ANALOGUE ELECTRONICS 2020/2021
Working area
EE320 ANALOGUE ELECTRONICS 2020/2021
D. Current Gain Ai
• This is a less important parameter than the voltage gain in amplifier
design.
• It is still critical to ensuring quality amplifier design.
• Current gain is simply the ratio of output current Io to input current Ii
𝐴! =
#"
#!
(1.4)
• Let us consider a loaded situation to derive a relationship between
current gain and voltage gain.
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Working area
EE320 ANALOGUE ELECTRONICS 2020/2021
E. Phase relationship 𝛷
• For AC small signal analysis where the reactances are so small and
often ignored in equivalent circuits; the resultant phase relationships
are fairly straightforward.
• The phase relationship is either in phase or 180° out of phase.
EE320 ANALOGUE ELECTRONICS 2020/2021
Lecture Summary
• In this lecture we have been introduced to the concept of modelling
and equivalent circuit derivation.
• We looked at the importance and use of two port analysis.
• Parameters of primary importance for amplifiers include: Zi, Zo, Av
and Ai.
• How the applied frequency at the low and high end of the frequency
spectrum affects the amplifier response will be discussed in later
topics.
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Lecture 2: The re transistor model!
• This model employs a diode and a current controlled source.
• A current controlled source is one where the parameters of the
current source are controlled by a current elsewhere in the circuit.
• BJTs in amplifiers are called current controlled devices.
In this lecture we will look at the common base and common emitter
configurations.
Why not the common collector? We find that for most circuit designs
the common emitter will behave similarly to the common collector.
This aspect will be looked at further in the series.
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Common Base Configuration (CB)
• In this configuration, the base is common to both the input and
output terminals of the two port system.
• A typical BJT semiconductor device has a forward biased junction
between the base and the emitter which can be visualized as a diode.
• The output current exists at the collector terminal with the input
current at the emitter terminals.
• So we have three aspects: a diode, input current (Ie) and output
current (Ic).
Note: In terms of notation, we will use small letters for subscripts in AC
analysis and will stick to capital letters in DC operation.
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CB configuration re model cont.
• The diode can be replaced by an equivalent ac resistance (rac) which is
the resistance which also exists in the emitter leg of the BJT.
𝑉'
π‘Ÿ%& =
π‘€β„Žπ‘’π‘Ÿπ‘’ 𝑉' 𝑖𝑠 π‘‘β„Žπ‘’ π‘‘β„Žπ‘’π‘Ÿπ‘šπ‘Žπ‘™ π‘£π‘œπ‘™π‘‘π‘Žπ‘”π‘’
𝐼(
(26π‘šπ‘‰ − π‘–π‘‘π‘’π‘Žπ‘™ π‘Žπ‘›π‘‘ 25π‘šπ‘‰ − π‘π‘Ÿπ‘Žπ‘π‘‘π‘–π‘π‘’)
• In our equivalent model, rac will be replaced by re, the ac resistance of
the diode in the re-model.
• From DC conditions the collector current IC is controlled by the input
current IE by an 𝛼 factor. 𝐼) = 𝛼 𝐼*
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Working area
EE320 ANALOGUE ELECTRONICS 2020/2021
A. Input impedance (Zi)
• Consider the derived re model for a pnp configuration. When we look
into the input side it is obvious that the input impedance Zi for the CB
configuration is simple re.
𝑍! = π‘Ÿπ‘’
(1.5)
• Typical values of input impedance for a CB config. ranges from a few
ohms to about 50Ω max.
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B. Output impedance (Zo)
• As usual with two port systems, when determining the output impedance,
we set the input signal to zero.
• For the derived re model, this means setting Ie= 0A and thus Ic= 0A. This
results in an open circuit equivalence at the output terminals.
• Therefore,
𝑍! = ∞ Ω
(1.6)
• In practice for CB configuration, the output impedance in typically in the
Megaohm range.
• This parameter can also be determined from the output characteristics.
DN2: Generally, for CB configuration the input impedance is relatively low,
and the output impedance is quite high.
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Working area
EE320 ANALOGUE ELECTRONICS 2020/2021
C. Voltage gain (AV) and Current gain (Ai)
• To derive this, we will express the CB configuration with a pnp BJT as
a two-port system with a load connected.
• The voltage gain will be a ratio of output voltage to input voltage
taking caution of the voltage polarities and current directions.
+#
𝐴$ = 𝛼 ,(
(1.7)
• The current gain for this configuration and BJT is:
𝐴! ≈ −𝛼
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(1.8)
Working area
EE320 ANALOGUE ELECTRONICS 2020/2021
Working area
EE320 ANALOGUE ELECTRONICS 2020/2021
D. Phase relationship
• The voltage gain has a positive value therefore, Vo and Vi are in phase
for the common base configuration with a pnp.
• The current gain has a negative value for a CB configuration therefore,
the input and output currents are 180° out of phase. This for a pnp
BJT
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The Common Emitter (CE) configuration
• In the CE configuration, the emitter is common to both the input and
the output terminals of the two-port system.
• To derive the re model, the base-emitter junction is replaced by re
and the collector-base junction is replaced by a current controlled
source similar to the CB configuration.
• In the CB configuration, the input current was Ie while in this CE case
the input current is Ib .
• Recall for now that: Ic = β IB
• We will now derive the re-model for the CE configuration for an npn
BJT in the Working area next.
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Working area
EE320 ANALOGUE ELECTRONICS 2020/2021
a) Input Impedance (Zi)
𝑉! 𝑉-( 𝐼( π‘Ÿπ‘’
𝑍! = =
=
𝐼𝐼𝐼𝛽𝐼- π‘Ÿπ‘’
𝑍! ≈
𝐼𝑍! ≈ π›½π‘Ÿπ‘’
(1.9)
• The input impedance is β times the resistive element in the emitter
leg. Typical values range from a few hundred ohms to 7K
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b) The output impedance (Zo)
• The CE model analysed so far requires derivation of the output
impedance from the output characteristics.
• As usual for derivation from the circuit model, we need to set the
input signal Ib=0A so that Ic=0A.
• Let us look at the characteristic curves of the output in the next
Working area.
• We will conclude that for CE config. the higher the collector current
the less the output impedance obtained and that:
𝑍. = π‘Ÿ.
(1.10)
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Working area
EE320 ANALOGUE ELECTRONICS 2020/2021
c) Voltage gain and current gain
• For a CE configuration with an npn transistor
𝐴$ = −
+#
,(
This for a CE configuration with ro=∞Ω
Note that some conditions will have to consider the value of ro
• The current gain Ai is simply β at the same conditions.
Let us derive these now.
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(1.11)
Working area
EE320 ANALOGUE ELECTRONICS 2020/2021
d) Phase relationship
• Vo and Vi are 180° out of phase
• Io and Ii are in phase.
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CE configuration re model
• We have established so far that:
𝑍! = π›½π‘Ÿπ‘’ π‘Žπ‘›π‘‘
𝐼& = 𝛽𝐼- π‘Žπ‘›π‘‘
𝑍. = π‘Ÿ.
Therefore, we can follow the re model pattern for CB and derive the re
model for CE configurations which should also be used for CC
configurations.
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Lecture 3: The hybrid equivalent Model!
• The resistance parameter of the emitter leg re is derived from the
thermal voltage (26mV) and the DC emitter current IE . This means
that the value of re varies with varying IE determined by the Q point.
• This variance in values of re is not suitable for industry and design
standards. Therefore, manufacturers use what are known as hybrid
parameters for specific design conditions.
• The main reason really is specification sheets can not provide
parameters for an equivalent circuit at every operating point.
• A Q-point can be chosen to best define the general characteristics of
the device.
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H-parameters cont.
• Here is an example of specification sheet data showing H-parameters
of the 2N4400 transistor device.
Design conditions: f= 1KHz, IC = 1mA, VCE= 10V (DC output voltage and
current for CE config.)
Table 2: H-parameter specification sheet sample
H-Parameter
min
max
unit
Input Impedance
hie
0.5
7.5
KΩ
Voltage feedback ratio
hre
0.1
8
X10!" unitless
Small-signal current gain
hfe
20
250
unitless
Output admittance (S)
hoe
1
30
µS
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H-Parameter cont.
• An immediate advantage of using a specification sheet is the
immediate knowledge of the typical levels for device parameters
• hie, hre, hfe and hoe are referred to as the H-parameters
• Given a two-port system, with Vi, Ii, Io and Vo; the following
equations govern operation with h-parameters:
𝑉! = β„Ž// 𝐼! + β„Ž/0 𝑉.
1.12
𝐼. = β„Ž0/ 𝐼! + β„Ž00 𝑉.
1.13
We can see a mixture of variable of output voltage and current hence
the name hybrid. How best can the equations above be remembered?
• I found out that a matrix method helps with deriving the equations.
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Working area
EE320 ANALOGUE ELECTRONICS 2020/2021
H-Parameter cont.
• We can find the values of h11, h12, h21 and h22 using isolation by
independently setting the supply signals Vo and Io to zero.
• When we set Vo=0 ( by short circuiting) we get for equation 1.12
𝑉!
β„Ž// = π‘œβ„Žπ‘šπ‘ 
1.14
𝐼!
• The ratio of voltage to current shows that h11 is an impedance
parameter.
• Since it is derived by shorting the output voltage, it is also referred to
as the short circuit input impedance parameter hi
• Subscript 11 shows that the quantities are a ratio of input parameters
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H-Parameter cont.
• Still on equation 1.12, if we set Ii=0A by placing an open-circuit in the
input leads we get:
𝑉/
β„Ž/0 =
unitless
1.15
𝑉.
• It is a ratio of voltage levels hence it is unitless
• Subscript 12 shows it is a ratio of input parameter to output
parameter
• Derived from placing open-circuit at the input and also reverse from
the norm of output to input ratio.
• h12 is hence open-circuit reverse transfer voltage ratio hr
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H-Parameter cont.
• In equation 1.13, when we set Vo=0 again by placing a short at the
output terminals
• We get
β„Ž/0 =
#"
#!
𝑒𝑛𝑖𝑑𝑙𝑒𝑠𝑠
1.16
• Subscript is 12, denoting ratio of output to input parameter
(normal/forward behavior).
• h12 is the short circuit forward current ratio hf
• Still in equation 1.13, when we set Ii=0A by placing an open in the
input leads we get:
β„Ž00 =
#$
"$
Siemens
• h22 is the open circuit output conductance ho
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(1.17)
H-Parameter cont.
• Now that we know the units/dimensions of the h parameters we can
reverse engineer equations 1.12 and 1.13 to develop circuit
equivalents
• These circuit equivalents will lead us to a model
• 1.12 gives voltage hence we can you KVL to reverse engineer it!
Working area
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H-Parameter cont.
• 1.13 gives us a current output therefore we use KCL to reverse
engineer and finally derive our exact hybrid equivalent model!
Working area
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H-parameter modelling for BJTs
• The BJT being a linear three terminal device can be configured as
either CB, CE or CC.
• The key thing is to represent the device as a two-port system then
replace the system with the model.
• The h-parameters will vary with each configuration and hence
subscript notation will show which configuration is being referred to.
• For CE subscript e will be used, for CB subscript b will be used and for
CC subscript c will be used.
• See our analysis for CE and CB configurations in the working area and
accompanied explanations.
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Working area
EE320 ANALOGUE ELECTRONICS 2020/2021
Deriving an approximate hybrid equivalent circuit
• Normally β„Ž, ≈ 0 and thus β„Ž, 𝑉. ≈ 0 allowing the replacement with
an short circuit
/
• The output admittance ho is such that is very large allowing for
1"
replacement with an open circuit.
• Therefore the following approximate models result (shown in working
area)
• Having derived the models for both hybrid and re we can compare
and use analogy to derive some equivalent equations.
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Working area
EE320 ANALOGUE ELECTRONICS 2020/2021
re and hybrid equivalent parameters
β„Ž!( = π›½π‘Ÿ(
(1.18)
β„Ž2( = 𝛽
(1.19)
β„Ž!- = π‘Ÿ(
(1.20)
β„Ž2- = −𝛼
(1.21)
• The negative sign in equation 1.21 is due to the fact the standard
hybrid equivalent points down (CB) while for re (CB) it points
upwards.
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Sample question
• Working area
EE320 ANALOGUE ELECTRONICS 2020/2021
Working area
EE320 ANALOGUE ELECTRONICS 2020/2021
Graphical determination of H-Parameters
• Using partial derivatives, the magnitude of H-parameters for small
signal transistor circuits in the region of operation can be derived.
• For CE configurations:
working area ( show sample graphical analysis)
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Graphical computation of h-params.
• hie and hre are determined from the input or base characteristics
• hfe and hoe are obtained from the output or collector characteristics
β„Ž"# ≈
βˆ†%!"
βˆ†"!
∡ 𝑉&' 𝑖𝑠 π‘π‘œπ‘›π‘ π‘‘π‘Žπ‘›π‘‘
(1.22)
β„Ž(#
βˆ†π‘‰)#
≈
βˆ†π‘‰*#
∡ 𝐼+ 𝑖𝑠 π‘π‘œπ‘›π‘ π‘‘π‘Žπ‘›π‘‘
(1.23)
β„Ž,#
βˆ†π‘–*
≈
βˆ†π‘–)
∡ 𝑉&' 𝑖𝑠 π‘π‘œπ‘›π‘ π‘‘π‘Žπ‘›π‘‘
(1.24)
β„Ž!#
βˆ†π‘–*
≈
βˆ†π‘‰*#
∡ 𝐼+ 𝑖𝑠 π‘π‘œπ‘›π‘ π‘‘π‘Žπ‘›π‘‘
(1.25)
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EE320 ANALOGUE ELECTRONICS 2020/2021
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