FM Demodulation Techniques
& PLL
Updated: 4/26/15
Sections: 4-11 to 4-15
Outline
•
FM Demodulation Techniques
FM Demodulator Classification
•
Coherent & Non-coherent
– A coherent detector has two inputs—one for a reference signal, such as the
synchronized oscillator signal, and one for the modulated signal that is to be
demodulated.
– A noncoherent detector has only one input, namely, the modulated signal
port.
– Example: The envelope detector is an example of a noncoherent detector.
•
Demodulator Classification
– Frequency Discrimination
• Noncoherent demodulator
• FMàAMàEDàm(t)
– Phase Shift Discrimination
• Noncoherent demodulator
• FMàPMàm(t)
– Phase-Locked Loop (PLL) Detector
• Coherent demodulator
• Superior performance; complex and expensive
Let’s look at each!
Frequency Discrimination
•
Components
– Bandpass Limiter: Consists of Hard Limiter & BP Filter
– Discriminator (frequency discriminator gain: KFD V/rad - assume unity)
– Envelope Detector
Note: Df=Kf
Freq. deviation sensitivity
THE OUTPUT WILL BE:
DC Component can be blocked
by an AC coupled circuit
Frequency Discrimination - Discriminator
• How the discriminator operates:
– Generally, has a gain of KFD V/rad
– In freq. domain: H(w) = jw KFD
– In time domain: v2(t) d[v1(t)]/dt
Frequency Discrimination
FM Wave
Output of
Tuned Circuit
(discriminator)
Frequency Discrimination – Slope Detector
• In practice the differentiator can be approximated by a
slope detector that has a linear frequency-to-amplitude
transfer characteristic over the bandwidth BW –One
drawback is that it is narrow band
Tuned Circuit
BT is Carson’s BW
Frequency Discrimination – Slope Detector
Transfer
Curve
Output
Slope Detector Transfer
Characteristics
Frequency Discrimination – Slope Detector
• Major Limitations:
– It is inefficient, as it is linear in very limited frequency range.
– It reacts to all amplitude changes (needs a limiter).
– It is relatively difficult to tune, as tuned circuit must be tuned to
different frequency than carrier frequency.
Transfer
Curve
Frequency Discrim. – Balanced Slope Detector
•
•
Also called balanced discriminator
Uses two tuned circuits each set to a
fixed frequency
Envelope Detector
T’: fc+ΔF
D1
– f1 = 3ΔF + fc & f2 = 3ΔF – fc
•
The center-tapped transformer feeds
the tuned circuits
–
•
•
•
Tuned circuits are 180 degrees out of phase
When fi>fcà Then output of T’(+Ve) >
output of T’’ (-Ve) à max voltage
across D1 (net voltage positive)
When fi<fcà Then output of T’(+Ve) <
output of T’’ (-Ve) à max voltage
across D2 (net voltage negative)
When f=fcà voltage across D1=D2
(the net voltage will be zero)
T’’: Fc-ΔF
D2
Frequency Discrim. – Balanced Slope Detector
• Uses two tuned circuits each set to a fixed frequency
– f1 = 3ΔF + fc & f2 = 3ΔF - fc
90 Degree out of phase
After the
Limiter
K1 and K2 are constant
depending on values of the
series capacitors and
parallel resonant circuits
Balanced Slope Detector - Transfer Curve
Major Advantage: Larger Range
We still like to pull it to +/-δf !
Useful
Range
Phase Shift Discriminator – Quadrature Detector
•
•
•
Very common in TV receivers
It uses a phase shift circuit
It converts the instantaneous frequency deviation in an FM signal to phase shift
and then detects the changes of phase
– Cs results in -90 deg. Shift
– The tuned circuità additional phase shift proportional to instantaneous frequency
deviation from fc
Another approach
Balanced zero-crossing FM detector
Free-running
• This is a hybrid
circuit fc
PW changes
– Analog and digital combination
Linear frequency-to-voltage
Characteristic: C[fi(t) – fc]
For the case of FM:
fi(t) = (1/2p)Df m(t)
IF fi > fc à Tc>Ti
Qdc > Qdc à Vout > 0
IF fi < fc à Tc<Ti
Qdc < Qdc à Vout < 0
Phase-Locked Loops
•
•
•
•
•
Applications: Frequency synthesizer, TV, Demodulators, clock recovery
circuits, multipliers, etc.
Basic Idea: A negative feedback control system
Basic Components: PD, Loop Filter (LPF), VCO
Types: Analog / Digital
Operation: when it is locked it will track the input frequency: wout=win
Mixer
Basic Operation
• as
Km
Kv
- Coherent demodulator
- Out of phase 90 deg.
Vin(t)
V1(t)
Vo(t)
Km
V1(t) = Km Vin(t).Vo(t)
Km is the gain of the multiplier
PLL Characteristics
http://www2.ensc.sfu.ca/people/faculty/ho/ENSC327/Pre_13_PLL.pdf
Analog PLL
When locked, that is when no phase error à exactly 90 deg. Diff (90 deg. out of phase)
Phase detector constant gain V/rad
Vp = KmAiAo/2=Kd
Analog PLL
Locked in frequency
Analog PLL – Linear Model (Transfer Function)
Open loop transfer function:
Phase Detector
Phase Detector Gain
G(f) = Kv Kd F(f)/jw
G(f)
Vo(t)
VCO Gain
Analog PLL – Linear Model (Transfer Function)
Open loop transfer function:
Phase Detector
G(f) = Kv Kd F(f)/jw
Loop Gain: Kd Kv
G(f)
Thus:
Θin ( f ) − Θo ( f ) = Θe ( f )
G( f ) +1
Θo ( f ) = Θe ( f )⋅ G( f ) → Θin ( f ) = Θo ( f )
Loop Gain: Kd Kv
G( f )
Θo ( f )
G( f )
K d ⋅ K v ⋅ F( f ) / jω
K d ⋅ K v ⋅ F( f )
H( f ) =
=
=
=
Θi ( f ) G( f ) +1 1+ K d ⋅ K v ⋅ F( f ) / jω jω + K d ⋅ K v ⋅ F( f )
Remember: G(f) is Open loop transfer function
Analog PLL – Linear Model (Phase Error Function)
Θe ( f ) Θin ( f ) − Θo ( f )
Θo ( f )
He ( f ) =
=
= 1−
= 1− H ( f )
Θi ( f )
Θi ( f )
Θi ( f )
Phase Error
Transfer Function
jω
He ( f ) =
jω + K d ⋅ K v ⋅ F( f )
→ Θe ( f ) = H e ( f )⋅ Θi ( f )
What is the steady-state error?
We use Final Value Theorem of the Laplace Transform
Θe (∞) = lim s→0 sΘe (s);s = jω
s2
Θe (∞) = lim s→0 Θi (s)⋅
s + K d ⋅ K v ⋅ F(s)
Note that ideally we want this
to be zero – this has to do with
K and F(s) – loop filter
characteristics!
à Lets look at special cases!
Analog Loop Filter
• There are e number of options for the loop filter
• In the case of first-order PLL we assume F(s) = 1 (All-pass
filter)
Analog Loop Filter – First Order
• We assume All-pass filter:
– F(f) = 1àFirst Order PLL
H e ( f ) = 1− H ( f )
jω
He ( f ) =
jω + K d ⋅ K v
Kd ⋅ Kv
H( f ) =
jω + K d ⋅ K v
PLL Basic Operation
Analog Loop Filter – First Order
• Example 1: Assume the loop is locked and we have a phase
step change. Calculate the steady-state phase error:
Remember:
θ in (t) = Δθ ⋅ u(t)→ Θin (s) = Δθ / s
s ⋅ Δθ
Θe (∞) = lim s→o
=0
s + Kd ⋅ Kv
Θe (∞) = lim s→0 sΘe (s);s = jω
s2
Θe (∞) = lim s→0 Θi (s)⋅
s + K d ⋅ K v ⋅ F(s)
Indicating no phase error!
• Example 2: Assume the loop is locked and we have a
frequency step change. Calculate the SS phase error:
ωin (t) = ω c + Δω ⋅ u(t)→ θ in (t) = Δω ⋅ t
2
Θin ( f ) = Δω / ( jω ) ;s = jω
Note that the larger K
The smaller the error will be!
Θin (s) = Δω / (s)2
s2
Δω
Θe (∞) = lim s→o
Θin (s) =
s + Kd ⋅ Kv
Kd ⋅ Kv
Indicating a slight phase error!
Analog Loop Filter – First Order
How does the control voltage v2(t) change if the
frequency of the input signal changes?
ωin (t) = ω c + Δω ⋅ u(t)→ θ in (t) = Δω ⋅ t
2
Θin ( f ) = Δω / ( jω ) ;s = jω
Θin (s) = Δω / (s)2
v1 (t) = K d ⋅ vo (t)⋅ vin (t)
V1 ( f ) = K d ⋅ Θe ( f )
V1 ( f ) = K d ⋅ Θin ( f )⋅
jω
; F( f ) = 1
jω + K d ⋅ K v
V1 ( f ) = K d ⋅ Δω / ( jω )2 ⋅
V1 ( f ) =
v1 (t) =
jω
jω + K d ⋅ K v
K d ⋅ Δω
jω ( jω + K d ⋅ K v )
K d ⋅ Δω
(1− e−kt );k = K d ⋅ K v
k
V1(t)
Analog Loop Filter – First Order
How does the control voltage v2(t) change if the
frequency of the input signal changes?
ωin (t) = ω c + Δω ⋅ u(t)→ θ in (t) = Δω ⋅ t
2
Θin ( f ) = Δω / ( jω ) ;s = jω
Θin (s) = Δω / (s)2
v1 (t) = K d ⋅ vo (t)⋅ vin (t)
V1 ( f ) = K d ⋅ Θe ( f )
V1 ( f ) = K d ⋅ Θin ( f )⋅
jω
; F( f ) = 1
jω + K d ⋅ K v
V1 ( f ) = K d ⋅ Δω / ( jω )2 ⋅
V1 ( f ) =
v1 (t) =
jω
jω + K d ⋅ K v
K d ⋅ Δω
jω ( jω + K d ⋅ K v )
K d ⋅ Δω
(1− e−kt );k = K d ⋅ K v
k
V1(t)
Analog Loop Filter – First Order
Where is the demodulated signal if the input is an FM modulated signal?
s(t)= Ac cos(ω c t + θ in (t))
V1(t)
D
θ in (t) = D f ∫ m(τ )d τ ⇒ Θin (s) = f M (s)
s
K
Θ (s)
Θout (s) = V2 (s)⋅ v ⇒ V2 (s) = s ⋅ out
s
Kv
Θout (s) = Θin (s)H (s)
% Df
( s Df Kd Kv
V2 (s) = '
M (s)⋅ H (s)*
=
⋅
M (s)
& s
) Kv Kv s + Kv Kd
2π K f
ω 3−dB = K v K d >> 2π f ⇒ V2 (s) =
M (s)
Kv
v2 (t) =
2π K f
m(t)
Kv
Kv (Hz/V)
Frequency deviation sensitivity Kf (Hz/V);
Or Df (rad/V)
Analog Loop Filter – First Order- Example
Assume s(t) =cos( 1000pi + 50sin(20pi.t)) passing through a PLL
Phase detector gain Kd=0.5 V/rad
VCO gain constant Kv=1000pi rad/sec-volt
Answer the following questions:
V1(t)
1.
2.
3.
4.
5.
6.
7.
8.
9.
What is the modulating frequency?
What is the carrier frequency?
What is the modulation Index.
Find the maximum freq. Deviation.
Frequency Deviation Sensitivity (Df in rad/V)
Calculate the total loop gain.
What will be the expression for the modulating signal, m(t)?
Find v2(t).
Calculate the steady state phase error.
Analog Loop Filter – First Order- Example
Assume s(t) =cos( 1000pi + 50sin(20pi.t)) passing through a PLL
Phase detector gain Kd=0.5 V/rad
VCO gain constant Kv=1000pi rad/sec-volt
Answer the following questions:
V1(t)
1.
2.
3.
4.
5.
6.
7.
8.
9.
What is the modulating frequency?
What is the carrier frequency?
What is the modulation Index.
Find the maximum freq. Deviation.
Frequency Deviation Sensitivity (Df in rad/V)
Calculate the total loop gain.
What will be the expression for the modulating signal, m(t)?
Find v2(t).
Calculate the steady state phase error.
ωin (t) = ω c + Δω ⋅ u(t)→ θ in (t) = Δω ⋅ t
Θin ( f ) = Δω / ( jω )2 ;s = jω
Θin (s) = Δω / (s)2
s(t)= Ac cos(1000π t + 50sin(20π t))
V2 (s) = D f
Kd
M (s)
s + Kv Kd
s2
Δω
2π ⋅10
Θe (∞) = lim s→o
Θin (s) =
=
= 0.04
s + Kd ⋅ Kv
K d ⋅ K v 500π
2π K f K d
V2 (s)
500π
=
=
= 1@− 2.3o
M (s) ω =20 π s + K v K d jω + 500π
→ 360(0.04) / 2π = 2.3deg
v2 (t) = m(t)@− 2.3o = cos(20π t − 2.3o )
Applications of PLL
• Used as demodulators (FM or AM demodulator)
– AM coherent Detectors
• Frequency synthesizer
Frequency Synthesizer Using PLL
The frequency of Vout is locked (synchronized) to the input frequency:
Classically, M and N are integers.
Fractional-N technique can be applied to make N non-integer
References
• Leon W. Couch II, Digital and Analog Communication
Systems, 8th edition, Pearson / Prentice, Chapter 4
• Contemporary Communication Systems, First Edition by M
F Mesiya– Chapter 5
•
See
Notes
(http://highered.mcgraw-hill.com/sites/0073380369/information_center_view0/)