IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS, VOL.
37,
NO.
9,
SFPTEMBER
1990
1077
Power Supply Rejection Ratio in
Operational Transconductance Amplifiers
Abstract -The power supply rejection ratio (PSRR) of operational
amplifiers is analyzed. An analyzing technique based on cuts in suhcircuits is presented that allows hand calculation of PSRR of any circuit.
In this paper it is shown that the PSRR of the single stage operational
amplifier (OTA) has an order of magnitude better PSRR than the
commonly used Miller OTA. The analyses are compared with hand
calculations and SPICE level-2 simulations on a realized improved
Miller OTA structure.
I. INTRODUCTION
T
H E DESIGN of complex systems with analog, digital,
and switched-capacitor building blocks integrated on
one chip suffers from large signal variations on the power
supply lines (up to 100 mVpeak[l])that are introduced by
the digital and the switched-capacitor networks.
Especially in those cases where low-level signals have to
be measured, the use and development of high performance amplifiers are necessary. In analog building blocks
and switched-capacitor structures, the main building
blocks are operational transconductance amplifiers
(OTA's). For this reason the performance of such amplifiers must be studied and analyzed as function of the
power supply variations. The power supply rejection ratio
(PSRR) is very often only specified at dc or at very low
frequencies ( f < 1 Hz). In order to reduce the influences
of 50/60 Hz clock-frequencies and high frequency power
supply noise, the performance at frequencies up to the
bandwidth of the system, which is for amplifiers the gain
bandwidth (GBW), must be studied. This is especially
important in aliasing (sampled data) contexts where high
frequency power ~ ~ p pnoise
l y can be folded back into the
signal band. This effect can drastically decrease the PSRR
performance, as has been demonstrated in switchedcapacitor filters [ll.
The performance of a system influenced by powersupply variations can be described by the PSRR. In the
next section the definition of the PSRR is described.
From this definition it can be concluded that for amplifiers, the PSRR at high frequencies ( f do mini,n, < f < GBW)
can be improved by increasing the GBW of the amplifier.
Therefore, the PSRR can be best normalized to 2 . T .
Manuscript received August 19. 1987; revised February 6, 1989. This
paper was recommended by Associate Editor C . A. T. Salama.
The authors are with the Department of Electrical Engineering,
Katholieke Universiteit Leuven, 3030 Heverlee. Belgium.
IEEE Log Number 9037126.
VIN.-m-$Frn
vPOWER
Fig. 1. A block diagram of a general electrical circuit.
GBW/s in order to be able to compare different amplifier structures. This normalization results in the parameter l / A p ( s l :i.e., the reciprocal of the power supply gain
(PSR, as distinct from PSRR). Secondly, a technique to
calculate the PSRR is discussed. Using this technique,
several op-amps, such as an OTA and a Miller op-amp,
are analyzed. Finally, an improved two-stage amplifier is
studied and analyzed.
11.
DEFINITION
OF THE PSRR
A general electrical circuit as presented in Fig. 1 has an
input, an output, and a power node. Hence it has voltage
transfer functions from any node to any other node. In
many cases, only the transfer function from the input to
the output and from the power node to the output node
are important. If the transfer function of the power node
to the output node is called the power supply gain ( A p ) ,
and the transfer function of the input node to the output
node is called the open-loop transfer function ( A ) , the
PSRR is defined as (in the frequency domain s = j . 01
which is normally given in decibels ( = 20.log(A / A p ) ) .
By increasing the GBW of an amplifier, A b ) increases
( A h )= 2..sr.GBW/s for f > fdominant), and as a result the
PSRR increases, too. Thus to compare different amplifier
structures, the PSRR can be best normalized to 2 . 7 ~
GBW/s. From the definition, this results in the parameter l / A p ( s ) ,i.e., the reciprocal of the power supply gain.
In this text this parameter is called the PSR. If both
functions ( A ( s ) and PSRR(s)) are assumed to be firstorder, the PSR at high frequencies is a constant (see Fig.
2). The smaller A,(s) is (or the higher the PSR is), the
better the structure performance is.
The equivalent mathematical equation for the output
node as function of the input and of the power supply
node is described by the superposition of the power
supply gain and the open-loop gain, or uOut= A;u,
0098-4094/90/0900-1077$01.00 01990 IEEE
+
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS, VOL. 37, NO.
1078
......................................
.:
.
/.................:
. -
i
or
U , = - . RI
[ ( - ++ R2
.
:
.
...................
.
i
RI
P2
A7
Fig. 2. Bode dia ram of the o en loop gain ( A h ) ) , the power supply
rejection ratio &SRR(s)) a n 8 thk PSR: the reciprocal of the power
supply gain (AJs)).
Mw
9, SEPTEMBER. 1990
A
PSRR(s)
R2
1
PSRRl
1
PSRR2-Al
or if A1 x=-1, the PSRR of this system is approximately
equal to the PSRR of the first stage. At high frequencies
the gain of amplifiers usually decreases. So if PSRR2 >
PSRR1, the PSRR of the system can be dominated by the
second stage. A two-stage Miller amplifier, which is discussed later, is one example of this effect.
In this paper, a method to calculate the PSRR of
subcircuits is studied. Since in complex analog systems the
subcircuits are amplifiers, different amplifier structures
up to a frequency range equal to their GBW are analyzed
and compared.
IV. THEPSRR OF A SUBCIRCUIT
Fig. 3. A block diagram of a two-stage amplifier.
In a MOS transistor circuit, the voltage transfer functions are always realized by a transconductance (g, of a
transistor) and an admittance. For example, the gain of
an OTA is given by
gm
Aav,. If the system has different power supplies (e.g., an
A( S) =
(4)
go
+
s * c 1*
OTA has a positive ( V D D ) and a negative (Vss) power
supply), a power supply gain for each power node can be
defined separately. In this case A,,vdd ( A p ,uss)is called In fact, a MOS transistor converts this input gate-source
the transfer function from the V,, (Vss) node to the voltage into a current. At the gain node (and there is only
output node, whereby the Vss (V,,) is ac-grounded. On one gain node, otherwise it can be divided in two subcirthe basis of the knowledge of these transfer functions, the cuits as is presented in Fig. 3), this current is converted
into a voltage by the admittance at that node. The power
PSRR of each power supply can be defined as
supply variation also introduces in that circuit a current
A
A
or there exists a power supply transconductance: GM,.
PSRR, Udd =
and PSRR, U,, = -. (2) This introduced current is converted into a voltage at that
Udd
A , ,U,,
same gain node as for the signal transfer function. As a
result, the denominator of the voltage transfer functions
111. PSRR ON CIRCUIT
LEVEL
A J s ) and A ( s ) are equal to each other and hence the
In order to be able to calculate the PSRR of the total PSRR is given by the ratio of the signal transconductance
system, the system can be divided into subcircuits or into ( G M ) and the power supply transconductance (GM,) or
a block diagram, using control-system theory. In Fig. 3, an
example of a multistage amplifier with a resistance feed(5)
back network is shown. The subcircuits in the figure must
not contain feedback loops and the characteristics of the
different subcircuits must not be influenced by each other. In order to find the power supply transconductance of the
In some cases it is necessary to use the input impedance internal nodes of the circuit, the following technique is
of the next stage in the subcircuit, e.g., the load capaci- used.
The power supply under study is enclosed by a curve,
tance of an OTA. Once the system is split, the different
whereby
this curve cuts only once every branch coming
subcircuits can be separately calculated and evaluated. As
from
that
power supply. The gain node is connected to
an example, the circuit in Fig. 3 can be split into two
subcircuits without any feedback loop. The PSRR of the ac-ground. As a result, the current flow into the gain
these subcircuits ( A , / A p l and A , / A p 2 )being known, it node due to the input-output transfer path can be calcuis possible to calculate the PSRR of the total system. The lated separately from the one due to any impedance
between the gain node and any power supply line. The
output ( U , ) of the system shown is given by
following are properties of this technique.
4 2 +A 2 4 1
1) For every cut, each branch is divided in two cutsides.
U, =
1 + A 2 * A 1 - R/(2 R , R 2 ) '"
There is always at one cutside a current transfer function
to the gain node. The current transfer function is given by
Al.A2
the ratio of the current that flows into the gain node (into
1+ A 2 * A , . R /(
2 R , + R , ) *'in
the ac-ground because the gain node is ac-grounded) and
~
7
+
+
1079
STEYAERT AND \ANSEN' PSKK OTA'S
I
TABLE 1
HANDCALCULAT~ONS
AND SPICE SIMULATIONS
ON AN OTA
OTA small signal spec's out of SPICE level 2
4.7 4.65
8.4 8.6
191 191
gm
g0
CP
3.5
14
64
3.5
3
PA/Y
71
93
nA/Y
fF
14.6 7.2
PSRR, vdd
low-freq.
I
Fig 4
f-3dB
Curves C1 and C2 for cdlculating the power supply
transconductance
PSR
77dB
12kHz
53dB
76dB
9kHz
49dB
47dB
2lkHz
28dB
47dB
2OkHz
27dB
PSRR,vss
low-freq.
the current that is applied to that cutside. If there is no
current transfer function for either of the cutsides, then
the PSRR of the subcircuits is not influenced by that
branch.
2) If there exists a current transfer function for one of
the cutsides, the power supply transconductance to the
gain node is given by the admittance seen into the other
cutside ( y , ) , multiplied by the ratio y 1 / ( y l + y , ) (with y 1
the admittance seen into the cutside where there exists a
current transfer function), and multiplied by the current
transfer function (or current gain). This product gives the
contribution of that branch to the PSRR in the subcircuit.
The summation of the power supply transconductances of
each branch results in the total power supply transconductance of the subcircuit. In a normal circuit design the
ratio y , / y , is much smaller than 1 ( y l /(yl + y 2 ) = 1,
which is further assumed in this text). Because the PSRR
is given by the ratio of the signal transconductance and
the power supply transconductance (5), a high PSRR can
be obtained by designing the admittance y , as small as
possible. This means also that the ratio of the impedances
on both cutsides must be made as high as possible.
As an example, the PSRR of an OTA is analyzed. The
structure is presented in Fig. 4. First the PSRR, cdd is
studied. Therefore the power supply is enclosed by curve
C1. Let us now discuss cut a. For this cut there exists a
current transfer function to the gain node at the cutside
of transistor M 8 : g m 7 / g m X .So the contribution of this
branch to the power supply transconductance is given by
the product of g m 7 / g I n xand the admittance seen into the
other cutside. In this example, this is the admittance seen
into the drain of M,: go, + s.C,,. Hence the contribution
of this branch is ( g o , + s . C p 5 ) . g m 7 / g m 8The
.
same can
be done for the other cuts, which results in a total GM,
( = io,, /
given by
~
3
~
~
)
with C, the drain-gate plus the drain-bulk capacitance
of the transistors. For the case C,,, (cut a), this C,, is a
drain-substrate capacitance if a p-well process is used. In
the case of an n-well, Cps is a drain-well capacitance.
f-3dB
P SR
However, in both cases C,, is the capacitance between
that node and the positive power supply rail.
Equation (6) can be simplified if the current mirrors
used have a current gain factor of one (gm7= gm8, g, =
g m 5 , gm, = g m 6 ) , and if the contribution of cuts b and c is
neglected (sol= go,, CPl= C,,>, to
(7)
This last assumption means that the two sides of the input
stage balance. As a result, the vdd signal appears on
nodes b and c as a common mode signal and is as a result
rejected in the circuit.
The signal transconductance of this amplifier is given
by GM = (gml g m 2 ) / 2 = gm1.So the PSRR is given by
(using relationships 5 and 7)
+
Analyzing the PSRR of the V,,, curve C2 in Fig. 4 is
used. The contribution of each branch in the transconductances is calculated and results in (GM, = io,, / Vss)
It has to be remarked that in this case mismatches in the
transconductances of the input transistors ( g m l and g m 2 )
have been included in the calculations. As can be seen
they can decrease the PSRR. If g,, = g,, (assuming that
the input stage balances), the PSRR, uSs can be simplified, resulting in
In Table I the relationships of the PSRR,udd and
PSRR, c, are compared with SPICE level 2 simulations
and they fit very well.
From this example it can be concluded that a high
PSRR, cdd can be realized by designing a very symmetrical
OTA. On the other hand, the phase of the PSRR, c~~ can
be at low frequencies (0" or 180") depending on the
1080
IEEE TRANSACTIONS
...............................................................
.................................
c1
OTA small signal s p e c ' s out o f SPICE l e v e l 2
gut
g0
CP
4.63 4.60
0.5 9.3
191 220
low-freq.
f-3dB
mismatch in the output conductance ( g o )of transistor M 6
and M5. Also the pole of the PSRR transfer function can
be situated in the left- or right-half plane, depending on
which parasitic capacitance is the largest. For the
PSRR,u,, it can be concluded that the output conductance (8,) and the sum of the drain-gate and the
drain-bulk capacitances of transistors M5, M 6 , and M 7
have to be made very small in order to realize a high
PSRR,v,,.
V. COMPARISON
OF DIFFERENT
AMPLIFIER
STRUCTURES
A. The Source-Coupled Input Stage with Active Load
A commonly used input stage of an amplifier is a
source-coupled differential pair with an active load, as
presented in Fig. 5. Studying the PSRR,udd, cut C1 is
used. It is clear that go, introduces a current with the
value g o 4 ' u d d . On the other hand, go, (via cut a ) introduces a current into the common mode node V, with a
value gol'udd.This current can only flow into the sources
of M1 and M 2 . It means that one half of that current
flows into the output node via the source of M 2 and the
other half via the current mirror M 3 and M4. The total
current (iddl introduced by a variation on the udd in the
gain node is then given by
'
dd
01
3.5 3.5 6.7 PA/'?
15
14 22.0 nA/V
779 fF
80
74
PSRR,Vdd
Fig. 5. A source-coupled input stage with active l o a d .
GM=-=g
37, NO. 9, SEPTEMBER. 1990
TABLE I1
HANDCALCULATIONS
AND SPICE SIMULATIONS
ON A SOURCE-COUPLED
INPUT STAGEWITH
ACTIVELOAD
P
.3r
:$zkinM.."
v
e
............................
ON CIRCUITS AND SYSTEMS, VOL.
+ g 04'
'dd
P SR
PSRR .vss
low-freq.
46dB
14kHz
23dB
46 dB
14kHz
23dB
f-3dB
91dB
4.6kHz
90dB
5kHz
PSR
58dB
58dB
parasitic capacitances (if the cascode transistors have the
same dimensions as the drive transistors). Hence only the
low frequency PSRR,udd can be improved by using cascode transistors, but the high frequency PSRR, vdd
( f 3 dB < f < GBW) will not be improved at all.
The PSRR,u,, can be calculated similar to the input
stage of an OTA (see (9)), which results in a PSRR, U,, of
gm 1
PSRR, U,, =
(14)
gm1 - gm2 *
(go9 + s.c,9).
gm1+ gm2
In Table 11, the hand calculations are compared with the
SPICE level-2 simulations. However, it has to be remarked that in this case the transistors are designed in a
separated p-well ( = no bulk effect). The capacitance C
,,
is, however, the total capacitance well-substrate of M1
and M 2 plus drain-substrate of M 9 . So in this case the
PSRR is mainly affected by the well-substrate capacitance of the input devices. If the structure is designed in
an n-well process, the input transistors can not be designed in a separated well and they are affected by the
bulk modulation. Due to this bulk effect an extra current
( i d ) flows into the gain node, given by
The transconductance of this stage is given by G M =
( g m l + g m 2 ) / 2= g m l , or the PSRR, vdd results in, using
(9,
Using the same technique for the parasitic capacitors, the
relationship becomes
PSRR, vdd=
g m1
go1 + go4 + S . ( C , l +
.
(13)
cp4)
A comparison of the hand calculations and the SPICE
simulations on this structure is presented in Table 11.
It can be concluded that in order to improve the high
frequency PSRR, mainly the parasitic drain-bulk capacitances of transistors M1 and M4 have to be made very
small. Inserting cascode transistors increases the output
conductances go, and go4,but it does not decrease the
(16)
So to improve the PSRR,Vss, matched input devices are
required and the drain-bulk capacitance of M 9 must be
minimized.
A
OTA
A widely used transconductance amplifier is the twostage amplifier presented in Fig. 6. This amplifier is
internally compensated with a Miller capacitance (Cc).
1081
STEYAERT AND SANSEN: PSRR OTA’S
St.9.
.
1
.-
stapc 2
QX2-
output
Fig. 7. Equivalent network of the Miller OTA for calculating
PSRR, ~,j,j.
Fig. 6. A two-stage Miller transconductance amplifier.
output
The first stage ( M l - M4) consists of a source-coupled
input structure with active load; the second one ( M 5 - M 6 )
consists of an inverter structure. Between the two gain
nodes a compensation capacitor is placed (Cc).
The study of the low frequency PSRR,u,, is worked
out by dividing the circuit in two subcircuits as is shown in
Fig. 6. The equivalent circuit at low frequencies (i.e., the
circuit without any capacitances) is given in Fig. 7, with
A1 and A2 the open-loop gains of the two gain stages,
each stage having a high output impedance. In this equivalent network the open-loop gain of the amplifier is given
by A = - A l . A 2 , and the power supply gain by A , =
A,, A 2 . ( 1 - A,,), with A,, ( = U 1 / U d d ) and Ap2
( = U,,,* / udd when both inputs, inverting and noninverting, are ac-grounded) the power supply gains of each
stage. The power supply is then
+
Fig. 8. Equivalent network, including the capacitors, of the Miller
OTA for calculating PSRR, udd.
gm
go
Cp
4.67 4.7
8.5 8.5
191 191
3.5
15
80
3 . 5 35
15 145
211
80
35
6.1 U I V
105 2 2 . 8 nA/V
79 779 fF
PSRR, vdd
low-freq.
f-3dB
P SR
92dB
4.9Hz
OdB
93dB
4Hz
OdB
96dB
680HZ
47dB
97dB
650HZ
47dB
PSRR.vss
low-freq.
f-3dB
P SR
1
1
PSRR
PSRR2.Al
-=
_-
1
1
A1
+-PSRR1’
The comparison between hand calculations and SPICE
simulation on this circuit is given in Table 111. Thus it can
In order to calculate the PSRR, udd, the open-loop gain of be concluded that the PSRRp,,, of the Miller OTA is
the first stage (Al), the PSRR of the first stage (PSRRl), almost given by the PSRR of the second stage multiplied
and the one of the second stage (PSRR21, must be calcu- by the gain of the first stage.
lated. The gain of the first stage is given by A1 =
The Miller OTA at higher frequencies is analyzed using
- g,, / ( g o * + go4). The PSRRl was calculated in the the equivalent network of Fig. 7 and adding the capacifirst part of this section (see (12), whereby the inverting tors of the circuit. The result is represented in Fig. 8,
and the noninverting input nodes are interchanged), or
where Cc stands for the compensation capacitance, CL
for the load capacitance, Ci for the parasitic, to the
gm1
PSRRl = - ~.
( 12b) ground, and C1 for the gate-source capacitance of trang o 1 + go4
sistor m5. For frequencies up to the GBW (and thus
The PSRR2 is calculated using cut b at the output of lower than the bandwidth of the second stage), the invertstage 2 (see Fig. 61, which results in PSRR2 = - g,, / g o 5 . ing input of the second stage always follows the noninvertSo, if the relationships are substituted in (181, it becomes ing input due to the feedback by Cc. Hence the capacitor
C1 sees no ac-voltage drop, which means that the value of
this
capacitor is of no importance in this analysis ( e . g . , in
(
g
o
2
+
go4) *go5
go2 - g o 1
1
-(19) a SPICE simulation where C1 was doubled, the PSRR
PSRR
grnl.grn5
gm 1
decreased only 0.1 dB, which can be neglected). This is in
contrast with the usually suspected signal feedthrough
or with go, =: go, = g o , =: go4,it results in
through C1-Cc for the degradation of the PSRR. Let us
further simplify the structure by assuming an infinite
PSRR in the first stage. Hence Fig. 8 can be redrawn into
+-
(18)
/’
1082
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS, VOL.
37, NO. 9, SEPTEMBER. 1990
1utput
Fig. 9. Equivalent network of the second stage of the Miller OTA.
Fig. 9. If Ci is further neglected (see also Fig. 9: Ci is
much smaller than Cc), a simple unity gain follower is
obtained. So the power supply gain is equal to one ( u , , ~=
U&,). To calculate the PSRR, Udd, the current that flows
into the gain node ( U , ) is extracted taking into account
the effect of the output stage (u,,,~= udd). The ratio
current (i,,) versus power supply variation (U&,)becomes
GM,
=
Ip = s.Cc.
(21)
'dd
And so the PSRR, odd at higher frequencies ( f > fdominant)
becomes, using (51,
Fig. 10. An improved two-stage Miller transconductance amplifier.
Fig. 11. Equivalent network of the improved Miller OTA to calculate
the PSRR, udd.
In Table 111, the hand calculations for both PSRR,v,,
and PSRR, U,, are compared with SPICE simulations.
C. Improving the Miller OTA on PSRR
As can be seen when (23) and (8) are compared, the
Miller OTA is not very good in the PSRR,u,, spec at
high frequencies ( f > fdominant), compared with the single
stage OTA. This is mainly due to the internal feedback
network as explained in Fig. 9. To reduce this effect an
extra transistor ( M l l ) , as presented in Fig. 10, is inserted
[21,
[31, El, [61.
gm5
If the output voltage ( u , , ~ )is calculated for frequencies
As can be seen in this relationship, the Cc has to be made fdominant < f < GBW in the equivalent network of Fig. 11,
as small as possible in order to increase the PSRR at high it results in
frequencies. However, it has to be remarked that the PSR
u,,,~ s . C i - ( g m l l+ s.(Cc + C11))
Ci
becomes 0 dB (uOut= Udd or the power supply gain is
-- (27)
equal to one)! It means that the PSRR,u,, at frequencies
'dd
gml1. S . CC
cc
higher than fdominant becomes very bad. E.g., the measured PSR of a LM741 and TL081, both op-amps using a with Ci the capacitance from the internal node to the
Miller structure, are approximately 0 dB and - 1 dB, ground. Or the current (id) that flows into the first gain
node becomes (see also (21))
respectively [4].
Until now, the PSRR,v,, has been analyzed. Let us
now study the PSRR,u,, using the cuts a and b in Fig. 6.
The first cut ( a ) creates a PSRR,u,, given by
1
and hence the PSRR, Udd becomes (see also (23))
-- (go, + S ' C P ~. )< g , l - gm2)
(24)
PSRR, a
gml.(grn,+ gm2)
PSRR,
= 2 . go,. grn~
go,
(29)
and the second ( b ) creates a PSRR,u,, given by
+ s.Ci
Of course, the same can be deduced using (17). Here it
1
has to be remarked that A 2 * ( 1 - A,,) = 1 and A,,, -=x
(Ap2= go, / s . CO, or the relation becomes PSRR, Udd =
- A1 * A 2= gml/(S * cc). The total PSRR, Udd of the
Miller OTA is ((20) and (22))
--
grn5
or the performance on the PSRR,v,, at high frequencies
with C1 the total' capacitance at node Vl(Cl = Cgs5). is improved by Cc/Ci; e.g., if the compensation capaciBecause the input transistors are normally matched tance is 2 pF and the internal capacitance Ci is 200 fF,
the PSRR, Udd iS improved by 20 dB. Hence the PSR, Udd
( g m l = gm2),the first term (24) can be neglected, or
becomes approximately 20 dB instead of 0 dB. If there
gml'gm5
PSRR, U,, = exists a parasitic capacitance (C2) between nodes 11 and
go6 * ( go2 $- go41 + S . go,. ( cc + c l ) .
10 of Fig. 10 (with C2 Cc), this capacitance value has
(26) to be added to Ci in (351437) (C2 becomes in parallel
1083
STEYAERT AND SANSEN: PSRR OTA'S
n3
n4
TABLE IV
CALCULATED
AND MEASURED
SMALL-SIGNAL
SPECIFICATIONS
OF THE CORE-AMPLIFIER
Mi 4
Gain &t
low-freq
44.7k
fdomirant
7 . 43HZ
GBW
334kHz
54"
4 . 2rad/s
Phase m a r g i n
wn
I
I
Fig. 12. Circuit diagram of the realized core-amplifier.
rlOk
c35Hz
350kHz
60"
3.17rad/s
Damping
0.7
0.9
Gain rnarqin
2.53
>2
TABLE V
THETOTALINTERNAL CAPACITANCE
Ci+C2(Ci=Cl+C3+C4)
1
Capacitance
fF
/
Fig. 13. A microphotograph of the realized core-amplifier in a 3p
p-well CMOS.
with Ci).So the PSRR,c,, becomes
PSRR, gdd = 2 .
g,
04 ' go5
I
+ s. ( ci + C2)
(30)
*
So to improve the high frequency PSRR the gate-drain
(C2) of m13 (see Fig. 12), and drain-bulk plus gain-drain
of M 7 and M11 must be designed as small as possible. In
the next section an amplifier using this technique is
designed. The measured PSRR performances arc compared with the calculated and simulated performances.
ON A DESIGNED
VI. MEASUREMENTS
CORE-AMPLIFIER
STRUCTURE
The total designed circuit is presented in Fig. 12, and
this structure is called a core-amplifier [ 5 ] , [6]. In this
structure transistor M 11 improves the PSRR specifications, as was analyzed in the previous paragraph. In Fig.
13, a microphotograph of the realized amplifier is shown.
From the open-loop measurements the small signal parameters of the amplifiier are extracted [71. These parameters arc given in Table IV.
As mentioned above, the advantage of this amplifier
structure, compared with the commonly used Miller amplifier, is the excellent power supply rejection ratio. Using
(14) for the low frequency and (30) for the high frequency
behavior, we find for this structure
gm1
=
go,.
g,,
- gm,
gm1
+ gm2
In Table V the capacitance Ci
+ s * ( C i+ C 2 )
tion effect (p-well CMOS process). Due to this effect, an
extra current (i,) is introduced in the gain node given by
(for low-frequencies)
ib
-=
gm5
PSRR, c,,
Fig. 12), which results in a total capacitance of Cz + C2 =
250 fF.The compensation capacitance Cc is designed to
be 2.5 pF.
As to calculating the PSRR, L ' ~ it~ ,has to be remarked
that the transistors M11 and M12 have a bulk modula-
. (31)
+ C2 is calculated (see also
Cdd
. -go6 - g o 5
go6'grnhll
gmll
+ gmbll
+
grnbll
go6
- gmhl2
gmbll
+ gmll-
gm12
gmll
)
(32)
which results in a PSRR,u,, of about 85 dB. At high
frequencies, the bulk modulation introduces a current (i,)
given by
ib
GM
'dd
gmbll
s*cc
(33)
gmll+gmbll
Thus the PSRR, L'dd becomes
PSRR, L'dd
-
gml
i-
go
+-+-).
Agmb
gmb
(34)
Agm
gm
go6 ' gmhl 1
gmll
+ gmbll
+
gmbll
gmll
.s.cc
+ grnbll
In Table VI the measured and calculated specifications
are compared. As can be seen in the table, the PSR, udd is
indeed improved from 0 to 20 dB. However, in this p-well
CMOS process, the PSR, U,,is decreased, mainly due to
the bulk modulation effect of transistor M11. Of course
in an n-well CMOS process this effect is eliminated by
connecting the well with the source. In a p-well CMOS
1084
IEEE TRANSACTIONS
PSRR.V.33
@ 1OkHz
91dB
51dB
89dB *4dB
49 5dB+O 5dB
PSR
20dB
19dBk.O 5dB
low-frep
process, this effect can be cancelled if the output stage is
inverted (PMOS transistors M11 and M14 in Fig. 12
become nMOS transistors and the nMOS transistor M13
in Fig. 12 becomes a PMOS transistor). The relation for
the PSRR,v,, is in that case given by (see also (30))
g m1
gm14
ON CIRCUITS AND SYSTEMS, VOL.
37, NO.9, SEPTEMBER. 1990
surements on PSRR specifications have been compared
with the hand calculations and SPICE simulations. It is
found that the structure has excellent PSRR specifications, compared with the commonly used Miller amplifier
structure, even at higher frequencies.
REFERENCES
K. Halonen and W. Sansen, “Effect of current spikes in power
supply rails on PSRR performances of switched-capacitor filters,”
in Proc. ISCAS-87, Portland, OR, May 1987.
D. Alstot and W. Black, “Technological design considerations for
monolithic MOS switched-capacitor filtering systems,’’ Proc. IEEE,
vol. 71, pp. 967-986, Aug. 1983.
R. Jolly and R. McCharles, “A low-noise amplifier for switchedcapacitor filters,” ZEEE J . Solid-state Circuits, vol. SC-17, pp.
1192-1194, Dec. 1982.
S. Stas and M. Steyaert, “Modeleren van operationele versterkers
in het frequentie-en tijdsdomein,” Masters thesis, Katholieke Universiteit Leuven, Leuven, Belgium, 1983.
J. Fischer, “A high-performance CMOS power amplifier,” IEEE J .
Solid-state Circuits, vol. SC-20, p.1200-1205, Dec. 1985.
D. Ribner and M. Copeland, Design technique for a cascoded
CMOS opamp with improved PSRR and common-mode input
range,” IEEE J . Solid-state Circuits, vol. SC-19, pp. 919-925, Dec.
1984.
W. Sansen, M. Steyaert, and P. Vandeloo, “Measurement of operational amplifier characteristics in the frequency domain,” IEEE
Trans. Instrum. Meas., vol. IM-34, pp. 59-64, Mar. 1985.
and for the PSRR,u,, it becomes (see also (10))
It was found from hand calculations and SPICE simulations that such a structure has a PSR, Udd of more than 20
dB and a PSR,v,, of more than 25 dB.
VII. CONCLUSION
In large systems, where different structures are integrated on one chip, the PSRR specification of the different blocks is very important. Therefore the most used
building block in analog design, the transconductance
amplifier, has been analyzed.
First an analysis technique based on cuts in subcircuits
was presented. By this technique the power supply
transconductances of each network branch can be calculated. The summation of these power supply transconductances of each branch results in the total power supply
transconductance. The PSRR is thereby given by the ratio
of the signal transconductance and the power supply
transconductance.
Using the presented technique, different amplifier
structures have been compared on the basis of hand
calculations and SPICE simulations. It has been shown
that the PSRR specifications of a single-stage OTA are
an order of magnitude better than for the widely used
two-stage Miller OTA. Also, the cause of this bad PSRR
specification in the two-stage Miller OTA has been investigated. It is shown that it is due to a complex feedback
loop in the output stage and not to a signal feedthrough
through a gate-source capacitance and the compensation
capacitance, as is usually suspected.
With these analyses it is shown that the problem in the
two-stage Miller OTA can be solved by inserting an extra
cascode transistor in the circuit. This improved amplifier
has been designed in a 3-pm p-well process. The mea-
Michel S. J. Steyaert (S’85-A’89) received the
engineer’s degree in electrical and mechanical
engineering from the Katholieke Universiteit
Leuven, Heverlee, Belgium in 1983 and the
Ph.D. degree in electronics from the Katholieke
Universiteit Leuven in 1987.
From 1983 to 1986 he received an IWNOL
fellowship, which allowed him to work as a
research assistant at the Laboratory ESAT, K.U.
Leuven. In 1987 he was responsible for several
industrial proiects in the field of analog micropower circuits,at the Laboratory-ESAT, K.U. Leuven as an TWONL
project-researcher. In 1988, he was a visiting assistant professor at the
University of California, Los Angeles. Since 1989 he has been at the
Laboratory ESAT, K.U. Leuven as an NFWO research associate. His
current research interests are in high frequency analog integrated circuits for telecommunications.
m
Willy M. C. Sansen (S’66-M72-SM’86) received the engineering degree in electronics
form the Katholieke Universiteit Leuven, Heverlee, Belgium, in 1967 and the Ph.D. degree in
electronics from the University of California,
Berkeley, in 1972.
In 1968 he was employed as an Assistant at
the Katholieke Universiteit Leuven. In 1971 he
was employed as a Teaching Fellow at the University of California. In 1972 he was appointed
by the Belgian National Foundation as a Research Associate at the Laboratory Elektronika, Systemen, Automatisatie, Technologie, Katholieke Universiteit Leuven, where he has been
Full Professor since 1981. Since 1984 he has been the head of the
Department of Electrical Engineering. His interests are in device modeling, design of integrated circuits, and medical electronics and sensors.
Dr. Sansen i s a member of the Koninklijke Vlaamse Ingenieurs
Vereniging, the Audio Engineering Society, the Biotelemetry Society,
and Sigma Xi. In September 1969 he received a CRB Fellowship from
the Belgian American Educational Foundation, in 1970 a G.T.E. Fellowship, and in 1978 a NATO Fellowship.