Chapter 7
CMOS Amplifiers
 7.1 General Considerations
 7.2 Common-Source Stage
 7.3 Common-Gate Stage
 7.4 Source Follower
 7.5 Summary and Additional Examples
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Chapter Outline
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MOS Biasing
V GS=− V 1−V TH 
V 1=
1
μ n C ox

V 212V 1

R2 V DD
R1R2
W
RS
L
 Voltage at X is determined by VDD, R1, and R2.
 VGS can be found using the equation above, and ID can be
found by using the NMOS current equation.
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
−V TH
Self-Biased MOS Stage
I D RD V GSRS I D=V DD
 The circuit above is analyzed by noting M1 is in saturation
and no potential drop appears across RG.
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Current Sources
 When in saturation region, a MOSFET behaves as a current
source.
 NMOS draws current from a point to ground (sinks current),
whereas PMOS draws current from VDD to a point (sources
current).
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Common-Source Stage
λ=0
Av=−g m RD

W
Av =− 2μ n C ox I D RD
L
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Operation in Saturation
R D ID V DD − V GS −V TH
 In order to maintain operation in saturation, Vout cannot fall
below Vin by more than one threshold voltage.
 The condition above ensures operation in saturation.
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CS Stage with λ=0
Av=−g m RL
R in=∞
Rout =R L
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CS Stage with λ ≠ 0
Av=−g m  RL∣∣r O 
R in=∞
Rout =R L∣∣r O
 However, Early effect and channel length modulation affect
CE and CS stages in a similar manner.
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CS Gain Variation with Channel Length

W
2μ n C ox
2μ n C ox WL
L
∣Av∣=
∝
ID
λ ID

 Since λ is inversely proportional to L, the voltage gain
actually becomes proportional to the square root of L.
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CS Stage with Current-Source Load
Av =−g m1  r O1∣∣r O2 
Rout =r O1∣∣r O2
 To alleviate the headroom problem, an active currentsource load is used.
 This is advantageous because a current-source has a high
output resistance and can tolerate a small voltage drop
across it.
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PMOS CS Stage with NMOS as Load
Av =−g m2  r O1∣∣r O2 
 Similarly, with PMOS as input stage and NMOS as the load,
the voltage gain is the same as before.
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CS Stage with Diode-Connected Load

 W /L 1
1
Av=−g m1⋅
=−
gm2
 W /L 2
Av =−g m1

1
∣∣r O2∣∣r O1
g m2

 Lower gain, but less dependent on process parameters.
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CS Stage with Diode-Connected PMOS Device
Av =−g m2

1
∣∣r o1∣∣r o2
g m1
 Note that PMOS circuit symbol is usually drawn with the
source on top of the drain.
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
CS Stage with Degeneration
Av=−
RD
1
R S
gm
λ=0
 Similar to bipolar counterpart, when a CS stage is
degenerated, its gain, I/O impedances, and linearity change.
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Example of CS Stage with Degeneration
Av =−
RD
1
1

g m1 g m2
 A diode-connected device degenerates a CS stage.
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CS Stage with Gate Resistance
V R =0
G
 Since at low frequencies, the gate conducts no current,
gate resistance does not affect the gain or I/O impedances.
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Output Impedance of CS Stage with Degeneration
r out≈gm r O R S r O
 Similar to the bipolar counterpart, degeneration boosts
output impedance.
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Output Impedance Example (I)
Rout =r O1


1
1
1g m1

g m2 g m2
 When 1/gm is parallel with rO2, we often just consider 1/gm.
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Output Impedance Example (II)
Rout ≈gm1 r O1 r O2r O1
 In this example, the impedance that degenerates the CS
stage is rO, instead of 1/gm in the previous example.
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CS Core with Biasing
Av =
R1∣∣R2
⋅
−RD
RGR1∣∣R2 1
R S
gm
, Av=−
R1∣∣R2
R GR1∣∣R2
gmR D
 Degeneration is used to stabilize bias point, and a bypass
capacitor can be used to obtain a larger small-signal
voltage gain at the frequency of interest.
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Common-Gate Stage
Av =g m RD
 Common-gate stage is similar to common-base stage: a
rise in input causes a rise in output. So the gain is positive.
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Signal Levels in CG Stage
 In order to maintain M1 in saturation, the signal swing at Vout
cannot fall below Vb-VTH.
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I/O Impedances of CG Stage
R in=
1
gm
λ=0
Rout =R D
 The input and output impedances of CG stage are similar
to those of CB stage.
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CG Stage with Source Resistance
Av =
RD
1
R S
gm
 When a source resistance is present, the voltage gain is
equal to that of a CS stage with degeneration, only positive.
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Generalized CG Behavior
Rout = 1gm r O  R Sr O
 When a gate resistance is present it does not affect the
gain and I/O impedances since there is no potential drop
across it ( at low frequencies).
 The output impedance of a CG stage with source resistance
is identical to that of CS stage with degeneration.
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Example of CG Stage
v out
vin
=
g m1 RD
1 gm1 g m2  R S
[
Rout ≈ g m1 r O1

 ]
1
∣∣R r O1 ∣∣RD
g m2 S
 Diode-connected M2 acts as a resistor to provide the bias
current.
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CG Stage with Biasing
vout
vin
=
R3∣∣  1/ gm 
R 3∣∣ 1/g m RS
⋅gm R D
 R1 and R2 provide gate bias voltage, and R3 provides a path
for DC bias current of M1 to flow to ground.
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Source Follower Stage
Av 1
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Source Follower Core
vout
vin
=
r O∣∣RL
1
r O∣∣RL
gm
 Similar to the emitter follower, the source follower can be
analyzed as a resistor divider.
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Source Follower Example
Av =
r O1∣∣r O2
1
r O1∣∣r O2
gm1
 In this example, M2 acts as a current source.
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Output Resistance of Source Follower
1
1
Rout = ∣∣r O∣∣R L≈ ∣∣RL
gm
gm
 The output impedance of a source follower is relatively low,
whereas the input impedance is infinite ( at low
frequencies); thus, a good candidate as a buffer.
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Source Follower with Biasing
1
W
2
I D= μ n C ox  V DD −ID R S−V TH 
2
L
 RG sets the gate voltage to VDD, whereas RS sets the drain
current.
 The quadratic equation above can be solved for ID.
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Supply-Independent Biasing
 If Rs is replaced by a current source, drain current ID
becomes independent of supply voltage.
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Example of a CS Stage (I)
Av=−g m1
Rout =

1
∣∣r O1∣∣r O2∣∣r O3
gm3

1
∣∣r O1∣∣r O2∣∣r O3
gm3
 M1 acts as the input device and M2, M3 as the load.
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Example of a CS Stage (II)
Av =−
r O2
1
1

∣∣r O3
g m1 g m3
 M1 acts as the input device, M3 as the source resistance,
and M2 as the load.
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Examples of CS and CG Stages
Av =−g m2 [  1g m1 r O1 R Sr O1 ]∣∣r O1
CS
Av =
CG
r O2
1
R S
gm
 With the input connected to different locations, the two
circuits, although identical in other aspects, behave
differently.
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Example of a Composite Stage (I)
Av =
RD
1
1

gm1 g m2
 By replacing the left side with a Thevenin equivalent, and
recognizing the right side is actually a CG stage, the
voltage gain can be easily obtained.
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Example of a Composite Stage (II)
vout2
vin
=−
1
∣∣r O3∣∣r O4
g m3
1
1
∣∣r O2
gm2
g m1
 This example shows that by probing different places in a
circuit, different types of output can be obtained.
 Vout1 is a result of M1 acting as a source follower whereas
Vout2 is a result of M1 acting as a CS stage with
degeneration.
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