UNIVERSITI MALAYSIA PERLIS
EKT303-Principle Computer Architecture
Test 1: Sem 2 2019-2020
Name :
Matrix No:
Program:
(C2, CO1, PO1)
1. Discuss the function of FOUR (4) essential registers involve during instruction execution
state. (4m)
(C3, CO2, PO2)
2. Consider a hypothetical 32-bit microprocessor having 32-bit instructions composed of two
fields: the first byte contains the opcode and the remainder the immediate operand or an
operand address.
a. What is the maximum directly addressable memory capacity? (3m)
b. Discuss the impact on the system speed if the microprocessor bus has:
I.
32-bit local address bus and 16-bit local data bus. (6m)
II.
16-bit local address bus and 16 -bit local data bus. (6m)
(C3, CO3, PO3)
3. A computer system has a 128-byte cache. It uses four-way set-associative mapping with 8
bytes in each block. The physical address size is 32 bits, and the smallest addressable unit is 1
byte.
a. Draw a diagram showing the organization of the cache and indicating how physical
addresses are related to cache addresses. (8m)
b. To what block frames of the cache can the address 000010AF be assigned? (3m)
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