CHAPTER 4 Bipolar Junction Transistors (BJTs) Microelectronic Circuits, Seventh Edition Sedra/Smith/Chandorkar Copyright © 2017 by Oxford University Press Figure 4.1 A simplified structure of the npn transistor. Microelectronic Circuits, Seventh Edition Sedra/Smith/Chandorkar Copyright © 2017 by Oxford University Press Figure 4.2 A simplified structure of the pnp transistor. Microelectronic Circuits, Seventh Edition Sedra/Smith/Chandorkar Copyright © 2017 by Oxford University Press Microelectronic Circuits, Seventh Edition Sedra/Smith/Chandorkar Copyright © 2017 by Oxford University Press Figure 4.3 Current flow in an npn transistor biased to operate in the active mode. (Reverse current components due to drift of thermally generated minority carriers are not shown.) Microelectronic Circuits, Seventh Edition Sedra/Smith/Chandorkar Copyright © 2017 by Oxford University Press Microelectronic Circuits, Seventh Edition Sedra/Smith/Chandorkar Copyright © 2017 by Oxford University Press Figure 4.5 Large-signal equivalent-circuit models of the npn BJT operating in the forward active mode. Microelectronic Circuits, Seventh Edition Sedra/Smith/Chandorkar Copyright © 2017 by Oxford University Press Figure 4.6 Circuits for Example 4.1. Microelectronic Circuits, Seventh Edition Sedra/Smith/Chandorkar Copyright © 2017 by Oxford University Press Figure 4.7 Cross section of an npn BJT. Microelectronic Circuits, Seventh Edition Sedra/Smith/Chandorkar Copyright © 2017 by Oxford University Press Microelectronic Circuits, Seventh Edition Sedra/Smith/Chandorkar Copyright © 2017 by Oxford University Press Figure 4.9 Modeling the operation of an npn transistor in saturation by augmenting the model of Fig. 4.5(c) with a forward- conducting diode DC. Note that the current through DC increases iB and reduces iC. Microelectronic Circuits, Seventh Edition Sedra/Smith/Chandorkar Copyright © 2017 by Oxford University Press Figure 4.10 Current flow in a pnp transistor biased to operate in the active mode. Microelectronic Circuits, Seventh Edition Sedra/Smith/Chandorkar Copyright © 2017 by Oxford University Press Figure 4.11 Two large-signal models for the pnp transistor operating in the active mode. Microelectronic Circuits, Seventh Edition Sedra/Smith/Chandorkar Copyright © 2017 by Oxford University Press Figure 4.12 Circuit symbols for BJTs. Microelectronic Circuits, Seventh Edition Sedra/Smith/Chandorkar Copyright © 2017 by Oxford University Press Figure 4.13 Voltage polarities and current flow in transistors operating in the active mode. Microelectronic Circuits, Seventh Edition Sedra/Smith/Chandorkar Copyright © 2017 by Oxford University Press Figure 4.14 Graphical representation of the conditions for operating the BJT in the active mode and in the saturation mode. Microelectronic Circuits, Seventh Edition Sedra/Smith/Chandorkar Copyright © 2017 by Oxford University Press Microelectronic Circuits, Seventh Edition Sedra/Smith/Chandorkar Copyright © 2017 by Oxford University Press Figure 4.15 Circuit for Example 4.2. Microelectronic Circuits, Seventh Edition Sedra/Smith/Chandorkar Copyright © 2017 by Oxford University Press Figure E4.13 Microelectronic Circuits, Seventh Edition Sedra/Smith/Chandorkar Copyright © 2017 by Oxford University Press Figure E4.14 Microelectronic Circuits, Seventh Edition Sedra/Smith/Chandorkar Copyright © 2017 by Oxford University Press Microelectronic Circuits, Seventh Edition Sedra/Smith/Chandorkar Copyright © 2017 by Oxford University Press Microelectronic Circuits, Seventh Edition Sedra/Smith/Chandorkar Copyright © 2017 by Oxford University Press Microelectronic Circuits, Seventh Edition Sedra/Smith/Chandorkar Copyright © 2017 by Oxford University Press Figure 4.19 Large-signal, equivalent-circuit models of an npn BJT operating in the active mode in the common-emitter configuration with the output resistance ro included. Microelectronic Circuits, Seventh Edition Sedra/Smith/Chandorkar Copyright © 2017 by Oxford University Press Figure 4.20 Common-emitter characteristics. (a) Basic CE circuit; note that in (b) the horizontal scale is expanded around the origin to show the saturation region in some detail. A much greater expansion of the saturation region is shown in (c). Microelectronic Circuits, Seventh Edition Sedra/Smith/Chandorkar Copyright © 2017 by Oxford University Press Figure 4.21 A simplified equivalent-circuit model of the saturated transistor. Microelectronic Circuits, Seventh Edition Sedra/Smith/Chandorkar Copyright © 2017 by Oxford University Press Figure 4.22 Circuit for Example 4.3. Microelectronic Circuits, Seventh Edition Sedra/Smith/Chandorkar Copyright © 2017 by Oxford University Press Microelectronic Circuits, Seventh Edition Sedra/Smith/Chandorkar Copyright © 2017 by Oxford University Press Figure 4.23 Analysis of the circuit for Example 4.4: (a) circuit; (b) circuit redrawn to remind the reader of the convention used in this book to show connections to the dc sources; (c) analysis with the steps numbered. Microelectronic Circuits, Seventh Edition Sedra/Smith/Chandorkar Copyright © 2017 by Oxford University Press Figure 4.24 Analysis of the circuit for Example 4.5. Note that the circled numbers indicate the order of the analysis steps. Microelectronic Circuits, Seventh Edition Sedra/Smith/Chandorkar Copyright © 2017 by Oxford University Press Figure 4.25 Example 4.6: (a) circuit; (b) analysis, with the order of the analysis steps indicated by circled numbers. Microelectronic Circuits, Seventh Edition Sedra/Smith/Chandorkar Copyright © 2017 by Oxford University Press Figure 4.26 Example 4.7: (a) circuit; (b) analysis, with the steps indicated by circled numbers. Microelectronic Circuits, Seventh Edition Sedra/Smith/Chandorkar Copyright © 2017 by Oxford University Press Figure 4.27 Example 4.8: (a) circuit; (b) analysis, with the steps indicated by the circled numbers. Microelectronic Circuits, Seventh Edition Sedra/Smith/Chandorkar Copyright © 2017 by Oxford University Press Figure 4.28 Example 4.9: (a) circuit; (b) analysis with steps numbered. Microelectronic Circuits, Seventh Edition Sedra/Smith/Chandorkar Copyright © 2017 by Oxford University Press Figure 4.29 Circuits for Example 4.10. Microelectronic Circuits, Seventh Edition Sedra/Smith/Chandorkar Copyright © 2017 by Oxford University Press Figure 4.30 Circuits for Example 4.11. Microelectronic Circuits, Seventh Edition Sedra/Smith/Chandorkar Copyright © 2017 by Oxford University Press Figure E4.30 Microelectronic Circuits, Seventh Edition Sedra/Smith/Chandorkar Copyright © 2017 by Oxford University Press Figure 4.31 Example 4.12: (a) circuit; (b) analysis with the steps numbered. Microelectronic Circuits, Seventh Edition Sedra/Smith/Chandorkar Copyright © 2017 by Oxford University Press Figure 4.32 The BJT common-base characteristics including the transistor breakdown region. Microelectronic Circuits, Seventh Edition Sedra/Smith/Chandorkar Copyright © 2017 by Oxford University Press Figure 4.33 The BJT common-emitter characteristics including the breakdown region. Microelectronic Circuits, Seventh Edition Sedra/Smith/Chandorkar Copyright © 2017 by Oxford University Press Figure E4.33 Microelectronic Circuits, Seventh Edition Sedra/Smith/Chandorkar Copyright © 2017 by Oxford University Press Figure 4.34 Typical dependence of β on IC and on temperature in an integrated-circuit npn silicon transistor intended for operation around 1 mA. Microelectronic Circuits, Seventh Edition Sedra/Smith/Chandorkar Copyright © 2017 by Oxford University Press Figure P4.25 Microelectronic Circuits, Seventh Edition Sedra/Smith/Chandorkar Copyright © 2017 by Oxford University Press Figure P4.26 Microelectronic Circuits, Seventh Edition Sedra/Smith/Chandorkar Copyright © 2017 by Oxford University Press Figure P4.27 Microelectronic Circuits, Seventh Edition Sedra/Smith/Chandorkar Copyright © 2017 by Oxford University Press Figure P4.28 Microelectronic Circuits, Seventh Edition Sedra/Smith/Chandorkar Copyright © 2017 by Oxford University Press Figure P4.30 Microelectronic Circuits, Seventh Edition Sedra/Smith/Chandorkar Copyright © 2017 by Oxford University Press Figure P4.31 Microelectronic Circuits, Seventh Edition Sedra/Smith/Chandorkar Copyright © 2017 by Oxford University Press Figure P4.38 Microelectronic Circuits, Seventh Edition Sedra/Smith/Chandorkar Copyright © 2017 by Oxford University Press Figure P4.44 Microelectronic Circuits, Seventh Edition Sedra/Smith/Chandorkar Copyright © 2017 by Oxford University Press Figure P4.46 Microelectronic Circuits, Seventh Edition Sedra/Smith/Chandorkar Copyright © 2017 by Oxford University Press Figure P4.47 Microelectronic Circuits, Seventh Edition Sedra/Smith/Chandorkar Copyright © 2017 by Oxford University Press Figure P4.49 Microelectronic Circuits, Seventh Edition Sedra/Smith/Chandorkar Copyright © 2017 by Oxford University Press Figure P4.50 Microelectronic Circuits, Seventh Edition Sedra/Smith/Chandorkar Copyright © 2017 by Oxford University Press Figure P4.52 Microelectronic Circuits, Seventh Edition Sedra/Smith/Chandorkar Copyright © 2017 by Oxford University Press Figure P4.54 Microelectronic Circuits, Seventh Edition Sedra/Smith/Chandorkar Copyright © 2017 by Oxford University Press Figure P4.55 Microelectronic Circuits, Seventh Edition Sedra/Smith/Chandorkar Copyright © 2017 by Oxford University Press Figure P4.57 Microelectronic Circuits, Seventh Edition Sedra/Smith/Chandorkar Copyright © 2017 by Oxford University Press Figure P4.58 Microelectronic Circuits, Seventh Edition Sedra/Smith/Chandorkar Copyright © 2017 by Oxford University Press Figure P4.59 Microelectronic Circuits, Seventh Edition Sedra/Smith/Chandorkar Copyright © 2017 by Oxford University Press Figure P4.60 Microelectronic Circuits, Seventh Edition Sedra/Smith/Chandorkar Copyright © 2017 by Oxford University Press Figure P4.61 Microelectronic Circuits, Seventh Edition Sedra/Smith/Chandorkar Copyright © 2017 by Oxford University Press Figure P4.62 Microelectronic Circuits, Seventh Edition Sedra/Smith/Chandorkar Copyright © 2017 by Oxford University Press
