On the Second-order Harmonic Ripple Problem in
the Single-phase Inverters: A review
Abstract
This paper provides a comprehensive review of the second-order harmonic ripple problem of the inverters,
its solutions, and open challenges which one yet to be addressed. The cause and effects of the second-order
harmonic ripple are discussed. Several passive, active and control-oriented techniques for the ripple mitigation
are presented. The classification of the techniques is presented on the basis of the hardware-based passive
and active power decoupling techniques and software-based control-oriented compensation techniques. The
merits and demerits of these techniques are listed and summarized in a tabular form. Finally, a conclusive
discussion with open challenges which require further work is presented.
Index Terms
Low-frequency ripple or 2ω -ripple or second-order harmonic ripple, Single-phase inverter, DC-DC power
converters, Control strategies, Renewable energy sources
I. Introduction
R
ECENT and perennial development in the advance power electronics and control strategies has largely
encouraged and widen the scope of the small/medium local power systems supported fully or partly by
renewable energy (RE) sources such as microgrid, residential power system, distributed generation systems.
Philosophically, the power electronics is the nervous system of the today’s power systems while the control is
the brain of the smart power system; these two components complement each other. In a typical power system,
the power electronics devices transform the electrical energy and the control directs the transformation of
this energy in a desired way. This is carried-out through the power converters.
Power converters are one of the important entity in the local power systems. These are the intermediate
links to connect the sources, loads and storage devices in a typical power system. The application of the RE
sources such as solar-PV, fuel-cell in the low/medium power systems is one of the emerging research fields.
The output of most of the RE sources is DC in nature. Furthermore, the battery bank is used as electrical
energy storage (EES) system to cope with the instant and short energy deficit in such typical power systems.
Consequently, at the consumer-end, the amount of the DC loads are growing with the persistent development
in the DC power technologies and the emerging research interest in the RE applications. However, the AC
loads are pervasive due to the several factors related to the ease of availability, advanced safety measures, costeffectiveness and matured AC power technologies. To supply the AC loads, the DC to AC power converters
or inverters are required. Moreover, the static synchronous generators (static-SGs) or synchronverters [1]–[3]
are the emerging static energy conversion technology based on the working principle of the conventional SGs
to harvest energy from the RE sources. Unlike conventional SGs, the emerging synchronverter technology
requires the DC-AC power converter along with a control strategy based on the theory of the SG to mimic a
conventional SG. The DC-AC converters are also used at the point of common coupling (PCC) in the gridconnected power applications [4]. In grid-connected systems, the DC-AC power converters exchange power
between the DC power systems such as microgrid and the conventional grid or main grid. Therefore, the
DC-AC power converters are imperative in the typical low/medium power systems.
In the low power-applications (up to 5 kVA), the single-phase PWM power converter are generally used [5].
In the literature, several topologies of the single-phase DC to AC power converters, for example, single-stage
DC-AC converters (CSI and VSI), multi-stage DC-AC converters (buck-derived, boost-derived, buck-boost
derived or bidirectional buck-boost), impedance source inverters (ZSI, q-ZSI, q-SBI), multilevel converters
are extensively explored for the different power applications. In the Section-III, several single-phase inverter’s
topologies used for the renewable energy applications in the context of the low-frequency ripple problem are
discussed.
The DC-AC power converters supply to AC loads with the unwanted reflection of the Second-order Harmonic
Current (SHC) ripple (reactive or decoupling ripple or 2ω −ripple or two-times line frequency ripple) at the
DC input. The root-cause of the SHC ripple and the effect of the SHC ripple on the system are discussed in
the Section-II and Section-IV respectively. In the single-stage DC-AC converter, this ripple at the DC link
propagates towards the DC source and inject directly into the DC source if the DC link capacitance is low or
no compensation technique is used. A general practice to avoid the injection of ripple into the DC source is to
use a large size aluminum electrolytic capacitor (E-cap) at the DC-link. However, the E-caps are vulnerable
to low-frequency ripple due to low ripple handling capability and high parasitic resistance. The ripple causes
i2 r-heating losse inside the electrolytic capacitors [6], [7]. The life-span of an E-cap is 10% − 90% of a year at
105o C [8] which is quite smaller than the life of a solar PV panel (25 years approx.) in a PV system. This
point-out a strict question on the reliability of the complete system. A study conducted using data of 213
failure cases from 103 grid-tied solar PV systems at the Florida solar energy suggests that the 139 failures
are due to inverter failure [9]. According to [10], in the power converters, 51% instances of inverter’s failure
are due to solid-state devices and aluminum electrolytic capacitors. Moreover, 21% failure instances out of
51% are due to the aluminum capacitor failures only. Moreover, the use of E-cap increases the size, cost and
weight of the system. The thin film capacitor is a reliable alternative to replace the E-cap. The low ESR value
and large ripple handling capability of thin-film capacitor makes it a suitable choice. However, an equivalent
thin-film capacitor is required in lieu of the E-cap. The high cost of the thin film capacitor makes it inferior
choice [11]. The use of thin-film capacitor is suitable and preferred in the active power decoupling circuits
or control-oriented power decoupling techniques; a comparatively small size film capacitor is required in the
active filter [12].
In the Section-V, several power decoupling techniques for the SHC ripple mitigation are reviewed. The
power decoupling techniques are classified based on the topographical arrangement of the power decoupling
circuits i.e. application of power decoupling technique at (i) DC side or DC -link of inverter and (ii) AC side
or output of the inverter or mixed type arrangement. Furthermore, different control-oriented techniques are
discussed for the two-stage DC-DC-AC converters, impedance-source converter and some advance topologies.
The paper aims to provide a comprehensive review on the second-order harmonic ripple problem of the
single-phase inverter. The available literature till the august, 2018 based on the aforesaid subject matter is
extensively explored and reviewed. Beginning with the introduction of the SHC ripple problem in the singlephase inverter, the effect of the SHC ripple on the system will be discussed. A survey on the single-phase
inverter topologies used in the renewable energy applications in the context of SHC ripple problem will be
followed. A detailed review of the different ripple mitigation control techniques will be discussed. Eventually,
the gaps and future scope are extracted and discussed.
The paper begins with introduction in the Section-I followed by the root cause of SHC ripple in Section-II.
Several converter topologies need to be reviewed in context of the SHC ripple are discussed in the Section-III.
The impact and safety constraint of the SHC ripple are discussed in Section-IV. The Section-V reviews several
control schemes of the SHC ripple mitigation from the existing literature. In Section-VI, conclusive discussion
and open problems are presented.
II. SHC Ripple: Introduction
Generally, the problem of the second-order harmonic ripple is dominant in the single-phase power converters.
In case of the three-phase inverter, this problem is only significant at the unbalanced-load condition [13]. In
the DC to AC power conversion or AC to DC power conversion, an unwanted second-order harmonic ripple
reflects at the DC-link of the converters. For an ideal inverter, the instantaneous values of the input power
and output power must be equal. However, in actual scenario, there is the power mismatch between the
instantaneous DC power and instantaneous AC power. The pulsating nature of AC output power causes the
pulsation in the average DC input power. Suppose an inverter supplies an AC load at the angular frequency ω
rad/sec. This causes a pulsation in the input DC power of the inverter at 2ω [14]. This can be mathematically
represented as follows [15],
vac = Vpeak cos(ω t)
(1a)
iac = I peak cos(ω t − θ )
(1b)
vac iac = 0.5Vpeak I peak cosθ + 0.5Vpeak I peak cos(2ω t − θ )
pac = Po + pripple
(1c)
(1d)
Here vac and iac are the instantaneous output AC voltage and output AC current of the inverter. θ is the
displacement angle. peak stands for the peak value of vac /iac . The underline part of (1) is the second-order
Fig. 1. Root cause of SHC ripple
harmonic power ripple (decoupling power ripple) pulsating over the average DC offset. In the Fig. 1, this
phenomenon is depicted.
III. Topologies of the Single-phase Inverter: Renewable Energy Applications
Recent times have witnessed the growing interest on the SHC ripple problem in the single-phase converters
for the renewable energy applications. There are several topologies of the single-phase DC-AC power converter
or inverter. In this paper, some of the topologies of single-phase inverter which are widely used in the renewable
energy applications are reviewed. These power converters can be classified on the basis of (a) number of power
conversion stages for the power processing, (b) location of the power decoupling components, (c) isolation and
(d) grid-integration (grid-tied or off-grid operation) [4], [16]–[19]. Fig. 2 shows a classification of topologies of
the single-phase inverter based on the different applications. In single-single stage topology, the H-bridge is
used to converter the DC power into AC power. In such topologies, the passive and active power decoupling
techniques (see Section-V(A-B)) are used. The multi-stage toplogies have multiple front-end converter with
inverter. Generally, two stage converters are used in several RE applications. The front-end converter of
two-stage converter is the DC-DC converter for the DC input. The front-end converter facilitates the system
in several ways such as voltage transformation, MPPT operation, 2ω −ripple control, voltage regulation. In
such topologies, besides active and passive ripple compensation techniques, the control-oriented compensation
techniques can also be used. These toplogies can also be classified based on the location of the E-cap at
the DC-link. An E-cap can be placed at the input of the inverter or at the input of the front-end converter
in the two-stage converter or at both locations. Furthermore, the classification can be done on the basis of
the isolation and the grid-interaction. The isolation can be achieved using the line frequency transformer or
using a high frequency DC-DC converter at the front-end of inverter such as dual-active bridge. Island or
remote power systems are standalone power networks. In such systems, storage is an important requirement.
The loads are supplied through renewable energy sources directly while storage supplies power at the nonavailability of the renewable energy sources or at energy deficit in the system. The sources and storage (battery
energy storage system) may be affected by the 2ω −ripple when they supplies AC loads. The grid-tied system
exchanges power with the main grid through the AC-DC converter at the point of common coupling. The
AC-DC power converter may injects the 2ω − ripple into DC power system.
In the next Section, the effects of the 2ω − ripple on the source and system components are discussed.
Power converters for Renewable Energy Applications
Based on number
of power stages
Single‐stage
VSI CSI ISC
MLI
PWM CSI
and Line‐
commutated
cascaded‐H‐bridge,
NPC,flying‐capacitor
Based on location of
decoupling circuit/E‐cap
Multiple
Stage
Two‐stage
qZSI/ZSI
qSBI/SBI
Y,TZsource
‐inverter
High power
two‐level
E‐cap at DC link
in single‐stage
Based on the
Isolation
E‐cap either at DC link or
in parallel to source
in two‐stage
LFT
HFT
DAB
CF‐DAB
Boost‐ Buck‐ Buck‐Boost
derived derived derived
VF‐DAB
Based on the
Grid‐interface
Stand‐alone Grid‐Tie
Line‐commuted
CSI switching at
2 times line
frequency
Self‐commuted
VSI switching at
High frequency
in PWM
Fig. 2. Topologies of single-phase inverter for the renewable energy applications
IV. Impact of the SHC Ripple and Safety Constraint
An unwanted pulsations and injection of the low-frequency SHC ripple at the DC source poses several
problems on the components of the system and the sources subjected to cost, component sizing, efficiency,
reliability and stability [20], [21]. In the case of the single-stage DC-AC converter, the ripple directly injects
into the DC source and in the two-stage converter or impedance source converter topologies, the ripple
propagates through the intermediate system components or circuits and inject into the DC source. The low
frequency of the SHC ripple forces an over-rated design of the system components. Moreover, the pulsation
of this ripple about the DC average values of current and voltage increases the peak values of current and
voltage. This further forces the over-rated design of the system components such as diodes, switches, inductors
and capacitors. Consequently, the i2 r-loss or conduction-loss in the system increases. Furthermore, an injection
of the SHC ripple into the DC sources such as fuel-cell, MPPT based-solar-PV system, battery poses several
detrimental effect on the sources [22]. Some of the issues caused by SHC ripple are as follows. In conventional
system, a large size electrolytic capacitor (E-cap) is used at the DC link to bypass the ripple or to avoid the
flow of the ripple towards the DC source. The large ESR and low ripple handling capability of the E-cap
makes it inferior choice as mentioned in [8]. The i2 r-loss inside the E-cap causes heating of electrolyte (a
complex liquid chemical) and decrease in its volume with the time due to the long hours of operation at the
high temperature [23]. The size of the E-cap increases as the load increases. To restrict the DC-link voltage
ripple to ±1%, an E-Cap of 5769 µ F is required for a 100 W -inverter with 48 V -DC-link voltage operating
at 60 Hz [24]. An increase in the temperature of E-cap by 10o C reduces its life by half [25]. In Fig. 3(a),
the effect of the SHC ripple on the E-cap is depicted. The power-density of the inductors are comparatively
lesser than the capacitors [26]. Therefore, the SHC ripple affects the sizing of the inductor more in the
comparison of the capacitor. An injection of the SHC ripple into the fuel cell causes fuel-starvation, reduction
in efficiency, heating inside the fuel-cell stack and stress on the proton exchange membrane. The amount of
the low frequency ripples (less than 400 Hz) should be kept small for the long life expectancy of the fuel-cell
[27] and for this the SHC ripple should not exceed 10% limit [28]. For the good efficiency and life-expectancy
of the fuel-cell, the SHC ripple of 100 Hz/120 Hz should be limited to 15% of output power [29]. In [27], it is
established that for a solid-oxide fuel-cell, a 17%-reduction in the peak-value of current ripple (from 22% to
5%) improves the efficiency of the fuel-cell by 5%. Moreover, the efficiency number can go upto 9% for the
ripple compensation by 31% (from 36% − 5%). The LED lighting have almost replaced the incandescent lamp
due to their energy efficient feature. However, unlike the incandescent lamps, the no-time delay operation
of the LED at the low frequency causes the flickering effect that is an important researched topic in recent
years [24], [30]. The flicker effect causes visual fatigue and leads to eye problem [31]. In the MPPT operation
of the solar-PV or fuel cell, a pulsation of the SHC ripple about the maximum power points (MPPs) of the
power/current/voltage may shift the actual MPPs. This causes an improper MPPT operation and results in
the reduced efficiency of the power conversion. According to [32], a decrease of 5% in the efficiency and power
of the solar-PV with MPPT operation is observed for a 8% ripple in the rms value of MPPs. A large pulsation
may cause the nuisance tripping of the circuit breaker. In the Fig. 3(b), the effect of the SHC ripple on the
MPPs is shown using P-V diagram. Battery storage is the important part of the local power system such
as microgrid or residential power system. The injection of the SHC ripple into the battery causes hysteresis
S
nt of
Amou
+
+
d
ouple
le dec
p
ip
r
HC
+
-
+
p
Pmax
MPP
second‐order ripple
-
-
-
E‐cap
ases
incre
+ -
E‐cap
E‐cap
E‐cap
E‐cap
Size, cost, weight and heat‐loss increase
(a)
(b)
Vmax
v
Fig. 3. Effect of SHC ripple on: (a) Electrolytic capacitor (E-cap) (b) MPPT operation [33]
effect. This develops heating inside the battery. According to [34], a current ripple more than 8% may badly
affect the electrodes and electrolyte of the battery and reduces the performance and efficiency of the system.
Moreover, the SHC ripple increases the voltage/current stress on the system components [35], [36].
TABLE I
Summery of cause, effect and design constraint of SHC ripple
Affected parts
DC-link E-cap
Effect on system
Heating, life reduces;
10% − 90% of a year at 105o C
Fuel cell stack
Fuel cell MPPT
Poor efficiency, affect life
Excessive use of H2 /O2 or reactant,
Solar PV MPPT
Oscillation about MPP and
Battery
Affect the electrodes and electrolyte,
LED lights
Flickering effect, visual fatigue
passive components,
diodes, switches
Over-rated design, high voltage or
current stress
Cause and constraint
Large ESR causes i2 r−losses and
increase temperature; 10o C rise
reduces life of E-cap by half;
To limit voltage pulsation within ±1%,
≈ 5.7 mF E-cap required
for 100 W −inverter
SHC ripple > 10% − 15%
SHC ripple > 8%
stress on fuel cell membrane
SHC ripple > 10%
improper working of MPPT
poor efficiency, nuisance tripping
SHC ripple > 8%
heating due to hysteresis
No time delay or latency effect
in LED lights against SHC ripple
SHC ripple and increase in peak
values of DC current and voltage
Reference
[25], [34]
[27]–[29]
[34]
[32]
[34]
[24], [30], [31]
[37]
V. Classification of SHC Ripple Mitigation Methods
There are several techniques to decouple the 2ω -ripple at the DC-link. The propagation of 2ω -ripple towards
the DC source can be avoided by storing the 2ω -power ripple in a large E-cap at the DC-link or forcing
the voltage to swing at 2ω directly at the DC-link itself or allowing indirect voltage-swing across the film
capacitor through an auxiliary circuit, and hence 2ω -swing effect in the DC-link voltage can be avoided. The
indirect power decoupling is a better choice in terms of the reliability of the film capacitor and ripple-free
DC-link voltage. Besides this, the control-oriented techniques are generally used in the two-stage DC-DC-AC
converter. These techniques utilize the one or more concept(s) such as 2ω -decoupling power balancing by
the active filter, output-impedance shaping, loop-bandwidth shaping, generation of the ripple-free reference
of the input current and to force the ripple flow through the DC-link capacitor.
Based on the above mentioned techniques, the SHC ripple control techniques can further be classified in the
three broad categories (i) passive power-decoupling techniques (PPTs) (ii) active power-decoupling techniques
(APTs) and (iii) control-oriented compensation techniques (CCTs) for inverter with front-end converter or
in-built control circuit. To implement these techniques, different topographical arrangements (based on the
location) can be made for the different active power decoupling circuits with or without control algorithm
and for the different configurations of the CCTs. These topographical arrangements are (a) arrangement at
the DC-link or DC side of the inverter and (b) arrangement at the AC side of the inverter or mixed type
arrangement. In the Fig. 4, the basic methodology of the different techniques are depicted.
Active decoupling Circuit DC ‐side
Passive decoupling Circuit
(b)
Controller
non‐isolated
or
isolated
DC‐DC
Converter
with SHC
ripple
Compensator
+
‐
Load
Inverter
Load
Controller
(e)
Two‐stage DC ‐ DC‐AC Converter
DC Source
Controller
(d)
+
‐
Impedance
Source
Network
(Z‐source,
Y‐source, quasi‐Z,
quasi‐switched
boost )
Load
(c)
Controller
Inverter
Load
DC Source
Inverter
DC Source
+
‐
+
‐
Impedance Source Inverter with AC side
or mixed decoupling
Impedance Source Inverter with DC side decoupling
Impedance
Source
Network
with
decoupling
circuit or
ripple
conpensator
Load
Inverter
Controller
(a)
+
‐
DC Source
Load
Inverter
DC Source
Inverter
DC Source
+
‐
AC side or Mixed Decoupling circuit
Controller
(f)
Fig. 4. Topographical Arrangements: (a) PPTs at DC link (b) APTs at DC link (c) APTs at AC side or mixed type APTs (d)
ISI with power decoupling circuit at DC side (e) ISI with mixed power decoupling circuit (f) Isolated and non-isolated two-stage
DC-DC-AC converter with software-based control
The classification of the 2ω −ripple mitigation techniques is depicted in the Fig. 5.
Classification of 2ω‐Ripple Mitigation Techniques
Passive power‐decoupling
Techniques (PPTs)
Active power‐decoupling
Techniques (APTs)
Control‐oriented compensation
Techniques (CCTs)
Based on Topographical
Arrangements
APTs at DC‐side and
AC‐side of Inverter
PPTs at DC‐side
of Inverter
E‐cap
at DC‐link
Resonant
LC Circuit
at DC‐link
A Shared APTs
at AC‐side
with H‐bridge
(or A dependent
APT on the
H‐bridge)
Control Approch
Control Approch
2ω‐ripple
directly
decoupled
by large
size E‐cap
APTs at DC‐side
with Film
Capacitor
and inductor,
embedded
with power
electronics
Circuit
2ω‐ripple
frequency
matches
with LC
resonance
frequency
2ω‐power balancing
by controlling the
stored energy in the
film capacitor
of active filter
CCTs at DC‐side
of Inverter
CCTs for two‐
stage converter
or in‐built
front‐end control
circuit with
H‐bridge
CCTs for two‐
stage converter
or in‐built
front‐end control
circuit with
H‐bridge
+
APT at DC‐link
Control Approch
Dual‐loop control
(DLC) scheme,
modified DLC,
Output‐impeance
shaping etc
Dual‐loop control
(DLC) scheme,
modified DLC,
Output‐impeance
shaping +
2ω‐power balancing
for APT
Fig. 5. Flow chart of classification of 2ω −ripple mitigation techniques
In PPTs, generally, a large-size E-cap is used at DC-link of inverter to decouple the SHC ripple [38]–[42].
Use of a resonant filter such as L-C tuned filter [43] or a resonant filter with linear controller [44] at DC link
substantially reduces the size of the components (L ,C) of the filter. However, the reliability of the E-cap is
still a challenge and also a good engineering is required to design a proper resonant filter to avoid resonance.
The optimization of the sizes of L and C is an involved problem. Recently, several active power-decoupling
techniques are evolved to overcome the drawbacks of the PPTs such as (i) using a power electronics circuit with
film capacitor at the DC link [24], [45]–[59], and (ii) using a power electronics circuit with film capacitors at
the AC output side of inverter or in mixed type active filter [5], [15], [48], [60]–[68]. Recently, several softwarebased control-oriented compensation techniques are proposed for the two-stage converter, impedance-source
inverter, multi-level inverters and some advance topologies [27], [37], [69]–[91]. These methods are reviewed
in the following subsections.
A. Passive-Decoupling Techniques
PPTs are conventional and easy to implement without using control schemes. However, PPTs add large
size components to the system. This increases size, cost and weight of the system. The large size of passive
components affect the efficiency of the system due to i2 r-loss. There are several topologies of the inverter
which use the PPTs. The topologies shown in the Fig. 6(a-b) are the conventional stand-alone voltage source
inverter [39], [92]–[94] and grid-connected voltage source converter [95]–[97] respectively. These topologies
require a large size of DC-link capacitor [4], [98], [99]. Moreover, in such topologies, a front-end DC-DC buck
or boost converter or a line-frequency transformer at the output-end of the inverter is used to step-down
or step-up the voltage. The line-frequency transformer further increases the size of the system. Some of the
isolated topologies are shown in the Fig. 6(c)-(d)-(f). A flyback-type center-tapped inverter (see Fig. 6(c)) is
proposed in [100] for the isolated operation. However, this topology is suitable for the residential low power
applications. Recently, some isolated two-stage DC-DC-AC power converter with high frequency AC link (see
Fig. 6(d)) such as dual-half bridge converter and dual-active bridge (DAB) are proposed for the high power
applications [101]–[104]. In [105], a novel topology is proposed for the voltage buck and boost operation
without using a front-end DC-DC converter or a transformer (see Fig. 6(e)). However, in all these topologies,
a power decoupling electrolytic capacitor is used at the DC link.
The large size inductors used in the current-fed inverter can minimize the ripple at the input [106], and
also by employing a tuned-resonant filter at the DC-link, the SHC ripple can be decoupled [52]. An optimal
design of the resonant filters (an optimal choice of L-C components) allows to replace the E-cap(s) with the
film capacitor(s). In [43], authors have proposed a pulse-link DC-AC converter (see Fig. 6(f)). In this topology
L2C2 makes the resonating tank. This resonant-filter is tuned at 2ω such that the most of SHC ripple passes
through the low impedance L2C2 -branch when the resonance frequency (ωo ) matches with 2ω . However, this
method has a drawback, even though the C2 is small enough to replace with the film capacitor, the size of
the inductor (L2 ) required is quite large. The non-isolated two-stage DC-DC-AC converter are popular in
the renewable energy applications [107]. These topologies can perform different functions in a system such
as voltage regulation, MPPT operation, current control, impedance-shaping. The intermediate DC-DC power
stage can be a buck-type, boost-type or buck-boost-type depending on the load voltage/power requirements
[70], [73], [108] (see Fig.6(g)). Conventionally, a large size E-cap is used at the DC link in these topologies.
Recently, several APTs are addressed to decouple the SHC ripple and to improve the performance of these
topologies (discussed in the next subsection). However, these topologies still have a challenge of accidental
short-circuiting of the switches in the same leg(s) of the inverter [109]. This may damage the system as the
inverter in such topologies is a voltage source converter. The impedance-source inverters (ISIs) [110], [111]
are the good choice in such limitations and operating conditions. However, these topologies require large
size impedance-source network to filter low-frequency SHC ripple [65], [79], [80]. In Fig.6(h-k), the different
topologies of the impedance source inverter are shown. In [44], a resonant-cum-PID controller based PPT is
presented for the three-level single-phase impedance-source inverter. The main idea of this method is to allow
desirable voltage fluctuation about the impedance capacitors (see Fig.6(k)) by varying the shoot-through
duty accordingly such that the SHC ripple confines at the q-ZSI network and does not affect the input. The
resonant controller suppresses the SHC ripple at the input. However, in this technique, the closed-loop zeros
and poles of the system come very close to imaginary-axis, therefore, a PID controller is added for the desired
pole-zero cancellation. According to simulation results of [44], this method still suffers the input power ripple
fluctuation (i.e. about 30%) at the rated power operation of the system.
Ls
Lf
L2
C2 +
+
‐
C f1
C f2
+
‐
Lf Cf
Load
(f)
(e)
L1
C1
L
L2
Lf
Cd
C2
Cd
L2
(h)
C d2
L1
(k)
(j)
(I)
C1
Cd
C3
L3
C2
L4
3‐Level NPC
L1
Cf
Cd
(g)
C2
Solar‐PV string
Cd
Lf
Buck or
Boost or
Buck‐Boost
DC‐DC
converter
C3
Load
+
‐
C1
is
(d)
(c)
L1
+
‐
Vdc
Grid
C d1
Cd
AC‐ Link
Iin
Lf
Cf
L f L gf L g
Cf
Grid
L2
C4
Fig. 6. Passive power decoupling techniques
B. Active Power-Decoupling Techniques
Active power-decoupling techniques (APTs) have been evolved from the PPTs to fulfill the need of a suitable
and reliable substitute for the E-cap. APTs are backed by additional components such as diodes, switches, a
temporary energy storage especially a thin film capacitor. The wide applicability and substantial reduction
in the size of the E-cap using advanced engineering techniques make the APTs popular among the existing
power decoupling techniques. The active filter/auxiliary circuit/additional ripple-port contains a small size
film capacitor as a 2ω −ripple buffer capacitor. An inductor is also required to transfer the 2ω -power ripple
between the coupling point of the active filter at the DC or AC side of the main circuit and the buffer capacitor
connection point. The control scheme of the active decoupling circuit is generally associated with the main
control. In general, the control aims to balance the required 2ω -ripple power in the system by exchanging
the reserved power of the buffer capacitor in the active filter such that the part of the main circuit from the
DC-link to DC source becomes ripple-free. Nevertheless, a proper selection of the film capacitor is a priori to
keep the design optimum, physically as well as economically. For this, suppose vc (t) and ic (t) are the voltage
across and current through the power decoupling capacitor or buffer capacitor (CFC ) respectively, then the
2ω -ripple power decoupled is given by,
pripple = vc (t)ic (t)
(2a)
2
dv (t)
pripple = 0.5CFC c
(2b)
dt
According to [112], the voltage across the capacitor can have three general form of the voltage considering
all types of the APTs: a sinusoidal voltage waveform at ω , a sinusoidal voltage waveform at 2ω with DC
voltage-offset and rectified voltage waveform at 2ω (see Fig. 7). By solving the differential equation 2(b),
(2) Sinusoidal waveform with DC offset at 2ω
VcFC
(3) Rectified waveform at 2ω
0
π/2
π
3π/2
2π
(1) Sinusoidal waveform at ω
Fig. 7. Three type of voltage waveform buffered by film capacitor [112]
the minimum size of the ripple-port capacitor for the three different waveforms can be calculated [112]. The
minimum size of the ripple-port capacitors required in the different APTs is tabulated in the Table-II. In
what follows several APTs are discussed using the three different topographical arrangements of the active
power-decoupling circuits in the system.
Topographical Arrangement#1: Power-decoupling at the DC-link or DC-side
This arrangement is made at the DC-link or DC-side of inverter. Generally, the active power decoupling
circuit is directly shunted at the DC-link by replacing the large size E-cap (see Fig. 8(a) to Fig.8 (h). These
rd
Vd
Cdc1
(g)
ir1
idc1
C1
A
idc2
Lf
ir2
T$
T!
T"
Vc2
Cdc2 T%
L
T#
T&
N"
Vg
Fig. 8. Active power-decoupling circuits at DC-link: (a) CPS-PAF-Boost type [113] (b) Improved version of CPS-PAF (c)
ALFRCD with cascaded capacitor [50] (d) Bidirectional-buck type [26] (e) FB-RCR circuit [54], [114] (f) Ripple-port circuit [24]
(g) Hybrid filter [52] (h) Dual-voltage control decoupling strategy using a symmetric half-bridge circuit with H-bridge [115], [116]
(i) Dependent power decoupling with two-phase legs [5], [112], [117] and (j) [112], [118] (k) Series power decoupling technique
with two legs [114] and three legs [119], [120] and Current control loop of ALFRCD (l) with actual cascaded capacitor (m) with
virtual cascaded capacitor [50]
topologies are independent of the H-Bridge of the DC-AC power converter. The circuits in the Fig. 8(i) and
Fig. 8(j) are the dependent decoupling circuits and utilize a part of the H-Bridge. Recently, some series power
decoupling technique as shown in Fig. 8(k) are addressed [114], [119]–[121]. This type of decoupling techniques
add a series active decoupling circuit between the source and H-Bridge. The buck, boost or buck-boost type
active filters are addressed in [24], [26], [50], [54], [59], [113], [122]–[124].
The basic principle of the ripple decoupling in the power decoupling techniques at the DC-side is as follows
[24]. Suppose CFC is the film capacitor for the power decoupling purpose. The voltage across the film capacitor
is vc is given by,
vc = Vcp cos(ω t + φ )
(3)
Here Vcp is the peak value of the capacitor voltage and φ is an arbitrary phase-angle. The current through
the capacitor is given by,
d
ic = CFC Vcp cos(ω t + φ )
(4)
dt
The decoupling power ripple is given by,
(5a)
pFC = vc (t)ic (t)
d
= vc (t)CFC Vcp cos(ω t + φ )
dt
2
= −0.5CFCVcp
ω sin(2ω t + 2φ )
(5b)
(5c)
The 2ω -power ripple at the DC-link is equal to pFC . Applying the power ripple balance at the DC-link and
using (1d),
pripple = pFC
0.5Vpeak I peak cos(2ω t − θ ) =
Po cos(2ω t − θ ) =
2
−0.5CFCVcp
ω sin(2ω t + 2φ )
2
−0.5CFCVcp ω sin(2ω t + 2φ )
(6a)
(6b)
(6c)
2 . The equation (6) is satisfied for,
The amplitude of Vcp is adjusted by control such that Po = 0.5CFCVcp
sin(2ω t + 2φ ) = cos(2ω t − θ )
(7)
Solving (7) gives,
π θ
(8)
φ =− −
4 2
2 is satisfied by some value of
The active filter decouples the 2ω power ripple if (8) holds and Po = 0.5CFCVcp
Vcp . Therefore, control aims to adjust power factor angle (φ ) and Vcp to buffer 2ω -power ripple.
Several APTs based on the above control design and some other control schemes reviewed here for the DCside power decoupling arrangement. In [113], a boost-type current pulsation smoothing-parallel active filter
(CPS-PAF) is proposed. The CPS-PAF consists of a small film capacitor and a conventional non-isolated
boost circuit (see Fig. 8(a)). This circuit behaves like a current-source. The working principle of power
decoupling is shown in the Fig. 9(a) [54], [113]. The controller continuously compares the input current (Iin )
Fig. 9. Working principle of (a) CPS-PAF [54], [113] (b) Ripple-port [24]
with instantaneous value of the DC-link current (io (ω t)). For Iin > io (ω t) in interval 0 − π /4 and 3π /4 − π ,
CFC stores energy (boost-mode) and for Iin < io (ω t) in interval π /4 − 3π /4 releases the energy (buck-mode).
For energy stored (say E1 + E3 ) equals to energy released (say E2 ) by CFC , the low frequency pulsation at the
DC-link is zero. CHF takes cares of high frequency ripples. The performance of CPS-PAF is poor for a small
value of CFC . In such case, losses of semiconductor devices are more and DC-link voltage shows unwanted
voltage fluctuation. The active power imbalance between input and output of PAF and the power loss of
PAF cause a constant and prolonged decrease in the voltage of CFC resulting in a lower value of Vc than
the DC-link voltage. In such case there is a possibility of short-circuiting at the DC-link [54] through the
anti-parallel diode of the buck switch. To resolve this problem, a mixed type APT version of CPS-PAF is
proposed in [113] (see Fig. 8(b)). The grid feeds the rectified power to CFC through the line transformer to
compensate the losses. However, the system becomes bulky and complex. Based on the virtual capacitance
concept, a buck-boost type active low-frequency ripple control device (ALFRCD) is proposed in [50] for the
building-integrated photovoltaic (BIPV) systems, the ALFRCD is same as presented in [113]. However, in
[50], a virtual capacitor is added in the series with inductor of the active filter as shown in the Fig. 8(c).
The virtual capacitor is realized by adding an integrator in the current control-loop. The diagram of current
control scheme is shown in the Fig. 8(l-m). The control scheme forces the output current of the active filter
(io ) to track the DC-link current (iinv ). The important requirement of this scheme is to keep the voltage of the
film capacitor (CFC ) higher than the bus voltage. Wang et al. proposed a similar bidirectional buck type-APT
(see Fig. 8(d)) in [26]. The working principle of the power ripple decoupling control scheme is same as in [113]
(see Fig. 9(a)). In [26], a DCM control scheme is used such that the CFC stores all the SHC ripple while L
functions like a power transfer element. Therefore, L does not store decoupling power that is good in terms of
the power-density. Also, unlike CPS-PAF, the voltage of CFC is less than the DC bus or DC-link voltage or any
other voltage in the system. A four-switch based bidirectional full-bridge-ripple current reduction (FB-RCR)
circuit is shown in the Fig. 8(e) [54], [114]. The working principle of the FB-RCR is same as of CPS-PAF
of [113]. However, unlike [113], there is no requirement of the line-frequency transformer with the rectifier.
The internal energy losses which are the cause of constant voltage decrease of CFC in the FB-RCR circuit
are compensated by sourcing power from the input source itself. However, the FB-RCR circuit contains four
switches which operate at the high frequency. Therefore, the system becomes bulky and the switching loss
increases. A similar APT based on the ripple-port concept is presented in [24]. In this circuit, the inductor
(L) is placed in series and adjacent to CFC , this makes a ripple-port (see Fig. 8(f)). The control design is
based on (5)-(8). The working principle of this technique is depicted in the Fig. 9(b). In the Fig. 8(f) and
Fig. 9(b), ϕ is the phase difference between the instantaneous voltage of the film capacitor (vFC ) across CFC
and output voltage of inverter (vac ), and θ is the displacement angle between instantaneous value of vac and
iac . In (8), for the unity power factor, θ = 0, the phase-shift between vac and vFC is π /4. In [52], a hybrid
filter is proposed as shown in the Fig. 8(g). In the hybrid filter, there are three legs (six switches). The ripple
energy is stored in both, capacitor C1 and inductor, L1 . Using Kirchhoff’s current Law at A in Fig. 8(g),
idc1 = ir1 − (ir2 + idc2 )
(9)
The SHC ripple is eliminated from Cdc1 for a very small value of Cdc2 such that,
idc2 ≈ ir1 − ir2
(10)
The hybrid filter generates ir2 such that ir1 = ir2 . However, for this, inductor current should be controlled
such that the voltage across Cdc2 remains constant; vc2 keeps on decreasing due to internal loss of the filter.
The hybrid filter (with 2 legs) alone is not sufficient. Therefore, an additional leg (switches T5 , T6 ) is added
to import the energy from the grid as shown in 8(g). This is a mixed type arrangement of APT. Nevertheless,
a small capacitor filter can be used for the power decoupling. However, the extra switches in the third leg
make the circuit bulky and lossy. In [115], Tang et al. have proposed a dual voltage control strategy for the
symmetric half-bridge circuit with H-bridge. The circuit diagram is shown in the Fig. 8(h). The two capacitors
(C1 ,C2 ) are used to decouple the power ripple. The control scheme aims to modulate the switches of the half
bridge such that the voltages across the two capacitors are equal and the 2ω -pulsating voltage component
over the offset of the voltages are out of phase by 180o . Following the power balancing condition, the required
power decoupling condition for the voltage and phase are as follows,
θ
Vc
−Vrms
)
= 0.5tan−1 (
ω L f Irms
√√
(Vrms Irms )2 + (ω L f I 2 peak)2
=
ω (2C f − L f (2ω C f )2 )
(11a)
(11b)
Here Irms and Vrms are the RMS vales of AC current and voltage. C f = C1 = C2 . Vc is the RMS offset-voltage
of capacitors. θ is the phase difference between the grid voltage and pulsing voltage in the capacitor.
The APTs as shown in the Fig. 8(i) and Fig. 8(j) share at least one of the phase of the H-bridge with
the main circuit and active power-decoupling circuit. Therefore, these APTs are dependent on the H-bridge.
This affects the modulation signal of the inverter. To avoid over-modulation and to keep the value of the
film capacitor minimum, the DC voltage utilization in the two-phase legs topologies (Fig. 8(i-j)) is always
less than or equal to 0.5. In such topologies, the third type of the voltage waveform across the film capacitor
shown in the Fig. 7 ensures that the size of the capacitor required in the circuit is minimum [112].
In the impedance source inverter such as ZSI and q-ZSI, the large number of components and their bigger size
pose challenges. The low frequency SHC ripple further forces over-sized design of these components especially
a large size E-cap requirement. Adding active decoupling circuit at the DC-link resolves this problem. The
thin film capacitor can be used with the active filter. However, this adds extra components to the circuit
again. Recently, some buck-boost type active filters are presented for the quasi-Z source inverter [56]. In [56],
a hysteresis current controlled active power filter is proposed to confine the 2ω -ripple within the active filter
ripple-port. The control logic is same as shown in the Fig. 9(a). However, the control design of active filter
for the q-ZSI is somewhat difficult than the H-bridge converter. A bidirectional buck-boost type active filter
connected at the DC-link of the q-ZSI is shown in the Fig. 10(b). The design of the active filter is similar
as shown in the Fig. 8(d). In [57], a comprehensive design of asymmetric ZS-network in the perspective of
high frequency and low frequency ripple minimization is discussed the first time. The design is presented for
a battery energy-stored quasi-Z source based PV generation system (see Fig. 10(c)). The optimum size of the
inductors for the 2ω − current ripple suppression and the size of the capacitors for the 2ω − voltage ripple
suppression can be calculated using the quasi-ZS network design presented in [57].
Fig. 10. quasi-ZSI with (a) boost-type active filter [56] (b) bidirectional buck-boost type active filter (c) battery module [57]
Topographical arrangement #2: Power-Decoupling at AC-side or mixed type arrangement
In this arrangement, the APT utilizes a part of DC side and a part of AC side of the main circuit, hence
a mixed type arrangement. Generally, the power decoupling circuit in such techniques shares atleast one leg
of the inverter and main circuit. The AC-side power decoupling techniques improve the power conversion
efficiency in comparison to the DC-side power decoupling as the low frequency power pulsations are forced
to confine at the AC-side [63], [125]. Some of the recent AC side APTs are shown in the Fig. 11. In [5],
Serban has proposed an active power decoupling technique using two decoupling capacitors at the AC-side
(see Fig 11(a)). The control technique reshapes the voltage across the legs of the inverter such that the
SHC ripple is forced to propagate towards the two decoupling capacitors. The technique does not add extra
power electronics to the main circuit. However, the DC-link voltage and current loading of the inverter set
a trade-off for the values of decoupling capacitors. Consequently, the efficiency of the system is affected.
This technique implements a complex control using multiple controllers. The utilization factor of storage
elements is less than 50%. The circuits shown in the Fig. 11(b-e) add extra switches to the system. The
inclusion of the third leg or a pair of switches in the H-Bridge reduces the stress on the switches by 57% in
comparison to the conventional topologies or H-Bridge [126], [127]. A ripple confinement control is proposed
in [63]. This technique implements a voltage waveform control [125] to confine the pulsating power within
the capacitors at the AC-side. A brief explaination of the waveform control is presented in the Section-V(D).
A 100% utilization of the storage elements can be achieved using this method. However, this technique adds
an extra pair of switches (see Fig. 11(b)) and also increases the voltage-stress on the capacitors. In [128],
Chen et al. have proposed a 2ω -power pulsation mitigation at the DC-link using the SVPWM method for the
circuit proposed in [129] (see Fig. 11(c)). This technique eliminates DC capacitance and minimizes voltage
and current stress on the switches for a range of the power factor. However, two extra switches are required
and the total device power rating is increased by 50%. An APT for grid connected AC-DC power converter as
shown in the Fig. 11(d) is proposed in [127]. This active decoupling technique significantly reduces the size of
the DC-link capacitor. The stress on the switches is reduced up to 70% for all the power factor. However, this
technique again adds a pair of switches and L-C components to the system. The study analyzes the effect of
the grid-side inductance as well and provides design guidelines for different system parameter for the practical
implementation. Another APT is proposed in [61] for the microinverter applications; a problem from the
Google little box challenge. The proposed technique is implemented on the GaN-based three-phase inverter
topology as shown in the Fig. 11(e). In the circuit of Fig. 11(e), the load is fed between the phase a and b
and the decoupling circuit is placed between phase b and c. The basic principle of the ripple cancellation is
that the control keeps the sum of instantaneous powers pa−b and pb−c a constant value. Therefore, the ripple
is confined within the AC side decoupling circuit and hence the ripple at the DC-link eliminates. The GaN
switches are used in the considered topology. The GaN switches are wide-band-gap switches and currently
in the developing phase. The cost factor limits the wide use of the GaN switches. Furthermore, use of extra
switches with the H-Bridge topology makes the system bulky and costly. A similar topology is presented in
[129].
S1
S5
S5
S3
L1
C1
C2
Vd
S6
L1
S2
(a)
S4
S6
(c)
(b)
Pab
r
S5
S5
S3
S1
a
Vd
o
EM I
Filter
b
Load
L
c
LC
C S6
Pcb
S2
(d)
S4
S6
(e)
Fig. 11. mixed type of APTs without adding extra power electronics (a) proposed in [5] and adding extra pair of switches (b)
proposed in [63] (c) proposed in [128] (d) proposed in [127] (e) proposed in [61]
An AC side active filter is proposed for the q-ZSI in [65]. The control confines the decoupling power within
the LC component of the filter using a third leg besides the H-bridge. The proposed topology of [65] is shown
in the Fig. 12. The control aims to switch the third leg such that 2ω -power ripple is exchanged by the stored
energy in L and CFC component of the active filter, the power decoupling principle is same as presented in
[24]. However, the energy stored in the inductor is also considered here. The decoupling power ripple between
B and C is given by,
diFC
iFC
dt
2
= 0.5VFC
CFC (1 − ω 2 LCFC )sin(2ω t + 2φ )
pFC = vFC iFC + L
(12a)
(12b)
To decouple the power ripple, the addition of the ripple power component in (1d) and pFC in (12)(b) should
equate to zero. This implies,
2
Po cos(2ω t − θ ) = 0.5VFC
CFC (1 − ω 2 LCFC )sin(2ω t + 2φ )
(13)
Here VFC is the peak value of the voltage across the CFC and iFC is the current through L. Po = 0.5Vrms Irms .
2 C (1 − ω 2 LC ) and θ = −0.5φ + π .
To decouple the power ripple the control follows Po = 0.5VFC
FC
FC
4
C2
L1
C1
L2
A
C3
Lf rf
B
C
C FC
vFC
L iFC
Fig. 12. Mixed type active decoupling circuit for the q-ZSI [65]
TABLE II
Design of Minimum Value of Filter Capacitor
Topology or Filter type
1) E-Cap
2) Buck-type active filter
Filter location
DC-link at DC side
Embedded with active filter at DC side
Minimum design value
o
C = 2VDC P∆V
DC ω
Io
CFC = 8V I ω8V2rms
L +V 2 M ω
3) Series L-C filter attached b/w centertapping of transformer and return wire
4) H-Bridge type active filter
Embedded with active filter at DC-side
CFC =
Embedded with active filter at DC side
5) RCR-PAF
Embedded with active filter at DC side
6) Extra third leg with H-Bridge
Embedded with active filter at AC side
7) quasi-Z source inverter with extra leg
Embedded to third leg at AC side
8) E-cap
at DC-link of two-stage converter
9) q-ZS network
Capacitors of q-ZS at DC side
10) E-cap
E-cap at DC-link of two-stage converter
11) High gain-qSBI based active filter
Embedded with active filter at DC side
2PPV
2 (1−ω 2 LC )
ω VFC
FC
CFC = ω (V 2 −V2P2PV
H
PVat −10o C )
4V I ((2π f )2 −ω 2 )
CFC = m(2mπ f V nM)2 ω
n PN
Io
CFC = 8V I ω8V2rms
2 Mω
LCF +VPN
rms rms
FC
LCF = V4PNfs−V
∆iFC
1.359So
CDC = ω ∆V
DCmax VDC
2Vo Io
C = C1 = C2 = εω
2
VPN
2Tac ∆P
CDC = ∆V (2V
DC +∆V )
D(1−D)(1−2D)
C1 = 2R %(1−4D+2D2 ) f R
C1
H L
(1−D)2
C2 = 2R %(1−4D+2D2 ) f R
C2
H L
CFC = ω ∆VFCSVFCavg
π PPV
CFC = ω0.422
(VH2 −VL2 )
CFC = ωVVs I2s
CF
12) Buck, Boost, Buck-boost type filter
Embedded with active filter at DC side
13) CPS-PAF
Embedded with active filter at DC side
14) Six-switch single-phase inverter
Embedded with active filter at AC side
CFC =
CF
rms rms
PN
Pin (Pin −VDC Itrans )
ω VC0VDC (2Pin −VDC Itrans )
Reference
Conventional
[15]
[47]
[49]
[54]
[64]
[65]
[70]
[80]
[75]
[87]
[86]
[113]
[123]
C. Control-Oriented Compensation Techniques for Inverters with Front-end Converter or In-Built Control
Circuit
Multi-stage DC-AC power converter are generally used to complete the multiple functions such as MPPT,
current control, voltage regulation, high-power operation, bidirectional power flow control, impedance-shaping,
isolation and grid-connection. Two-stage converters are widely used topologies in the renewable energy
applications. In such topology, there is an intermediate DC-DC power conversion stage between the source
and DC-AC converter. The front-end DC-DC converter facilitates the ripple-mitigation at the input without
adding the extra circuit at the DC-link or DC-bus. The main concept is to design a control scheme that
restricts the propagation of the SHC ripple towards the DC source(s) while forcing its flow through the
DC-link capacitor. However, this causes a deliberated increase in the 2ω -pulsation of the DC-link voltage.
This may affect the THD level of the output of the inverter. According to European standards (EN50160) for
the public distribution systems, the low frequency voltage pulsation of the DC bus-voltage/DC-link should
be kept within 2% range. Some studies have also used a limit of the 2% − 5% [73], [130], [131]. The THD
level of the output of the inverter should be kept within 5% and within 3% for the individaul harmonic
[132]. Therefore, an optimum design of the DC-link capacitor is a need yet. However, an optimum design
of the capacitance is not sufficient in the renewable energy applications. The renewable energy sources such
as solar-PV, fuel-cell, wind-turbine are very prone to the large disturbances and possesses very uncertain
working characteristics. Such systems may have poor dynamic performance with the small or an optimum
size of the DC-link capacitor [21]. According to [70], for a 2.5 kW -boost-derived DC-DC-AC converter, a bulky
30 mF-capacitor is required at the DC-link to prevent severe undershoot-overshoot at the load-transients;
a large size capacitor provides sufficient voltage-loop bandwidth to compensate the voltage oscillations at
the faster rate [21]. Therefore, along with ripple mitigation property, the control should be robust enough
to tackle the large line-load transients for the optimum value of capacitor at the DC-link. Moreover, the
control-oriented techniques without adding an auxiliary circuits still allow a low-frequency pulsation at the
DC-bus up to some extent based on the optimum designed value of the DC-bus capacitance. Use of an active
filter at the DC bus eliminates the SHC ripple. However, this adds cost, weight, size and complexity to the
system. Fig. 13 shows block diagrams of the stand-alone and grid-connected two-stage DC-DC-AC converter
with active-filter and without active-filter at the DC-link. In the next Section, several control-oriented schemes
(a)
DC‐link
Filter
Insolated
or
Non‐isolated
DC‐DC Converter
(Buck, Boost
or Buck‐Boost type)
Second
‐stage
DC‐AC
Converter
Grid
AC‐filter
DC‐AC
Converter
First‐stage
DC source
(Fuel cell,
solar‐PV)
Insolated
or
Non‐isolated
DC‐DC Converter
(Buck, Boost
or Buck‐Boost type)
Second
‐stage
AC Load
DC‐link
Filter
AC‐filter
DC source
(Fuel cell,
solar‐PV)
First‐stage
(b)
(c)
DC source
(Fuel cell,
solar‐PV)
DC‐AC
Converter
First‐stage
Insolated
or
Non‐isolated
DC‐DC Converter
(Buck, Boost
or Buck‐Boost type)
Active
Filter
Second
‐stage
DC‐AC
Converter
Grid
AC‐filter
Second
‐stage
AC Load
Insolated
or
Non‐isolated
DC‐DC Converter
(Buck, Boost
or Buck‐Boost type)
Active
Filter
AC‐filter
DC source
(Fuel cell,
solar‐PV)
First‐stage
(d)
Fig. 13. Two-stage DC-DC-AC converter (a) Stand-alone without active-filter (b) Grid-connected without active-filter (c)
Stand-alone with active-filter (d) Grid-connected with active-filter
with and without addition of the extra circuitry in the two-stage converter are reviewed.
1) Control-Oriented Compensation Technique Without Adding Extra-circuitry: Recently, the software based
control-oriented techniques are widely used for the two-stage converter for the ripple-mitigation at the input.
Kwon et al. have proposed a current-fed resonant push-pull converter and DC-AC converter based power
conditioning system (PCS) for the fuel-cell application with a ripple-mitigation compensator [35]. The control
block-diagram is shown in the Fig. 14(a). The control generates a duty (Do ) for the DC voltage regulation in
the closed-loop. A feed-forward controller takes care of the SHC ripple by adding ripple-cancellation duty (Dr )
to Do . To reduce the ripple further, a perturbed duty (∆D) is generated using the current control-loop and
added to give overall duty (D = Do + Dr + ∆D). However, the performance of the feed-forward controllers are
poor in terms of disturbance rejection and robustness against parametric uncertainty [133]. Feedback control
approaches are widely used in the different applications such as tracking, regulation, noise-cancellation,
disturbance rejection, robust control applications. In literature, the concept of the ripple-mitigation using the
feed-back control in the two-stage converters is put forward in the two perspective. First one is based on the
adopting a modified dual-loop control method. The method utilizes a current control mode (CCM) scheme.
Second method is based on the output-impedance shaping. The method of output-impedance shaping can be
implemented in a voltage control mode (VCM) i.e. using a single control loop also.
The CCM-based dual-loop control method has a current-loop as the inner loop and the voltage-loop as the
outer-loop. To ensure the ripple-reduction at the input of the two-stage converter, the interaction between
the inner-loop and outer-loop is avoided such that disturbances in the voltage-loop remains intact with the
current-loop [21], [69], [133] i.e. current-loop is not affected by the 2ω -pulsation of the DC-link voltage. One
way to do this is to make a separate current-loop control (i.e. input current reference ire f is given separately)
and voltage-loop control (i.e. bus voltage reference vbusre f is given separately) as shown in the Fig. 14(b)
[133]. However, in such schemes, the current-loop of the first-stage should be designed to get a very high
gain at 2ω . This makes the real-time implementation difficult due to hardware limitations [133]. Liu and
Lai have proposed a dual-loop control method for the front-end DC-DC converter of a fuel-cell sourced twostage DC-DC-AC converter [69]. The basic concept of the ripple reduction proposed in [69] is based on the
bandwidth-shaping. Instead of making the independent current-loop and voltage-loop, the bandwidth of the
voltage-loop is reduced significantly. According to [69], a reduction in the SHC ripple at the input can be
achieved provided that the bandwidths of inner-loop and the outer-loop have a separation of half-decade (at
least) from the 2ω frequency. The basic concept is to generate a SHC ripple-free current reference for the
inner-loop controller. However, the very low bandwidth of the voltage-loop causes the sluggish or poor system
response at the load transients; a large over-shoot causes a voltage/current stress on the components and
a large undershoot may distorts the output AC voltage leading to the high THD. Therefore, this method
has a trade-off between the SHC ripple-reduction and dynamic performance. Fig. 14(c) depicts the dual-loop
control method used in [69]. In Fig. 15, the effect of the bandwidth of voltage-loop on the ripple-reduction
Fig. 14. (a) A feed-forward scheme [35] (b) Independent current loop and voltage loop control [133] (c) dual-loop control scheme
with very low bandwidth of the voltage-loop [69]
and dynamic performance is depicted [134].
Gvd(s)
( c) Voltage‐loop Bandwidth=65 Hz, Kv=20000
(b) Voltage‐loop Bandwidth=30 Hz, Kv=5000
(a) Voltage‐loop Bandwidth=2.5 Hz, Kv=200
100
100
fr=93 Hz Gcd(s)
fr=93 Hz
100
50
0
fv=2.5 Hz
−100
360
Magnitude(dB)
Tc(s)
0
0
10
Output voltage (x 2 )
Input current ( x1 )
20
10
1
2
10
10
3.8
3.65
3.55
2 2.02 2.04
0
fc=1250 Hz
fv=30 Hz
−50
360
180
0
−180
180 Phase(degree)
−180
0
fc=1250 Hz
Tv(s)
fr=93 Hz
50
fv=65 Hz
−50
360
fc=1250 Hz
180
0
0
10
3.95
3.65
3.45
7
3
10
1
10
−180
3
10−1
10
2
10
7.02 7.04
100
101
4.8
3.5
2.5
12 12.0212.04
102
103
0
1
2
11.4
10.8
11.1
4.3
10.9
0
0.5 0.52 0.54
1
3
4
10.8
5
4.3
0
1.5
4 4.1 4.2
6
7
12.4
11.8
11.2
4.3
10
0
6
5.5 5.52 5.54
8
9
10
15
10
4.3
6.1
9
9.05
11
12
18.5
18.5
10.6
4.3
4.6
10.5 10.5210.54
11
13
14
15
20
10
4.3
11.05
14
14.05
400
200
0
520
380
305
0.98
1
410
380
355
5.98
380
270
1.6 3.98
2
3
4.25
4
5
405
380
340
8.98
6.13
6
7
Time(s)
8
9.05
9
398
380
365
10.98 11.02
10
11
12
400
380
362
13.98 14.01
13
14
15
Fig. 15. Effect of the bandwidth of voltage-loop: there is trade-off between ripple-reduction and dynamic performance [134]
Recently, 2ω -power ripple problem is addressed in the conjunction with the hybrid parameters of the
DC-DC converter. These parameters relate the input-output behavior of the DC-DC converter. A general
input-output relation using the hybrid parameters of the two-port network of the DC-DC converter (see Fig.
16) is given by [72],
]
][
] [
[
Av (s) Zo (s) ṽi (s)
ṽo (s)
(14)
=
Yi (s) Ai (s) ĩo (s)
ĩi (s)
Zo (s) and Yi (s) are output impedance and input admittance respectively, generally used for the stability
analysis of the cascaded system. Ao (s) is the audio-susceptibility parameter used for the estimation of the
input-output noise-transmission and Ai (s) is the back-current gain parameter. The parameters Zo (s) and Ai (s)
Z O(s)
ii(s)
io(s)
Yi(s)
vi(s)
Ai(s)io(s)
+
-
vo(s)
Av(s)vi(s)
Fig. 16. Two-port network of DC-DC converter: Hybrid parameters
Magnitude
10
0
−10
−20
90
Magnitude
0
−100
−200
−300
90
Phase
0
Phase
are important to analyze the SHC ripple mitigation in the two-stage converters. However, Zo (s) parameter is
widely explored in the output impedance shaping methods and a few methods have used Ai (s) parameter.
In the output-impedance shaping method, the control modifies the output-impedance of the front-end DCDC converter such that the SHC ripple see more impedance through the inductor branch in the direction of
the DC source than the DC-link capacitor branch. This method achieves the ripple-suppression, however the
control causes the poor dynamic performance of the system; the high output-impedance of the system leads
to poor system dynamics [135], [136]. In both the methods (i.e. dual-loop control method using CCM and
output-impedance-shaping method), there is a need to maintain the sufficient bandwidth of the voltage-loop
throughout the desired frequency band of the operation.
Recently, some modified and improved control techniques have been proposed using the above mentioned
concepts to minimize the SHC ripple at the DC input and to improve the system response simultaneously
[21], [37], [71]–[73], [78], [85], [130], [133], [137]–[140]. These control schemes use the notch-filter (NF) or
band-pass filter (BPF) in the current or voltage loop. The basic principle is to minimize the 2ω -ripple in
the reference of input current or to sufficiently reduce the bandwidth of the voltage-loop at 2ω only while
maintaining high bandwidth of the voltage-loop at the other frequencies. Nevertheless, the similar methods
have been presented in the earlier work in the context of the power-factor correction (PFC)-AC-DC converter
[141]–[144]. It is to be noted that the main focus of this work is to review the existing literature in the context
of the DC-AC power converter or inverter only. The readers may see [118], [145], [146] for the SHC ripple
mitigation techniques in the context of the PFC-AC-DC converters applications.
0
−90
10
10
Frequency (Hz)
(a)
Vr
−90
2
"v(s)
$%
ir
"i(s)
(b)
Fm
#dv(s)
V0
Igr
+
Hi
(c)
Hv
#di(s)
iLr
Vbusr Vbus
(d)
2
Frequency (Hz)
vPLL
igr
NF
k(1+1/τs)
0.5 Vrbus
1
+
+
Cbus Vbusr
vg
CC
E
pL
- +
ig
pin
.
1/s
E
Fig. 17. (a) Bode plot of BPF (b) Bode plot of NF (c) NF-CR control scheme [20] (d) Control scheme based on NF proposed
in [21]
The bandpass filter (BPF) and notch filter (NF) are generally used to mitigate the SHC ripple without
affecting the dynamic performance of the system. The characteristics of BPF and NF are shown in the Fig.
17(a) and Fig. 17(b) using the Bode-plot. The BPF allows to pass a certain range of the frequencies of the
input signal. The output signal leads the input signal by π /2 in the 0 to ωo range and lags by π /2 beyond the
ωo . Therefore, a total of π phase-shift occurs for a transform of the input signal to the output signal. The NF
filter has inverse characteristics of the BPF. The NF allows all the frequencies except the frequencies located
in a very narrow range of the resonance frequency (ωo ). A notch-filter also gives a phase-change of π for a
transform of the input signal to the output signal. However, the phase is negative for the frequencies below ωo .
In [20], the authors have proposed an NF-added to the voltage-loop in the dual-loop control for the front-end
DC-DC converter. Here, a stand-alone operation of the two-stage DC-DC-AC is considered. The reference
inductor current is generated by passing the output of voltage controller through NF. Therefore, the method
is named as notch-filter inserted current reference (NF-CR) scheme. The control block-diagram is shown in
the Fig. 17(c). The NF attenuates 2ω -signal in reference of the inductor current. This minimizes the SHC
ripple in the input current. In [133], a control scheme is proposed for a grid-connected two-stage converter. A
current controller is used with the first-stage and DC bus control is achieved by the grid-connected DC-AC
converter. The method adopts a grid-side based 2ω -ripple compensation. A quasi-notch filter (q-NF) is added
in the voltage-loop of the second-stage of the converter. The transfer function of the q-NF is,
GNF (s) =
s2 + ωQoz s + ωo2
s2 + Qωop s + ωo2
(15)
Here, Quality factor, Q is related as |Q|dB = |Q p |dB −|Qz |dB . |Qz |dB and |Q p |dB are the quality factors of zero
and pole respectively. The q-NF provides a much smaller voltage-loop gain than the current-loop gain at
2ω . This minimizes the SHC ripple at the input. This method retains the good dynamic performance of the
system at all other frequency except the neighborhood frequencies about and at 2ω . However, Q of the q-NF
should be designed properly. Similar to [133], an another grid-side based 2ω -ripple compensation is adopted
in [21]. The control scheme is shown in the Fig. 17(d). The control avoids the interaction of current-loop and
voltage-loop at 2ω . However, the control design is involved to develop an LTI model from the time varying
system model (see Fig. 17(d)); the two multiplications just before and after the current controller (CC)
make model time varying. Furthermore, in a grid-connected system, maintaining the good performance of the
phase-locked loop (PLL) is another challenge. All the three methods have used notch filter. The use of the
notch-filter may introduce a significant negative phase-shift to the frequencies lower than the characteristic
frequency of notch filter [71]. This may introduce instability to the system.
In [71], Zhang et al. have proposed a voltage control mode (VCM) based band-pass filter incorporated into
the inductor feedback path scheme for a buck-derived two-stage converter (see Fig. 18(a-c)). The method is
based on the output-impedance shaping. In Fig. 18(a), a virtual impedance (Zv (s)) is added in series with the
inductor. The basic concept used here is to increase the impedance of the inductor branch at 2ω frequency
such that the impedance of DC-link capacitor branch is less than the impedance of the inductor branch.
This compels the SHC ripple to pass through the capacitor instead of the inductor branch. Using 18(b), the
impedance of the inductor branch is,
Zo (s) = −
vc (s)
sL + Zv (s)
=
iL (s) 1 + Gv (s) VVin Hv
m
(16)
Here, Gv is voltage-loop controller, H −v is voltage sensor gain, Vm is PWM gain. Zv (s) is the virtual impedance
added in the current feedback path. Suppose Zv (s) is a virtual resistance, say rv . Therefore, the method can
be named as virtual resistance scheme (VRS) [71]. In (16), an increase in Zo (s) is achieved by increasing
the value of rv . However, this decreases the magnitude of the loop-gain in the low frequency range [147]. To
balance this, the gain of Gv(s) can be decreased. However, this reduces the bandwidth of voltage-loop and
hence degrades the dynamic performance of the system. Therefore, there is a trade-off between the design of
rv and bandwidth of the voltage-loop. Eventually, the results are the same as of the dual-loop control of [69].
This problem is solved by adding a BPF in the current feedback path instead of using a constant rv only (see
Fig. 18(c)). The BPF is tuned at 2ω and hence provides a high gain at 2ω only. This adds a high virtual
impedance in series of inductor branch at 2ω . This reduces SHC ripple at the DC input without affecting the
dynamic performance. However, adding a BPF leads a −π /2 to π /2 phase-rotation about the characteristic
frequency of the BPF. This limits the bandwidth of voltage-loop. Therefore, in [73], Zhang et al. further
extended their work to resolve the challenges of [71] by adopting the current control mode (CCM) approach
for the buck-derived two-stage converter. The work has presented different improved control strategies. The
first control strategy, namely notch filter-inserted load current feed-forward scheme (NF-LCFFS), is realized
by adding an NF in the load current in a feed-forward way (see Fig. 18(d)). It is worth noting that the
Zv(s)
L
iL
DC
ic
iac
io
Vcr
C
Vin
+
Vin
Vm
Gv(s)
-
+
Vc
(b)
Hv
Zo(s)
io
Vcr
Gv(s)
+
-
+
Vin
Vm
-
1
sL
+
Vin rv
Vm
iL
1
sC
+
Vcr
Vc
+
+
-
+
Gv(s) +
+
Gi(s)
Gv(s) +
-
Gpwm)
G BPF(s)
io
iL
1
sL+Rd
+
+ -
1
sC
Vc
Hi
Hv
( d)
(c)
Vcr
-
Hi
G NF(s)
Iff
Hv
Iff
Vc
1
sC
+
Zv(s)
AC
(a)
io
-
iL
1
sL
-
Hi
I Lr
G NF(s)
+ - Gi(s)
io
iL
1
sL+Rd
+
Gpwm) +
-
Vcr
Vc
1
sC
Vcr_new
iLr
PI
Vc2ω
iL
BPF(2ω)
Hi
Hv
Current
controller
-
To switches
of DC‐DC
converter
Vc
(h)
( e)
Zs(s)
L
iL
Vin
1
+1
Gv(s) Gd(s) Vin
1
sC +Rc
+
‐
‐
Gv(s)
Vin
Gd(s)
Zp(s)
AC
+
‐
1
sL+R L
‐
+
Vc
Zo(s)
(I)
1
sC +Rc
Vcr
+
‐
+
Gv(s)
+
‐
K"# $
+
io
‐
1
sC
Vc
sL+R L+ Zs(s)
K PWM Zp(s) Gv(s)
G HFF(s)
Kv
‐
+
1
sC +Rc
Hv
G BPF(s)
Vcr
io
ΔV Cr
( g)
1
sL+R L
Zs(s)
K PWM
G BPF(s)
Vcr
‐
+
Zo1(s)
(j)
( f)
+
C
Vc
io
iL
iac
io
G BPF(s)
ΔV Cr
Vcr
DC
ic
‐
‐
Gv(s)
Gd(s)
Vin
+
‐
1
sL+R L
iL
+
‐
Vc
+
‐
1
sC +Rc
+
Gv(s)
+
‐
K"# $
+
‐
1
sL+R L
+
io
‐
1
sC
Vc
rs
K PWM
H! G BPF(")
(k)
Hv
Fig. 18. (a)-(b)-(c) A BPF based control scheme proposed in [71] (d) NF-LCFFS and (e) NF-CR-LCFFS proposed in [73]
(f)-(g) VCM-LCFFS [81] (h) CCM based control scheme proposed in [137] (i)-(j)-(k) BPF-CVFS proposed in [37]
load current feed-forward control schemes improve the dynamic performance at the load-transients [148].
Therefore, the dynamic performance of the system is better. The NF attenuates the 2ω -ripple in the currentloop, therefore the SHC ripple reduces at the input of the two-stage converter. However, the voltage-loop in
the Fig. 18(d) may contaminate the reference current of the inner-loop. Therefore, a further improvement
is made by merging NF-CR scheme of [20] with the NF-LCFFS, and hence called NF-CR+LCFFS. It is to
be noted that the NF-CR scheme has an NF already to minimize 2ω -ripple from the current reference of
the inner-loop. A simplified block diagram is shown in the Fig. 18(e)) where the two NFs are transformed
to one. A single NF added at the output of the summing point after the voltage controller eliminates the
requirement of the two NFs. This scheme almost eliminates the SHC ripple and also improves the dynamic
performance of the system. However, the feed-forward schemes are susceptible to the disturbances and lack
of the robustness as mentioned before. Moreover, NF may induce instability to the system as it affects the
bandwidth of the voltage-loop. A detailed analysis and comparison of the control schemes of [71] and [73] are
presented in [37]. A voltage control mode based load-current feed-forward scheme (VCM-LCFFS) is proposed
in [81]. The control block-diagram of the VCM-LCFFS is shown in the Fig.18(f). The SHC ripple reduction
utilizes the concept of modification in the reference value of the DC-bus voltage in agreement with the desired
pulsation in the DC bus voltage at 2ω . This makes the DC-bus capacitor to have nearly all the SHC ripple.
It is to be noted that the bus voltage is no longer constant but pulsates at 2ω (due to the addition of ∆Vcr
term with Vr ). A BPF is required with the load current feed-forward path to take-out the SHC ripple from
the load current (io ) which then generates a desired ∆Vcr that is to be added in Vr . The presence of integrator
in the LCFFS path may result into the rapid growth of DC offset and low frequencies. Therefore, a high-pass
filter (HPF) is also added at the end of LCFF path (see Fig.18(g)). The scheme minimizes the SHC ripple
while retaining the good dynamic performance. However, the control design is involved and the control of the
VCM-LCFFS depends on the accuracy of the system parameters. A simple CCM based control method for
the said problem is proposed in [137]. This control scheme is similar to the control scheme proposed in [81].
The control block diagram is shown in the Fig. 18(h). The DC-link voltage reference is modified by adding
Vc2ω . The Vc2ω is extracted by passing the DC-link voltage through a BPF. The modified reference voltage
Vcrnew having 2ω voltage ripple cancels the 2ω -voltage ripple of the actual DC-link voltage (vc ). This results
in a ripple-free current reference in the current control-loop. However, use of BPF in control scheme limits the
bandwidth of voltage-loop. A comparison of these control schemes is given in the [37] in the perspective of the
output-impedance shaping. A similar control scheme namely BPF-incorporated capacitor voltage feedback
scheme (BPF-CVFS) as presented in [137] is discussed in [37]. However, this control scheme is based on VCM
method unlike the CCM method of [137]. The block-diagram of BPF-CVFS is shown in the Fig. 17(i-k).
These all control schemes of [71], [73] are discussed for a buck-derived DC-DC-AC converter. These schemes
are further explored for the boost converter in [85].
An effective use of the NF and BPF is proposed in [72] with the back-current gain based approach (using
Ai (s)). The control block-diagrams are shown in the Fig. 19(a-b). Ai (s) relates input current (iin (s) with the
Gk(s)
1+G L(s)
~cr(s) +
V
(a)
Gv(s)
+ -
G NF(s)
Ki(s)
~iL(s)
1+Gk(s)
Kv(s)
GiLd(s)
Fm(s)
~
d(s)
Gvd(s)
~Vc(s)
~Vcr(s) +
-
Gv(s)
Gk(s)
1+G L(s)
G BPF(s)
+ -
1+Gk(s)
(b)
Ki(s)
~iL(s)
GiLd(s)
Fm(s)
~
d(s)
Gvd(s)
~Vc(s)
Kv(s)
Fig. 19. Back-current gain based scheme with (a) Notch filter (b) Band-pass filter
output current (io (s) of a system (e.g. DC-DC converter). In [72], it is established that for a VCM based
control, the voltage-loop has a little effect on the 2ω -ripple attenuation. However, the 2ω ripple reduction can
be achieved for ωo < 2ω . ωo is the resonance frequency of LC circuit of the DC-DC converter. This is done by
using average CCM scheme. However, this scheme also have trade-off between ripple-reduction and dynamic
performance. Therefore, further improvements in the back-current gain control scheme are made using (1)
NF embedded in the voltage feedback branch and (ii) BPF embedded in the current feedback branch.
A SHC-ripple mitigation technique is proposed in [149] for a fuel-cell sourced current-fed dual half bridge
(CF-DHB) DC-DC-AC converter. A phase-shift control scheme is adopted which regulates the DC voltage and
minimize the SHC ripple. The optimized duty is set to 0.5. The PI controller regulates the DC-link voltage
and a proportional resonant (PR) controller (tuned at 2ω ) suppresses the 2ω ripple at the input of the fuelcell. The PR controller modifies the main phase-shift angle to eliminates the input current ripple. The PR
controller is similar to an integrator having infinite DC gain at characteristic frequency. The integral behavior
of the PR may slow down the system dynamics. Tuning PR to very low ωo forces a difficult implementation
of it on the low cost controller board (such as 16-bit DSP) [150]. A good engineering is required to design
the PR controller in order to avoid instability problem as well. In [74], authors have proposed a sinusoidal
charging scheme for the dual-active-bridge based Si-charger and GaN-charger with the reduction in size of
the capacitor at the DC-link using resonant controller and rotating frame control approach together. The
objective is achieved by injecting the 2ω -ripple into the battery for the charging purpose. The size of DC-link
capacitor decreases to 84% for Si-charger and 90% for GaN charger. However, this advantage comes after
the ripple injection to the battery. The recent studies have addressed several detrimental effect of 2ω -ripple
on the battery life [34]. Therefore, a long-term testing is needed for such schemes. In [130], Liu et al. have
proposed a novel ripple compensator for a boost-derived-PV grid-connected inverter with battery-storage
system. The control scheme utilizes a double channel current feedback control to minimize the SHC ripple
in the input current. The basic idea is to regulate the 2ω -voltage ripple in the DC-link voltage by adding a
small disturbance of 2ω (say D f ) in the average duty (Do ). The Fig. 20(a) shows the control block-diagram.
In the Fig. 20(a), G f is a third-order general integrator (ToGI) filter (see 20(b)) to extract the 2ω -component.
Iinr
$ i(s)
Do(s)
Iin
D(s)
!id(s) Iin
Df(s)
First current
feedback
!f(s)
(a)
kb
v(s)
Second current
feedback
1/s
ka
1/s
1/s
v1(s)
0
%&(s)
%&(s)
' ()
~
V
G Delay !vd(s)
~I
v2(s)
Current‐loop
!id(s)
Hv
ωt
(b)
Votage‐loop
(c)
Fig. 20. (a) Double input feedback and (b) third-order general integrator proposed in [130] (c) MAF based dual-loop control
proposed in [131]
A grid-side based bus voltage control is adopted. The voltage error of the voltage-loop is passed through
an NF. This eliminates the 2ω -component from the grid-side current reference. The current-error in the
current-loop of the bus-voltage control is passed through proportional-resonant controller, this control the
sinusoidal waveform of the grid current. A gain is multiplied with the output of G f to regulate the value of
2ω -ripple. A large value of the gain minimizes the SHC ripple. However, this may induce instability to the
system. Therefore, there is a trade-off between the stability and the ripple-reduction using a current feedback
in the double-channel current feedback control. Use of multiple integrator in the 2ω ripple-filter design may
slow down the system dynamics. In [131], authors have proposed a dual-loop control for the boost-derived
two-stage converter. The control scheme uses a moving average filter (MAF) in the voltage-loop to make
the voltage-loop gain very low at 2ω . The control block diagram is shown in the Fig. 20(c). This scheme is
similar to NF-CR of [20]. However, unlike NF-CR, this scheme can attenuates multiple of 2ω as well. In [138],
another control scheme based on the MAF is proposed to control the swinging bus. The MAF has several
advantages such as fastest step response, easy to implement using low-cost control-board, reduces random
noise and notches the multiple of 2ω . However, the time-domain performance of the MAF is better than
the frequency-domain performance. Multiple notch behavior of the MAF may limits the bandwidth of the
voltage-loop as pointed before.
These all schemes are implemented using a linear control approach (mostly based on the PI controller) or
using non-linear controller partly. The linear controller establishes stability at the operating point only. It is to
be noted that the large disturbances are frequent or very uncertain in the renewable energy systems. Therefore,
further improved and non-linear control approaches are addressed recently in the existing literature. In [70],
authors have proposed a dual-loop control method for the boost-derived-DC-DC-AC converter. The ripplereduction is achieved by adopting the output-impedance shaping scheme. The control utilizes a sampled series
feedback as the inner-loop. The series-feedback increases the output-impedance. A parallel feedback is added
as outer-loop to regulate the DC-link voltage. However, the two feedback channels impose trade-off between
the system dynamics and the ripple-reduction. Therefore, a non-linear compensator is added in between the
voltage-error generation point and current controller (see Fig. 21(a)). The non-linear compensator gives high
gain at the load-transients to compensate the undershoot/overshoot in the DC-link voltage. However, the gain
of the non-linear compensator may rise to very high value and also an abrupt change in the gain may induce
instability to the system. Therefore, a fine design of the non-linear compensator is required. A swing busvoltage control is proposed in [151] for a stand-alone fuel-cell buck-derived two-stage converter. A nonlinear
natural switching surface (NSS) based boundary control takes care of the very large input voltage-swing
at 2ω . The controller minimizes the DC-link voltage swing and hence distortion in the output AC voltage.
However, the practical implementation of such discontinuous variable frequency schemes based on the sliding
mode control may introduce chattering effect in the switching [152]. A fixed-frequency PWM-based SMC
minimizes the chattering effect. In [82], authors have proposed an adaptive switching function to minimize
the SHC ripple at the input of the boost-derived two-stage converter using the fixed-frequency based-SMC.
The switching function is a combination of the inductor current error (e1 ) and α times voltage error (e2 ). α
β
is power function of the e2 i.e. α = ψ e2 . β and ψ are design parameters. The profile of α is shown in the Fig.
21(b). For a very small value of α , the output-impedance is high, hence the ripple reduces at the input. At
the line-load transients, α changes monotonically to converge the system dynamics at faster rate. However,
during the transients the Zout decreases, this may inject the ripple to the DC source.
Vref
Σ
e2
PI
Boost
Converter
Σ
iL
V
βi
βv
(a)
Fig. 21. (a) Non-linear compensator technique proposed in [70] (b) Adaptive-SMC based ripple-mitigation technique proposed
in [82]
It is to be noted that the control schemes presented in this Section still require a large size capacitor
or an optimized value of the capacitance at the DC-link at the input-end of DC-AC converter [86]. The
decrease in the SHC ripple at the input of converter results in the increased second-order pulsation at the
DC-bus/DC-link. The pulsation at the DC-link are kept within the desired limit by choosing an optimum
size of DC-link capacitor. Though the system performance at the line-load transients is better despite the
optimum size of the DC-link capacitor which is achieved by different linear or nonlinear control approaches,
however, the allowed variation in the DC-link voltage may cause increased THD level. To further minimize or
eliminate the 2ω -pulsation in the voltage at the DC-link, an auxiliary circuit or active filter is added. In the
next subsection, two-stage DC-DC-AC converter with the auxiliary circuit or with the external active filter
are discussed.
2) Software-Based Control-Oriented Compensation Techniques with Auxiliary or Extra Active Filter:
In this section, the active decoupling methods for the two-stage converter are discussed. Most of the active
decoupling circuits are similar to the circuits presented under the Section-V (B). These techniques are popular
in the PFC applications. In [46], a active filter circuit connected at DC bus as shown in the Fig. 22(a) is
proposed for the boost-derived two-stage converter. This filter is similar to the filter proposed in [54]. A
total-SMC based nonlinear control techniques is used in [46]. The total sliding mode controller regulates the
active filter such that the filter injects a suitable compensation current in the DC-bus to cancel the effect
of the 2ω -ripple. The compensation current is generated using ADLINE neural filter. However, the design of
the neural filter is a bit difficult. The voltage of the Cb in the Fig. 22(a) should kept higher than the DC-bus
voltage. Therefore, the system has a higher voltage than DC-link that causes the safety concern. A block
diagram of the 360 W -Texas Instruments UCC28180EVM-573 front-end evaluation board integrated with the
buck-boost type bidirectional active filter is shown in the Fig. 22(b) [58], [153]. To control the active filter, a
multiresonant direct voltage regulation technique is used to decouple the 2ω -power ripple at the DC-link. The
control scheme makes the active filter to mimic like a infinite capacitance parallel to the DC-link. The active
filter is controlled using a modified dual-loop control scheme as shown in the Fig. 22(c). The multiple parallel
resonant filters tuned at the multiple of 2ω are added in the voltage-loop. The filters attenuate the multiple
of 2ω components from the reference current for the inner-loop. The multiresonant resonant filters are similar
to MAF used in [24]. The control scheme affects the grid frequency. At the load-transients, voltages across the
DC-link capacitor and active filter side capacitor show quite abnormal behavior and hence the load-transient
behavior of the system is problematic. For the circuit of the active filter (buck type, boost type or buck-boost
type) shown in the Fig. 22(d), an one-cycle control method has been proposed in [86]. The switches of the
active filter are controlled such that the per cycle average value of the current at the output of the active
filter tracks the 2ω -current ripple at the DC-link. The control utilizes the peak-value of the ripple storage
capacitor, therefore a peek detector is required to realize the peak voltage control. A bidirectional dual-active
low frequency ripple control circuit (DALFRCC) shown in the Fig. 22(e) can alleviate the ripple from the
input and a 90% compensation of SHC voltage ripple at DC-bus can be achieved [48]. However, the active
filter has eight switches. This makes the system costly and complex. Two linear neural filters are used to
generate the compensation current commands corresponding to ia and ib (see in Fig. 22(e)). A total sliding
mode controller is proposed for the injection of the compensation currents at DC bus and AC output terminal.
However, design of the neural filters is complex and a bit difficul. The integrated and auxiliary winding based
inverter topologies as shown in the Fig. 22(f) and 22(g) respectively are proposed in [49]. The active filter
or ripple-port are the DC-AC H-bridge inverter. The control scheme is based on the power ripple balancing
given by (5)-(8). The SPWM technique is used for the main inverter and ripple-port DC-AC converter. The
active filter eliminates the large E-cap. However, the number of the switching devices are increased. In [47], an
economical active filter with no extra switching devices is proposed for an isolated half-active bridge two-stage
DC-DC-AC converter. In the Fig. 22(h), the main circuit with active filter is shown. A LC filter circuit is
connected between the center-taping connection point of the primary winding of the transformer and the
return wire of the active-bridge. The control scheme of LC filter is based on the common mode operation
method. The control scheme reduces the size of the capacitor at the DC link and also the switching devices
are the same as used in the conventional system. However, the rating of the switching devices is increased
due to the flow of the active filter current in the transformer and the first-stage of the converter. The control
of the active filter limits the transformation ratio of the transformer also. Fig. 22(i) shows a circuit of a
resonance type DC-DC converter, power decoupling circuit and current source inverter (CSI). The control
scheme achieves a power decoupling by controlling the charging and discharging of the buffer capacitor (CFC )
such that the input power is equal to the output power. Therefore, the input is ripple-free while CFC takes
all the pulsation. The resonance type DC-DC converter makes a series resonance circuit. The quality factor
of this circuit should be kept very high in order to ensure stability. To improve the efficiency of the system,
the size of the inductor in the resonating circuit should be decreased.
D. Some Other Topologies and Techniques
Impedance-source inverter such q-ZSI/ZSI/qSBI eliminates the requirement of the multiple stages. The ISI
can boost the input voltage and are capable of the shoot-through operation. In [79], authors have proposed a
modified shoot-through duty based unipolar-SPWM technique as shown in the Fig. 23(b). The conventional
technique is shown in the Fig. 23(a). The control forces the capacitors of the qZSI network to swing at 2ω
or to store the all 2ω -decoupling power. This reduces the ripple at the DC input. However, in comparison
to conventional method, the modified scheme introduces more voltage stress on the switches i.e. 53% more
than conventional scheme. The efficiency of the system reduces by 0.69%. An optimum design of the q-ZSI
network parameters is given in [80]. However, a part of the SHC ripple still flows through the qZSI network.
The inductors store the decoupling power temporary. It is better to transfer the stored decoupling power to
capacitors; the power density of the capacitor is better than inductor. Therefore, a PI regulator based control
scheme is proposed further in [80]. The control scheme is shown in the Fig. 23(c). The input current is passed
through a low pass filter. This gives the DC current component which then subtracted from the actual input
current to give SHC ripple. A PI controller generates the required pulsation in the equivalent shoot-through
duty. The control scheme confines the ripple in the capacitors and minimizes in the inductor current and
input current. However, this method has a trade-off between stability and fast-response. In [87], a new q-SBI
topology for the high voltage gain with a benefit of SHC ripple minimization is proposed. A thorough study
is done to design the impedance network. A control scheme is added to keep the input ripple-free. The control
method is shown in the Fig.23(d). The voltages of the capacitors are added and then subtracted from the
reference voltage. The DC-link voltage reference is generated based on the output voltage and modulation
index. The voltage error is regulated to generate desired shoot-through duty. The application of this topology
is limited to low-power applications. The components are more than the conventional q-SBI.
In Fig. 24(a-c), the buck, boost and buck-boost differential inverter (DI) topologies are shown respectively
[125], [155], [156]. In [157], a generalized power decoupling method is proposed for the differential inverters
DC‐AC Converter
DC‐DC Converter
Vr
Simplified
DC Bus
Cf
Bidirectional
Buck‐boost
ACRC
To grid
C1
Vdc
Active Filter
Ir
#v(s)
d
#i(s)
I
Rf1
v
DC Load
Lf
L1
Multiresonant
Filter
Rf2
Rf3
Vb
Cb
La
ra Ia
(a)
DC‐DC Converter
DC/AC
Inverter
DC‐AC Converter
RE
Source
SHCC
L1
C1
PV
L1
DC/DC
converter
C1
PV
L2
Lf
C FC
L1
iin
Lf
DC‐AC H‐bridge
S1
Cf
Lf
iac
Icomm
Cdc2
L
C FC
Lf
C1
C FC
S2
Cf
S6
S4
(I)
Active Filter
(h)
PV
S5
S3
Isolated resonance
DC‐DC Converter
C
DC‐AC H‐bridge
Cf
C2
(f)
(e)
Vdc Cdc1
(g)
Lf
Loads
DALFRCC
L1
A buck, boost or
buck‐boost type
Bidirectional
active filter
(d)
(c)
(b)
Decoupling circuit
CSI
Fig. 22. (a) Active filter proposed in [46] (b) Active filter proposed in [58], [153] (c) Control scheme for active filter proposed
in [58] (d) Active filter proposed in [86] (e) integrated DC-AC H-bridge active filter and (f) auxiliary winding based DC-AC
H-bridge active filter proposed in [49] (g) Common-mode operation based technique for half-active bridge proposed in [47] (h)
DALFRCC [48] (g) [154]
Dst(+)
L1
C2
L2
L1
V C2
S1
S3
S2
S4
L Load
L2
L Load
S5
V C3
C3
Pulses to switches
(a)
Unipolar‐SPWM
Dst(‐)
Pulses to switches
iL1
SPWM
Low‐pass
Filter
+
-
Dst
M sin(ωt) Dst+
-
iL12ω
+
Dst0
+
PI
PWM
Generator
+
Saturation
Dst
-
+
PI
+
1/M
+
Vac_peak
iref
(b)
(c)
(d)
Fig. 23. (a) Conventional shoot-through duty based-unipolar SPWM proposed (b) Modified shoot-through duty based-unipolar
SPWM proposed in [79] (c) The low-pass filter based control scheme proposed in [80] (d) control scheme proposed in [87]
with the non-linear load. Firstly, a generalized ripple-mitigation analysis is done based on the waveform
control method. Secondly, a feedback-linearization based control is proposed for the differential inverters to
eliminate the non-linearity of the boost and buck-boost type DIs. To mitigate the 2ω −ripple problem, a
similar method as proposed in [58] using multiresonant filter is proposed. According to analysis done in [157],
the buck-type DI has lowest switch voltage stress and decoupling capacitor. However, the DC-link voltage
should be kept high. The boost-type DI requires low DC-link voltage. However, the voltage stress on the
capacitors and current stress on the switches are high. The buck-boost type DI achieves the lowest DC-link
voltage requirement and it can compensate the most of the harmonics. However, this topology suffers the
highest switch-voltage stress. In [125], authors have proposed a waveform-control (WFC) method [158] based
S4
S2
vac iac
Load
L1
Vin
vc1
L2
iL1
S4
L1
L2
ic2
Vin
Vin
S3
S1
vc2
L1
iin iL2
S1
vc2
S1
S2
iL1
iL2
vc1
Load
vac
iac
ic1
iin
S3
L2
vac iac
Load
S3
(c)
(b)
(a)
S1
S3
L1
S1
L2
S2
Vin
Load
C FC
Lf
S5
(d)
Lf
vac
C FC
S3
Vin
C FC
V FC
L FC
iin
Vin
C HF
iac
Co
S4
Cin S2
coupled‐inductors
S4
vc2
vc1
S2
Flying capacitor
Cin
PV
S6
S4
(f)
(e)
Decoupling circuit
S1
Iin IL
Vin
C
L
Io
Vc C FC
V FC
L1
Lf
S3
Lf
L2
L1
Cd
Cf
PV
L2
Cf
L3
Cf
Cin
Lf
C FC
S4
Vdc
S2
(g)
(h)
(I)
Fig. 24.
ripple-mitigation in the fuel-cell sourced differential boost inverter [159] as shown in the Fig. 24(b). A brief
of the WFC is as follows,
In the Fig. 24(b), the voltage across the AC load is given by the sum of the voltages across the capacitors
vc1 and vc2 . The two voltages are out of the phase. This implies,
vc1 = Vdb + 0.5Vpeak sin(ω t)
(17a)
vc1 = Vdb + 0.5Vpeak sin(ω t − π )
(17b)
The instantaneous output AC voltage is,
vac = vc1 − vc2 = Vpeak sin(ω t)
(18)
The basic idea of the ripple-reduction is to reshape the waveform of the voltages across the capacitors without
affecting the output AC voltage. For this, a function x(t) is added in (18) as follows,
vc1 = Vd + 0.5Vpeak sin(ω t) + x(t)
(19a)
vc2 = Vd + 0.5Vpeak sin(ω t − π ) + x(t)
(19b)
Here, Vd is the offset-voltage of capacitors. Suppose x(t) = Xsin(2ω t + ϕ ) with amplitude X and a phase ϕ
with respect to the reference. For C1 = C2 = C, the current through the capacitors are,
ic1 = 0.5ω CVpeak cos(ω t) + 2ω CXcos(2ω t + ϕ )
(20a)
ic2 = −0.5ω CVpeak cos(ω t) + 2ω CXcos(2ω t + ϕ )
(20b)
In the Fig. 24(b), the input current (iin ) is,
iin = iL1 + iL2
(21)
ac +ic1
ac +ic2
Here, iL1 = i1−D
= (iac +ivinc1 )vc1 and iL2 = i1−D
= (iac +ivinc2 )vc2 . Here iac = I peak sin(ω t) and D1 and D2 are the duty
1
2
cycles of the switches S1 and S3 respectively. Using these in (21) gives,
iin =
2 sin(2ω t) + 8ω XCV cos(2ω t + ϕ )
Vpeak I peak + 2ω X 2Csin(4ω t + ϕ ) −Vpeak I peak cos(2ω t) + 0.5ω CVpeak
d
2Vin
(22)
Clearly, to eliminate the 2ω -ripple from the input current, the 2ω -component of (22) should be zero. This
gives,
√
2
Vpeak I peak
+ (0.5ω VpeakC)2
X =
(23a)
8ω Vd C
I peak
ϕ = 0.5π − sin−1 √
(23b)
2
I peak
+ (0.5ω VpeakC)2
The waveform control method does not add any extra circuitry to the system for the ripple-mitigation.
However, the tolerance of the capacitors and inductors may affect the performance of the WFC method [160].
An improved version of the WFC is proposed in [160] applying a rule based control (RBC) method on the
WFC. In the RBC, the values of the X and ϕ are perturbed accordingly to achieved ripple mitigation despite
the variations in the system parameters (inductors and capacitors). However, in the RBC method, a large
perturbation may lead to the poor performance of the ripple-reduction and very small perturbation may
affect the dynamic performance of the system. To get rid-off dependence of WFC on the system components,
authors of [160] further proposed an input current feedback control method in [161]. The ripple-reduction
method is based on the dual-loop control scheme similar to NF-CR-LCFFS proposed in [73]. In [162], a
coupled-inductor based PV inverter with an advantage of the power decoupling is proposed. The circuit
is shown in the Fig. 24(d) which is the variant of the inverter proposed in [163]. An input voltage high
bandwidth controller is proposed for this circuit to keep 2ω -ripple in the capacitor (CFC ). This results in the
ripple-free input voltage. In this topology, the common-mode leakage is a problem due to its transformer-less
configuration. In [164], a six-switch topology is proposed. The proposed topology is shown in the Fig. 24(e).
This topology has a combined feature of the inverter and rectifier. The switch S2 is shared by rectifier and
inverter both. The phase difference of the modulation references are varied to achieve the 2ω -ripple reduction
at the DC link. However, in this topology, the phase difference is constrained by the input and output unlike
the conventional topology where the phase difference can be kept between −π ot +π . The conventional
front-end DC-DC boost converter in a two-stage converter can be modified into a flying capacitor DC-DC
converter to replace the large size electrolytic capacitor with the film capacitor [59]. The circuit diagram of
the flying capacitor based topology is shown in the Fig. 24(f). The flying capacitor (CFC ) in the circuit of
the Fig. 24(f) can be used for the voltage boosting and 2ω -power-decoupling. The control scheme forces the
voltage of the flying capacitor to fluctuate at 2ω to decouple the ripple. This minimizes DC-link voltage
fluctuation. However, a PI controller is used for the purpose whose gain should be adjusted to handle the
load-transients. Therefore, further optimization in the control design is required. An another modified version
of the boost-derived two-stage converter is proposed in [53]. The circuit diagram is shown in the Fig. 24(g).
There are four switching modes of the operation. In the first and fourth modes, the modified boost-circuit
functions like the conventional boost converter. In the second mode, the buffer capacitor (CFC ) is charged
with the required decoupling energy and in the third mode, the stored energy is supplied to the inverter-load.
Therefore, the DC-link capacitor is not required to supply the 2ω -ripple power. However, at the high switching
frequency, the switching loss increases due to the extra diode. This makes the DC-link ripple-free. In [165],
authors have proposed a five-switch single-phase inverter topology for the 2ω -ripple-mitigation. The proposed
topology is based on the Cuk converter. The circuit diagram is shown in the Fig. 24(h). The interaction
between input and output is avoided using a switching sequence to decouple the ripple at the input. However,
the circuit contains more number of the components in comparison to the conventional inverter. A flyback
type single-phase utility interactive inverter with the power-decoupling capability is proposed in [45]. The
control achieves the ripple-free input current by storing the decoupling power in the capacitor, CFC of the
circuit in the Fig. 24(i). The proposed topology is simple, cost-effective and small in the size (less components
required). However, an optimum design is required for CFC , VFC and L1 to perform the boost-operation and
power-decoupling accordingly.
E. Three-Phase AC-DC Converters and DCM-Based Operation
The problem of the SHC ripple is not a big issue in the three-phase DC-AC converter till the supplied
AC load is balanced [13]. In [13], the control strategies are proposed to mitigate the DC-link low frequency
current ripple in the current-source grid connected three-phase inverter under the unbalanced-load conditions.
To compensate the DC-link ripple, a novel hybrid controller is proposed to track the asymmetric currents.
A discontinuous current mode (DCM) operation of the front-end DC-DC converter of two-stage converter
minimizes the input SHC ripple inherently [166]. The main cause of the ripple-reduction at the input of the
two-stage converter is the less interaction of DC source and DC-link due to discontinuity. The buck-derived
and boost-derived two-stage converter has minimum SHC ripple at the input in the DC mode operation. The
input and output of the buck-boost-derived two-stage converter do not interact directly during switching in
the DCM operation. Therefore, the input of buck-boost-derived two-stage converter are ripple-free.
TABLE III
Summery of Passive and Active Techniques
Technique
1) PPT
Scheme or tool
E-cap
Merits
simple and
conventional technique
2) PPT
Inductive filter
or LC-resonant filter
3) APT (DC-side)
CPS-PAF and ALFRCD
4) APT (DC-side)
mixed type-CPS-PAF
5) APT (DC-side)
Buck-type bidirectional
active filter
FB-RCR
active filter
Ripple-port
Hybrid filter
Easy and smaller
capacitor requirement,
cost-effective with LC
Possibility of short-circuiting
for vFC < vDC−link
LFT and a rectifier required,
Bulky and complex system
No voltages > VDC−link
in the system
LFT and rectifier
not required
Good system life
Small size buffer
capacitor
Smaller size of
Z-source network
design of asymmetric
quasi-ZS network
is available in detail
No extra switches
addition
6) APT (DC-side)
7) APT (DC-side)
8) APT (DC-side)
10) APT (DC-side)
11) APT (DC-side)
Buck-boost type active
filter for quasi-ZSI
quasi-ZS network
with battery
12) APT (AC-side)
Two-capacitor based
13) APT (AC-side)
Ripple-confinement
100% utilization of
storage elements
14) APT (AC-side)
SVPWM Based
Current and voltage
stress is less for a
range of power-factor
15) APT (AC-side)
Active filter
16) APT (AC-side)
Active filter
17) APT (AC-side)
Active filter
Stress on switches
reduces by 70% for
all power-factor
Switch-stress reduces by
70% for all power-factor
Small size of q-Z
source network
Challenges
Reliability issue, high ,
ESR value, low-ripple
handling capacity
Large size inductor,
resonance problem,
tedious L-C design
Small filter size
Ref.
[39], [92]–[97]
[43], [44], [106]
[50], [113]
possible problem of
short-circuiting solved
DCM operation causes
high current stress
4-switches are required
[113]
Adds extra DC port
More switches,
bulky and lossy
Challenging control design
compared to H-bridge
A part of 2ω −ripple
can be reduced
[24]
[52]
[26]
[54], [114]
[56]
[57]
Efficiency affected,
utilization factor of
storage elements< 50%
One extra leg besides
H-bridge, more voltage
stress on switches
One extra leg
besides H-bridge, total
device power rating
increase by 50%
One extra leg besides
H-bridge
[5]
High cost of GaN
switches
One extra leg
[61]
[63]
[128]
[127]
[65]
TABLE IV
Summery of Control-oriented Compensation Techniques
Topology
1) Two-stage, stand-alone,
Push-pull forward type
DC-DC-AC converter
2) Two-stage,Grid-connected,
isolated-phase-shift
DC-DC-AC converter
3) Two-stage, Grid-connected
Current-fed resonant pushpull DC-DC-AC converter
4) Two-stage, buck-derived
DC-DC-AC converter
5) Two-stage, stand-alone,
DC-DC-AC converter
6) Stand-alone,Boost-derived
DC-DC-AC converter
7) Two-stage, Buck- stand-alone
derived DC-DC-AC converter
8) Two-stage, stand-alone
Buck-derived DC-DC-AC
converter
9) Half-active bridge
DC-DC-AC converter
10) Two-stage, stand-alone
Buck-derived DC-DC-AC
converter
11) Two-stage, stand-alone, buckderived DC-DC-AC converter
12) Dual-active bridge
based GaN and Si-charger
13) Two-stage, stand-alone
Buck-derived DC-DC-AC
converter
14) Satnd-alone, Boost-derived
DC-DC-AC converter
15) Residential PV and
Battery system
16) Boost, buck-boost derived
power converters
17) Two-stage, Grid-connected
Boost-derived converter
18) Two-stage, Grid-connected
Boost-derived DC-DC-AC
converter
19) Current-fed push-pull
based DC-DC-AC
converter
20) CF-DHB DC-DC-AC
converter
21) Stand-alone, fuel-cell
based DC-DC-AC converter
Scheme or tool
NF-added ,
voltage-loop(CCM)
NF-added
voltage-loop,
control-loop)
grid-side bus
voltage control
Feed-forward
control
BPF-CVFS
(CVM)
Dual-loop
control(CCM)
PI+Non-linear
compensator
VRS
NF-CR,
(CVM)
Back-current gain
based NF-added in
voltage loop and
BPF added in
current-loop
NF-LCFFS
(CCM)
NF-CR-LCFFS
(CCM)
Low-pass filter
based control
LCFFS
(VCM)
adaptive-SMC
Double channel
current feedback
control, ToGI
MAF or multiresonant filter
q-NF-added
voltage-loop
(grid-side control)
Independent
current loop &
voltage-loop
similar to [81]
(CCM)
Phase-shift control,
PR controller
NSS
Basic concept
NF attenuates 2ω -ripple
in reference current
of current-loop
similar to [20]
Remarks
NF adds negative phase
for frequencies< ωo ,
may cause instability
Same as in [20]
complex control design
Ref.
[20]
Feed-forward ripple
generates cancellation
duty
2ω variation in reference
bus voltage
Very low bandwidth (BW)
of voltage-loop
Output-impedance
shaping
Easy to implement, poor
disturbance, rejection,
lacks robustness
same as in [71]
[35]
Trade-off b/w ripple-reduction
and dynamic performance
A high gain of nonlinear
compensator may cause
instability
poor dynamic
performance
a phase rotation of π
caused by BPF limits
voltage-loop bandwidth
NF adds negative phase,
BPF causes π phase rotation,
limited voltage-loop BW
[69]
NF2ω in load current feedforward path decreases Zo
everywhere except at 2ω
NF-CR-LCFFS decreases Zo
everywhere except at 2ω
sinusoidal charging forces
ripple injection into battery
Pulsation in DC-link voltage
forces the ripple to follow
capacitor branch
Output-impedance
shaping
Ripple-free duty
control based
NF adds negative phase
for frequencies< ωo
[73]
NF adds negative phase
shift, limited bandwidth
battery life may
be affected
DC-link pulsates at 2ω ,
performance depends on
system parameter’s accuracy
Ripple-reduction affected
during transients
Trade-off b/w ripplereduction and stability
[73]
Notching effect at
multiple of 2ω
Attenuates 2ω -ripple and its ,
multiple, a negative phaseshift occurs due to NF
q-NF adds negative phase
for frequencies< ωo
[131]
[138]
Theoretically, a large
reduction in 2ω -ripple,
difficult implementation
Bandwidth
limitation
[133]
PR limits the BW,
sluggish dynamics
may suffer
chattering problem
[149]
A virtual resistance
increases Zo
BPF in current feedback
path increases Zo at 2ω
Very small back-current
gain at 2ω or minimum
Notch-filter substantially
reduces voltage-loop BW
No interaction between loops
2ω -variation in reference
bus voltage to generate
ripple-free current reference
PR modifies the main
phase-shift control
four quadrant
control
[21]
[37]
[70]
[71]
[71]
[72]
[74]
[81]
[82]
[130]
[133]
[137]
[151]
VI. Conclusive Discussion and Future-Scope
The reflection of the SHC-ripple/2ω -ripple is an inherent and inevitable phenomenon in the inverters. The
existing literature have largely addressed this problem in the single-phase inverters or converters. This paper
has extensively explored several single-phase inverter topologies in the aforesaid context. Nevertheless, this
problem is dominant in the three-phase inverter at the unbalanced loading condition. In the literature, a few
study based on the SHC ripple problem are presented for the three-phase inverter. This paper has reviewed
several power decoupling techniques based on the passive power decoupling techniques (PPTs), active power
decoupling techniques (APTs) and control-oriented compensation techniques (CCTs).
The PPTs utilizes passive components (L,C) for the power decoupling. Use of the E-cap is most simple
and conventional technique. Other than the cost, size and weight of the E-cap, the reliability of the E-cap is
the major concern. Even though the film-capacitor eliminates the reliability problem, it adds the cost, weight
and increased size to the system.
The film capacitor combined with controlled-power-electronics devices gives the one of the best possible
solutions to eliminate the E-cap and therefore, recent times have witnessed in a persistent evolution in the
active decoupling techniques. A comparatively small film capacitor is used in the APTs. The APTs can be
applied to the DC-side and AC-side or mixed-type application. The DC-side application of the APTs is
easy and in most of the cases, the H-bridge remains intact with the active filter. Therefore, a plug and
play option is available. However, the control scheme should be designed accordingly based on the power to
be decoupled by the film capacitor, required peak voltage and peak current handling capability of the film
capacitor and DC-link capacitor, and the phase difference between the instantaneous values of the voltage of
the film capacitor and output AC voltage. The basic control approach is to balance the decoupling power at
DC-link by the power exchange with the film capacitor. The AC side APTs are comparatively better on the
basis of the efficiency of the system due to power decoupling at the AC side itself. However, the application of
these techniques interfere the main circuit. This causes modification in the modulation index of the inverter.
This may lead to the under-utilization of the power-electronics devices and increased stress on the system
components. The control is also a bit difficult. In both the cases DC side and AC-side applications of the
APTs, the number of the components increases. This reduces the over-all efficiency of the system and increases
the size, cost and complexity of the control method.
The two-stage DC-DC-AC converters or the converters with front-end buck or boost operation capability
have inbuilt option of the active control. The front-end DC-DC converter can be utilized for the input SHC
ripple-mitigation purpose. The software based control-oriented compensation techniques (CCTs) are generally
utilized in such systems. The dual-loop control scheme and output-impedance shaping scheme are two popular
CCTs. The former scheme aims to minimize the SHC ripple in the reference current of the inner-loop in order
to compensate the SHC ripple in the input current. The later scheme aims to increase the output impedance
of the front-end converter such that the SHC ripple is forced to flow through the DC-link capacitor branch.
However, both the schemes suffer the poor dynamic performance. The addition of resonant filter in the current
or voltage loop has shown improved dynamic performance. However, this limits the bandwidth of the system
for the wide range frequency operation. A poor-design of the resonant filter may induce instability to the
system.
The nonlinear control approaches are generally preferred in the system with the large line-load disturbances.
The renewable energy system are prone to such disturbances. Furthermore, the renewable energy sources are
sensitive to low frequency SHC ripple. Therefore, the non-linear control approaches may be tried-out in such
applications. Nevertheless, in the literature, a few nonlinear control techniques are proposed for the SHC
ripple problem. The nonlinear control approaches are to be explored thoroughly in the context of the interest
of this paper.
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