THE 68000 INSTRUCTION SET
INTRODUCTION
Each instruction is listed by its mnemonic in alphabetical order. The information provided
about each instruction is: its assembler syntax, its attributes (i.e., whether is takes a byte,
word or longword operand), its descriptions in words, the effect its execution has on the
condition codes, and the addressing modes it may take.
The conditions code bits, X, N, Z, V, C, are updated after certain instructions. The effect
of an instruction on a given bit of the CCR is specified by the following codes:
U The state of the bit is undefined (i.e., its value cannot be predicted)
- The bit remains unchanged by the execution of the instruction
* The bit is set or cleared according to the outcome of the instruction
Unless the addressing modes are implicit in the instruction (e.g., NOP, RESET, RTS etc.),
both the legal source and destination addressing modes are specified by their assembly
language syntax. Examples of source addressing modes are given below.
Dn, An
Data and address register direct
( An )
Address register indirect
(An) +, - (An)
Address register with auto-incrementing or auto-decrementing
d (An) , d (An, Xi)
Address register indirect with displacement and address
register indirect with indexing and a displacement
ABS. W, ABS. L
Absolute addressing with a 16-bit or 32-bit address
d (PC) , d (PC, Xi)
Program counter relative addressing with a simple offset, or
with an offset plus the contents of a register
imm
An immediate value (i.e., literal) which may be 16 or 32 bits,
depending on the operand
Note that we employ the notation [X] to mean the contents of the X-bit of the CCR, rather
than the more formal [CCR (X)]. The same applies to the other bits of the SR.
The 68000's instructions presented are self-explanatory. However, the following concepts
(related to exception processing and the 68000's user/supervisor states) should be
mentioned:
The 68000 classifies both hardware and software interrupts as 'traps' or 'exceptions'. The
essential points are:
1. The 68000 saves the return address and its status word on the stack
before processing an exception. The status word includes the condition code register and a
status byte that defines the level of the interrupt mask (0 to 7), the S-bit and the trace bit.
2. The 68000 takes the exception's vector number (0 to 255), multiplies it by four and uses
the result to look up the address of the exception's handler (i.e. the code that handles the
exception). For example, if a certain exception is associated with a vector number N, the
68000 performs the action:
N
Nx4
MultiplyNbyfour
Temp
[MS (N)]
Read the contents of 4N
[PC]
Temp
Jump to the exception handler
3. After the exception has been processed, the instruction RTE (return from exception)
restores the original value of the program counter and status word.
4. The 68000 operates in one of two 'states' or 'modes': user and supervisor. In simple
68000 systems without an operating system, the 68000 operates in its supervisor stateand that's that. In more complex systems, the 68000 operates in its supervisor state when
running the operating system and in its user state when running user programs under the
operating system. The S-bit of the status word determines whether the 68000 is in its user
state (S = 0) or in its supervisor state. The S-bit is set after a hardware reset (i.e. on
1
switch-on) and can be cleared by one of several instructions.
5. The 68000 has two A 7 address registers; one for the user mode and one for the
supervisor mode. Consequently, a user program may corrupt its own stack pointer but
cannot corrupt the operating system's stack pointer. Note that the user's stack pointer can
be accessed from the' supervisor state but that the supervisor's stack pointer is invisible
to the user state.
6.All exceptions force the S-bit to 1 which means that all exception processing is carried out
in the supervisor state. That is, user programs are not allowed to process exceptions. In
this way, the user can request operating system functions by means of software interrupt
(a TRAP instruction).
7.The 68000 has a trace bit (T-bit) in its status register. When the T-bit is set, the 68000
generates an exception following the execution of each instruction. The exception handler
can be used to print the contents of each register on the screen and therefore permit the
user to step through a program instruction by instruction (useful in a debugging mode).
8.Certain instructions are said to be privileged. These instructions can be executed only
when the 68000 is operating in the supervisor state. That is, a user program may not
execute a privileged instruction. Any attempt to do so will cause a 'privilege violation
exception' and control will be passed to the operating system. Privileged instructions are
(generally) those that modify the state of the 68000's processor status byte (not the CCR).
As you can imagine, user programs are not permitted to set the trace or status bits and
the interrupt mask level.
The 68000’s status word
Status byte
CCR
Note: T=trace bit, S=supervisor bit, I2, I1, I0 = interrupt maskCCR
ABCD
Operation:
Assembler syntax
Attributes:
Description
Application
Condition codes:
Add decimal with extend
[destination]
[source] + [destination] + [X]
ABCD Dy, Dx
ABCD - (Ay) , - (Ax)
Size = byte
Add the source operand to the destination operand along with the extend bit,
and store the result in the destination location. Addition is performed using
BCD arithmetic. The only legal addressing modes are data register direct
and memory to memory with address register indirect using auto
decrementing.
The ABCD instruction is used in chain arithmetic to add together strings of
BCD digits. Consider the addition of two nine-digit numbers. Note that the
strings are stored so that the least significant digit is at the high address.
LEA
Number1,A0 A0 points at first string
LEA
Number2,A1 A1 points at second string
MOVE #$0, CCR
Clear X bit of CCR
MOVE #8 , D0
Nine digits to add
LOOP ABCD
-(A0),-(AI)
Add a pair of digits
DBRA
DO, LOOP
Repeat until 9 digits added
XNZVC
*U*U*
Z: Cleared if result is non-zero. Unchanged otherwise. The Z bit can be used
to test for zero after a chain of multiple precision operations.
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35