Computer Science
Sample Paper
Class – XII
Question 1.
[10]
(a) Simplify A.B+A’.C+B.C using the laws of Boolean Algebra. At each step state
clearly the law used for simplification.
(b) Why is the NOR gate regarded as Universal Gate? Draw the logic gate symbol
and make the truth table for the two input NOR gate.
(c) State Absorption Laws. Verify one of the Absorption laws using a truth table.
(d) Using Boolean Algebra show that the dual of exclusive OR is equivalent
to the complement of exclusive OR.
(e) Find the complement of X. (Y.Z’ + Y’. X)using De Morgan’s law. Show the
relevant reasoning. Do not reduce the function.
Question 2.
[10]
(a) Convert the following infix expression to its postfix form:
A + ((B+C)-(D+E)*F)/G
(b) What is the principle of duality? Give one example.
(c) Find the complement of F= X + Y.Z; then show that F.F’=0 and F+F’=1
(d) Obtain the logic circuit of the following boolean expression using NOR gates only
F(X,Y,Z) = (X + Y).(Y + Z).(Z + X)`
(e) Write the product-of-sum for the Boolean function, F(A,B,C) whose output is 0
only when:
A=1, B=0, C=0; A=0, B=1, C=0; A=0, B=0, C=1; A=1, B=1, C=1
Question 1
(a) State whether the following wff is valid, invalid or unsatisfiable :
(a => (b => c)) <=> ((a => b) => c)
[2]
State De Morgan’s laws and prove any one of them algebraically.
[2]
(b)
(c)
Convert the following Boolean expression into canonical S-O-P form.
(p.q’ + r).(p’+r’)
(d)
(e)
[2]
What is encoding? Define an encoder.
Simplify the following Boolean expression:
[2]
N.M’ + N.O + M.O
[2]
Question 1
(a) Write the product-of-sum for the Boolean function F(A,B,C) whose output is 1
only when: A=1, B=0, C=0; A=0, B=1, C=0; A=0, B=0, C=1; A=1, B=1, C=1
(b) Find the complement of:
(c)
F(a,b,c,d) = (b’+c’.d)ad’+c.(b+a’)
Draw the truth table to prove the propositional logic expression.
a<=>b = (a=>b).(b=>a)
[2]
[2]
[2]
(d) Deduce the conclusion from the following premises :
P1: r =>s , P2: q => r
[2]
(e) Determine if the following wff is valid, satisfiable or unsatisfiable:
[2]
~a & b v ~ b v c
PART II
SECTION B
Question 4.
[10]
(a) Given the Boolean function F(A,B,C,D) = Σ (1,6,7,8,9,10,14,15).
Use Karnaugh’s map to reduce this function F, using the given SOP form. Draw the
logic gate diagram for the reduced SOP form. You may use gates with more than two
inputs Assume that variables and their complements are available as inputs.
(b) Now given D(A,B,C,D) = π (0,2,5,7,8,10,13,15).
Use Karnaugh’s map to reduce this function D using the given POS form. Draw the
logic gate diagram for the reduced POS form. You may use gates with more than two
inputs. Assume that variables and their complements are available as inputs
Question 5.
[10]
An Insurance company issues a policy to an applicant only when the applicant
satisfies at least one of the following conditions:

The applicant is a married male of age 25 years or above.

The applicant is a female who never had a car accident.

The applicant is a married female had has had a car accident.

The applicant is a male below 25 years.

The applicant is not below 25 years and has never had a car accident.
INPUTS ARE:
M:- The applicant is married
(1 indicates yes and 0 indicates no)
S:- The applicant is a male
(1 indicates yes and 0 indicates no)
C:- The applicant has had a car accident.(1 indicates yes and 0 indicates no)
Y:- The applicant is below 25 years
(1 indicates yes and 0 indicates no)
OUTPUT IS:
I:- Denotes, Issue the Policy
not issued)
(1 indicates it is issued and 0 indicates it is
(a) Draw the truth table for the inputs and outputs given above.
Write the SOP expression for I(M, S, C, Y).
(b) Reduce I(M, S, C, Y) using Karnaugh’s map.
Draw the logic gate diagram for the reduced SOP expression for I(M, S, C, Y) using
AND & OR gates. You may use gates with two or more inputs. Assume that variable
and their complements are available as inputs.
Question 6.
(a)
[10]
What is a Full Adder? Draw the truth table, derive its Boolean expression
and draw a logic diagram for Full Adder.
(b)
Prove that X’  Y = X  Y’ = (X  Y)’ = X.Y + X’.Y’
(c)
State the dual form of the following:
XY’ (XY’Z + X + X’Z’)
Question 7.
(a) Prove that F(A,B,C) = π (2,3,4,7) = Σ (0,1,5,6)
(c) Using NOR gates only draw a logic diagram to construct NAND gate.
(d) Verify that ((P’ + Q).(Q’ + R))’ + (P’ + R) = 1
[10]
Question 4
(i) nmmmmmmmmmmmmmmmmmmmmmmmmmmmmmmmmm
Question 5
(a) State the principle of duality and apply it to find the dual of the following Boolean
expression.
(P’+Q).(P.R’+Q.R)+R’.S.T
[3]
(b) State any two equivalence laws and prove one of them using truth table.
[3]
(c) What is Syllogism? From the premises x’=> y and y’=> z infer y’=>z.
[4]
Question 6
(a) Simulate the function of EXOR and XNOR gates using NAND gates only.
[3]
(b) How can hexadecimal numbers be converted to binary? Draw the electronic
circuit for the same.
[4]
(c) Draw a full adder using two half adders and an OR gate.
[3]
Question 5
a) State De Morgan’s laws and prove any one of them algebraically.
b) Define Syllogism. From the premises r=>s and s=>t infer r=>t.
c) If x: I have a cell phone and y: I can not study, then find inverse, converse and
contrapositive of the conditional x=>y.
Question 6
[3]
[4]
[3]
a) What is a multiplexer? Briefly explain the working of a 4X1 MUX.
[4]
b) Show how universal gates can be used to represent the secondary gates.
[4]
c) How is an encoder different from a decoder? State their applications.
[2]
Question 7
A premier Engineering institute enrolls a student for a course in Engineering based on
the merit list of Engineering Entrance Test (EET). Apart from the score of a student in
EET the institute has set the following eligibility criteria for admission. A candidate is
eligible for admission if he/she qualifies any one of the following conditions:
 He/she secures more than 60% in class XII examination of a recognized board
and must not be less than 17 years of age at the time of taking admission.
 He/she belongs to reserved category and has secured up to 60% marks in class
XII examination of a recognized board.
 Candidate is a female who secures more than 60% marks in class XII examination
of a recognized board but does not belong to reserved category.
The inputs are:
M: Candidate scores up to 60% in class XII examination of a recognized board.
B: Candidate belongs to reserved category.
C: Candidate is a male.
A: Candidate is above 16 years of age.
Output:
E – Denotes eligible for admission.
[1 indicates Yes and 0 indicates No in all cases]
(a) Draw the truth table for the inputs and output given above and write the SOP
expression for
E(M,B,C,A)
[5]
(b) Reduce E(M,B,C,A) using Karnaugh's map. Draw a logic gate diagram for the reduced
SOP expression for E(M,B,C,A) using AND & OR gates. You may use gates with two or
more inputs.
[5]
Question 8
a) Simplify the following Boolean expression and state clearly at each step the law
used for simplification:
X’YZ+XY’Z+XYZ+XYZ’
b) Find the boolean expression of the following logic circuit and reduce it.
[4]
[3]
a
b
c) Convert the following POS expression into its equivalent SOP form:
(X’+Y+Z’).(X+Y’+Z).(X+Y+Z).(X+Y+Z’)
Question 6
(a) Simulate the function of EXOR and XNOR gates using NAND gates only.
(b) How can hexadecimal numbers be converted to binary? Draw the electronic
circuit for the same.
(c) Draw a full adder using two half adders and an OR gate.
[3]
[3]
[4]
[3]