Hardware Design Specifications

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Hardware Design Specifications
Project: ECG Monitoring Module
Revision Number:
V4.0
Last Revision Date:
2007-07-27
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Author:
Meng Fountain ([email protected])
Co-authors:
Liao Wenshuai ([email protected])
Department:
China Applications Support Team (CAST)
Revision History
Date
Revision Description
Who
2004-11-24
ADuM1201AR, ADM3202ARN-REEL pin configuration
Fountain
2005-7-29
Active parameters revision
Fountain
3
rd
version. Change the heading style, add the figure #. The
maximum ECG signal changes from 5mV to 2mV. Lead cable is
changed; also the socket for the connection of the lead cable is
added. Change the analog front end power supply (buffer, IA,
2006-01-27
DRL) from +5V into +/-3.3V. Add default settings for the control
of ADG658, ADG719. Change the way to generate 1mV
Wenshuai
calibration signal. Change the power supply for the amplifiers for
signal conditioning to be 3.3V. The HPF changed into passive one.
LPF changed into 2 stages. Notch filter for 50/60Hz is added. Pin
assignment for ADuC7020 is changed. Power design changed.
2006-03-21
2007-07-27
Change table 1, add table 3 and revise ARM7 processor pin
assignment
4rd version. Recalculate the power dissipation of the circuit. Add
the abbreviation of the IPC. Parallel diodes (1N4001) circuits are
used to keep the input signals won’t exceed±600mV. The power
consumption of AD658 should be <0.1uW. Correct some models
of chips, for example, OP4177AR to OP4177ARU.
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Wenshuai
David
1. Introduction of the Hardware
1.1. Brief introduction
The electrocardiogram, or ECG (also known as EKG, abbreviated from the German word), is a
surface measurement of the electrical potential generated by electrical activity in cardiac tissue. Current
flow, in the form of ions, signals contraction of cardiac muscle fibers leading to the heart’s pumping
action. The study of this electrical signal can help in determining many abnormalities related to the
heart’s function. The following is a sample of how an ECG looks like.
Figure 1 ECG Intervals and Waves
By studying the time between different points P, Q, R, S, T and U and the variations in these times
between successive beats many diseases with the heart can be detected.
The P wave represents atrial activation; the PR interval is the time from onset of atrial activation to
onset of ventricular activation. The QRS complex represents ventricular activation; the QRS duration is
the duration of ventricular activation. The ST-T wave represents ventricular repolarization. The QT
interval is the duration of ventricular activation and recovery. The U wave probably represents "after
depolarizations" in the ventricles.
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1.1.1. Requirements for an Electrocardiograph
The hardware of an ECG monitor, in its most simple form, is a biopotential amplifier. The
maximum voltage that can be acquired at the skin electrodes is 0.5 to 2 mV[1]. In order to perform any
analysis on this data, the signal will need to be amplified.
Figure 2 ECG Module Block Diagram
The front end of an ECG must be able to deal with extremely weak signals ranging from 0.5mV to
2.0mV, combined with a dc component of up to ±300mV[1]—resulting from the electrode-skin
contact. The useful bandwidth of an ECG signal, depending on the application in intensive care unit
(ICU)—up to 1KHz for late-potential measurements (pacemaker detection). A standard clinical ECG
application has a bandwidth of 0.05Hz to 100Hz.
ECG signals may be corrupted by various kinds of noise. The main sources of noise are:
▲ Power-line interference: 50Hz or 60Hz pickup and their harmonics from the power lines
▲ Electrode contact noise: variable contact between the electrode and the skin, causing baseline
drift
▲ Motion artifacts: shifts in the baseline caused by changes in the electrode-skin impedance
▲ Muscle contraction: electromyogram-type signals (EMG) are generated and mixed with the
ECG signals
▲ Respiration, causing drift in the baseline
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▲ Electromagnetic interference from other electronic devices, with the electrode wires serving as
antennas, and noise coupled from other electronic devices, usually at high frequencies.
For meaningful and accurate measurement, these interferences have to be rejected in the signal
processing.
1.1.2. System Blocks
According to the requirements above, function blocks for one lead can be found in Figure 3. The
ECG module does not include the IPC and display, it is only a data acquisition module, but can be
easily connected with an IPC to form a PC based ECG monitor.
Sensor
(ECG
Electrodes)
1
Protection
Circuit
ADC
Processor
Buffer
& Wilson Network
Isolators
&
Interface
IN-Amp &
RLD
IPC
Amplifying
& Filtering
1
Display
Figure 3 System Blocks (for one lead)
1.2. Brief Description of Each Block in the System
Each block will implement the functions listed below:
z
Electrodes detect the potential change generated by heart activities.
z
Protect circuit to protect the patient immune from electrical hazards (not include in this
circuit).
z
Buffer to minimize the big impedance of sensor.
z
Right leg driver will help reduce the common-mode interference.
z
The instrumentation amplifier circuit will amplify the useful signals. And the LPF and
HPF circuit will perform a BPF function which eliminates DC component and high
frequency noises.
z
ADC and processor will implement data sampling and processing, output data and calculated
results to PC.
Complementarities:
1. As Figure 2 shows only a single lead system. In fact, a standard 7-lead monitoring system will
be developed, which can fulfill the ECG monitoring in ICU or other clinical circumstance. So, the
standard 7-lead monitoring system still includes a lead selection system, which can perform lead I, lead
Ⅱ, lead Ⅲ, aVR, aVL, aVF and Precordial leads monitoring[17]:
Lead I: RA (-) to LA (+) (Right Left, or lateral)
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Lead II: RA (-) to LL (+)
Lead III: LA (-) to LL (+)
aVR: L+F (-) to RA(+)
aVL: R+F(-) to LA(+)
aVF: R+L(-) to LL(+)
V: R+L+F(-) to C(+); (Precordial lead)
There will be 5 electrodes totally, 4 for lead signal sensening, 1 for the right-leg-driver.
2. 1mV calibration circuit
The 1mV calibration circuit generates a 1mV standard signal, which can calibration the displayed
ECG trace.
3. The system can work in the temperature range of 15℃ to 35℃.
1.3. Error Analysis
According to the requirements of ECG monitoring, the main parameters are heart rate, sensitivity
and accuracy, the hardware should meet the requirements (the software also contributes errors).
1. Sampling rate
Most of the frequency components of ECG signals are no more than 35Hz[1], so the sampling rate
should be more than 100Hz or higher, which is a trend in modern ECG monitors.
2. Accuracy
In clinical application, the ST segment changes are very important for some heart diseases, the ST
deviations in all the Limb Leads should no more than 0.1mV; in PRECORDIAL LEADS, V1~V3 no
more than 0.3mV, and V4~V6 no more than 0.1mV; and the ST deviations should no more than
0.05mV in all the standard 12 leads [1].
ECG signals’ amplitude ranging from 0.5mV to 2.0mV[1], so according to the ST deviation
requirements, the whole system should be 2.5% accuracy (0.05mV/2mV=2.5%).
3. Error Distribution
The error sources include software and hardware, while the hardware, especially the sensor
(electrode) and the amplification circuit are the main error sources, so the error distribution is
following:
Electrode: 30% (15uV);
Amplification circuit and ADC: 60% (30uV RTI)
Software: 10% (5uV RTI)
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2. Description of Each Block
As an ECG monitoring module, the main accuracy requirement will be the accuracy of heart rate
(±1bpm) and 1 mV calibration signal (1mV±1%), CMRR in three mode (Diagnostic mode >90dB,
Monitoring mode >105dB and Operating mode >105dB ) will be another important requirement in
choosing parts.
The electrical safety will still be the most important specification that should be considered, this
module will take the following measurements to prevent the patient from electrical shock and other
electrical hazard: neon lamp to bypass high voltage above 70V, parallel diodes (1N4001) to keep the
input signal between ±600mV, resistors to limit the current flow, using batteries as the safety power
and right-leg-driver.
In order to sample the right ECG signal from interferences, analog and digital filtering
and
common mode signal rejection are important.
The following description will follow the signal chain.
2.1. Electrodes and Cable
The disposable self-adhesive pad selected secures to the patient’s skin and connects to the electrode
through a snap-on button connector. We choose this pad because it was noninvasive and ideal for
measuring low voltage heart signals. Since human skin is a poor electrical conductor, a low-resistance
gel is applied between the skin and the electrical contact. The electrodes should be[18][19]:
‹ High sensitivity
‹ Low Electrode Offset Potentials
‹ Low Electrode Noise
‹ Low Electrode Polarisation effect (method—High input impedance of Pre-AMP)
‹ Motion Artifact---about 5mv (By adding an electrode jelly or paste)
Ag/AgCl electrodes should offer the best combination of low offset potentials and drift, low noise
and relative immunity to motion artifact. Commercial ECG electrodes which meet the offset and drift
specification would have the advantage of being pre-gelled, self adhesive, are easy to use and store.
The patient cable is a shielded cable that carries the electrical signal to the front-end amplifier. The
effectiveness of the pad and electrode are critical to the ECG design. Dirt, perspiration, and other
contaminants result in poor signal readings, so the area is prepared with rubbing alcohol.
Electrodes and lead wire should be selected carefully to meet the requirements of related standards
(ANSI/AAMI EC12:2000/(R)2005 -- Disposable ECG electrodes; ANSI/AAMI EC53:1995/(R)2001 -ECG cables and leadwires ). In order to make the system more stable, the socket for the cable is added
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in the board.
Figure 4 Lead Monitoring Cable (picture change into the used one)
2.2. Defibrillator Protection and High Frequency Noise
Filtering
As discussed above, ECGs use neon glow lamps across the input lines (this module is not
provided, please refer to related standards for safety issue), to provide defibrillator protection.
These neon lamps are used to bypass large voltages. The maximum strike voltage (firing potential) of
the lamps being used in the design is 70V. Two resistors (two stage RC low-pass filter) are placed in
series on each input line, which limits the current flow.
Parallel diodes (1N4001) circuits are also used to keep the input signals won’t exceed±600mV,
this circuit will work when the input voltage below 70V, but still seems relatively high to the patient.
Figure 5 Neon Glow Lamps & Parallel Silicon Diodes
High frequency equipments will interfere the ECG monitoring module, to reduce this interference,
two-stage low-pass filter with the cutoff frequency of about 2kHz is used. Also, this will provide the
DC path for the ECG signals from the human body.
Vi
R1
C2
Figure 6 Input Low-pass Filter
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Vo
R2
C1
C2
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The cutoff frequency equation is
A=
Uo
1
=
2
U i 1 − C1C2 R1 R2ω + i ( R1C1 + R1C2 + R2C2 )ω
In +/-3.3V system, the biggest patient leakage current should be less than 10uA, so R1+R2≥330KΩ.
To leave the headroom, we select 500KΩ.
So choose R1 = 200 K , R2 = 300 K ,C1=C2, get
C(uF)*fc(KHz)=0.28086
Fc=2KHz, then C1=C2=C=140pF. But for the availability, C1=C2=C=150pF.
Resistors with the 5% accuracy will be used. And the capacitors will be in the tolerance of 5% by
using multi-layer capacitors. All the resistors and capacitors in this section will be in 0603 package.
To achieve high input impedance and eliminate the unmatched impedance effect, buffers are used.
They also isolate the inputs and the amplifier circuit, which can get a relatively high CMRR. OP4177 is
used to implement this function.
2.3. Lead Selection
This system is a 7-lead ECG module, and the 7 leads are:
Lead I:
VI = ΦL - ΦR
Lead II:
VII = ΦF - ΦR
Lead III: VIII = ΦF - ΦL
aVR: L+F (-) to RA(+)
aVL: R+F(-) to LA(+)
aVF: R+L(-) to LL(+)
V: R+L+F(-) to C(+); Precordial lead
As the electrodes from the patient are 4, in order to get 7 pairs differential signals, lead selection
system is required. Wilson network and the analog multiplexers will be used to implement the lead
selection.
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Wilson Network
Wilson network is used in modern ECG monitor for leads selection. Between the Wilson network
and the patient, buffers built by OP4177 are used for signal isolation. 9 resistors form the triangle
Wilson network (shown in Figure 7). The three points of this triangle network correspond to the RA,
LA and LL. The center of the Wilson network, derived from the average of RA, LA, and LL signals,
supplies a voltage to the negative inputs of the single end leads. And the voltage of the Wilson network
center will be 0V. So all the resistors in the Wilson network are in 1% tolerance with 0603 package.
For the buffers, low noise and channel to channel matching are the most important, so OP4177
powered by +/-3.3V is used.
For the upgrading, other standard leads can also derived from this network, the mathematical
relations between lead connections point can also be derived through simple deduction.
¼ OP4177
¼ OP4177
¼ OP4177
¼ OP4177
Figure 7 Wilson Network
Multiplexers
Along with the 1 mV calibration signal, four pairs signal channels are needed, analog switches
should be a good choice.
Two multiplexers (ADG658YRU) are used here for its low on resistance (100Ω max), low
leakage current (±5nA) and low power consumption, typically<0.1µW. They will be powered by
+/-3.3V. Detailed lead selection information can be found in Table 1.
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Input Signal
Input
Output
AD8221 Input
D
+IN (pin 4)
D
-IN (pin 1)
ADG658YRU (U8)
C
S1
LF
S2
NC (AGND)
S3
1mV signal
S4
NC (AGND)
S5
RA
S6
NC (AGND)
S7
LA
S8
ADG658YRU (U9)
R+L+F
S1
L+F
S2
R+F
S3
R+L
S4
RA
S5
Analog Ground
S6
LA
S7
NC (AGND)
S8
Table 1 ADG658 Pin Assignment
The two ADG658 will be controlled by ADuC7020. The truth table of ADG658 can be found in
Table 2. The leads selection truth table can be found in Table 3. But for the consideration of the
robustness of the system and the convenience of debugging, the default control pins will be pulled
down by 10KΩ resistors. So the default setting is lead Vx. The /ENABLE is always low to active
ADG658.
Table 2 ADG658 Truth Table
ADG658YRU (U8) (+IN)
Function
Input Signal
Input
ADG658YRU (U9) (-IN)
Control Signal
A2
A1
A0
Input Signal
Input
Control Signal
A2
A1
A0
Lead I
LA
S8
1
1
1
RA
S5
1
0
0
Lead II
LF
S2
0
0
1
RA
S5
1
0
0
Lead III
LF
S2
0
0
1
LA
S7
1
1
0
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aVR
RA
S6
1
0
1
L+F
S2
0
0
1
aVL
LA
S8
1
1
1
R+F
S3
0
1
0
aVF
LF
S2
0
0
1
R+L
S4
0
1
1
V
C
S1
0
0
0
R+L+F
S1
0
0
0
1mV
Calibration
1mV signal
0
1
1
Analog
Ground
S6
1
0
1
S4
Table 3 Leads Selection
2.4. 1mV Calibration
1mV calibration signal is derived from the embedded reference of the processor ADuC7020, which
is 2.5V. The reference has ±10mV maximum initial accuracy, and ±10ppm/℃ drift.
2.5V
1MOhm
1mV
1KOhm
Figure 8 1mV Calibration Circuit
As the 1mV accuracy, initial accuracy can be calibrated out, so the temperature drift is the most
important factor, for patient monitors, the ambient temperature should be 15~35℃, so the temperature
drift will be:
(±10/1000000)*20*2.5=±0.5mV (worst case, full scale)
Considering the amplifier’s drift (Xmv/℃), the equation should be:
X * 20 + 1mv
≤ 2% (±1%)
2500mv
So X ≤ 2.45mv/℃. If AD8541AKS is chosen, its drift is 4uV/℃, then use the 1MΩ resistor and the
variable resistor with the total resistance to be 10KΩ to get the 1mV signal, and the accuracy is:
4uV * 20 + 1mv
= 0.0432%, that is 1mV±0.0216%
2500mv
Analog switch ADG719BRM is used to generate 1mV square waveform. ADG719 is a SPDT
switch with a 5Ωmaxim on resistance. The frequency of the square wave is 2Hz.
For the system robustness and easy to debug, a 10KΩ pull down resistor is added to set GND as the
default setting.
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Electrical connection
Input pins
Out pins
AD719BRM
Buffered output from AD8541AKS
S2
GND
S1
Voltage scale
D
Table 4 ADG719 Connection and Its Truth Table
2.5. IA & DRL
Instrumentation Amplifier (IA)
Instrumentation
amplifier
is
critical
to
the
performance
of
the
ECG
module.
AD8221ARM/AD8220ARM is chosen as the instrumentation amplifier because: CMRR>100 dB to
nearly 1 kHz, 50μV max offset voltage, 1nA max input bias current and 0.28uV (0.1 Hz to 10 Hz)
input voltage noise.
The gain of the instrumentation amplifiers are decided by the factors:
z
Output voltage swing range for the instrumentation Amplifier
z
CMRR of the amplifier under the gain set
The biggest challenge for the IA comes from the difference of the electrode potentials can be
+/-300mV, which is much higher than the ECG signals. So rail-to-rail IA is preferred for the system
simplicity and higher CMRR.
Part Number
Power Supplies
Output Voltage Range
Max Gain
Rg (KOhm)
AD8221
+/-3.3V
-2.2V to 2.1V
7
12.74(G=6)
AD8220
+/-3.3V
-3.2V to 3.2V
10.7
6.27(G=10)
Table 5 IA Maximum Gain Claculation
Gain = 1 + 49.4 k/(RG // 44 k)
RG= 2173.6 / (44*(G-1)-49.4) KOhm
The 44KOhm resistor comes from the DRL circuit in the IA. The circuit for the IA and DRL can be
found from Figure 9. For accuracy, RG was chosen to be 1% tolerance.
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+3.3V
½ OP2177
RG
1%
+3.3V
AD8221/0
R1
-3.3V
½ OP2177
11K
-3.3V
220K
R2
C
10K
0.01u
Figure 9 Circuit for the IA & DRL
Driven-Right-Leg (DRL)
A DRL is a must for the ECG system for the two considerations[20]:
z
50/60Hz common-mode interference rejection
z
Protect the patient
The op amp used in the right-leg common-mode feedback circuit is the OP2177, a dual amplifier.
The circuit sends an inverted version of the common-mode interference to the patient’s right leg, with
the aim of canceling the interference and protecting the signals from the leads by shielding the signal
cable. The op amp has a voltage gain for the common-mode voltage of 20 [viz., R2/R1 = 220kΩ/11
kΩ], with a 70Hz bandwidth:
| G ( s ) |=
1
R2
*
R1
1 + ( R 2 * C * 2 * Pi * f )
20*log|G(S)|=20*log20-10*log[1+(R2*C*2*Pi*f)]
So 10*log[1+(R2*C*2*Pi*f)] = 3dB
10*log[1+(220K*C*2*Pi*70)] = 3, C≈0.010286 uF
The 10KΩ resistor in serial with C is for the stability of the feedback loop.
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2.6. Signal Conditioning
ECG signal has a frequency range approximately from 0.1 to 100 Hz. Low pass filter will be
needed to eliminate the high frequency noise above 100 Hz.
It is possible for the designer to use the single-powered amplifier for the signal conditioning. So all
the parts after the IA will be powered by 3.3V, which will be the nominal power supply for the
processor.
According to monitoring system requirements, three modes will be supported: Diagnostic, Monitor
and Surgery mode. The frequency ranges of these modes are shown in Table 6.
Mode
Frequency Range (Hz)
Diagnostic Mode
Monitor Mode
Surgery Mode
0.05-100
0.5-35
1-25
Table 6 Frequency Range of ECG Modes
The frequency range will be constructed by using HPF and LPF. The HPF will be a one stage
passive one, the LPF will be built by two stages active LPF. The signal conditioning circuit can be
found in .
VCC
4
IN+
1
OUT
INAD8609
V2
R5 10k
5
R4 10k
V3
U2
3
4
IN+
1
OUT
INAD8609
V4
2
R1
U1
V+
3
V-
V1
V+
C1 4700n
V-
V0
VCC
5
C3 68n
R6
2.7k
2
1.25V
1.25V
0
R2 4.3k
C4
68n
R3 300k
0
1.25V
R7
4.7k
C2
1.25V
Figure 10 BPF Circuit
The high pass filter parts include C1 and R1. C1 serves the AC coupling and high pass capacitor
function. The value of the R1 will decide the cut-off frequency of HPF. The value of R1 for each mode
can be found in Table 7.
The first AD8609 will build a LPF. The gain is 70.8 (1+R3/R2=70.8). Also, an active LPF is
constructed by R2, R3 and C2. The transfer function of the LPF will be:
G(S) = 1+R3/R2*1/(1+R3*C2*S)
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So the selection of the value of C2 will decide the cut-off frequency of the LPF. The value of C2 for
each mode can be found in Table 7.
Mode
Diagnostic Mode
Monitor Mode
Surgery Mode
R1
680K
68K
33K+820
HPL cut-off frequency
0.05Hz (default, S1)
0.5Hz (S4)
1Hz (S3)
C2
4.7nF
15nF
22nF
112Hz (default, S1)
35Hz (S4)
25Hz (S3)
LPF cut-off frequency
Table 7 Value of R1 & C2 for Different Modes
ADG704 will be used to select R1 and C2 in different modes. The default HPF/LPF cut-off
frequency is shown in Table 7.
A 2nd order Sallen-Key Butterworth LPF is used for the further filtering of high frequency
interferences. Its gain is 1.57, the cut-off frequency is 234Hz. This LPF is built by AD8609, too.
In order to get better rejection of the 50/60Hz interference, notch filter will be used. This will be an
active twin-T filter as shown below.
1.25V
1.25V
Figure 11 Active Twin-T Notch Filter
The gain of this filter will be 1.5, so R2 is 5.1KΩ, R1 is 10KΩ. The value of the R, C for 50/60Hz
is shown below. You will find only the resistors will change, the capacitors can keep the same.
Notch Frequency
R (Ω)
R/2 (Ω)
C (F)
2C (F)
50Hz (default)
91K+5.1K
43K+5.1K
33n
33//33 n
60Hz
68K+12K
39K+1K
33n
33//33 n
Table 8 Values for the Notch Filter in 50/60Hz
The total signal conditioning effect after the BPF and 50/60Hz notch filter is shown in Figure 12.
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dB
50
Frequency
dB
60
Frequency
Figure 12 Total Effect of the Signal Conditioning
2.7. Processor
In processor selection, the mainly considerations will be control capability, peripheral interface and
signal processing capability. ADuC7020 is used as the processor. ADuC7020 has the ARM7TDMI
core, 12-bit 1MSPS ADC and on chip flash memory.
The data sampling will be done by the embedded 12-bit ADC. The sampling rate of the ADC will
be 300Hz.
The control function of the processor will be: lead selection and mode selection. The user interface
control part will be finished by PC interface, which accept command through RS-232 port or UART
port of the processor. ADM3202 will be used as the RS-232 transceiver.
The peripheral interface will include UART and JTAG. UART will be used for the code
downloading and communication with PC. JTAG will be used as the on-line debugging port.
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The connection of ADuC7020 is shown in Figure 13.
2 pcs
ADG658
2 pcs
ADG704
ADG719
1mV calibration
Data transfer
REF
AD8541
Buffer
Figure 13 ADuC7020 Connection
Table 9 shows the pin assignment of ADuC7020. All the un-used pins are routed out for the
extension convenience.
Pin No.
Pin Name
Connection
Notes
1
ADC3/CMP1
NC
2
ADC4
ECG Signal
3
GNDREF
AGND
4
DAC0/ADC12
NC
5
DAC1/ADC13
NC
6
DAC2/ADC14
NC
7
DAC3/ADC15
NC
8
TMS
JTAG
100KΩ pull-up resistor
9
TDI
JTAG
100KΩ pull-up resistor
10
BM/P0.0/CMPOUT/PLAI[7]
Download Switch
11
P0.6/T1/MRST/PLAO[3]
Indication LED
1KΩ resistor
12
TCK
JTAG
100KΩ pull-up resistor
13
TDO
JTAG
14
IOGND
DGND
15
IOVDD
DVDD
16
LVDD
Decoupling CAP
17
DGND
DGND
18
P0.3/TRST/ADCBUSY
JTAG
1KΩ pull-up resistor
19
RST
REST Switch
1KΩ pull-up resistor
20
IRQ0/P0.4/CONVSTART/PLAO[1]
NC
21
IRQ1/P0.5/ADCBUSY/PLAO[2]
NC
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Thru 0.47uF to DGND
22
P2.0/SPM9/PLAO[5]/CONVSTART
UART Tx
UART Mode 2
23
P0.7/XCLK/ECLK/SPM8/PLAO[4]
UART Rx
UART Mode 2
24
XCLKO
Crystal
32.768KHz, 12pF to GND
25
XCLKI
Crystal
32.768KHz, 12pF to GND
26
P1.7/SPM7/PLAO[0]
ADG658 U8-A0
Lead selection
27
P1.6/SPM6/PLAI[6]
ADG658 U8-A1
Lead selection
28
P1.5/SPM5/PLAI[5]/IRQ3
ADG658 U8-A2
Lead selection
29
P1.4/SPM4/PLAI[4]/IRQ2
ADG658 U9-A0
Lead selection
30
P1.3/SPM3/PLAI[3]
ADG658 U9-A1
Lead selection
31
P1.2/SPM2/PLAI[2]
ADG658 U9-A2
Lead selection
32
P1.1/SPM1/PLAI[1]
ADG704 A1
BPF selection
33
P1.0/T1/SPM0/PLAI[0]
ADG704 A0
BPF selection
34
P4.2/PLAO[10]
ADG719 IN
BPF selection
35
VREF
AD8541
1mV calibration & voltage
shifter. 0.47uF to AGND
36
AGND
AGND
37
AVDD
AVDD
38
ADC0
NC
39
ADC1
NC
40
ADC2/CMP0
NC
Table 9 ADuC7020 Pin Assignment
2.8. Power Design
The power source will be the 9V AC/DC adapter. Three voltages will be provided for the whole
board: analog 3.3V, digital 3.3V and analog -3.3V. The power supply system is shown in Figure 14.
AC/DC
Adapter
9V
LDO
Analog
3.3V
Analog
-3.3V
Charge
Pump
L
Digital
3.3V
C
0
Figure 14 Power Supply System
Power Estimation:
Part Number
A CAST
Quantity
Quiescent Power (mA)
19/23
Voltages
OP4177ARU
1
2
+/-3.3V Analog
ADG658YRU
2
0.001
+/-3.3V Analog
AD8221ARM
1
1
+/-3.3V Analog
OP2177AR
1
1
+/-3.3V Analog
ADG704BRM
2
0.001
+3.3V Analog
AD8609AR
1
0.2
+3.3V Analog
ADG719BRT
1
0.001
+3.3V Analog
AD8541AR
1
0.085
+3.3V Analog
ADM8660
1
0.6
+3.3V Analog
1
2.2
+3.3V Analog
1
40
+3.3V Digital
1
12
+3.3V Digital
ADuC7020BCPZ62
ADM3202ARU
Table 10 Power Estimation
Considering the operation current for each part and the power consumption for passive parts,
reasonable safe factor will be given to the numbers calculated above.
Voltage
Quiescent (mA)
Safe Factor
Expected (mA)
+3.3V analog
7.1
4
28.4
+3.3V digital
52
2
104
-3.3V analog
4
4
16
Table 11 Power Estimation for the Power Module
So the current for LDO should be 148.4mA, for the extension capability, ADP3338 is selected.
The current for charge pump will be 16mA, ADM8660 will be used. The AC/DC adapter should have
the capability to provide 150mA.
The power consumption for ADP3338 will be:
Pd = (VIN – VOUT) × ILOAD + (VIN × IGND)
In ECG system, Pd = (9-3.3)*148.4+9*4 = 881.88mW. When in the highest working temperature
35℃, the junction temperature will be: Pd*θJA + Ambient Temperature = 0.88188*62.3+35 = 89.94℃
So when in layout, the large area of the ground is needed. Figure 22c in ADP3338 datasheet will
be used in the design.
A CAST
20/23
3. List of the Main Parts
Part Number
Quantity
Function
Provider
OP4177ARU
1
Buffer
ADI
ADG658YRU
2
Lead selection
ADI
AD8221ARM
1
IA
ADI
OP2177AR
1
DRL
ADI
ADG704BRM
2
BPF selection
ADI
AD8609AR
1
Signal conditioning
ADI
ADG719BRT
1
1mV Calibration
ADI
AD8541AR
1
REF buffer
ADI
ADuC7020BCPZ62
1
Processor
ADI
ADM3202ARU
1
RS-232 TRx
ADI
ADP3338AKC-3.3-RL
1
LDO
ADI
ADM8660AR
1
Charge Pump
ADI
A CAST
21/23
4. List of Abbreviations
ADC
Analog to Digital Converter
ADI
Analog Devices Inc.
ARM
Advanced Risc Machine
BPF
Band Pass Filter
DRL
Driven-Right-Leg
ECG
electrocardiogram
EKG
ECG (abbreviated from the German word)
EVB
Evaluation Board
FSR
Full Scale Rating
HPF
High Pass Filter
IA
Instrumentation Amplifier
INL
Integrated Non-Linearity
IPC
Industrial Personal Computer
LDO
Low Dropout
LED
Light-Emitting Diode
LPF
Low Pass Filter
MCU
Micro Control Unit
PCB
Printed Circuit Board
RAM
Random Access Memory
SPI
Serial Peripheral Interface
TRx
Transceiver
UART
Universal Asynchronous Receiver
A CAST
22/23
5. References
[1] Enrique Company-Bosch, and Eckart Hartmann. ECG Front-End Design is Simplified with
MicroConverter , Analog Dialogue 37-11, November (2003).
[2] Christopher M. Tenedero, Mary Anne D. Raya, and Luis G. Sison, Ph.D. Design and
Implementation of a Single-Channel ECG Amplifier with DSP Post-processing in Matlab,
[3] Tompkins, W.J., Biomedical Digital Signal Processing, Prentice Hall, Inc., 1993.
[4] ADuC702x datasheet, Rev.PrB, Analog Devices Inc., 2004
[5] AN-718, ADuC7020 Evaluation Board Reference Guide, Analog Devices Inc., 2004
[6] Xiuzhong Li. Operational Theory and Maintenance of Commonly Used Medical Equipment, China
Machine Press, 2002.
[7] Baohua Wang, Biomedical Electrics, High Education Press, 1987
[8] 12-Lead ECG System. [online] http://butler.cc.tut.fi/~malmivuo/bem/bembook/15/15.htm
[9] Yuanyi Lei. Practical techniques of foreign and domestic ECGs, Chinese Metrology Press, 1997
[10] (2003) Biomedical Products and Accessories. DOCXS, Ukiah, CA. [Online].Available:
www.docxs.net
[11]
Enrique
Mario
Spinelli
etc,
A
Transconductance
Driven-Right-Leg
Circuit,
IEEE
TRANSACTIONS ON BIOMEDICAL ENGINEERING, VOL. 46, NO. 12, DECEMBER 1999
[12] OP4177 datasheet, Rev.B, Analog Devices Inc.
[13] AD8221 datasheet, Rev.A, Analog Devices Inc.
[14] AD8220 datasheet, Pre, Analog Devices Inc.
[15] ADG658 datasheet, Rev.0, Analog Devices Inc.
[16] ADG719 datasheet, Rev.A, Analog Devices Inc.
[17] ADG704 datasheet, Rev. A, Analog Devices Inc.
[18] ADP3338 datasheet, Rev.0, Analog Devices Inc.
[19] ADM8660 datasheet, Rev.B, Analog Devices Inc.
[20] ADM3202 datasheet, Rev.B, Analog Devices Inc.
A CAST
23/23
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