CURRENT MODE PWM CONTROLLER
FEATURES
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LM3842A/3A/4A/5A
8 SOP/ 8 DIP PIN Configulation
Automatic feed forward compensation
Optimized for offline converter
Double pulse suppression
Current mode operation to 500 KHz
High gain totem pole output
Internally trimmed bandgap reference
Undervoltage lockout with hysteresis
Low start up current :＜ 0.3 mA
Moisture Sensitivity Level 3
SOP-8 PKG
DIP-8 PKG
Compen
sation
1
8
Voltage
Feedback
2
7
Vcc
Current
Sense
3
6
OUTPUT
4
5
RT/CT
VREF
GND
ORDERING INFORMATION
DESCRIPTION
Device
Package
LM3842A/3A/4A/5A D
8 SOP
LM3842A/3A/4A/5A N
8 DIP
The LM384xA are fixed frequency current-mode PWM controller. They are specially designed for Off-Line and
DC-to-DC converter applications with minimal external components.
These integrated circuits features a trimmed oscillator for precise duty cycle control, a temperature
compensated reference, high gain error amplifier, current sensing comparator, and a high current
totempole output ideally suited for driving a power MOSFET.
Protection circuitry includes built in under-voltage lockout and current limiting.
SIMPLIFIED BLOCK DIAGRAM
5V
Reference
VREF ⑧
R
R
RT/CT ④
VFB ②
COMP ①
Vcc
Undervoltage
Lockout
VREF
Undervoltage
Lockout
Oscillator
⑦ Vcc
⑥ Output
Latching
PWM
+
-
⑤ Ground
Error
Amplifie
r
③ Current
Sense
Input
ABSOLUTE MAXIMUM RATINGS (TA= 25℃)
Characteristic
Power Supply Voltage
Output Current
Analog Inputes Voltage
Error Amp Output Sink Current
Power Dissipation
Storage Temperature Range
Lead Temperature (soldering 5 sec)
Symbol
Vcc
Io
VIN
ISINK
PD
Tstg
TL
2008 - Ver. 1.0
−1−
Value
30
±1
-0.3 to 5.5V
10
1
-65 to 150
260
Unit
V
A
V
mA
W
℃
℃
HTC
CURRENT MODE PWM CONTROLLER
LM3842A/3A/4A/5A
ELECTRICAL CHARACTERISTIC
(Vcc=15V(Note 1), RT = 10kΩ, CT=3.3nF 0 ≤ TA ≤ 70℃ ; unless otherwise specified)
Characteristic
Symbol
Test Condition
Min
REFERENCE SECTION
Tj = 25℃, IO=1 mA
VREF
4.90
Reference Output Voltage
Line Regulation
Vo
12V ≤ Vcc ≤ 25V
Load Regulation
Vo
1mA ≤ Io ≤ 20mA
TA = 25℃
Output Short Circuit Current
Isc
OSCILLATOR SECTION
Tj = 25℃
FOSC
47
Normal Frequency
Voltage Stability
Sv
12V ≤ Vcc ≤ 25V
Amplitude
Vosc
ERROR AMPLIFIER SECTION
IIB
Input B Current
VFB
Vo=2.5V
2.42
Feedback Input Voltage
AVOL
2V≤ Vo ≤ 4V
65
Open Loop Voltage Gain
PSRREA
60
12V ≤ Vcc ≤ 25V
Power Supplier Rejection Ratio
V
=2.7V,
Vo
1.1V
I
2
Output Sink Current
SI
FB
ISO
Output source Current
V = 2.3V, Vo=5V
-0.5
VFB=2.7V, RL=15kΩ to GND
VOH
5
Output Voltage High
VFB=2.7V, RL=15kΩ to VRGR
VOL
Output Voltage Low
CURRENT SENSE SECTION
Input Voltage Gain
Av
(Note 2 & 3)
2.85
VMAX
Vo=5V (Note 2)
0.9
Maximum Input Signal
PSRRSC
12V ≤ Vcc ≤ 25V
Power Supply Rejection Ratio
IIB
Input Bias Current
OUTPUT SECTION
Isink = 20mA
VOL
Output Voltage Low
Isink = 20mA
Isource = 20mA
13
VOH
Output Voltage High
Isource = 20mA
12
Tr
Tj = 25℃, CL=1nF
Rise Time
T
Tj = 25℃, CL=1nF
Fail Time
t
UNDERVOLTAGE LOCKOUT SECTION
3842A/3844A
14.5
Vth
Start Threshold
7.8
3843A/3845A
3842A/3844A
8.5
Minimum Operating Voltage (After Turn-on VCC(MIN)
7.0
3843A/3845A
PWM SECTION
3842A/3843A
14.5
Maximum Duty Cycle
Dmax
3844A/3845A
7.8
TOTAL STANDBY CURRENT
Vcc=14V for 3842A/3844A
Ist
Start-up Current
Vcc=6.5V for 3843A/3845A
ICC
Vpin2=Vpin3=0V
Operating Supply Current
Viz
Zener Voltage
Ii = 25mA
30
Typ
Max
Unit
5.00
2
3
-85
5.10
20
25
-180
V
mV
mV
mA
52
0.2
1.6
57
1
kHz
%
Vp-p
-0.1
2.50
90
-2
2.58
μA
V
dB
dB
mA
mA
V
V
70
7
-1.0
6
0.8
1.1
3
1
70
-3
3.15
1.1
0.1
1.5
13.5
13.0
45
35
0.4
2.2
150
150
V
V
V
V
nS
nS
16
8.4
10
7.6
17.5
9
11.5
8.2
V
V
V
V
16
8.4
17.5
9
V
V
0.17
0.17
14
38
0.3
0.3
17
mA
mA
mA
V
-10
V/V
V
dB
μA
HTC
−2−
CURRENT MODE PWM CONTROLLER
LM3842A/3A/4A/5A
Note: 1. Adjust Vcc above the start threshould before setting at 15V.
2. Parameter measured at trip point of latch with VFB - 0.
3. Comparator Gain defined as:
A = ΔV Output Compensation(pin FB) ;
ΔV Current Sanseinput(pin CS)
Fig.1 Open Loop Test Circuit
VREF
RT
2N
2222
4.7K
A
V1
E/A
ADJUST
1
COMP
2
VFB
VREF
8
100K
1K
ISENSE
ADJUST
0.1
VC 7
1K/1W
LM3842A
5K
0.1
3
ISENSE
OUTPUT 6
4
RT/CT
5
OUTPUT
4.7K
GND
CT
High peak currents associated with capacitive loads necessitate careful grounding techniques
Timing and bypass capacitors should be connected close to pin 5 in a single point ground.
The transistor and 5KΩ potentiometer are used to sample the oscillator waveform and apply an
adjustable ramp to pin 3.
Fig.2 Under Voltage Lockout
ON/OFF COMMAND
TO REST OF IC
7
LM3842A
LM3843/5A
VON
16V
8.4V
VOFF
10V
7.6V
ICC
< 15mA
< 1mA
VOFF VON
VCC
During Under-Voltage Lock-Out, the output driver is biased to a high impedance state.
Pin 6 should be shunted to ground with a bleeder resistor to prevent activating the power switch
with output leakage current.
HTC
−3−
CURRENT MODE PWM CONTROLLER
Fig.3 Error Amp Configuration
LM3842A/3A/4A/5A
2.5V
0.5mA
+
VFB
Zi
2
Zf
-
1
COMP
Error amp can source or sink up to 0.5mA
Fig.4 Current Sense Circuit
ERROR
AMP
2R
IS
1
R
COMP
R
1V
CURRENT
SENSE
CURRENT
SENSE
COMPARATOR
3
C
RS
5
GND
Peak current (IS) is determined by the formula:
IS(MAX) ~
1.0V
RS
A small RC filter may be required to suppress switch transients.
Fig.5 Oscillator Waveforms and Maximum Duty Cycle
VREF
LARGE RT
SMALL CT
8
V4
RT
RT/CT
INTERNAL CLOCK
4
CT
GND
LARGE RT
SMALL CT
V4
5
INTERNAL CLOCK
HTC
−4−
CURRENT MODE PWM CONTROLLER
LM3842A/3A/4A/5A
duty cycle. Charge and discharge times are determined by the formulas:
tc ~ 0.55 RT CT
td ~ RT CT ∫n(
0.0063 RT - 2.7
)
0.0063 RT - 4
Frequency, then, is: f = (tc + td) -1
1.8
For RT>5KΩ, f ~
~R C
T
T
Fig.6 Shutdown Techniques
1K
330Ω
8
VREF
3
ISENSE
1
COMP
SHUTDOWN
500Ω
SHUTDOWN
TO CURRENT
SENSE-RESISTOR
Shutdown of the LM3842A can be accomplished by two methods; either raise pin 3 above 1V or
pull pin 1 below a voltage two diode drops above ground. Either method causes the output of the
PWM comparator to be high (refer to block diagram). The PWM latch is reset dominant so that
the output will remain low until the next clock cycle after the shoutdown condition at pins 1 and/or 3
is removed. In one example, an externally latched shutdown may be accomplished by adding an
SCR which will be reset by cycling VCC below the lower UVLO threshold. At this point the
reference turns off, allowing the SCR to reset.
Fig.7 Slope Compensation
VREF
8
0.1μF
LM3842A
RT/CT
RT
4
CT
R1
ISENSE
R2
ISENSE
3
C
RSENCE
HTC
−5−
CURRENT MODE PWM CONTROLLER
LM3842A/3A/4A/5A
A fraction of the oscillator ramp can be resistively summed with the current sense signal to
provide slope compensation for converters requiring duty cycles over 50%.
Note that capacitor, C, forms a filter with R2 to suppress the leading edge switch spikes.
Fig.1 Output Dead Time
Fig.2 Timing Resistor vs Frequency
100
CT=100nF
CT=200pF
50
CT=10nF
CT=47nF
CT=100pF
CT=5.0nF
20
30
RT(kΩ)
RT, Timing Resister (kΩ
80
CT=2.0nF
CT=1.0nF
CT=500pF
8.0
5.0
CT=22nF
CT=10nF
CT=4.7nF
10
CT=2.2nF
2.0
0.8
CT=10nF
10k
20k
50k100k
200k
500k
1.0M
3
fosc, Frequency (kHz)
100
1k
10k
100k
1M
fosc, Frequency(Hz)
Fig.3 Output Saturation Characteristics
Fig.4 Error Amplifier Open Loop
4
VCC=15V
TA=25℃
3
2
1
SOURCE (V
CC-VOH)
SINK (VOL)
0
10-3
2
4
6 8 10-1
2
4
80
0
Gain
60
-45
40
Phase
-90
20
-135
0
-180
Φ, Excess Phase Degree
AVOL, Open-Loop Voltage Gain (d
VSAT, Output Saturation Voltage (V
Gain and Phase Frequency
6 8
Io, Output Load Current (A)
10
100
1K
10K 100K
1M
10M
Fosc, Frequency (Hz)
PIN FUNCTION DESCRIPTION
Pin No.
1
2
3
4
5
6
7
8
Function
Description
Compensation This pin is the Error Amplifier output and is made available for loop
compensation.
Voltage
This is the inverting input of the Error Amplitier. It is normally connected
Feedback
to the switching power supply output through a resister divider.
Current Sense A voltage proportional to inductor current is connected to this input.
The PWM uses this information to terminate the output switch conduction.
RT/CT
The Oscillator frequency and maximum Output duty cycle are
programmed by connecting resistor RT to VREF and capacitor CT
to ground. Operation to 500kHz is possible.
GND
This pin is the combined control circuitry and power ground.
Output
This output directly drives the gate of a power MOSFET. Peak currents
up to 1.0A are sourced and sunk by this pin.
Vcc
This pin is the positive supply of the control IC.
VREF
This is the reference output. It provides charging current for capacitor
CT through resistor RT.
HTC
−6−