Final Design Project: Variable Gain Amplifier
with Output Stage Optimization for
Audio Amplifier Applications
EE 332: Summer 2011
Group 2:
Chaz Bofferding, Serah Peterson,
Eric Stephanson, Casey Wojcik
ABSTRACT
This final design project for EE332 satisfies the ABET criteria for Engineering corresponding to
(c) An ability to design a system, component or process to meet desired needs within realistic
constraints such as economic, environmental, social, political, ethical, health and safety,
manufacturability and sustainability. This project also corresponds to b) an ability to design and
conduct experiments, as well as to analyze and interpret data and k) an ability to use the
techniques, skills, and modern engineering tools necessary for engineering practice. The project
will focus on how to design a variable gain amplifier with output stage optimization for audio
amplifier applications. Different amplifier stages that were looked at in the labs over the course
of EE332 will be more readily understood and brought together to form a 3-stage amplifier
consisting of a differential-mode stage, common-emitter stage, and a class AB output stage. An
8Ω speaker will be used to determine the range of voltages and currents needed for an output
minimum of 0.5W with a music playing device used as the input.
INTRODUCTION
The final project was a summation of all skills learned in lectures and previous labs to
create an audio amplifier. The purpose of the audio amplifier is to take an input from a
music device, amplify the signal; and drive an 8Ω speaker at a minimum of 0.5W of
power at differing input voltages and frequencies within the human hearing range of
20Hz to 20 kHz. Bipolar Junction Transistors (BJTs), Integrated Circuits (ICs), Power
BJTs, current mirrors, differential amplifiers, diodes, and shortage protection were all
utilized to create the desired end-product.
To fully understand the main circuit elements used in this design a recap of parts and
stages from previous labs will be reviewed. A bipolar junction transistor (BJT) is a threeterminal electronic device constructed of doped semiconductor material and may be
used in amplifying or switching applications. BJTs operation involves both electrons and
holes. Charge flow in a BJT is due to bidirectional diffusion of charge carriers across a
junction between two regions of different charge concentrations similar to a diode. By
design, most of the BJT collector current is due to the flow of charges injected from a
high-concentration emitter into the base where they are minority carriers that diffuse
toward the collector. A BJT has a required turn on voltage to turn on and operate in
forward active region which is ideal for amplifiers and must have enough current flowing
through it to even provide amplification. A single BJT can be used in a common-emitter
configuration where an output at the collector can yield a high gain, common-collector
where an output at the emitter will yield a gain of about unity, and common-base which
also has a gain of about unity, but is not used much in lower frequency circuits. Two of
the transistors used for the class AB stage are power transistors (TIP29 and TIP30)
which are just built to carry more power and dissipate more power than the other
standard ones used throughout. For the design project, transistors TIP30 and TIP29
become very hot and must be handled with caution, danger from heat can be prevented
by attaching a heat sink to each transistor. An example of a BJT in a common-emitter
configuration is shown in Figure 1 below.
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Figure : Common-Emitter for npn BJT
An integrated circuit (IC) used for this design project houses 5 BJTs on one chip that are
fabricated on the same piece of silicon so characteristics of transistors such as beta
values are much more predictable when connecting transistors to one another. Four of
the BJTs on the IC are used in this design for the differential amplifier.
A diode is a device that allows an electric current to pass in one direction while blocking
current in the opposite direction. This unidirectional behavior is called rectification, and
is used to convert alternating current to direct current. Semiconductor diodes do not
begin conducting electricity until a certain threshold voltage is present in the forward
biased direction. The voltage drop across a forward biased diode varies only a little with
the current. Two diodes are used in the class AB output stage.
A common need in circuit design is to establish a constant DC current for purposes of
biasing a transistor, injecting a current offset, or driving a load at a constant value of
current. Constant currents are established by current mirrors. The current mirror is used
to provide bias currents and active loads to circuits. It is designed to copy a current
through one active device by controlling the current in another active device of a circuit,
keeping the output current constant regardless of loading. An example of a simple
current mirror is shown in Figure 2.
Figure 2: Simple Current Mirror
A differential amplifier amplifies the difference between two input voltages but does not
amplify the particular voltages. It is designed to reject the average between the two
input voltages. When only one signal is applied to, or taken from, a differential input or
output, it is termed a single-ended input or output. A balanced signal is a pair of signals
whose magnitudes are the same but whose polarities are opposite. When a balanced
signal is applied to, or taken from, a differential input or output, it is termed a doubleended input or output. For this design a configuration termed a long-tailed pair is used
as shown in Figure 3. The input from the music source is provided for one input while
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the final output of the amplifier is used as a feedback loop to the other input essentially
dynamically correcting the amplification level using a potentiometer.
Figure 3: Differential amplifier long-tailed pair with constant current load
A class AB output stage only operates the transistor when it is delivering current to the
load. Using an npn and pnp transistor, but driven by the same input signal is termed a
complementary output stage and provides a power efficient configuration for output
buffering or current boosting. A class AB stage is shown in Figure 4 and is the last stage
of the amplifier where the current will go across the speaker as well as through the
feedback loop.
Short circuit protection is implemented in case a follower circuit is accidentally shorted
to ground which would otherwise destroy a transistor. If too much current is exiting an
emitter it will turn on another transistor and direct the extra current out of that collector.
This is implemented in the final stage of the amplifier using both an npn and pnp
transistor base connected to the emitters of the same sex power transistors Q3 and Q4
respectively and used in the class AB stage. An example of this is also shown in Figure
4.
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Figure 4: Class AB output stage with short circuit protection
ARCHITECTURE DESIGN
Design Specifications
• Signal voltage: 100mVpp (min) – 5.6Vpp (max)
• Signal source resistance: 50Ω
• Output power: 0.5W (minimum)
• Load Impedance (speaker): 8Ω
• Idling power: < 1W
• Distortion: No audible distortion in casual listening
Block Diagrams
Figure 5: Block Diagram
Architecture
The chosen architecture was based on a bipolar operational amplifier consisting of three
stages, input, gain, and output. However, an additional feedback stage was
incorporated to improve the output. Each stage has a distinct and crucial role in the
functional amplifier. This is described through Table 1.
Table 1: Stages of architecture with regard to operation and implemented by
Stage
Operation
Implemented by
Input
High Gain
Output Stage
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Differential mode gain
between an input signal and
feedback as seen in Figure
5.
Takes the resulting
differential mode gain gives it
a high amplification.
Increase efficiency of the
overall amplifier by providing
low output resistance and
Bipolar differential
amplifier with active load
(supplied by current
mirror)
Common emitter amplifier
Class-AB amplifier
high current drive capability
Feedback
Stage
Provide control for the user
to increase output
performance
Potentiometer and ground
reference
Trade offs
One tradeoff faced was determining the voltage divider for feedback, specifically the
resistance to ground reference, R2. If a high value was chosen than a large
potentiometer would be needed to obtain large gains and a DC offset to the output
signal was found in the Multisim simulation. The benefit of a large R2 value was a better
ability to fine tune the gain of the circuit since this was done by changing the ratio of the
potentiometer and the value of R2 and both values could be larger. A small value of R2
was chosen because it was determined that less offset at the output outweighed the
time it would take to fine-tune the gain. Another trade off made was through a current
limiting resistor attached to the high gain stage. The value chosen for this resistance,
R8, affected the idle and output power. The tradeoff was between low idle power and no
distortion. Since, the design specification states that idle power must be below 1 W, it
was decided that it was more important to maintain low idle power over small sound
distortion.
CIRCUIT DESIGN
Schematic
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X1
POTENTIOMETER
10 V
V1
Q13
Q12
Q8
2N3906 2N3906
Q2
FZT968
Q7
Q1
FZT869
2N3904
200Ω
D2
1N4148
FZT869
2N3904
R2
Q9
1Ω
D1
1N4148
R4
Q10
Q3
1Ω
V3
1kΩ
R1
2N3904
Q4
0.5 Vpk
20 Hz
0°
FZT968
R6
Q6
8Ω
R3
Q5
2N3904
FZT968
2N3904
V2
-10 V
R8
4Ω
NOTE: 8 ohm resistor is used to model the speaker
Figure 6: Schematic for amplifier design
Design equations and calculations
Input Stage
The input stage was designed as a differential amplifier, Figure 7. Figure 7(a) shows the
common differential amplifier where the gain is improved in (b) through the connection of
two pnp transistors to the output. Further improved is (c) which incorporates an active load,
which in (d) is modeled through a current mirror.
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Figure 7: Differential amplifier used as the input stage, (a) common (b) higher gain (c)
active load (d) active load by current mirror.
In circuit design, the active load or constant current source value was determined by circuit
analysis. To ensure that both transistors of the differential amplifier, Q1 and Q2, were
always on a constant 5mA was decided to be applied to each. Therefore, the current, I, was
determined to be 10mA, two times the amount through each BJT. To achieve a 10mA
current source by the current mirror, the resistance, R was altered. By using KVL, equation
1 was developed; with Vcc = 10 V, an assumed vBE of 0.7V, and Iref equal to I by current
mirror, R was determined to be 1kΩ.
Equation 1: KVL for current mirror R calculation
Figure 8 shows the designed input stage.
Figure 8: Designed input stage.
High Gain Stage
A common emitter can be implemented by a npn or pnp transistor. In both cases, the input
is at the base and the output is at the collector of the BJT. In the amplifier design, a pnp BJT
is used where the input to the base is the output of the differential amplifier and the output is
at the collector, which goes to the output stage.
Output Stage
The class-AB amplifier in this design was created to minimize distortion and boost current.
TIP29 and TIP30 power transistors were used because of their ability to handle large
current amounts.
Short circuit protection is implemented in the case of a short going to ground. The reason
why it is important to protect against this is that a short to ground will draw too much current
and can possible destroy circuit elements especially transistors. Short circuit protection is
included through the inclusion of the circuit in Figure 9. The resistance, R, was decided
based on the output power. By observation, R must be low to maintain output power;
however simulation results of varying values of R determined the value to be 1Ω.
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Figure 9: Short circuit protection to an output
Therefore, the class-AB output stage in conjunction with the short circuit protection is shown
in Figure 4. However, incorporating the high gain stage and output stage requires
manipulation of both designs. In Figure 4, symmetrical resistances, R1, are applied, with the
addition of a CE-amplifier, these resistors are not needed. They are replaced with
transistors, the CE amplifier and a current source load. The current source load acts as a
current regulator for the high gain stage. This is represented by Figure 10.
Figure 10: high gain and output stage
Through the connection of the input state, Figure 11, more modification was necessary.
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Figure 11: Input, High Gain, and Output Stage
The current mirror addition of Q8 simulates a working amplifier, however, draws too much
current through the pnp transistor, Q5. To scale down the current, the idea behind a Widlar
current source was used. This was done by placing a resistor in series with the emitter of
Q8, which makes the base-emitter voltages no longer the same in turn scaling the currents
relative to one another. The value of resistance was calculated based on the voltage
relationship determined by KVL. Based on the placement of the resistor, it is a reducing
Widlar current source where the mirror with respect to the reference is proportionally
smaller, VBE,1 and IC,1 are both greater than VBE,2 and IC,2. By designing for IC,2 to be 5 mA,
assuming room temperature, and using Equation 2 and the current IC,1 equal to 10mA
developed by Ohm’s Law and KVL, the resistance was determined to be approximately
3.5Ω. However, a 4Ω resistor is used in simulation and in the circuit because of the
more practical value.
Equation 2: Expression for R3 using KVL
Feedback Stage
The feedback stage is used to maintain a less distorted output. A 100kΩ potentiometer was
used for feedback from the output to the input. The idea of feedback was developed from a
bipolar differential operational amplifier, shown in Figure 12, and the equation for the gain is
given in Equation 3.
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Figure 12: Bipolar differential operational amplifier
Equation 3: Gain for bipolar differential amplifier
Therefore, in the case of feedback, R1 represents the potentiometer and R2 represents the
resistance that connects the circuit to ground reference. The value of R2 was determined
through simulation by guess and check and found to be modeled the best through a 200Ω
resistor, which is described in more detail in tradeoffs. The final circuit diagram is shown in
Figure 13.
Figure 13: Circuit diagram
Simulation results
The circuit was tested at three different input voltages; 100mVpp, 2.8Vpp, and 5.66Vpp. The
results from the three tests are shown in Figure 14, Figure 15, and Figure 16 and the results
are displayed in Table 2.
Table 2: Input, output, gain, and feedback resistance for the simulations
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Input
(Vpp)
.1
Output
(Vpp)
4.4
Gai
n
44
RFEEDBACK
(ohm)
8000
2.8
5
1.78
150
5.66
5.8
1
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Figure 14: Input of 100mVpp amplified to 2.2Vpp. (Probe 1 is input, Probe 2 is output)
Figure 15: Input of 2.8Vpp amplified to 5Vpp. (Probe 1 is input, Probe 2 is output)
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Figure 16: Input of 5.66Vpp amplified to 5.8Vpp. (Probe 1 is input, Probe 2 is output)
ASSEMBLY AND TESTING
Notes on assembly process
Many challenges were met during the assembly process. The first attempt at creating
the amplifier the entire circuit was built, however, it did not work as intended. Therefore,
each individual piece and then stage was built and tested to ensure proper response.
For example, the current mirror for the active load of the differential amplifier was built
and tested under different circumstances that it produced 10 mA of constant current.
Then, it built up to creating the first stage. By assembling the circuit in pieces, it was
easier to find design and wiring problems through testing and comparing to simulation.
Through assembly the 200Ω resistor was modeled by two 100 Ω resistors in series,
while the 4 Ω resistor was modeled by two 8 Ω resistors in parallel.
It is important to note that the IC used for the current mirror and the differential amplifier
must have its substrate, pin 13, connected to –Vcc, in this case -10V for reference. Also,
it is important to note that the β values and base-emitter voltages for the transistors
must be comparable. Finally, in assembly, it should be easy to add and remove stages
for testing.
Testing Process
The testing process was broken down into two different stages, software and hardware.
First, the entire circuit was tested on National Instrument’s Multisim. Multisim was used
to test which circuit configuration operated better and then resistor values were selected
to give the current and voltage values at different parts of the circuit for it to operate
according to specifications in the lab requirements. After the design was laid out the
group began to build the design on a sorderless bread board. Once the circuit was
implemented on a physical breadboard hardware testing was necessary. Each section
(current mirror, differential amplifier, common emmiter, class AB voltage follower, and
feedback) was tested for proper functionality and then multiple sections were connected
and again tested until the entire circuit was built and functional. Several things were
changed during the testing of the circuit. Individual BJTs were tested using the diode
function on the digital multimeter. By testing the pn junctions of the transistors it was
apparent whether they were functional or not.
Design Changes
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The initial attempt to create the audio amplifier used the same design consisting of a
differential amplifier, high gain stage, and class A-B output stage but was drastically
modified to reach the current schematic. The initial circuit had a circuit mirror on the
high gain stage, and multiple capacitors to cancel out the DC offset. These were
eventually discarded and instead a hybrid output/high gain stage was created and then
connected to the input stage’s current mirror. This gave better functionality and also
made the circuit simpler and reduced the cost to build. Other changes consisted of
modifying resistor values so that the resulting current was capable of turning on
transistors, modifying potentiometer and R2 values to give desired gain over the range
of input voltages, and also removing a diode to reduced DC offset on the output. The
final design change incorporated a Widlar current source ,which limited the current
through the CE-amplifier.
RESULTS
Using the speaker as an output the following screenshots were taken to show
functionality of the amplifier with varying input voltage and frequency. In Figures 17-25
the input and output are shown by channels 1 and 2 respectively. It is shown that with a
200 mV pk-pk input, the gain is approximately 90. The gain decreases as the input
voltage increases as shown in Figures 19-21.
Figure 17: Input of 200mV and 20Hz
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Figure 18: Input of 200 mV and 50Hz
Figure 19: Input of 200 mV and 1kHz
Figure 20: Input of 1V and 1kHz
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Figure 21: Input of 5V and 1kHz
Figure 22: Input of 200mV and 5kHz
Figure 23: Input of 200mV and 10kHz
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Figure 24: Input of 200mV and 15kHz
Figure 25: Input of 200mV and 20kHz
Maximum output power: 1.8 Watts
Idling power: (2.4 V with 8Ω resistance) 0.72 Watts
Table 3: Number of and cost of parts
Part
Quantit Cost
y
Resistors
1Ω
17
2
$0.20
8Ω
2
$0.20
100Ω
2
$0.20
1kΩ
1
$0.10
Potentiometers
10kΩ ¾ turn
1
$1.00
Transistors
18
CA3046 IC
1
$0.80
2N3904 npn
BJT
2
$0.40
2N3906 pnp
BJT
4
$0.80
TIP29 npn
BJT
1
$0.50
TIP30 npn
BJT
1
$0.60
Diodes
1N4148
2
$0.40
Breadboard
Solderless
1
$10.0
0
Provided By Lab
Triple output DC Voltage Source
Function generator
8Ω speaker
Total
20
$14.0
0
CONCLUSION
The final design project for EE332 allowed for all the skills acquired in lecture and lab to be used
in a practical modern engineering practice. An audio amplifier was built that had an input range
of 100 mV to 5.6 V and 20 Hz to 20kHz. Using BJTs as the fundamental building blocks a
working prototype was created. As well as creating a working prototype, the knowledge of
architecture design, simulation, assembly, and testing was developed. The importance of having
a design and testing as the design was built up was stressed and found to be beneficial.
DOCUMENTATION/CREDIT
Lecture material from EE332 course taught by Tai-Chang Chen Summer 2011, material
found from the following website: http://faculty.washington.edu/tcchen/EE332/
Richard C. Jaeger and Travis N. Blalock’s 4th Edition Microelectronic Circuit Design.
Laboratory Handbook by Robert Bruce Darling from the following website:
http://www.ee.washington.edu/people/faculty/darling/eefacrbd/ee332lab.htm
Assisted by Laboratory Teaching Assistant Mohammed Hassan Arbab, EE332 Summer 2011.
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