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ULP Temperature Compensated RTC on MSP430F6736
Design Guide
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TIDMTEMPCOMPENSATEDRTC
MSP430F6736
SN65HVD3082E
UA78L05
On-Chip RTC_C Module and ADC10 for Ultra-Low
Power and High-Accuracy RTC Calendar
Reduces Cost of E-Meter Application
High-Integration Chip a Solution to Single-Chip
Electricity Meters
Featured Applications
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Smart E-Meter
Single-Phase E-Meter
Three-Phase E-Meter
High-Accuracy RTC
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WEBENCH® Calculator Tools
From utility
N(L)
L(N)
A
B
C
TEST
REAC MAX
kW
Sx,COMx
VCC
MSP430F6736
RST
VSS
CT
I In
24-bit SD
Analog to
I1+
Digital
I1I2I2+
V1+
V In
LOAD
kWh
V1-/
V1Vref(O)
Vref(I)
VREF
I/O
100 K
PULSE2
ADC10
PULSE1
XIN
NTC
LF crystal
32kHz
XOUT
Application interfaces
USCIA0
USCIA1
USCIA2
USCIB0
UART or SPI
UART or SPI
UART or SPI
I2C or SPI
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important disclaimers and information.
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ULP Temperature Compensated RTC on MSP430F6736 Design Guide
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1
Key System Specifications
1
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Key System Specifications
The RTC_C module in MSP430F673x functions as the real-time clock (RTC) in smart meters. RTC_C
features include the following:
• Real-time clock and calendar mode providing seconds, minutes, hours, day of week, day of month,
month, and year (including leap year correction)
• Protection for real-time-clock registers
• Interrupt capability
• Selectable binary coded decimal (BCD) or binary format
• Programmable alarms
• Real-time clock calibration for crystal offset error
• Real-time clock compensation for crystal temperature drifts
• Operation in LPM3.5
• Operation from a separate voltage supply with programmable charger
RTCHOLD
RT0IP
EN
RT0PS
Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7
from 32kHz
Crystal Osc.
3
111
110
101
100
011
010
001
000
RTCOCALS RTCOCAL
8
RTCHOLD
EN
Calibration
Logic
8
Set_RT0PSIFG
RTCTCMPS RTCTCMP
RT1IP
EN
RT1PS
Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7
3
111
110
101
100
011
010
001
000
Set_RT1PSIFG
Keepout
Logic
Set_RTCRDYIFG
RTCBCD
EN
RTCDOW
RTCHOUR
RTCMIN
RTCSEC
minute changed
hour changed
midnight
noon
EN
Calendar
RTCYEARH
RTCYEARL
RTCMON
RTCDAY
EN
Alarm
RTCADOW
RTCADAY
RTCAHOUR
RTCTEV
2
00 Set_RTCTEVIFG
01
10
11
Set_RTCAIFG
RTCAMIN
Figure 1. RTC_C Block Diagram
2
ULP Temperature Compensated RTC on MSP430F6736 Design Guide
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System Description
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2
System Description
This report introduces the methodology to implement an ultra-low-power real-time clock (RTC) with
temperature compensation functions in MSP430F6736. This report describes the crystal’s temperature
characteristics to use MSP430F6736’s RTC_C module plus software to implement an ultra-low-power
RTC, with an automatic temperature compensation feature and second ticks generation function. This
report finally builds up a reference code that runs in MSP430F6736 and provides test results.
2.1
MSP430F6736
The MSP430F67xx series are microcontroller configurations with three high-performance 24-bit sigmadelta A/D converters, a 10-bit analog-to-digital (A/D) converter, four enhanced universal serial
communication interfaces (three eUSCI_A and one eUSCI_B), four 16-bit timers, a hardware multiplier,
direct memory access (DMA), a real-time clock module with alarm capabilities, an LCD driver with
integrated contrast control, an auxiliary supply system, and up to 72 I/O pins in 100-pin devices and 52 I/O
pins in 80-pin devices.
XIN
XOUT
DVCC DVSS
AVCC AVSS
AUX1 AUX2 AUX3
RST/NMI
PA
P1.x P2.x
PB
P3.x P4.x
PC
P5.x P6.x
P7.x
PD
P8.x
PE
P9.x
(32kHz)
ACLK
Unified
Clock
System
SMCLK
128kB
96KB
64KB
32KB
16KB
8kB
4KB
2KB
1KB
Flash
RAM
MCLK
SYS
Watchdog
Port
Mapping
Controller
MPY32
CRC16
I/O Ports
P1/P2
2×8 I/Os
Interrupt
& Wakeup
I/O Ports
P3/P4
2×8 I/Os
I/O Ports
P5/P6
2×8 I/Os
I/O Ports
P7/P8
2×8 I/Os
I/O Ports
P9
1×4 I/O
PA
1×16 I/Os
PB
1×16 I/Os
PC
1×16 I/Os
PD
1×16 I/Os
PE
1×4 I/O
CPUXV2
and
Working
Registers
(25MHz)
EEM
(S: 3+1)
JTAG/
SBW
Interface/
Port PJ
PMM
Auxiliary
Supplies
LDO
SVM/SVS
BOR
PJ.x
SD24_B
3 Channel
2 Channel
ADC10_A
10 Bit
200 KSPS
LCD_C
REF
8MUX
Up to 320
Segments
Reference
1.5V, 2.0V,
2.5V
TA0
RTC_C
Timer_A
3 CC
Registers
TA1
TA2
TA3
Timer_A
2 CC
Registers
eUSCI_A0
eUSCI_A1
eUSCI_A2
(UART,
IrDA,SPI)
eUSCI_B0
(SPI, I2C)
DMA
3 Channel
Figure 2. MSP430F6736 Functional Block Diagram
2.2
SN65HVD3082E
SN65HVD3082E is a group of half-duplex transceivers designed for RS-485 data-bus networks. Powered
by a 5-V supply, these transceivers are fully compliant with the TIA/EIA-485-A standard. With controlled
transition times, this device is suitable for transmitting data over long twisted-pair cables. This device is
optimized for signaling rates up to 200 kbps and is designed to operate with a very low supply current,
typically 0.3 mA, exclusive of the load. In the inactive shutdown mode, the supply current drops to a few
nanoamps, making these devices ideal for power-sensitive applications.
2.3
UA78L05
This series of fixed-voltage integrated-circuit voltage regulators is designed for a wide range of
applications, including on-card regulation to eliminate noise and distribution problems associated with
single-point regulation. In addition, the applications can be used with power-pass elements to make highcurrent voltage regulators. One of these regulators can deliver up to 100 mA of output current. The
internal limiting and thermal shutdown features of these regulators make them essentially immune to
overload. When used as a replacement for a Zener diode-resistor combination, output impedance can
effectively improve with a lower-bias current.
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Block Diagram
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Block Diagram
From utility
N(L)
L(N)
A
B
C
TEST
REAC MAX
kW
Sx,COMx
VCC
MSP430F6736
RST
VSS
CT
I In
24-bit SD
Analog to
I1+
Digital
I/O
ADC10
PULSE1
XIN
I2I2+
V1+
LOAD
V1-/
V1Vref(O)
Vref(I)
VREF
100 K
PULSE2
I1-
V In
kWh
NTC
LF crystal
32kHz
XOUT
Application interfaces
USCIA0
USCIA1
USCIA2
USCIB0
UART or SPI
UART or SPI
UART or SPI
I2C or SPI
Figure 3. Block diagram for E-Meter RTC application using MSP430F6736
4
System Design Theory
The real-time clock (RTC) is the fundamental function for multi-toll controls in the smart meter. The RTC
generates two outputs for the other functions of the smart meter:
1. The calendar—The calendar uses the format of year/month/day/hour/minute/second. The calendar
must be non-volatile during power down and reset because the smart meter may work in very tough
environments, but the electric energy bill must never be wrong.
2. The 1-second pulse—The 1-second pulse is a square pulse signal generated by the RTC chip once
per second. This pulse is used for RTC calibration and certification.
Both the calendar and 1-second pulse are related to the multi-toll control, thus they have very strict
requirements:
1. Accuracy—The RTC must be very accurate. In most specifications, the error rate under room
temperature should be fewer than 5 ppm.
2. Temperature compensated—The crystal’s frequency may drift away when working temperatures rise or
drop. The RTC must be able to compensate for the crystal's drift to remain accurate across the whole
working range. The RTC error rate across the whole working temperature has different specifications in
different countries. For example, in China, the limitation is 10 ppm.
3. Ultra-low power—The power consumption of the RTC is very critical. The RTC functions must be
awake even during power failure. During power failure, the smart meter is powered by an embedded
unchangeable battery that must be run for at least five years. In most countries, the power
consumption of the RTC must be lower than 2 µA.
4
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System Design Theory
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4.1
Crystal Frequency Temperature Compensation
All MCU-based smart-meter solutions use a 32-kHz low-frequency watch crystal as one of the clock's
sources. The frequency output of the crystal varies considerably due to the drift in temperature. The RTC
must compensate for this temperature drift for higher accuracy in time keeping from standard crystals. The
typical temperature curve of a 32-KHz crystal is shown in Figure 4:
T0 = 25°C ±5°C
0.0 PPM
-20.0 PPM
-40.0 PPM
DF/F
-60.0 PPM
-80.0 PPM
2
2
–0.035 ppm/°C × (T – T0) ±10%
-100.0 PPM
-120.0 PPM
-140.0 PPM
-160.0 PPM
-40°C
-20 °C
0 °C
20°C
40 C
°
60 °C
80°C
Tem perature
Figure 4. Crystal Temperature Curve
The above curve is very close to a parabola curve, so the frequency variation of a 32-KHz crystal can be
predicted by the following formula:
E = K ´ (T - T0) ´ (T - T0) + B
(1)
Here, E is the frequency error of the crystal (which relates to three factors: K, T0, and B). T is the crystal's
working temperature.
B is the frequency deviation of a crystal in room temperature. Each crystal’s frequency deviation is not the
same, but each crystal’s frequency deviation is its inherent characteristic and will not change with time.
The crystal’s deviation can be measured at room temperature (around 25°C) because the parabola curve
is quite flat at the central point.
T0 and K are two factors to describe the parabola curve, denote the curve’s central point, and roll down
speed, respectively. These two factors are decided by the production process of the crystal. Usually, T0
and K are almost the same among the same batch of crystals.
In some circumstances, the whole crystal's temperature curve will be divided into three or five segments
within the temperature axis. On each of the segments is a parabola curve to represent the temperature
feature of the crystal in this temperature range. The three or five parabola curves compose the whole
picture of a crystal’s temperature feature, making it possible to better approach the crystal’s real
characteristics.
Normally, the 32-KHz crystal vendors can provide such temperature curves of their crystals and the
related parameters K and T0 to their end users. This process makes it possible to compensate crystal
frequency error with software, without much effort on calibration.
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System Design Theory
4.2
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Temperature Measurement
After getting the crystal temperature factors K and T0 from the crystal vendor and calibrating the crystal’s
deviation in room temperature, measure the working temperature for an overall frequency-error
calculation.
MSP430F6736 integrated a 10-bit ADC, to which an on-chip temperature sensor is connected internally.
Because the MSP430F6736 IC is very closed to 32-KHz crystal on an e-meter board, the temperature of
the crystal can be treated identically to the one measured by the on-chip temperature sensor. Composing
an on-chip ADC10 and an on-chip temperature sensor is the simplest way to measure the crystal's
working temperature.
To use internal temperature sensor for temperature measurement, set the ADC10 on channel 10 and
guarantee the sample period is greater than 30 µs.
One important limitation of MSP430F6736’s internal temperature sensor is accuracy: its maximum error is
3°C, which results in up to a 13-ppm error on frequency calculations in an 85°C testing point. The
MSP430F6736's internal temperature sensor is hard to be used in e-meter applications before being
manually calibrated.
For better accuracy, use the external temperature sensor. A typical low-cost temperature sensor is the
NTC resistor. The NTC resistor’s resistance changes dramatically when it’s working temperature changes.
If we can measure the resistance of NTC, we can get its working temperature. Figure 5 shows the circuit
to measure NTC resistance.
V-RTC
V-RTC
R1
R
100 K
R
1M
TEMP1
TEMP
100 K
TEMP
R2
NTC
A. Simplest Structure
NTC
1M
B. VCC Drift-Considered Structure
Figure 5. NTC Temperature Measurement Circuit
The simplest usage of NTC is as part A of Figure 5 shows. The V-RTC is the power source for the resistor
ladder. This power source is supplied by MSP430F6736 GPIO and can be shut down to GND for power
saving when temperature is not measured. TEMP is the tap where the voltage on NTC is fed out to
ADC10. The resistor of NTC will be as follows:
VTEMP ´ R
RNTC =
VV -RTC - VTEMP
(2)
V-RTC is the power supply voltage for MCU. R is the resistance for R. If we can measure the voltage drop
on NTC (VTEMP) with ADC10, we can calculate the resistance of NTC.
In real e-meter applications, the power supply for the MCU V-RTC may drift because of working
temperature or disturbance from a power grid. The calculated resistance of NTC may have errors, so we
prefer to use the second structure to measure as part B of Figure 5 shows.
In this structure, a new branch resistor ladder is implemented, so the calculation on NTC resistance will be
as follows:
VTEMP ´ R ´ R2
RNTC =
VTEMP1 ´ (R1 + R2 ) - VTEMP ´ R2
(3)
The NTC resistance calculation of structure B is irrelevant to power supply.
6
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4.3
The Implementation of RTC_C Module
The RTC_C module allows users to compensate crystal errors that either result from crystal individual
frequency offset or temperature influence. For crystal frequency offset, users must calibrate the crystal in
room temperature and get the error between the crystal frequency and standard 32768 Hz. For
temperature influence, users can calculate the crystal frequency error based on the crystal’s temperature
curve with the measured temperature. All errors are in PPM and need to be written into RTCOCAL and
RTCTCMP respectively to compensate offset and temperature influence.
The RTC_C module has a dedicated clock source from the external 32-KHz crystal and has a dedicated
power supply. The RTC_C module can work in stand-alone mode without taking any MCU MIPS, and the
power consumption is typically only 0.34 µA in room temperature.
The RTC_C module also integrates calendar and alarm functions.
Figure 6 shows the RTC_C module implementation flow chart.
Foreground
TA0 ISR
AD10 ISR
Unlock RTC_C
Start ADC10
Set Pin V-RTC to 1
RTC_C init
Get Vtemp1
RTC_C start
Get Vtemp
Set RTCOCAL
Set Pin V-RTC to 0
lock RTC_C
Calculate temperature
Setup TA0
Calculate Frequency
error in PPM
Start TA0
RTCTCRDY
flag set?
Set RTCCMP
Clear ADC10IFG0
Figure 6. RTC_C Module Software Control Flow
The RTC_C module can also output second ticks (1-Hz clock) on the RTCCLK pin. However, because the
frequency compensation in RTC_C module is in 60 µs per step, the second ticks output from the RTC_C
module can only be accurate in a one-minute scale. For example, the accumulated error of 60 consecutive
second ticks can be calibrated to 0, but the error of a single second tick will be up to 60 ppm.
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System Design Theory
4.4
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Ultra-Low-Power Second Ticks Generation
In many applications, the error on second ticks must be measured solely or in 10-second scales. Here, we
use software to fine tune the accuracy of every second tick.
MSP430F6736 has a very flexible clock system, and the integrated FLL plus many pre-scale dividers
easily facilitate a 1-MHz SMCLK clock internally. Because the SMCLK is actually sourced from the
external 32-KHz crystal through PLL, the error rate of the external crystal is the same as that of SMCLK.
The frequency compensation to SMCLK can also be made with the same rate as the crystal.
Figure 7 shows how to use the 1-MHz clock and Timer_A to compensate frequency errors and generate
second ticks.
1MHz SMCLK
Timer_A
Second ticks
TAR
TACCR
Crystal Offset
+
Crystal
Temperature
Coefficient
Basic count per
second
Figure 7. Frequency Compensation and Second Ticks Generation
In the frequency compensation stage, use the same process as with RTC_C:
1. Get working temperature through external NTC
2. Calculate the overall frequency error E caused by temperature and initial deviation based on crystal’s
temperature parabola curve Equation 1, in PPM
3. Subtract the frequency error E and get the exact SMCLK clock count per second.
Through Timer_A, the second ticks generation is actually a frequency divider. Because the clock source of
Timer_A is the 1-MHz SMCLK, adding or subtracting 1 SMCLK in TACCR is equal to fine tuning the
output of the second ticks frequency by 1 ppm.
The limitation of the above temperature-compensated second tick generation system is the power
consumption. If the 1-MHz SMCLK keeps running for Timer_A, MSP430 has to run in LPM0 while
sleeping, and the power consumption is typically 83 µA. However, in many applications (like e-meter), the
whole system is powered by batteries if the main power source drops. The system requires RTC’s power
consumption to reduce to micro-ampere level.
Because high-speed clocks consume more power during the same time, one way to cut down power
consumption is to compose different clocks—high speed clock and low speed clock—to fill the whole 1second counting period.
8
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1 Second
...
32668/32768 second
32K
CLK
...
1M
CLK
Switch to High
Frequency clock
Generate 1s pulse
Figure 8. Fill 1-Second Counting Period with Different Clocks for ULPP
As Figure 8 shows, if we use a 32-KHz clock to count for 32766 / 32768 second and use another 1-MHz
clock to count the last 100 / 32768 second and decide on the point when we generate second ticks, we
can still fine tune the second tick's accuracy in 1-ppm steps while reducing the overall power consumption
32668
100
IE = ILPM3
+ ILPM0
32768
32768
dramatically to the following:
Where IE is the average power consumption, ILPM0 is the power consumption in LPM0 mode, and ILPM3 is
the power consumption in LPM3 mode. In the MSP430F6736 data sheet, the power consumption for
LPM0 mode is 83 µA, and the power consumption for LPM3 mode is 2.5 µA. The average power
consumption for software RTC and second ticks generation is 2.74 µA.
In this application, two Timer_A modules are used to implement clock switching and second ticks
generation. Figure 9 shows the time sequence of two TA modules.
TA0
0FFFFh
Sourced from
32KHz ACLK
Switch on FLL
and TA2
Frequency
Compensation
TA0CCR0
TA0CCR1
TA2
Sourced from
1MHz SMCLK
0FFFFh
TA2CCR0
TA2CCR1
capture
Tick 1s pulse and
switch off FLL
Figure 9. Ultra-Low-Power Second Ticks Generation
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System Design Theory
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TA2 sources from the 1-MHz SMCLK. TA2 is shut down until TA0 ISR wakes it up. TA0 sources from the
32-KHz ACLK. TA0 is always on, and it runs in up and compare-out modes. TACCR0 stores the value
when TA2 is switched on to fine tune the second ticks. Because TA2 sources from SMCLK, switch on FLL
for several ACLK before switching on TA2, so that enough time exists to stabilize SMCLK before TA2 is
used for SMCLK counting. TACCR1 stores the value when FLL will be switched on.
The TA0 and TA2 running sequence will be as follows:
1. At the beginning, TA0 is on and MCU runs in LPM3 mode.
2. When TA0R reaches TA0CCR1, FLL is switched on (MCU switches to LPM0) and TA2 is started in
TA0 ISR. TA2 is initiated in capture mode and TA2CCR1 is set to always capture on ACLK.
3. Several ACLK later when TA0CCR1 is reached and TA0 ISR is triggered, frequency errors accumulate
caused by temperature change and offset deviation. These accumulations are used to calculate when
to send out second ticks by summing frequency error with TA2CCR1. Finally, the summary to
TA2CCR0 is written, and TA2 is set to compare-out mode to generate second ticks.
4. In the last step after generating second ticks, switch off TA2 and FLL and go back to LPM3 in TA2
ISR.
NOTE: We used TA2 in capture mode and recorded the exact TA2R value to TA2CCR1 instead of
directly reading the TA2R value. By doing this, we can avoid the error caused by TA2 ISR
interrupting the latency difference.
Figure 10 is the software flow chart for ULPP second ticks generation.
TA0
Foreground
Setup TA0:
32kHz Clock
Up counting
Compare mode
TA2
CCR1 ISR
CCR0 ISR
CCR1 event?
CCR0 event?
CCR1 HW Auto
capture
CCR0 ISR
CCR0 event?
Capture TA0R to
TA2CCR1
Setup TA2:
1MHz Clock
Continue counting
Capture mode
Switch on FLL
Calculate frequency
error
End second tick
Switch on TA2
Update TA0CCR2 with
TA2CCR1, TA0R and
frequency error
Switch off TA2
Switch off FLL
Set TA2 to compare out
mode for second tick
Figure 10. ULP Second Tick Software Flow
10
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Getting Started Hardware
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5
Getting Started Hardware
To debug the system, the necessary test points are designed on J16 as shown in Figure 11. The testing
wire must connect to these points to connect with the debugging tools. To test the frequency errors, use
the frequency equipment that has 1-ppm accuracy, and connect the wire from J6 to the frequency
equipment. To test the influence by temperature, use a thermostat that can adjust the temperature from
–40℃ to 80℃.
Figure 11. MSP430 Spy-Bi-Wire Interface and Second Pulse interface
5.1
MSP430 USB Debugging Interface
The MSP430-FET430UIF, which is shown in Figure 12, debugs the firmware on the MCU.
Figure 12. MSP430-FET430UIF
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Getting Started Firmware
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To debug the MCU software, connect only four points on the board to the debugger: VCC, GND, RST,
and TEST. The connection should follow Figure 13.
VCC
Important to connect
MSP430Fxxx
J1 (see Note A)
VCC/AVCC/DVCC
J2 (see Note A)
R1
47 kΩ
C2
10 µF
C3
0.1 µF
JTAG
VCC TOOL
VCC TARGET
TEST/VPP
2
1
4
3
6
5
8
7
10
9
12
11
14
13
TDO/TDI
RST/NMI/SBWTDIO
TCK
GND
R2
330Ω
TEST/SBWTCK
C1
2.2 nF
A
VSS/AVSS/DVSS
If a local target power supply is used, make connection J1. If power from the debug or programming adapter is used,
make connection J2.
Figure 13. Spy-Bi-Wire Connection
6
Getting Started Firmware
This firmware mainly includes the folder ”emeter-rtc”, which includes emeter-rtc-inter.c, emeter-rtc.c,
emeter-rtc-lib.c, and more. For convenience in further development, the firmware provides the APIs
that realize functions of the RTC calibration and RTC parameters' reading. This firmware will occupy
some hardware resources as shown in Table 1:
Table 1. Resources Used by Firmware
RESOURCE
RTC FIRMWARE
FLASH
3220 bytes
RAM
78 bytes
TA0
Y
TA1
Y
ADC10
Y
SMCLK
Require 4 MHz
I/O
TA1.0 PWM second-pulse output
REF
ADC using REF 2.5 V
If we need to use this firmware, we only need include the “emeter-rtc-inter.h” file and add the “emeterrtc\emeter-rtc-6736\Debug\Exe\emeter-rtc-6736.r43” file to the project.
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Getting Started Firmware
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6.1
Firmware API
This firmware provides two API: one is for getting, and the other is for setting.
The following function sets all parameters that will be used by the firmware:
void set_rtc_parameter(int address, int32_t value)
The following function gets all parameters from the firmware inside:
int32_t get_rtc_parameter(int address, void *ptr)
Below are the parameters to get or set.
• RTC_CRYSTAL_BASE_OFFSET
Description: The fixed bias of the oscillator at room temperature. Reads and writes.
Unit: ppm.
Note: ppm > 0 means faster than the standard, and ppm < 0 means slower than the standard.
•
RTC_CURRENT_TIME
Description: Gets and sets current time. Reads and writes. The time is structured as follows:
struct rtc_interface {
uint8_t
uint8_t
uint8_t
uint8_t
uint8_t
uint8_t
uint8_t
year;
month;
week;
day;
hour;
minute;
second;
value:
value:
value:
value:
value:
value:
value:
0–100
1–12
0–6, Sunday = 0
1–28, 30, 31
0–23
0–59
0–59
};
Note: The void is called set_rtc_parameter(int address, int32_t value) or int32_t get_rtc_parameter(int
address, void *ptr) for RTC_CURRENT_TIME, which needs to pass the point of the struct rtc_interface
variable.
•
RTC_CURRENT_MODE
Description: RTC current working mode. Reads and writes.
Value: Includes two modes:
enum RTC_STATUS {
RTC_LOW_POWER_STATUS = 0, low-power mode RTC_OPEN_STATUS, normal power mode
};
Note: In low-power mode, this firmware will not output a second pulse; it will only compensate for the
error influenced by the temperature.
•
RTC_CURRENT_TEMP
Description: Gets current temperature. Only reads.
Unit: 0.25°C
•
RTC_ERROR_STATUS
Description: Reports if RTC has something wrong. Only reads.
Value: 1 = error, 0 = normal
•
RTC_ADC_BATTERY_RAW
Description: Gets battery ADC value using 2.5-V REF. Only reads.
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Value: 1 = error, 0 = normal
•
•
•
•
•
•
•
•
14
RTC_NTC_POWER_ON_CB
Description: Callback function that lets the power I/O pin high.
RTC_NTC_POWER_OFF_CB
Description: Callback function that lets the power I/O pin low. Only writes.
RTC_CRYSTAL_COEFF0
RTC_CRYSTAL_COEFF1
RTC_CRYSTAL_COEFF2
RTC_CRYSTAL_COEFF3
RTC_CRYSTAL_COEFF4
RTC_CRYSTAL_COEFF5
Description: Sets crystal curve coefficient according to the crystal curve parameter.
ULP Temperature Compensated RTC on MSP430F6736 Design Guide
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6.2
Firmware Use in IAR Project
Figure 14. IAR Project File: E-Meter-RTC-6736
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Figure 15. IAR Project File: E-Meter-APP-6736
ULP Temperature Compensated RTC on MSP430F6736 Design Guide
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15
Test Data
7
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Test Data
Table 2. Test Data When Using Temperature Compensated
16
IDEAL TEMP °C
IDEAFREQ ERR
(ppm)
GAP FREQ
(ppm)
IDEAL FREQ
(mHZ)
MEAS FREQ
(mHz)
NO
CALIBRATION
ERR
CALIBRATION
ERR
73
83.75
91.7
1000
999.9083
–7.95
–6.95
63
53.6
58
1000
999.942
–4.4
–3.4
53
30.15
32.7
1000
999.9673
–2.55
–1.55
43
13.4
14.7
1000
999.9853
–1.3
–0.3
33
3.35
4
1000
999.996
–0.65
0.35
23
0
1
1000
999.999
–1
0
13
3.35
6
1000
999.994
–2.65
–1.65
3
13.4
17.7
1000
999.9823
–4.3
–3.3
–7
30.15
34.7
1000
999.9653
–4.55
–3.55
–17
53.6
58
1000
999.942
–4.4
–3.4
–27
83.75
88.3
1000
999.9117
–4.55
–3.55
–37
120.6
123.3
1000
999.8767
–2.7
–1.7
ULP Temperature Compensated RTC on MSP430F6736 Design Guide
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8
Design Files
8.1
Schematics
To download the schematics for each board, see the design files at http://www.ti.com/tool/TIDMTEMPCOMPENSATED-RTC.
VDD
C49
C51
0.1U
1
2
3
4
5
6
7
8
9
10
11
12
13
A_BAT 14
15
RT
SAMIO 16
LED2 17
18
ALERT_M
VDD 19
VDSYS 20
VDD 21
GND 22
VCORE 23
24
X1
25
X2
V1+
V1I1+
I1I2+
I2VREF
GND
AVDD
VA SYS
VA SYS
C56
10U
VCORE
C53
0.47U
VDD
VDSYS
R74
10k
C57
10U
SHORT
C52
S9
0.1U
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100 RST
99 CD RST
98 S-A
97 SAMRST
96 SAMCLK
95 TEST
94 CASE
93 UP
92 ESM_VCC
91 PROG
90 LED3
89 IR C
88 LED4
87 SEG32
86 SEG31
85 SEG30
84 SEG29
83 SEG28
82 SEG27
81 SEG26
80 SEG25
79 SEG24
78 SEG23
77 SEG22
76 SEG21
SD0P0
SD0N0
SD1P0
SD1N0
SD2P0
SD2N0
VREF
AV SS
AV CC
VA SYS
NC
NC
NC
P1.0/PM_TA0.0/VREF-/A2
P1.1/PM_TA0.1/VREF+/A1
P1.2/PM_UCA0RXD/PM_UCA0SOMI/A0
P1.3/PM_UCA0TXD/PM_UCA0SIMO/R03
AUXVCC2
AUXVCC1
VDSYS
DVCC
DVSS
VCORE
XIN
XOUT
DVSS
DVSYS
P6.0/S19
P5.7/S20
P5.6/S21
P5.5/S22
P5.4/S23
P5.3/S24
P5.2/S25
P5.1/S26
P5.0/S27
P4.7/S28
P4.6/S29
P4.5/S30
P4.4/S31
P4.3/S32
P4.2/S33
P4.1/S34
P4.0/S35
P3.7/PM_SD2DIO/S36
P3.6/PM_SD1DIO/S37
P3.5/PM_SD0DIO/S38
P3.4/PM_SDCLK/S39
P3.3/PM_TA0.2
P3.2/PM_TACLK/PM_RTCCLK
AUXVCC3
P1.4/PM_UCA1RXD/PM_UCA1SOMI/LCDREF/R13
P1.5/PM_UCA1TXD/PM_UCA1SIMO/R23
LCDCAP/R33
P8.4/TA1.0
P8.5/TA1.1
COM0
COM1
COM2
COM3
P1.6/PM_UCA0CLK/COM4
P1.7/PM_UCB0CLK/COM5
P2.0/PM_UCB0SOMI/PM_UCB0SCL/COM6
P2.1/PM_UCB0SIMO/PM_UCB0SDA/COM7
P8.6/TA2.0
P8.7/TA2.1
P9.0/TACLK/RTCCLK
P2.2/PM_UCA2RXD/PM_UCA2SOMI
P2.3/PM_UCA2TXD/PM_UCA2SIMO
P2.4/PM_UCA1CLK
P2.5/PM_UCA2CLK
P2.6/PM_TA1.0
P2.7/PM_TA1.1
P3.0/PM_TA2.0
P3.1/PM_TA2.1
CON4
VREF
C55
10U
RST/NM1/SBWTDIO
PJ.3/ACLK/TCK
PJ.2/ADC10CLK/TMS
PJ.1/MCLK/TDI/TCLK
PJ.0/SMCLK/TDO
TEST/SBWTCK
P8.3/S0
P8.2/S1
P8.1/S2
P8.0/S3
P7.7/S4
P7.6/S5
P7.5/S6
P7.4/S7
P7.3/S8
P7.2/S9
P7.1/S10
P7.0/S11
P6.7/S12
P6.6/S13
P6.5/S14
P6.4/S15
P6.3/S16
P6.2/S17
P6.1/S18
C48
2.2N
VDD
GND
RST
TEST
4
3
2
1
C54
4.7U
RST
J16
AVDD
C50
0.1U
R72
47K
15P
R73 10
26 VDD
27 RX_485_1
28 T X _485_1
29 LCDCAP
30 RXA
31 TX_PWM
32 COM4
33 COM3
34 COM2
35 COM1
36 VRTC
37 BLCEN
38 PLC_ST
39 P LC_ EV
40 PLC_ RST
41 PLC_SET
42 SHORT
43 PLC_ RX
44 PLC TX
45 RB
46 RA
47 BEEP
48 SCL
49 SDA
50 P1OUT
G1
32.768
X2
15P
C47
VDD
LCDCAP
VDD
X1
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
GND
VDSYS
SEG20
SEG19
SEG18
SEG17
SEG16
SEG15
SEG14
SEG13
SEG12
SEG11
SEG10
SEG9
SEG8
SEG7
SEG6
SEG5
SEG4
SEG3
SEG2
SEG1
SEG0
MOUTPUT
INTRA
U26
MSP430F67XX
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Design Files
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VDD
Q126
3906
C321
E
_
V
CC
R411
4.7K
SAMIO
1
GND VCC
2
Vpp RST
3
I/O CLK
4
PROG R206
0.1U
18
E_VCC
7
R412 1K SAMRST
6
R413 100 SAMCLK
C322
22P
GND
VDD
R202
100k
UP
1K
C171
8
5
RFU RFU
ESAM2605
VDD
ESM_VCC
4.7K
U1310.1U
GND
R414
R207
R201
100k
K3
KF-508
1K
K2
AN6*6*5
K1
AN6*6*5
1
2
3
C172
0.1U
ULP Temperature Compensated RTC on MSP430F6736 Design Guide
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6
5
4
R203 1M
VDD
CASE
C173
0.1U
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C6
0.1U
485_GND
485_VCC
CON6
485_RX_1 1
485_DE_1 2
3
485_TX_1 4
VCC
U5
3082
5
1
2
GND
P+
P-
8
J3
RD
RE
TE
TD
A
R17
33K
RT3
A
TV1
MZ27-51
PK6.8E
6
B
7
B
485_GND
R18 33K
J5 CON2
2
1
B
A
485_VCC
J6
2
1
S+
S-
1
VDD
R12
4.7K
U2
2501
4
2
485_TX_1
3
485_GND
TX_485_1
PLC_RX1
PLC_ST1
R29
2K
R11 470
VDD
R31
2K
R13
3K
PLC_ST
PLC_RX
R30
3K
4
RX_485_1
R32
3K
R14
1K
485_VCC
2
485_RX_1
2501
VCC
J4
485_VCC
R35
10K
R34
10K
485_TX_1 R15
PLC_TX1
10K
Q4
9013
4.7K
1
3
GND
PLC_TX R33
U3
485_DE_1
PLC_RES
PLC_EV1
PLC_ST1
Q10
PLC_RST1
3906
485_GNDPLC_TX1
PLC_SET1
R16 2K
VCC
PLC_RX1
Q3
9013
+12V
VCC
VCC
R37
10K
R39
10K
PLC_EV1
PLC_EV
R36 4.7K
VDD
PLC_SET
R38 4.7K
Q6
3904
FD2*6
R41
10K
PLC_SET1
Q5
3904
PLC_RST1
PLC_RST
R40 4.7K
Q7
3904
VDD
R24
100
R25
TX_PWM
VCC
1
2
3
4
5
6
7
8
GND
9
10
11
12
IR_CR26 4.7k
D5
AT 205B
4.7K
GND
Q8
3904
VCC
GND
RX
3
2
1
Q9
3906
C7
GND
RXA
0.1u
U6
HM238
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Design Files
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VDD
C281
R2 //100
SEG0
BEEP1
R1
//4.7K
BEEP
//SMB1275P2305A
Q1
//3904
GND
U41 24LC256
4
1
2
3
7
VSS
A0
A1 VCC
A2 SDA
WP SCL
8
5
6
C131
0.1U
VDD
SDA
SCL
R151
7.5K
R152
7.5K
C132
180P
C133
180P
C282
SEG1 68P
C283
SEG2 68P
C284
SEG3 68P
C285
SEG4 68P
C286
SEG5 68P
C287
SEG6 68P
C288
SEG7 68P
C289
SEG8 68P
C290
SEG9 68P
C291
SEG1068P
C292
SEG1168P
C293
SEG1268P
C294
SEG1368P
C295
SEG1468P
C296
SEG1568P
C297
COM1
C298
COM268P
C299
COM368P
C300
COM468P
68P
C301
SEG16
C302
SEG17 68P
C303
SEG18 68P
C304
SEG19 68P
C305
SEG20 68P
C306
SEG21 68P
C307
SEG22 68P
C308
SEG23 68P
C309
SEG24 68P
C310
SEG25 68P
C311
SEG26 68P
C312
68P
SEG27
C313
SEG28 68P
C314
SEG29 68P
68P
68P
P1OUT R171
1
1k
C151
0.1u
2
P+
4
3
C153
1000PP-
SEG0
SEG1
SEG2
SEG3
SEG4
SEG5
SEG6
SEG7
SEG8
SEG9
SEG10
SEG11
SEG12
SEG13
SEG14
SEG15
COM1
COM2
COM3
COM4
GND
U51
PS2501
D111
C01W-7131-6
A
300 R345
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
VDD
R177
4.7K
Q36
3904
MULTI
20
4
3
C154
1000PS-
LCD1
LCD-JY09484A
SEG
SEG
SEG
SEG5B
SEG5A
SEG
SEG
SEG
SEG6B
SEG6A
SEG7B
SEG7A
SEG8B
SEG8A
SEG 9B
SEG 9A
SEG
INTRA
MOUTPUT
2
S+
Q37
3906
SEG32 36
SEG31 35
SEG30 34
SEG29 33
SEG28 32
SEG27 31
SEG26 30
SEG25 29
SEG24 28
SEG23 27
SEG22 26
SEG21 25
SEG20 24
SEG19 23
SEG18 22
SEG17 21
SEG16 20
1k
C152
0.1u
GND
1
U52
PS2501
SEG 2B
SE G 2A
SE G 3B
SE G 3A
SE G 4B
SEG 4A
SEG
SEG
SEG1B
SEG1A
SEG
SEG
SEG
SEG
SEG
COM1
COM2
COM3
COM4
MULTI R174
ULP Temperature Compensated RTC on MSP430F6736 Design Guide
Copyright © 2014, Texas Instruments Incorporated
VDD1
R341
BLCEN
300
R342
K
LED2
R343
1k
LED3
4.7K
LED4
GND
R346
1K
Q111
3904
GND
D113 L3WR-C
D114 L3WR-C
R347
1K
D115 L3WR-C
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+12V
R214
5.1K
R215
Q52
9012
1K
5.1K
R212
5.1K
R217
5.1K
1K
TV33
P6KE30CA
RELAY+
Q51
9013
R211
RA
R216
Q54
9012
RELAY-
Q56
9013
R220
RB
5.1K
Q53
9013
R213
1K
Q55
9013
R218
1K
R219
5.1K
J46
RELAYRELAY+
1
2
CON2
VRTC
P39
1
R261
R262
R263
D81
M7
R264
300K
300K
300K
300K
R241
20K
RT
T-220N
R242
RT
1
U79
VDD
4
2
3
R265
1M
T-220N
R91
R92
R93
240K-1% 150K-1% 150K-1% R95
R94
1K-1%
S-A
PS-2501
C201
0.1U
V1+
100-1%
C76
47p
C78
15NF
C77
47p
R96
V1-
1K-1%
P13
Z6
BAT+
R98 1K-1%
I1+
1
STBL-120
P14
Z7
STBL-120
Z8
R99
I1-
1K-1%
S16
S
GND
R1011K-1%
1
STBL-120
P16
R102
1
STBL-120
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S17
S
GND
A_BAT
C211
1000P
C84
15NF
C83
47P
Z9
R282
1M
I2+
C82
47P
GND
R100
10-1%
B!
C81
15NF
C80
47P
1
P15
R281
1M
R283 0R
C79
47P
GND
R97
//10-1%
A!
I2-
1K-1%
ULP Temperature Compensated RTC on MSP430F6736 Design Guide
Copyright © 2014, Texas Instruments Incorporated
21
Design Files
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J66
VCC
L
L
1
2
3
4
5
6
7
8
R300
5.1K
ALERT_M
R298
10K
N
N
C232
1000P
VDD
485_VCC_12
N
1
N
+
RV31
20K681
P47
L
2
D95
LL4148
485_VCC
+
C223
0.1U
C224
220U/16V
D94
LL4148
VDD1
7
V2
MB6S
VIN
C225 ZD23C233
470U/35V 470UF/35V
+
+
+
Z25
B62
C226
D96
1N4148
U89 HT7550
3
+12V
JS28D20-18A
L
2
+5V
485_GND
3
1
C222
0.1U
5
6
+
Vin
C221
100U/35V+
GND
+
PT7
MZ4
1
4
1 VCC
VOUT
GND
B62
1
D91
M7
T1
C227
0.1U
+
C229
470U/16V
C228
0.1U
2
P46
T-220N
3
Z24
U88
78L05
1N4744A
S40
D92
BAT+
BAT3
CR1/2AA
8.2
VDD
LL4148
Bill of Materials
To download the bill of materials (BOM), see the design files at http://www.ti.com/tool/TIDMTEMPCOMPENSATED-RTC.
Table 3. BOM
DESCRIPTION
22
VALUE
DESIGNATOR
PCS/UNIT
FOOTPRINT
MANUFACTURER
SMD, Capacitor,
±20%
0.1 µF
C6, C7, C50, C51,
C52, C131, C151,
C152, C171, C172,
C173, C201, C222,
C223, C227, C228,
C321
17
603
Yageo
SMD, Capacitor,
±20%
0.47 µF
C53
1
603
Yageo
SMD, Capacitor,
±20%
2.2 nF
C48
1
603
Yageo
SMD, Capacitor,
±20%
4.7 µF
C54
1
603
Yageo
SMD, Capacitor,
±20%
10 µF
C55, C56, C57
3
805
Yageo
SMD, Capacitor,
±20%
1000 pF
C153, C154, C211,
C232
4
603
Yageo
SMD, Capacitor,
±10%
180 pF
C132, C133
2
603
Yageo
SMD, Capacitor,
±10%
15 nF
C78, C81, C84
3
603
Yageo
SMD, Capacitor,
±10%
15 pF
C47, C49
2
603
Yageo
ULP Temperature Compensated RTC on MSP430F6736 Design Guide
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Table 3. BOM (continued)
DESCRIPTION
VALUE
PCS/UNIT
FOOTPRINT
MANUFACTURER
C322
1
603
Yageo
47 pF
C76, C77, C79,
C80, C82, C83
6
603
Yageo
68 pF
C281-C314
34
603
Yageo
OΩ
R283
1
603
Yageo
SMD, Resistor, ±5%
10 k
R15, R34, R35,
R37, R39, R41,
R74, R298
8
603
Yageo
SMD, Resistor, ±1%
1k
R94, R96, R98,
R99, R101, R102
6
603
Yageo
1k
R14, R171, R174,
R206, R207, R213,
R215, R216, R218,
R343, R346, R347,
R412
13
603
Yageo
SMD, Resistor, ±5%
2k
R16, R29, R31
3
603
Yageo
SMD, Resistor, ±5%
20 k
R241
1
603
Yageo
SMD, Resistor, ±5%
3k
R13, R30, R32
3
603
Yageo
SMD, Resistor, ±5%
33 k
R17, R18
2
603
Yageo
SMD, Resistor, ±5%
300
R341, R345
2
603
Yageo
SMD, Resistor, ±5%
100 k
R201, R202
2
603
Yageo
SMD, Resistor, ±1%
100
R95
1
603
Yageo
SMD, Resistor, ±5%
100
R24, R413
2
603
Yageo
SMD, Resistor, ±1%
470
R11
1
603
Yageo
SMD, Resistor, ±5%
4.7 k
R12, R25, R26,
R33, R36, R38,
R40, R177, R342,
R411, R414
11
603
Yageo
SMD, Resistor, ±5%
47 k
R72
1
603
Yageo
SMD, Resistor, ±5%
5.1 k
R211, R212, R214,
R217, R219, R220,
R300
7
603
Yageo
SMD, Resistor, ±1%
10
R100
1
603
Yageo
SMD, Resistor, ±5%
10
R73
1
603
Yageo
SMD, Resistor, ±5%
7.5 k
R151, R152
2
603
Yageo
SMD, Resistor, ±5%
1M
R203, R265, R281,
R282
4
603
Yageo
SMD, Resistor, ±5%
300 k
R261, R262, R263,
R264
4
805
Yageo
SMD, Resistor, ±1%
150 k
R92, R93
2
1206
Yageo
SMD, Resistor, ±1%
240 k
R91
1
1206
Yageo
D92, D94, D95, D96
4
IN4148-SMT
SMD, Capacitor,
±10%
22 pF
SMD, Capacitor,
±10%
SMD, Capacitor,
±10%
SMD, Resistor, ±5%
SMD, Resistor, ±5%
SMD, Diode
DESIGNATOR
IN4148
SMD, MCU
MSP430F6736
U26
1
TQFP100-0.26
Texas Instruments
SMD, RS485
SN65HVD3082E
U5
1
SOIC8
Texas Instruments
SMD, EEPROM
24LC256B-I/SN
U41
1
SOIC8
SMD,
Transistors,NPN
3904
Q3, Q4, Q5, Q6,
Q7, Q8, Q36, Q51,
Q53, Q55, Q56,
Q111,
12
3904_3906
NXP MMBT3904
MMBT3906
SMD,
Transistors,PNP
3906
Q9, Q10, Q37, Q52,
Q54, Q126
6
3904_3906
NXP MMBT3904
MMBT3906
SMD, LDO
78L05
U88
1
SOT-89
Texas Instruments
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Table 3. BOM (continued)
DESCRIPTION
SMD, LDO
SMD, Rectifier
Diode
M7
SMD, Rectifier
Bridge
MB6S
SMD, NTC
RT-10 k
SMD, Bead
STBL-120
PCS/UNIT
FOOTPRINT
MANUFACTURER
U89
DESIGNATOR
1
SOT-89
HT
D81, D91
2
IN5817-SMT
Changjiang
V2
1
MBS-1
Changjiang
R242
1
805
Exsense
Z6, Z7, Z8, Z9
4
805
Yageo
D113, D114, D115
3
LED
Changjiang
G1
1
G-32.768
SEIKO
Through-hole, LED
RED LED-Ф5
Through-hole,
Crystal,12.5p–5ppm
32.768kHz VT200
Through-hole, LCD
LCD-JY09484
LCD1
1
LCD-JY09484A
HEBEI JIYA
Through-hole,
Voltage
Transformer
JS28D20-18A
T1
1
TRANS-TD28-18-3
QINGZHOU
JINSHUN
Through-hole, Back
Light Panel
C01W-7131-6
D111
1
BG-ST-7131
SHENZHEN SAITE
Through-hole,
lithium battery
ER14250AH
BAT3
1
B-CR1/2AA
YIWEI
Through-hole,
Button
6*6*4.3
K1, K2
2
RESET
Zhongcheng
Through-hole,
Micro-Switch
KF-508
K3
1
KFT-5.8
Zhongcheng
Through-hole,
ESAM
ESAM2605
U131
1
DIP-8
CSG
Through-hole,
Electrolytic
Capacitor
100 U / 35 V
C221
1
D-D-F 6.3*0.5*2.50
Yageo
Through-hole,
Electrolytic
Capacitor
220 U / 16 V
C224
1
D*D*F 6.3*0.5*2.5
Yageo
Through-hole,
Electrolytic
Capacitor
470 U / 16 V
C229
1
D*D*F 8*0.6*3.5
Yageo
Through-hole,
Electrolytic
Capacitor
1000 U / 35 V
C225
1
D*D*F 12.5*0.6*5.0
Yageo
Through-hole,
Zener diode
1N4744A
ZD23
1
DO41-UP
Changjiang
Through-hole,
Piezoresistor
20K681
RV31
1
RV20K681
FNR
Through-hole,
Optocoupler
PC817C
U2, U3, U51, U52,
U79
5
DIP-4
Toshiba
Z24, Z25
2
B62A
Yageo
Through-hole, Bead
24
VALUE
HT7550
B62
Through-hole,
Thermistor
MZ4-250
PT7
1
PTC-120/120-35MA
Yageo
Through-hole,
Thermistor
MZ6-51R
RT3
1
PTC-120/120-35MA
Yageo
Through-hole, TVS
P6KE6.8CA
TV1
1
TVSUP
Fairchild
Through-hole, TVS
P6KE22CA
TV33
1
TVSUP
Fairchild
Through-hole,
Infrared Reader
HM238
U6
1
TSOP1838
Ableir
Through-hole,
Infrared Sender
AT205B
D5
1
LED-5
Ableir
E-meter Case
201 Type
10（60）A
1
QUANSHENG
Relay
GRT508FA 250 uΩ
1
GELEITE
ULP Temperature Compensated RTC on MSP430F6736 Design Guide
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Table 3. BOM (continued)
DESCRIPTION
VALUE
DESIGNATOR
Current transformer
10（60）/ 5 MA
PCB Board
8.3
PCS/UNIT
FOOTPRINT
1
MANUFACTURER
Shenke
1
Layer Plots
To download the layer plots, see the design files at http://www.ti.com/tool/TIDM-TEMPCOMPENSATEDRTC.
Figure 16. Top Silkscreen
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Figure 17. Top Layer
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Figure 18. Bottom Layer
Figure 19. Bottom Silkscreen
Figure 20. Mechanical Dimensions
26
ULP Temperature Compensated RTC on MSP430F6736 Design Guide
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Design Files
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8.4
Altium Project
To download the Altium project files, see the design files at http://www.ti.com/tool/TIDMTEMPCOMPENSATED-RTC.
8.5
Gerber Files
To download the Gerber files, see the design files at http://www.ti.com/tool/TIDM-TEMPCOMPENSATEDRTC.
8.6
Software Files
To download the software files, see the design files at http://www.ti.com/tool/TIDMTEMPCOMPENSATED-RTC.
8.7
References
1. MSP430x5xx and MSP430x6xx Family User's Guide (Rev. K) (SLAU208N)
2. MSP430F673x, MSP430F672x Mixed Signal Microcontroller (Rev. B) (MSP430f6736)
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About the Author
9
www.ti.com
About the Author
ALEX CHENG joined TI in 2010 as an MCU FAE supporting MSP430 and industry metering applications
in China. In 2011 he integrated the MCU SAE team for application system development into China. In
2014, he joined the Shenzhen EP FAE team to support general MCU and WCS products. Alex Cheng
works across multiple product families and technologies to leverage the best solutions possible for system
level application design and support. Alex Cheng graduated from Guilin University of Technology with a
bachelor's degree, and he received his master's degree from Shenzhen University.
28
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