gcse examiners` reports

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GCSE EXAMINERS' REPORTS
ELECTRONICS
SUMMER 2011
Statistical Information
The Examiners' Report may refer in general terms to statistical outcomes. Statistical
information on candidates' performances in all examination components (whether internally
or externally assessed) is provided when results are issued. As well as the marks achieved
by individual candidates, the following information can be obtained from these printouts:
For each component: the maximum mark, aggregation factor, mean mark and standard
deviation of marks obtained by all candidates entered for the examination.
For the subject or option: the total entry and the lowest mark needed for the award of each
grade.
Annual Statistical Report
Other information on a centre basis is provided when results are issued. The annual
Statistical Report (issued in the second half of the Autumn Term) gives overall outcomes of
all examinations administered by WJEC.
ELECTRONICS
General Certificate of Secondary Education
Summer 2011
Principal Examiner:
Mr A. Beddoe.
E1
General Comments
This was the second paper for the new specification designed originally for use via eassessment. The number of centres using e-assessment this year has increased further to
66%. Some centres still complete the alternative 'paper replacement test' which can
potentially disadvantage candidates. Whereas the on-screen version allows only limited
options when constructing circuits using 'click 'n' click', for example, the paper version
cannot do so, and candidates are free to make many more errors (and do so!) It is well worth
centres putting in whatever effort is needed to enable candidates to use the on-line eassessment examination.
Some candidates even those completing the e-assessment examination seemed to make
little use of the 'Information Sheet', i.e. selecting the incorrect preferred resistor despite the
E24 series being printed on the paper. In preparation for future examinations, centres should
ensure that candidates are aware of the importance of this, and have experience of using it.
Question-specific comments
Q.1
All but the weakest scored full marks on this question, common errors were to use an
LDR instead of a LED.
Q.2
Most candidates scored two marks, common errors were to interchange the Latch
Unit and Delay Unit.
Q.3
A disappointing performance! Some answered correctly but given that these are the
basic units of resistance that candidates should be most familiar with the success
rate was not as good as expected.
Q.4
Candidates either did very well or very poorly on this question, illustrating that for
many candidates the basic rules of electrical circuits are not fully understood.
Q.5
Part (a) was answered well – possibly by inspection, but candidates did not use the
information sheet to determine the formula needed to calculate the power used in
part (b).
Q.6
Labelling the pins of an op-amp has the potential for slip-ups due to the names of the
pins being similar. This was a deliberate attempt to force candidates to differentiate
between the 'inverting' input and the 'V-'pin. Results showed that a number of
candidates could not differentiate between the two and therefore they lost marks.
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Q.7
This question provided the first opportunity to have a wide range of options to
formulate a system design using functional blocks. Most candidates made use of the
information in the stem to select the light sensing unit and pulse generator as the
input devices. Most selected the lamp unit as the output unit. However the choice of
logic gate varied significantly and many incorrectly chose the thyristor as the
interface unit. It is worth noting that a significant number of candidates selected all of
the correct functional blocks yet failed to locate them correctly in the block diagram.
Q.8
This question was answered slightly better than the resistor question last year,
possible due to the slightly different format. However it is guaranteed that resistor
questions of this nature will be a feature of this paper for many years to come. The
only issue was be candidates on the paper version writing down 2 for band 3 instead
of 00. This is an example where candidates on paper had a disadvantage to those on
e-assessment.
Q.9
Most candidates answered this correctly.
Q.10
Most identified X as a variable resistor, though a few went for the thermistor.
Part (b) caused more problems, similar to last year, with a significant number
apparently unaware that the sum of the voltages equals the supply voltage.
Part (c) was well answered by most candidates.
Q.11
A familiar and straightforward question on Logic Gate pinouts. Most candidates
answered both parts correctly, however there were quite a number that gave very
random and unrelated answers, especially on the paper version.
Q.12
A straightforward test of logic gate symbols, this question was well-answered by
many.
Q.13
Part (a) was well-answered. Most candidates recognised the truth-table for an OR
gate. However, just like last year, fewer recognised logic functions when described in
words, with part (b) being much less successful. More practice is needed here!
Q.14
While candidates may know the truth tables for individual gates, many failed to
complete the truth table correctly for even this simple combination.
Q.15
The first part of this question tested recall of the names of the terminals of a thyristor.
This was by far the least successful question on the paper with a significant number
of students giving the impression that they had never seen a MOSFET before. In part
(b) students were generally 'clueless' as to the advantage of a MOSFET for
introducing logic systems to motors. It is important that candidates are given the
opportunity to understand that transistors are current driven devices whilst MOSFETs
are voltage driven. Hence the low output current from a logic gate is unsuitable for
driving a high powered load via a transistor, but the high voltage produced is more
than capable of switching on a MOSFET.
Q.16
This was usually well answered. A few 'hedged their bets' by choosing the same
answer, usually 'On', for both values of VIN, and lost the mark as both parts had to be
correct to gain the mark.
Q.17
Candidates were generally able to determine the resistance of the network, but there
were a number who went for the incorrect option of 6kΩ.
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Q.18
This question proved to be difficult for a number of candidates. It is clear that
candidates find Boolean notation difficult and it is an area that needs attention in
centres as it will always appear in the examinations.
Q.19
This was a question to test students understanding of NAND gate equivalents of a
normal gate. It is worth splitting feedback into the paper based and e-assessment
responses here:
Paper version : Most candidates scored two of the three marks available with a large
number scoring maximum marks. Only on extremely rare occasions was the question
not attempted.
e-assessment paper : Over 50% of the candidates only scored 1 mark because they
did not attempt parts (b) and (c) of the question which were on pages 2 and 3 of the
question. A number scored 0. This shows candidates are not reading the whole of
the question as it stated quite clearly at the top of the page that it was a 3 page
question. As a result of this the small diagram error on page 2 where a NAND gate
was accidentally drawn as an AND gate. All e-assessment scripts were manually
marked and those that gave the answer as either a OR or a NOR were given credit
for doing so, but there were very few that gave the NOR option. The consequence of
not completing all pages of a multipage question should be discussed with
candidates prior to the exam.
Q.20
The elimination of redundant NAND gates is an important skill, and the reason why
we convert logic circuits containing AND, OR and NOT gates into NAND equivalents.
Candidate success in this question was mixed with a large number of candidates
crossing out an unbelievable number of NAND gates. It might be worth centres
explaining the marking of this question to candidates, there is one mark for each pair
of redundant gates, so 1 mark = 2 redundant gates, 2 marks = 4 redundant gates, 3
marks = 6 redundant gates etc. Crossing out more than the required number of gates
gives no marks as it is impossible to determine which gates the candidate considers
as a pair.
Q.21
A fairly straightforward question relating to pull up and pull down resistors, success
was limited and this is a topic that centres should refresh candidates' knowledge of
prior to the examination.
Q.22
This question revealed widespread misunderstanding over comparators. Candidates
added input voltages, subtracted them, performed every possible arithmetic
computation with them, and got the wrong answer! This topic requires much more
focus from centres.
Q.23
Part (a) – well answered. In part (b), the potential divider calculation was far less
successful. The potential divider is an important subsystem in electronics and centres
need to spend more time showing candidates how to calculate the voltage between
two resistors.
Q.24
Parts (a) and (b) were generally well answered. However, in part (c) candidates were
unable in many cases to deal with the 'mA' unit when calculating the resistance,
giving this as 0.7 or 70. In part (d) there were two correct answers depending on
whether you did the paper version (820Ω) or the e-assessment version (750Ω), this
was caused by a late change to the e-assessment paper which changed a multiple
choice question to a gap-fill question.
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ELECTRONICS
General Certificate of Secondary Education
Summer 2011
Principal Examiner:
Mr J. Verrill
E2
General Comments
As in previous years, it was again evident that there were two cohorts of candidate taking
the examination. One found the questions accessible and scored very highly, the other
struggled.
The same weaknesses, reported many times before, re-appeared. Candidates do not:
• read the questions carefully;
• use pencil and ruler to draw circuit diagrams and graphs;
• know, and use, the correct circuit symbols;
• know and interpret common multipliers, such as 'kilo' and 'milli'.
Question-specific comments
Q.1
Generally well-answered though 'D' proved to be a popular distracter.
Q.2
Most candidates recognised the amplitude of the signal, but failed to interpret the
period, choosing 2 seconds usually.
Q.3
Not well- answered. A large number of candidates scored zero on this question.
Q.4
Again not well-answered. It appeared as if many had not read the question carefully
enough.
Q.5
Many candidates got these in the wrong order. This happens regularly, and is
something that centres need to resolve with candidates.
Q.6
The popular answer, for understandable reasons, was 'D'. However, in this case, a
decoder/driver was required.
Q.7
This proved surprisingly difficult for many candidates, even though it has been tested
regularly in the past. Some were seen to fill in the correct segments on the diagram
and were then given a 'benefit-of-doubt' mark.
Q.8
Again, a low scoring question. The popular distracter in (a) was 'C'. This was another
situation where many did not read the question carefully enough. It may be linked to
the common confusion between monostables and astables.
In part (b), some used the boxes to write in the names of the transistor terminals.
Others did not attempt the question at all. Once more, did they read the question
carefully?
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Q.9
This modification has been tested a number of times previously, and is usually found
to be quite easy. As with the previous question, many simply left the diagram
untouched. Did they read the question carefully?
Q.10
To gain the mark, candidates had to link all three devices to the correct description.
Many failed to do so.
Q.11
In this question, there was one mark for each correct link. However, some candidates
linked more than one device to a function. They gained no credit for that link.
Q.12
The correct answer was not well known.
Q.13
The popular distracter was '10', i.e. 10mV was added. As is often the case,
candidates wrongly think that gain is additive, not multiplicative.
Q.14
There were many correct answers, more than for the circuit diagram in question 8.
There was some apparent confusion between non-inverting and inverting amplifiers.
Q.15
The two marks were allocated as follows:
•
•
one mark for the correct amplitude;
one for the correct phase / frequency.
Some answers were drawn in a very unclear way so that no credit could be given.
Some incorrectly inverted the signal, even though the stem clearly says "A noninverting amplifier..."
Q.16
This question caused widespread problems, and marks were low. Many failed to
recognise the correct order for the commands, or even that the decision box, the
diamond, required a question in it. Those that drew in the link often took it back too
far, taking it back before the 'Reset the counter' command.
Q.17
This was expected to be 'difficult', and so it proved. The popular distracter was 'C'.
Q.18
A very low scoring question. In part (a), quite a few candidates answered with logic
levels, rather than with 'Off' or 'On' as instructed. The Examiners applied 'benefit-ofdoubt' and awarded the mark where appropriate. When the 'Blue Light' column was
the logical inverse of an incorrect 'Red light' column, the Examiners applied 'errorcarried-forward'. Nevertheless, many candidates scored zero marks on this part. Part
(b) proved equally fruitless for many.
Q.19
The popular distracter was 'B', the BCD counter. There were very few correct
answers.
Q.20
There were surprisingly few correct answers to this question. Perhaps this is another
manifestation of the confusion between monostables and astables? The single word
'timer' in option B should have flagged it up as the correct answer.
Q.21
Most candidates gained the mark for this question, though some explanations were a
bit 'woolly'. The most popular advantage centred on the likelihood that humans would
lose count, though other reasons such as boredom, the cost of labour, the need to
take breaks, and inability to work for twenty-four hours were rewarded too.
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Q.22
This caused problems to a minority. Some left the answer section blank. Some gave
reasons for having the system and others gave answers that were too brief. The
examiners were looking for answers that paraphrased the sequence of operations.
Q.23
Many did not complete the circuit, as instructed in part (a). The few that did gave
correct modifications. The calculations in part (b) were often incorrect, by factors of
ten, but were awarded one of the two marks, especially where the working revealed
a correct interpretation of the multipliers 'k' and ' '.
Q.24
This proved to be very difficult for candidates. Few scored any marks at all. Some
gained one mark, for applying the '...rising-edge triggered.' information. Many gave a
signal for B that was simply the logical inverse of A.
Q.25
Many were unable to perform the calculation successfully. Some did so but forgot
that the overall effect is to invert the voltage. These lost one of the two marks.
Q.26
Part (a) was well answered though most answers were given the units of volts. In
part (b), very few recognised the symptoms of saturation. More declared that the
output had been turned into a digital signal, which was a sensible answer but which
ignored the context of the inverting amplifier.
Q.27
The outcome of this question was very 'centre-dependent'. Some centres had
obviously prepared their candidates well on Schmitt Inverters, and most of them
scored full marks. In other cases, candidates either left the output graph blank, or
drew signals that often mirrored the input. Most scored zero.
Q.28
Most candidates scored zero on this question. Few realised how to use the graph to
obtain bandwidth, (the range up to the frequency at which the voltage gain drops to
7% of the maximum, i.e. a voltage gain of 7.) Similarly, part (b) produced very few
correct answers. The popular distracters were 'A' and 'B'.
GCSE Electronics Examiners Report Summer 2011/LG
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WJEC
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E-mail: exams@wjec.co.uk
website: www.wjec.co.uk
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