Circuits for sensors
Ideal OP Amps
Basic OP Amp Circuit Blocks
Analog Computation
Nonlinear OP Amp Applications
OP Amp Considerations
Guarding
Passive Filters
Active Filters
VCO(Voltage Controlled Oscillator)
Function of Amplifiers
p

Amplifiers provides
 GAIN
 Filtering,
Filtering
Signal processing,
processing Correction for
Nonlinearities
Temperature
Pressure
Flow
Motion
….
Chap 0
Sensor
Signal
Conditioning
Circuitry
Digital
Computer
2
Ideal OP Amps
p

Transfer Function = Output / Input
 Voltage
Amp TF (Gain):
Av 
vo
vi
Av  1
 OP Amp is preferred
 Usually
 Easy
to use in circuit designed compared to
discrete Transistor circuits
Chap 0
3
Ideal OP Amps
p ((Cont.))

Assumptions
 Open
loop Gain = Infinity
 Input Impedance Rd = Infinity
 Output Impedance Ro = 0
 Bandwidth = Infinity
 Infinite
 vo=0
when v1 = v2
 No
Chap 0
Frequency Response
Offset Voltage
4
Ideal OP Amps
p ((Cont.))

Note

v0 = A(v2 – v1)

If v0 = , A =  (Typically 100,000)
• Then
Th v2 – v1 = 0  v2 = v1

Since v2 = v1 and Rd = 
• We can neglect the current in Rd

Rule 1


Rule 2

Chap 0
When the OP Amp is in linear range the two inputs are
at the same voltage
No Current flows into either terminal of the OP Amp
5
Basic OP Amp
p Circuit Blocks






Chap 0
Inverting Amplifier
Noninverting Amplifier
Unity-Gain Amplifier
Differential Amplifier
Instrumental Amplifier
The Electrocardiogram Amplifier
6
Inverting
g Amplifier
p

Inverting Amp with
Gain = - Rf / Ri

From Rule 1
 v-

= v+ = 0
From Rule 2 & KCL
+ if = 0  ii = -if
 From Ohm’s law
 ii
 ii
 vi
= vi / Ri , , if = vo / Rf
/ Ri = - v o / Rf
 vo
Virtual Ground
Chap 0

/ vi = -R
Rf / Ri
Inverting Amp Gain

-R
Rf / Ri
7
Inverting
g Amplifier
p
(Cont.)
(
)

Linear Range

By Power Supply
Voltage

Input Impedance
Low (Ri)
 Increasing Ri 
D
Decreasing
i G
Gain
i


Increasing Gain by
increasing Rf
• But there is practical
limit
Saturation
Chap 0
8
Noninverting
g Amplifiers
p

Noninverting Amp


By Rule 2
Vo = If  (Rf + Ri)
 Vi = If  Ri
 Vo = Vi  (Rf + Ri)/Ri
Gain = (Rf + Ri) / Rf




Gain: Vo/Vi = 1 + Rf / Ri
Gain  1,
1 Always
Input Impedance

Very Large (Infinite)
By Rule 1
Vi
Chap 0
9
UnityUnity
y-Gain Amplifier
p

Verifyy that the Gain of
Unity-Gain Amp is 1


Vo = Vi
Applications

Buffer amplifier


Impedance converter

Chap 0
Isolate one circuit from
the loading effects of a
following stage
Data conversion System
((ADC or DAC)) where
constant impedance or
high impedance is
required
10
Differential Amplifiers
p



Chap 0
Combination of Inverting and Noninverting Amp
Can reject 60Hz interference
Electrocardiogram amplifier
Differential
Instrumentation
Noninverting
11
Differential Amplifiers
p
(Cont.)
(
)

Gain of Differential Amp

By Rule 2
V5 = I2 * R2
 V2 = I2 * R1 + V5 = V5 * R1 /R2
+ V5
 V5 = R2 * V2 / (R1 + R2)


By Rule 1
V1 = R1 * I1 + V5
 V5 = R2 * I1 + V6
 V6 = (V2 – V1) * R2 / R1

Chap 0
12
Differential Amplifiers
p
(Cont.)
(
)

CMV ((Common Mode Voltage)
g )



CMG (Common Mode Gain) = 0
DG(Diff
DG(Differential
ti l voltage
lt
Gain)
G i )



If V1 = V2, then V6 = 0
If V1  V2, then V6 = (V2-V1)*(R2/R1)
In p
practice,, CMG  0
CMRR (Common Mode Rejection Ratio)
Measure of the ability to reject CMV
 CMRR = DG / CMG

The Higher CMRR, the better quality
 Typically, 100 ~ 10,000
 60Hz
60H noise
i common tto V1 and
d V2 can b
be rejected
j t d

Chap 0
13
Instrumentation Amplifiers
p

One OP Amp Differential Amplifier
 Input
Impedance is not so High
 Good
for Low impedance source
• Strain gage Bridge
 Bad

for High impedance source
Instrumentation Amplifier
 Differential
Amp with High Input Impedance
and Low Output
O
Impedance
 Two Noninvering Amp + One Differential Amp
Chap 0
14
Instrumentation Amplifiers
p
(Cont.)
(
)

Instrumentation Amp =
Noninverting Amp +
Differential Amp
 We



have:
DG = (V1-V2) / (V3-V4)
= (2*R4 + R3) / R3
V6 = (V3
(V3-V4)*DG*R2
V4) DG R2 / R1
First Stage CMRR
 CMRR

Overall CMG = 0
 High


Chap 0
= DG / CMG = DG
CMRR
High Input Impedance
Gain is adjustable by changing
R3
15
The Electrocardiogram
g
Amplifier
p
Low Pass Filter
< 100Hz
< 0.2 V
Gain = 40
Gain = 32
Maximize CMRR
Chap 0
High Pass Filter
>0.05Hz
16
Analog
g Computation
p

Digital Signal Processing is preferred
 Flexibility
 Easy
to Change
 Elimination of hardware

Analog Signal Processing
 Is
preferred when DSP consumes too much
time
Chap 0
17
Inverter and Scale Changer
g

Inverting Amp with
Gain = - Rf / Ri

Inverter


Inverter and Scale
Changer


Proper choice of Rf / Ri
Application

Chap 0
Rf / Ri = 1
Use of inverter to scale
the output of DAC
18
Adders ((Summing
g Amplifiers)
p
)

Adder


Inverter with Several
inputs
If = I1 + I2 + In
 I1 = V1/R1, …
 Vo = -If * Rf



Chap 0
Vo = -Rf(V1/R1
Rf(V1/R1 + V2/R2
+… + Vn/Rn)
Rf determines overall
Gain
Ri determines
weighting factor and
input impedance
19
Integrator
g

Drawbacks

1 t1
v0 
vi dt  vic

0
RC
Vo will reach saturation
voltage, if Vi is left
connected indefinitely

Chap 0
Integrator operates as
an open-loop amplifier
for DC inputs
20
Practical Integrator

Reset
 S1

Controlled By
Relay or
Solid State Switch or
Analog Switch


Open
Open, S0 Closed
Hold
 S1
Open, S0 Open
 Keeps Vo constant

Chap 0
Inverter
C is initialized to Vr
Integrate
 S1

Closed, S0 Open
Read and Process
21
Differentiators

Drawbacks

v0   RC
dvi
dt

P
Practical
i l Differentiator
Diff
i

Chap 0
Instability at High
frequencies
To Stable
Ri 
R
A0 0 C
22
Comparators
p

Compare Two Inputs

Vi > Vr


Vi < Vr

Chap 0
Vo = -Vs

Drawbacks

If Vi = Vr + small noise

Rapid fluctuation
between  Vs
Vo = Vs
23
Comparators
p
with Hysteresis
y

Positive Feedback
Hysteresis loop
 Can remove the effect
off Small
S ll N
Noise
i


Chap 0
Reduce Fluctuation
(VS  Vr ) R1
Vr  Vr  Vr 
R1  R2
(VS  Vr ) R1
Vr  Vr  Vr 
R1  R2
24
Rectifiers



Chap 0
Precision Half
Wave Rectifier
Precision Full
Wave Rectifier
Limiters
25
OP Amp
p Considerations

Effects of Nonlinear characteristics

Compensation

Undesirable Oscillation at High frequency
• Add external Capacitance according to Spec sheet

GBW (Gain Bandwidth Product)

Gain  Bandwidth = Constant (Typically 1MHz)
• For Noninverting Amp: Bandwidth = GBW / Gain

Input Offset Voltage

Practical OP Amp
• Zero input Does NOT give Zero output

Input Offset Voltage
• Applied input voltage to obtain Zero output

Nulling the offset Voltage
• Adding External Resister according to Spec sheet
Chap 0
26
OP Amp
p Considerations (Cont.)
(
)

Input
p Bias Current

Practical OP amp
• Current flowing into the terminal is NOT Zero
• To keep the input Tr of OP amp turned on
• Causes errors proportional to feedback network R

To minimize errors
• feedback R should be low (<10K)

Slew Rate

Maximal rate of change of amplifier output voltage
• Ex: Slew rate of 741 = 0.5 V / s
– Time to output change from –5V to 5V = 20 s

To Minimize slew rate problem
• Use OP amp with smaller external compensating C
Chap 0
27
OP Amp
p Considerations (Cont.)
(
)

Power Supply
pp y

Usually 15V
• Linear Range 13V

Reducing
gp
power supply
pp y voltage
g
• Results reduced linear range
• Device does not work < 4V

Different OP Amps
p

Bipolar Op Amps
• Good input offset stability
• Moderate input bias current and Input resistances

FET
• Very Low input bias current and Very High Input resistances
• Poor Input offset voltage stability
Chap 0
28
Guarding
g

Elimination of Surface Leakage Currents
Elimination of Common Mode Signals

Very important in practice

 But
Chap 0
skip in this course
29
Passive Filters

Passive Circuits
 Contains
only passive elements
 Registers,
Capacitors and Inductors
 Examples
 Bridge
Circuit
 Voltage Divider
 Filters

Filters
 Eliminate
unwanted signal from the loop
 Low Pass, High
g Pass, Band Pass, Notch, …
Chap 0
30
Passive firstfirst-order Low p
pass Filter


Pass desired Audio
signal and reject
undesired RF
Order of Filter

Chap 0
Number of C and L
Vo
1

,   RC
Vi 1  j
Plot Magnitude and
Phase plot (Bode plot)
 Meaning of C

31
Passive firstfirst-order High
g pass
p
Filter

Chap 0
Pass desired High
frequency signal and
reject undesired low
frequency signal
Vo
j

,   RC
Vi 1  j
Plot Magnitude and
Phase plot (Bode plot)
 Meaning of C

32
Passive secondsecond-order Low p
pass Filter


To increase the
attenuation of transfer
function
Order of Filter

Vo
1

Vi ( j /  c ) 2  (2 j /  c )  1
c 

1
R C
, 
2 L
LC
Meaning of Quality factor
Number off C and L
Q

1
 c ,   3dB BW
2 
 1
 1
 1
Chap 0
33
Passive secondsecond-order High
g pass
p
Filter


To increase the
attenuation
tt
ti
off transfer
t
f
function
Order of Filter

Number of C and L
Vo
2

Vi ( j /  c ) 2  (2 j /  c )  1
c 
1
R C
, 
2 L
LC
 1
 1
Chap 0
 1
34
Active FirstFirst-order Low Pass Filter

Inverting Amp +
Feedback Capacitor


Identical frequency
response with Passive
filter
V
Very
Low
L
Output
O t t
impedance

Chap 0
Negligible Loading
Effect
35
Active FirstFirst-order High
g Pass Filter

Inverting Amp + Input
Capacitor


Identical frequency
response with Passive
filter
V
Very
L
Low
Output
O t t
impedance

Chap 0
Negligible Loading
Effect
36
Active HighHigh
g -order Filters
Chap 0

Low Pass Filters

High Pass Filters
37
Bandpass
p
and BandBand-reject
j Filters

Butterworth Filters
Maximally Flat Magnitude response in pass band
 High Attenuation Rate


Chebyshev Filters
Maximum Attenuation Rate
 Ripple in pass band


Bessel Filters
Maximallyy flat time delay
y in response
p
to step
p input
p
 Attenuation Rate is very gradual

Chap 0
38
Filter Design
g Table

Chap 0
C when 0 = R0 = 1
39
Filter Design
g Example
p

Low pass five-pole Butterworth filter with a corner
frequency
q
y of 200Hz and input
p resistance of 50K
Economic Solution = 3rd order + 2nd order
 Desired R and C ?

C1A = (
( 0 R0 C0 ) / (
( R)
= 1x1x1.753 / 2x200x50K = 27.9 nF
 C2A = 21.6 nF, C3A = 6.7 nF, C1B = 51.5 nF, C2B = 4.9 nF

Chap 0
40
VCO(Voltage
(
g Controlled Oscillator))

VCO = Voltage to
Frequency(V/F)
Converter


VCO converts an input
voltage to a series of
output digital pulses
whose frequency is
proportional to the
input voltage
Applications
ADC
 Digital
Di it l T
Transmission
i i
 Telemetry
 Digital
g
Voltmeter

Chap 0
41
VCO ((Cont.))

Module form


Better linearity, Lower Gain drift, Higher full-scale
frequencies than IC
Monolithic IC form
Less expensive, Small size
 Lower drift, Better flexibility of frequency range


Examples

LM331
Low cost VCO from National Semiconductor
 Maximum nonlinearity 0.01% over 1 ~ 100KHz


CD4046B
PLL contains VCO
 Maximum nonlinearity 1.0% over 1 ~ 400MHz

Chap 0
42
PLL(Phase
(
Locked Loop)
p)


VCO is commonly used in
PLL
Applications
Communications
 Radar
 Time and frequency
control
 Instrumentation system

Control loop

Goal


Chap 0

Minimize z(t)
 s(t) = r(t)
Change r(t) until z(t)=0

s(t) can be obtained
By reading r(t)
43
VCO Interfacing
g

Output of VCO

Digital pulses whose
frequency is
proportional to input
voltage

# of pulse / Duration

Duration


# of Pulse

Chap 0
Controlled by
Sampling Gate
Counted in Counter
44
Divider Circuit

Convert Register
Variations to Voltage
Variations

Output Voltage

Vo = {R2 / (R1 + R2)} Vs
Vs
R1
Vo
R2
Chap 0
45
Divider Circuit: Drawbacks

Vo is not linearly changed

Ex: Vs = 5V, R1 = 1K, R2 = 0 ~ 1K(Sensor)
Vo
Vs/2
Vs/3
R2
500


Chap 0
1K
Output Impedance(R1 || R2) is not so High
Large
g Power Consumption
p
46
Divider Circuit: Example
p

R1 = 10K,
10K R2 = (4K ~ 12K),
12K) Vs = 5V
 Maximum
Vo = 5 {12 / (10+12)} = 2.73V
 Minimum Vo = 5 { 4 / (10 + 4)} = 1.43V
1 43V
 Maximum Z = (10K || 12K) = 120/22 K
 Minimum Z = (10K || 4K) = 40/14 K
 Maximum Power = (Vo)2/R2
= ((2.73))2/12K = 0.62mW
 Minimum Power = (1.43)2/4K = 0.51mW
Chap 0
47