MC33078, MC33079
Low Noise Dual/Quad
Operational Amplifiers
The MC33078/9 series is a family of high quality monolithic
amplifiers employing Bipolar technology with innovative high
performance concepts for quality audio and data signal processing
applications. This family incorporates the use of high frequency PNP
input transistors to produce amplifiers exhibiting low input voltage
noise with high gain bandwidth product and slew rate. The all NPN
output stage exhibits no deadband crossover distortion, large output
voltage swing, excellent phase and gain margins, low open loop high
frequency output impedance and symmetrical source and sink AC
frequency performance.
The MC33078/9 family offers both dual and quad amplifier
versions and is available in the plastic DIP and SOIC packages (P and
D suffixes).
• Dual Supply Operation: 5.0 V to 18 V
•
•
•
•
•
•
•
•
•
•
Low Voltage Noise: 4.5 nV/ Hz
Low Input Offset Voltage: 0.15 mV
Low T.C. of Input Offset Voltage: 2.0 V/°C
Low Total Harmonic Distortion: 0.002%
High Gain Bandwidth Product: 16 MHz
High Slew Rate: 7.0 V/s
High Open Loop AC Gain: 800 @ 20 kHz
Excellent Frequency Stability
Large Output Voltage Swing: +14.1 V/ –14.6 V
ESD Diodes Provided on the Inputs
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MARKING
DIAGRAMS
DUAL
8
1
1
8
SO–8
D SUFFIX
CASE 751
8
1
QUAD
14
14
SO–14
D SUFFIX
CASE 751A
D3
Pos
C2
Q8
D4
Q2
D2
R4
Q7
Q1
R1
C1
R3
R6
ORDERING INFORMATION
C3 R9
Q6
Q10
Q12
R5
VEE
Figure 1. Representative Schematic Diagram
(Each Amplifier)
Vout
Device
Package
Shipping
MC33078D
SO–8
98 Units/Rail
MC33078DR2
SO–8
2500 Tape & Reel
MC33078P
PDIP–8
50 Units/Rail
MC33079D
SO–14
55 Units/Rail
MC33079DR2
SO–14
2500 Tape & Reel
PDIP–14
25 Units/Rail
MC33079P
 Semiconductor Components Industries, LLC, 2002
May, 2002 – Rev. 3
= Assembly Location
= Wafer Lot
= Year
= Work Week
Q3
J1 Amplifier
Biasing
Z1
A
WL, L
YY, Y
WW, W
Q11
R7
MC33079D
AWLYWW
1
Q9
Q5
MC33079P
AWLYYWW
1
1
R2
Q3
14
PDIP–14
P SUFFIX
CASE 646
1
Neg
33078
ALYW
1
VCC
Q4
MC33078P
AWL
YYWW
PDIP–8
P SUFFIX
CASE 626
14
D1
8
1
Publication Order Number:
MC33078/D
MC33078, MC33079
PIN CONNECTIONS
Output 1
DUAL
QUAD
CASE 626/751
CASE 646/751A
1
8 VCC
1
+
2
Inputs 1
VEE
3
7 Output 2
Inputs 1
6
2
+
4
Output 1
5
VCC
Inputs 2
Inputs 2
(Dual, Top View)
Output 2
1
14
2
13
1
3 12
4
4
11
5
10
3
9
2
6 7
8
Output 4
Inputs 4
VEE
Inputs 3
Output 3
(Quad, Top View)
MAXIMUM RATINGS
Rating
Symbol
Value
Unit
VS
+36
V
Input Differential Voltage Range
VIDR
Note 1
V
Input Voltage Range
VIR
Note 1
V
Output Short Circuit Duration (Note 2)
tSC
Indefinite
sec
Supply Voltage (VCC to VEE)
Maximum Junction Temperature
TJ
+150
°C
Storage Temperature
Tstg
–60 to +150
°C
Maximum Power Dissipation
PD
Note 2
mW
Operating Temperature Range
TA
–40 to +85
°C
1. Either or both input voltages must not exceed the magnitude of VCC or VEE.
2. Power dissipation must be considered to ensure maximum junction temperature (TJ) is not exceeded (see Figure 2).
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2
MC33078, MC33079
DC ELECTRICAL CHARACTERISTICS (VCC = +15 V, VEE = –15 V, TA = 25°C, unless otherwise noted.)
Characteristics
Symbol
Input Offset Voltage (RS = 10 , VCM = 0 V, VO = 0 V)
(MC33078) TA = +25°C
TA = –40° to +85°C
(MC33079) TA = +25°C
TA = –40° to +85°C
Min
Typ
Max
–
–
–
–
0.15
–
0.15
–
2.0
3.0
2.5
3.5
–
2.0
–
–
–
300
–
750
800
–
–
25
–
150
175
±13
±14
–
90
85
110
–
–
–
|VIO|
∆VIO/∆T
Average Temperature Coefficient of Input Offset Voltage
RS = 10 , VCM = 0 V, VO = 0 V, TA = Tlow to Thigh
Input Bias Current (VCM = 0 V, VO = 0 V)
TA = +25°C
TA = –40° to +85°C
IIB
Input Offset Current (VCM = 0 V, VO = 0 V)
TA = +25°C
TA = –40° to +85°C
IIO
Common Mode Input Voltage Range (VIO = 5.0 mV, VO = 0 V)
VICR
Large Signal Voltage Gain (VO = 10 V, RL = 2.0 k)
TA = +25°C
TA = –40° to +85°C
AVOL
Unit
mV
µV/°C
nA
nA
V
dB
Output Voltage Swing (VID = 1.0V)
RL = 600 RL = 600 RL = 2.0 k
RL = 2.0 k
RL = 10 k
RL = 10 k
VO+
VO–
VO+
VO–
VO+
VO–
–
–
+13.2
–
+13.5
–
+10.7
–11.9
+13.8
–13.7
+14.1
–14.6
–
–
–
–13.2
–
–14
Common Mode Rejection (Vin = ±13V)
CMR
80
100
–
dB
Power Supply Rejection (Note 3)
VCC/VEE = +15 V/ –15 V to +5.0 V/ –5.0 V
PSR
80
105
–
dB
+15
–20
+29
–37
–
–
–
–
–
–
4.1
–
8.4
–
5.0
5.5
10
11
V
Output Short Circuit Current (VID = 1.0 V, Output to Ground)
Source
Sink
ISC
Power Supply Current (VO = 0 V, All Amplifiers)
(MC33078) TA = +25°C
(MC33078) TA = –40° to +85°C
(MC33079) TA = +25°C
(MC33079) TA = –40° to +85°C
ID
3. Measured with VCC and VEE differentially varied simultaneously.
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3
mA
mA
MC33078, MC33079
AC ELECTRICAL CHARACTERISTICS (VCC = +15 V, VEE = –15 V, TA = 25°C, unless otherwise noted.)
Characteristics
Symbol
Min
Typ
Max
Unit
SR
5.0
7.0
–
V/s
GBW
10
16
–
MHz
Unity Gain Bandwidth (Open Loop)
BW
–
9.0
–
MHz
Gain Margin (RL = 2.0 k)
CL = 0 pF
CL = 100 pF
Am
–
–
–11
–6.0
–
–
Phase Margin (RL = 2.0 k)
CL = 0 pF
CL = 100 pF
m
–
–
55
40
–
–
Slew Rate (Vin = –10 V to +10 V, RL = 2.0 k, CL = 100 pF AV = +1.0)
Gain Bandwidth Product (f = 100 kHz)
Channel Separation (f = 20 Hz to 20 kHz)
dB
Deg
CS
–
–120
–
dB
Power Bandwidth (VO = 27 Vpp, RL = 2.0 k, THD 1.0%)
BWp
–
120
–
kHz
Total Harmonic Distortion (RL = 2.0 k, f = 20 Hz to 20 kHz, VO = 3.0 Vrms, AV = +1.0)
THD
–
0.002
–
%
Open Loop Output Impedance (VO = 0 V, f = 9.0 MHz)
|ZO|
–
37
–
Differential Input Resistance (VCM = 0 V)
Rin
–
175
–
k
Differential Input Capacitance (VCM = 0 V)
Cin
–
12
–
pF
Equivalent Input Noise Voltage (RS = 100 , f = 1.0 kHz)
en
–
4.5
–
nV/ √ Hz
Equivalent Input Noise Current (f = 1.0 kHz)
in
–
0.5
–
pA/ √ Hz
800
2000
MC33078P & MC33079P
1600
I,
IB INPUT BIAS CURRENT (nA)
P,
D MAXIMUM POWER DISSIPATION (mW)
2400
MC33079D
1200
800
MC33078D
400
0
-55 -40 -20
600
400
200
0
0
20 40 60 80 100 120 140 160
TA, AMBIENT TEMPERATURE (°C)
VCM = 0 V
TA = 25°C
5.0
Figure 2. Maximum Power Dissipation
versus Temperature
20
Figure 3. Input Bias Current versus
Supply Voltage
1000
2.0
VCC = +15 V
VEE = -15 V
VCM = 0 V
800
V,
IO INPUT OFFSET VOLTAGE (mV)
I,
IB INPUT BIAS CURRENT (nA)
10
15
VCC, | VEE |, SUPPLY VOLTAGE (V)
600
400
200
0
-55
-25
0
25
50
75
TA, AMBIENT TEMPERATURE (°C)
100
VCC = +15 V
VEE = -15 V
RS = 10 Ω
1.0 VCM = 0 V
AV = +1
Figure 4. Input Bias Current versus Temperature
Unit 2
0
Unit 3
-1.0
-2.0
-55
125
Unit 1
-25
0
25
50
75
TA, AMBIENT TEMPERATURE (°C)
100
125
Figure 5. Input Offset Voltage versus Temperature
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4
I,
IB INPUT BIAS CURRENT (nA)
600
VCC = +15 V
VEE = -15 V
TA = 25°C
500
400
300
200
100
0
-15
-10
-5.0
0
5.0
10
15
VCM, COMMON MODE VOLTAGE (V)
V ICR , INPUT COMMON MODE VOLTAGE RANGE (V)
MC33078, MC33079
VCC -0
VCC -0.5
Voltage
Range
VEE +1.5
VEE +1.0
VCC -3.0
VEE +0
-55
VCC -5.0
125°C
VEE +5.0
125°C
25°C
VEE +3.0
VEE +1.0
-55°C
0
1.0
2.0
3.0
RL, LOAD RESISTANCE TO GROUND (kΩ)
4.0
8.0
VCM = 0 V
RL = ∞
VO = 0 V
±10 V
±5.0 V
6.0
4.0
MC33079
±15 V
MC33078
±5.0 V
2.0
0
-55
±10 V
Supply Voltages
-25
0
25
50
75
TA, AMBIENT TEMPERATURE (°C)
100
25
50
75
100
125
50
VCC = +15 V
VEE = -15 V
RL < 100 Ω
VID = 1.0 V
Sink
40
Source
30
20
10
-55
-25
0
25
50
75
TA, AMBIENT TEMPERATURE (°C)
100
125
Figure 9. Output Short Circuit Current
versus Temperature
CMR, COMMON MODE REJECTION (dB)
I,
CC SUPPLY CURRENT (mA)
±15 V
0
TA, AMBIENT TEMPERATURE (°C)
Figure 8. Output Saturation Voltage versus
Load Resistance to Ground
10
-25
Figure 7. Input Common Mode Voltage
Range versus Temperature
VCC = +15 V
VEE = -15 V
25°C
-VCM
VEE +0.5
| I|,
SC OUTPUT SHORT CIRCUIT CURRENT (mA)
Vsat , OUTPUT SATURATION VOLTAGE (V)
-55°C
VCC = +3.0 V to +15 V
VEE = -3.0 V to -15 V
∆VIO = 5.0 mV
VO = 0 V
VCC -1.5
Figure 6. Input Bias Current versus
Common Mode Voltage
VCC -1.0
+VCM
VCC -1.0
160
120
CMR = 20Log
100
80
60
40
20
100
125
∆ VCM
140
Figure 10. Supply Current versus
Temperature
ADM
+
VCM
VO
∆ VO
× ADM
VCC = +15 V
VEE = -15 V
VCM = 0 V
∆VCM = ±1.5 V
TA = 25°C
1.0 k
10 k
100 k
f, FREQUENCY (Hz)
1.0 M
Figure 11. Common Mode Rejection
versus Frequency
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5
10 M
140
∆VO/ADM
+PSR = 20Log
120
∆VCC
+PSR
100
∆VO/ADM
-PSR = 20Log
∆VCC
-
∆VCC
ADM
∆VO
+
80
-PSR
VEE
60
40
VCC = +15 V
VEE = -15 V
TA = 25°C
20
0
100
1.0 k
10 k
100 k
f, FREQUENCY (Hz)
30
GWB, GAIN BANDWIDTH PRODUCT (MHz)
PSR, POWER SUPPLY REJECTION (dB)
MC33078, MC33079
20
10
0
10 M
1.0 M
RL = 10 kΩ
CL = 0 pF
f = 100 kHz
TA = 25°C
5.0
20
20
15
15
10
VCC = +15 V
VEE = -15 V
f = 100 kHz
RL = 10 kΩ
CL = 0 pF
0
-55
-25
0
25
50
75
100
-5.0
-15
A,
VOL OPEN LOOP VOLTAGE GAIN (dB)
VO, OUTPUT VOLTAGE (Vpp )
25
20
VCC = +15 V
VCC = -15 V
RL = 2.0 kΩ
AV = +1.0
THD ≤ 1.0%
TA = 25°C
10
100
1.0 k
10 k
100 k
RL = 2.0 kΩ
-10
RL = 10 kΩ
10
VO 15
20
Figure 15. Maximum Output Voltage
versus Supply Voltage
30
0
RL = 2.0 kΩ
VCC |VEE| , SUPPLY VOLTAGE (V)
35
5.0
VO +
RL = 10 kΩ
0
Figure 14. Gain Bandwidth Product
versus Temperature
10
20
5.0
-20
5.0
125
TA = 25°C
10
TA, AMBIENT TEMPERATURE (°C)
15
15
Figure 13. Gain Bandwidth Product
versus Supply Voltage
VO , OUTPUT VOLTAGE (Vp)
GWB, GAIN BANDWIDTH PRODUCT (MHz)
Figure 12. Power Supply Rejection
versus Frequency
5.0
10
VCC |VEE| , SUPPLY VOLTAGE (V)
1.0 M
110
100
90
80
5.0
10 M
RL = 2.0 kΩ
f ≤ 10 Hz
∆VO = 2/3 (VCC -VEE)
TA = 25°C
f, FREQUENCY (Hz)
10
15
VCC |VEE| , SUPPLY VOLTAGE (V)
Figure 16. Output Voltage versus Frequency
Figure 17. Open Loop Voltage Gain
versus Supply Voltage
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6
20
110
50
105
| Z|,
Ω
O OUTPUT IMPEDANCE ()
VCC = +15 V
VEE = -15 V
RL = 2.0 kΩ
f ≤ 10 Hz
∆VO = -10 V to +10 V
100
95
90
-55
-25
0
25
50
75
CS, CHANNEL SEPARATION (dB)
10
125
Drive Channel
VCC = +15 V
VEE = -15 V
RL = 2.0 KΩ
∆VOD = 20 Vpp
TA = 25°C
MC33079
100 Ω
10 kΩ
-
120
VOM
+
100 Ω
Measurement Channel
100
∆VOA
CS = 20 Log
1.0 k
f, FREQUENCY (Hz)
∆VOM
10 k
100 k
1.0
0.1
0.001
100 k
10
10
1.0
VCC = +15 V
VEE = -15 V
0.5 f = 2.0 kHz
TA = 25°C
0.1
AV = 1000
AV = 100
RA
0.05
AV = 10
0.01
Vin
+
10 kΩ
VO
2.0 kΩ
AV = 1.0
0.005
1.0
2.0
3.0
4.0
5.0
6.0
7.0
VO, OUTPUT VOLTAGE (Vrms)
VCC = +15 V
VEE = -15 V
VO = 1.0 Vrms
TA = 25°C
AV = 1.0
1.0 M
10 M
-
VO
+
2.0 kΩ
100
1.0 k
f, FREQUENCY (Hz)
10 k
100 k
Figure 21. Total Harmonic Distortion
versus Frequency
SR, SLEW RATE (V/µs)
THD, TOTAL HARMONIC DISTORTION (%)
AV = 10
0.01
Figure 20. Channel Separation
versus Frequency
0
10 k
AV = 100
Figure 19. Output Impedance
versus Frequency
140
0.001
AV = 1000
Figure 18. Open Loop Voltage Gain
versus Temperature
150
100
10
20
f, FREQUENCY (Hz)
MC33078
110
30
TA, AMBIENT TEMPERATURE (°C)
160
130
100
40
VCC = +15 V
VEE = -15 V
VO = 0 V
TA = 25°C
0
1.0 k
THD, TOTAL HARMONIC DISTORTION (%)
A,
VOL OPEN LOOP VOLTAGE GAIN (dB)
MC33078, MC33079
8.0
8.0
Falling
Rising
6.0
4.0
2.0
0
5.0
9.0
Vin = 2/3 (VCC -VEE)
TA = 25°C
Figure 22. Total Harmonic Distortion
versus Output Voltage
∆Vin
+
VO
2.0 kΩ
10
15
VCC |VEE| , SUPPLY VOLTAGE (V)
Figure 23. Slew Rate versus Supply Voltage
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7
20
MC33078, MC33079
VCC = +15 V
VEE = -15 V
∆Vin = 20 V
8.0
100
Falling
Rising
6.0
-
2.0
-55
-25
VO
+
∆Vin
4.0
2.0 kΩ
0
25
50
75
TA, AMBIENT TEMPERATURE (°C)
100
80
60
135
Phase
25°C
20
-55°C
30
8.0
125°C
125°C
40
50
4.0
VCC = +15 V
VEE = -15 V
VO = 0 V
2.0
e,
nV/ √ Hz
n INPUT REFERRED NOISE VOLTAGE ()
0
1
25°C
10
-55°C
Gain
100
60
1.0 M
80
25°C
CL
-55°C
60
40
VCC = +15 V
VEE = -15 V
∆Vin = 100 mV
0
10
70
1000
100
1.0 k
10 k
CL, OUTPUT LOAD CAPACITANCE (pF)
Figure 26. Open Loop Gain Margin and
Phase Margin versus Load Capacitance
Figure 27. Overshoot versus Output
Load Capacitance
10
VCC = +15 V
VEE = -15 V
TA = 25°C
50
30
20
10
8.0
5.0
Voltage
3.0
2.0
Current
100
1.0 k
10 k
0.1
100 k
f, FREQUENCY (Hz)
180
10 M
125°C
VO
+
∆Vin
CL, OUTPUT LOAD CAPACITANCE (pF)
100
80
1.0
10
1.0 k
10 k
100 k
f, FREQUENCY (Hz)
20
Vn, REFERRED NOISE VOLTAGE (nV/ √ Hz)
6.0
100
-
os, OVERSHOOT (%)
CL
10
φ m, PHASE MARGIN (DEGREES)
10
VO
+
2.0 kΩ
10
100
in, INPUT REFERRED NOISE CURRENT ( pA/ √ Hz )
A,
m OPEN LOOP GAIN MARGIN (dB)
12 Vin
90
Figure 25. Voltage Gain and Phase
versus Frequency
0
-
Phase
Gain
20
Figure 24. Slew Rate versus Temperature
14
45
40
0
1.0
125
0
VCC = +15 V
VEE = -15 V
RL = 2.0 kΩ
TA = 25°C
φ, EXCESS PHASE (DEGREES)
120
A,
VOL OPEN LOOP VOLTAGE GAIN (dB)
SR, SLEW RATE (V/s)
µ
10
1000
100
VCC = +15 V
VEE = -15 V
f = 1.0 kHz
TA = 25°C
Vn(total) = (inRs)2 en2 4KTRS
10
1.0
10
100
1.0 k
10 k
100 k
1.0 M
RS, SOURCE RESISTANCE (Ω)
Figure 28. Input Referred Noise Voltage and
Current versus Frequency
Figure 29. Total Input Referred Noise Voltage
versus Source Resistance
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8
MC33078, MC33079
14
Am, GAIN MARGIN (dB)
12
60
Gain
10
R1
8.0
R2
6.0
4.0
2.0
0
50
Phase
-
40
VO
+
φ m , PHASE MARGIN (DEGREES)
70
30
VCC = +15 V
VEE = -15 V
RT = R1 +R2
AV = +100
VO = 0 V
TA = 25°C
20
10
10
100
1.0 k
10 k
0
100 k
RT, DIFFERENTIAL SOURCE RESISTANCE (Ω)
V,
O OUTPUT VOLTAGE (5.0 V/DIV)
V,
O OUTPUT VOLTAGE (5.0 V/DIV)
Figure 30. Phase Margin and Gain Margin versus
Differential Source Resistance
VCC = +15 V
VEE = -15 V
AV = -1.0
RL = 2.0 kΩ
CL = 100 pF
TA = 25°C
t, TIME (2.0 µs/DIV)
t, TIME (2.0 µs/DIV)
Figure 32. Non–inverting Amplifier Slew Rate
e,
n INPUT NOISE VOLTAGE (100 nV/DIV)
Figure 31. Inverting Amplifier Slew Rate
V,
O OUTPUT VOLTAGE (5.0 V/DIV)
VCC = +15 V
VEE = -15 V
AV = +1.0
RL = 2.0 kΩ
CL = 100 pF
TA = 25°C
VCC = +15 V
VEE = -15 V
RL = 2.0 kΩ
CL = 100 pF
AV = +1.0
TA = 25°C
t, TIME (200 µs/DIV)
VCC = +15 V
VEE = -15 V
BW = 0.1 Hz to 10 Hz
TA = 25°C
t, TIME (1.0 sec/DIV)
Figure 33. Non–inverting Amplifier Overshoot
Figure 34. Low Frequency Noise Voltage
versus Time
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MC33078, MC33079
0.1 µF
10 Ω
100 kΩ
D.U.T.
+
2.0 kΩ
+
4.7 µF
1/2
MC33078
100 kΩ
Voltage Gain = 50,000
22 µF
Scope
×1
Rin = 1.0 MΩ
2.2 µF
110 kΩ
24.3 kΩ
0.1 µF
Note: All capacitors are non–polarized.
Figure 35. Voltage Noise Test Circuit
(0.1 Hz to 10 Hzp–p)
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10
4.3 kΩ
MC33078, MC33079
PACKAGE DIMENSIONS
PDIP–8
P SUFFIX
CASE 626–05
ISSUE L
8
NOTES:
1. DIMENSION L TO CENTER OF LEAD WHEN
FORMED PARALLEL.
2. PACKAGE CONTOUR OPTIONAL (ROUND OR
SQUARE CORNERS).
3. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
5
–B–
1
4
DIM
A
B
C
D
F
G
H
J
K
L
M
N
F
–A–
NOTE 2
L
C
J
–T–
MILLIMETERS
MIN
MAX
9.40
10.16
6.10
6.60
3.94
4.45
0.38
0.51
1.02
1.78
2.54 BSC
0.76
1.27
0.20
0.30
2.92
3.43
7.62 BSC
--10
0.76
1.01
INCHES
MIN
MAX
0.370
0.400
0.240
0.260
0.155
0.175
0.015
0.020
0.040
0.070
0.100 BSC
0.030
0.050
0.008
0.012
0.115
0.135
0.300 BSC
--10
0.030
0.040
N
SEATING
PLANE
D
M
K
G
H
0.13 (0.005)
M
T A
M
B
M
SO–8
D SUFFIX
CASE 751–07
ISSUE W
–X–
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B DO NOT INCLUDE MOLD
PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER
SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN
EXCESS OF THE D DIMENSION AT MAXIMUM
MATERIAL CONDITION.
A
8
5
0.25 (0.010)
S
B
1
M
Y
M
4
K
–Y–
G
C
N
X 45 SEATING
PLANE
–Z–
0.10 (0.004)
H
D
0.25 (0.010)
M
Z Y
S
X
M
S
http://onsemi.com
11
J
DIM
A
B
C
D
G
H
J
K
M
N
S
MILLIMETERS
MIN
MAX
4.80
5.00
3.80
4.00
1.35
1.75
0.33
0.51
1.27 BSC
0.10
0.25
0.19
0.25
0.40
1.27
0
8
0.25
0.50
5.80
6.20
INCHES
MIN
MAX
0.189
0.197
0.150
0.157
0.053
0.069
0.013
0.020
0.050 BSC
0.004
0.010
0.007
0.010
0.016
0.050
0
8
0.010
0.020
0.228
0.244
MC33078, MC33079
PACKAGE DIMENSIONS
PDIP–14
P SUFFIX
CASE 646–06
ISSUE M
14
8
1
7
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.
5. ROUNDED CORNERS OPTIONAL.
B
A
F
DIM
A
B
C
D
F
G
H
J
K
L
M
N
L
N
C
–T–
SEATING
PLANE
J
K
H
D 14 PL
G
M
0.13 (0.005)
INCHES
MIN
MAX
0.715
0.770
0.240
0.260
0.145
0.185
0.015
0.021
0.040
0.070
0.100 BSC
0.052
0.095
0.008
0.015
0.115
0.135
0.290
0.310
--10
0.015
0.039
MILLIMETERS
MIN
MAX
18.16
18.80
6.10
6.60
3.69
4.69
0.38
0.53
1.02
1.78
2.54 BSC
1.32
2.41
0.20
0.38
2.92
3.43
7.37
7.87
--10
0.38
1.01
M
SO–14
D SUFFIX
CASE 751A–03
ISSUE F
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
–A–
14
8
–B–
1
P 7 PL
0.25 (0.010)
7
G
B
M
M
F
R X 45 C
–T–
SEATING
PLANE
D 14 PL
0.25 (0.010)
M
K
M
T B
S
A
S
http://onsemi.com
12
J
DIM
A
B
C
D
F
G
J
K
M
P
R
MILLIMETERS
MIN
MAX
8.55
8.75
3.80
4.00
1.35
1.75
0.35
0.49
0.40
1.25
1.27 BSC
0.19
0.25
0.10
0.25
0
7
5.80
6.20
0.25
0.50
INCHES
MIN
MAX
0.337
0.344
0.150
0.157
0.054
0.068
0.014
0.019
0.016
0.049
0.050 BSC
0.008
0.009
0.004
0.009
0
7
0.228
0.244
0.010
0.019
MC33078, MC33079
Notes
http://onsemi.com
13
MC33078, MC33079
Notes
http://onsemi.com
14
MC33078, MC33079
Notes
http://onsemi.com
15
MC33078, MC33079
ON Semiconductor and
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changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any
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16
MC33078/D