2009 International Workshop on Nonlinear Circuits and Signal Processing
NCSP'09, Waikiki, Hawaii, March 1-3, 2009
Experimental Evaluation of Interleaving Technique
in Class E2 dc/dc Converter with Phase Control
Motoki Katayama†, Hiroo Sekiya†‡, and Marian K. Kazimierczuk‡
†Chiba University, 1-33, Yayoi-cho, Inage-ku, Chiba, 263-8522 Japan
‡Wright State University, 3640 Colonel Glenn Hwy., Dayton, OH 45435-0001, USA
Email: sekiya@faculty.chiba-u.jp
Abstract
This paper presents an experimental evaluations of interleaving technique in the class E2 dc/dc converter with phase control. By applying interleaving technique, the power conversion efficiency of the class E2 dc/dc converter is higher than
non-interleaved converter. By carrying out the circuit experiments, we show that the experimental results agree with numerical ones quantitatively. At the nominal state, the laboratory experiment achieves 90.9 % power conversion efficiency
under 7.07 V/1.41 A (10 W) output power and 1 MHz operation.
1. Introduction
The class E2 dc/dc converter [1]–[6] consists of the class
E inverter [7]–[13] and the class E rectifier [14], [16]. The
class E is one of the operating classes of the power amplifiers, achieving the class E switching conditions. Because
of the class E switchings, the converter can achieve the high
power conversion efficiency under the high frequency operation. The phase control is one of the well-known control
scheme for the class E switching circuits [6]–[9]. It is the
main advantages of the phase control that the frequency can
be kept constant and it is possible to achieve the continuous
control. The output voltage can be regulated against the input variations and load ones by varying the phase shift. For
the control range, this converter also keeps the high power
conversion efficiency. This is because that at least one of the
switches is satisfied with zero-voltage switching (ZVS) for all
the control range.
The interleaving technique [17]–[21] is that the N-identical
circuits are connected in parallel and disperse the current
through each switch.Since the less current flows through the
each converter, the power losses on each parasitic resistance
are reduced. However, the interleaved dc/dc converter presented until now cannot achieve the high power conversion
efficiency under the high frequency operation because of the
losses on the switches.
This paper presents an experimental evaluations of inter-
leaving technique in the class E2 dc/dc converter with phase
control. In the proposed converter, two phase controlled class
E2 dc/dc converter are connected in parallel at the output filter
of the class E rectifier. Since less current flows through the
each converter, the power losses in the parasitic resistances
of the proposed converter are reduced for all the controlledstates. Therefore, the proposed converter achieves higher
power conversion efficiency than the non-interleaved phase
controlled class E2 dc/dc converter. Moreover, the proposed
converter can achieve the high frequency operation because
of the class E switchings. By carrying out circuit experiments, we show that the experimental results agree with numerical ones quantitatively. At the nominal state, the laboratory experiment achieved 90.9 % power conversion efficiency
under 7.07 V/1.41 A (10 W) output power and 1 MHz operation.
2. Circuit Topology and Operation
Figures 1 shows the circuit topology of the interleaved
class E2 dc/dc converte with phase control. In the proposed
converter, two phase-controlled class E2 dc/dc converter are
connected in parallel at the output filter of the class E rectifier, thus, the interleaving technique is applied to the phase
controlled class E2 dc/dc converter. By applying the interleaving technique, the resistance of the output load is reduced
by a half of the one of the non-interleaved converter because
of the parallel connection of the load resistances. In addition,
the output filter is small compared with the phase controlled
class E2 dc/dc converter because of the higher frequency of
the interleaved current. Since less current flows through the
each converter, the power losses on the parasitic resistances
of the proposed converter are reduced. Therefore, the proposed converter achieves higher power conversion efficiency
than the phase controlled class E2 dc/dc converter. Moreover,
the proposed converter can achieve the high frequency operation because of the satisfaction of the class E switching
conditions, which is the operating requirements of zero and
zero slope of the switch voltage vS at the turn on transition.
Therefore, the elemental values of the proposed converter can
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Class E Rectifiers
Phase Controlled Class E Inverters
vs11
ic11 S11
k=1
Dr11
ic12
S12
vf
D1 CD1
Cf
R
DS11
j=1
LC12
LC21
ic21
vs12
DS12
j=2
CS12
i12
L12 C12
L21 C21
S21
Dr21
vs21
Lf2
i2
icD2
vD2
i21
CS21
D2 CD2
DS21
Dr22
ic22 S22
vs22
DS22
CS22
i22
LC22
L22
anti-phase
vD2
k=2
icD1
vD1
i11
CS11
Dr12
k=2
k=1
Paralleled connection point
Lf1
i1
OFF
OFF
OFF
OFF
40
40
40
40
30
30
0.5
C22
i1
VI
C11
vD1 vS22 vS21 vS12 vS11 Dr22 Dr21 Dr12 Dr11
L11
LC11
i2
-0.5
0.5
Figure 1: Interleaved class E2 dc/dc converter with phase control
vf
-0.5
0.6
anti-phase
DS21 ON
OFF
OFF
OFF
40
40
40
40
30
vD2
30
vD1 vS22 vS21 vS12 vS11 Dr22 Dr21 Dr12 Dr11
OFF
0.7
OFF
OFF
+
OFF
OFF
30
30
7
7
0.5
i21
7
vf
-0.5
7
vf
(b)
Figure 3: Waveforms of interleaved class E2 dc/dc converter with phase control with φ = 0◦ (a)Calculated,
(b)Experimental (Vertical: Dr jk :10V/div, vS jk = vD j :50V/div,
i jk :2A/div, v f :20V/div, Horizontal: 400ns/div)
30
-0.7
(a)
(a)
+
30
-0.5
0.5
i21
-0.7
0.7
DS11 ON
phase-shift
phase-shift
i11
i11
vD2
vD1 vS22 vS21 vS12 vS11 Dr22 Dr21 Dr12 Dr11
anti-phase
(b)
two converters Dr1k and Dr2k have the phase shift with antiphase each other as shown in Fig. 2 (b). Thus the frequency
of the interleaved current is twice as high as each one. Here,
subscript j and k mean the number of the phase controlled
class E2 dc/dc converter and the number of the inverter in
each phase controlled class E2 inverter as shown in Fig. 1,
respectively. In the control range, that is, φ , φnom , at least
two of the switches always satisfy the ZVS. Especially, in the
range of φ ≥ 135◦ , all the switches satisfy the ZVS as shown
in Fig. 2 (b). That is because the anti-parallel diode of the
each switch are on if the voltage across the switches are negative. Therefore, the proposed converter keeps the high power
conversion efficiency for the control range.
Figure 2: Numerical waveforms of interleaved class E2 dc/dc
converter with phase control for φnom = 0◦ (a) φ = 0◦ , (b) 3. Circuit Experiments and Results
φ = 135◦
In this section, the design example and the results of the
circuit experiments are shown. First, the following specificabe smaller than those of the interleaved converters presented tions are given; the operating frequency f = 1MHz, the input
until now.
voltage VI = 8V, the output power Po = 10W, the load reFigure 2 shows the example waveforms of the proposed sistance R = 5Ω. As a result, the elemental values for the
converter for φ = 0◦ and 135◦ for φnom = 0◦ . The two con- proposed converter are determined as shown in Tab. I.
verters of the each converter are driven at the same switching frequency and have a controllable phase shift φ between
3.1. Experimental Result
their driving signals Dr j1 and Dr j2 . Therefore, the overall
Figure 3 shows the experimental waveforms for the eleoutput current of the phase controlled class E inverters i1 and
i2 are controlled. On the other hand, the driving signals of mental values indicated in Tab. I. From this figure, it is rec-
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anti-phase
rSD of S11 ON
rSD of S21 ON
phase-shift
phase-shift
OFF
OFF
+
OFF
OFF
+
30
30
30
30
vD2
7
7
i11
Difference
0.3%
0.3%
0.0%
0.40%
−0.2%
−0.3%
0.1%
0.8%
0.4%
0.8%
−0.1%
0.4%
0.0%
0.2%
0.1%
0.1%
0.0%
0.7%
0.5%
−0.3%
0.0%
0.1%
0.0%
0.0%
0.0%
0.0%
0.0%
0.0%
0.0%
0.0%
−0.4%
3.6%
0.5
i21
-0.5
0.5
-0.5
vf
7
(a)
(b)
Figure 4: Waveforms of interleaved class E2 dc/dc converter with phase control with φ = 135◦ (a)Calculated,
(b)Experimental (Vertical: Dr jk :10V/div, vS jk = vD j :50V/div,
i jk :2A/div, v f :20V/div, Horizontal: 400ns/div)
100
ognized that both the numerical and the experimental waveforms were satisfied with the class E switching conditions.
In this paper, we define this state as the nominal state. At
the nominal state, the laboratory experiment achieved 90.9 %
power conversion efficiency under 7.07 V/1.41 Av(10 W) output power and 1 MHz operation. The output voltage is controlled by changing the phase shift φ from the nominal state.
From Fig. 3 and Tab. I, it is seen that the experimental results were similar to the calculated ones quantitatively, which
shows that the validity of the design procedure.
Figure 4 shows the experimental waveforms for φ = 135◦ .
For the control range, namely, φ , 0◦ , all of the switching
voltages cannot satisfy the class E switching conditions, but
can do the ZVS as shown in Fig. 4. In this case, the laboratory experiment achieved 60.5 % power conversion efficiency
under 1.88 V/0.38 A(0.71 W) output power and 1 MHz operation.
3.2. Characteristics for Phase Shift
Figure 5 shows the characteristics of the output voltage Vo
Conventional
Calculated
Measured
Proposed
Calculated
Measured
0.8
0.6
90
[%]
1.0
80
70
60
Efficiency
Measured
16.0µH
3.23nF
15.9µH
2.28nF
15.9µH
3.21nF
15.9µH
2.29nF
4.98nF
30.8µH
15.9µH
3.24nF
7.96µH
2.27nF
15.9µH
3.22nF
7.96µH
2.28nF
4.98nF
30.4µH
40.0nF
5.00Ω
1.54Ω
0.50Ω
0.03Ω
0.02Ω
0.50
1.0MHz
8.00V
7.07V
9.96W
90.9%
Output Voltage Vo/Vonom
LC11
CS 11
L11
C11
LC12
CS 12
L12
C12
C D1
Lf1
LC21
CS 21
L21
C21
LC22
CS 22
L22
C22
C D2
Lf2
Cf
Rnom
rS D
rD
rLC
rL
D
f
VInom
Vonom
Po
η
Calculated
15.9µH
3.22nF
15.9µH
2.27nF
15.9µH
3.22nF
15.9µH
2.27nF
4.96nF
30.5µH
15.9µH
3.22nF
15.9µH
2.27nF
15.9µH
3.22nF
15.9µH
2.27nF
4.96nF
30.5µH
40.0nF
5.00Ω
1.54Ω
0.50Ω
0.03Ω
0.02Ω
0.50
1.0MHz
8.00V
7.07V
10.0W
87.7%
vD1 vS22 vS21 vS12 vS11 Dr22 Dr21 Dr12 Dr11
Table 1: Numerical values and measured ones of the proposed
converter at the nominal state
0.4
0.2
50
40
30
20
10
0
0
45
Phase shift
90
(a)
135
180
[degree]
0
0
Proposed
Calculated
Measured
Conventional
Calculated
Measured
45
90
Phase shift
(b)
135
180
[degree]
Figure 5: Characteristics of the output voltage Vo and the
power conversion efficiency η as a function of the phase shift
φ (a)output voltage Vo /Vonom , (b)power conversion efficiency
η
and the power conversion efficiency η as a function of the
phase shift φ. The characteristics of a non-interleaved phasecontrolled class E2 dc/dc converter are also plotted in this figure. From Fig. 5 (a), the maximum output power was obtained at the nominal state. This is because the driving signals of the two inverters are in-phase. In addition, the output
voltage was proportion to the variation of the phase shift. The
characteristic of the output voltage Vo of the interleaved con-
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verter agreed with that of the non-interleaved converter completely.
The above results show that the proposed converter can
control the output voltage continuously with the fixed frequency. From these results, it is regarded that the proposed converter has a wide control range with keeping the
same power conversion efficiency compared with the noninterleaved converter. Additionally, it is seen that the experimental results are similar to the numerical predictions quantitatively. This indicates the validity of the experimental results.
4. Conclusion
This paper has presented the experimental evaluation
of the class E2 dc/dc converter with a phase control. In the
proposed converter, two phase controlled class E2 dc/dc converter are connected in parallel at the output filter of the class
E rectifier. By applying the phase control to the proposed
converter, the proposed converter can control the output voltage continuously with the fixed frequency. For the control
range, the proposed converter keeps higher power conversion
efficiency than the non-interleaved converter because of the
interleaving technique. By carrying out the circuit experiments, we have shown that the experimental results agree
with numerical ones quantitatively. At the nominal state, the
laboratory experiment achieved 90.9% power conversion efficiency under 7.07V/1.41A(10W) output power and 1MHz
operation.
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Acknowkedgement
H. Sekiya carried out this research as a Research Fellowship,
Japan Society for the Promotion of Science (JSPS).
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