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Strategies for Designing Microwave Multilayer
Printed Circuit Boards Using Stripline Structures
Taconic Advanced Dielectric Division
Thomas McCarthy
Sean Reynolds
Jon Skelly
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Multilayer/Stripline Design Considerations Introduction
Brief History of Stripline Design
9
1964: Matthais<RXQJDQG-RQHV³ELEOH´RIPLFURZDYHFRXSOHGFLUFXLWVpublished
9
Interim: PTFE substrates used in radome apps-suspended stripline and
lumped element design realizations only
9
Stripline on soft substrates developed on Long Island, NY
9
9
© Taconic 2007
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9
¶V:RYHQJODVVUHLQIRUFHG37)(ODPLQDWHVLQWURGXFHG
9
¶V'HYHORSPHQWRI-d and 3-d EM simulation software
(ADS, Microwave Office, HFSS, etc.)
Today: Reliable PTFE/multilayer materials and techniques allow for empirical
realizations of simulated performance
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Outline
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Stripline vs Microstrip«RUERWKLQRQHpwb?
Broadside vs Edge Coupled Traces (Designers Perspective)
9LD'HVLJQ«RIWHQWKHOLPLWLQJIDFWRUDW+LJK)UHTXHQF\
Registration and effect on RF Properties
Prepreg Characteristics to 40 GHz
Fusion Bonding Thermoplastics vs Low Temperature Bonding with
Thermosets
Fabricating multilayers with PTFE and thermoplastic films
4XLFN:RUGRQ+\EULG0XOWLOD\HUV«
Thermal Reliability of thermoplastics vs thermosets
Copper Roughness and effect on Line Widths
Sequential Lamination
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Stripline vs Microstrip
MICROSTRIP
STRIPLINE
(1) Allows densification-multilayer designs
Can combine SMT amplifier and converter
Circuits with embedded couplers, filters,
Feed networks, external radiators, and dc
Power/digital control features in reduced size,
Lower cost, cheaper fabricators
&DQEHWXQHGVWULSOLQHFDQ¶W
(3) In Microstrip one worries that the grounds
are properly brought to the ground layer
(4) Microstrip GRHVQ¶WKDYHFRQFHUQVRI
prepreg variation, easier to fabricate
Streamline structures
(2)
(1)
Eliminate cross talk between
multiple channels, more confined fields
STRIPLINE WITH MICROSTRIP
(3) Stripline EM field distribution is
more symmetrical offering better control
(1)
Teflon
insensitive
over even/odd
mode impedances
Combining the benefits of both approaches
(2) Power
amplifier can
be put on surface
to heat while
the rubber
in the
in microstrip
with capacitors, transistors, resistors ect,
4000 series oxidizes and
turns yellow.
(5) Striplines GRQ¶WUDGLDWHDVUHDGLO\DQG
([KLELWEHWWHU5)FRQILQHPHQW«OHVV
Propensity for intercavity oscillation
(6) Broadband; multioctave couplers and filters
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Automotive Radar (Adaptive Cruise Control @77 GHz)
typical stripline application:
Stripline ± you might be combining many radiating elements with multiple feed elements
Radiating and receiving at high frequency where you need the lowest loss feed to the radiators
(suspended striplines also common for 24-*+]«DLUEDJGHSOR\PHQW
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Edge Coupled vs Broadside
Broadside Coupled
Edge Coupled
W
Dk2
S
W
Dk3
W
H1
Dk2
S
H2
Dk1
W
H3
H1
H2
Dk1
Coupling driven by etching
Tolerance (0.5 to 1 mil)
(1) Coupling driven by core thickness
tolerance in typical RF app.
(2) Puts burden of registration from
top to bottom layer on core for simple RF pwbs
(3) For many layer digital apps the S distance will have to be
FRQWUROOHGE\ERWKFRUHVDQGSUHSUHJV«QHHGYHU\WLJKW
fabrication
(4) Uses more PWB real estate
(5) More asymetrical ± signal via drives to deeper depth
on one signal layer.
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Via Design
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Optimized Vias vs Non Optimized Vias
(Smooth transition through via should not cause S21 rolloff)
measured
Competitive
material
Competitive
material
An optimized via should show no roll off of S21 with frequency and no impedance
Spikes by TDR
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Provided by Anaren Microwave
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Via Design for Semiconductor Test
Verigy (former Agilent) Optimized Via ± Heidi Barnes
Variables:
(1) Number of ground vias (4 vs 6?)
(2) Size of pads and anti pads
(3) Distance of pad to antipads on grounds
(4) Thru via vs back drilled via vs blind/buried via
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Verigy Optimized Via
Non optimized
optimized
Measured by Heidi Barnes at Verigy
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Dimensional Stability
Registration
RF Properties
Poor Registration Around Pads
Factors Leading to Poor Registration
(1)
(2)
(3)
(4)
PWB Thickness and drill deflection
Dimensional stability of core
Dimensional stability of core at lamination temperature
Dimensional stability/melting of prepreg during drilling
Drill wander on reverse
side of pwb
Top side of pwb
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HFSS Simulation of 50 Ohm Microstrip to
Stripline Via Transition
-Taconic TSM-30 dielectric, each
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- 1 oz Cu
- Microstrip linewidth LV´
- Stripline linewidth LV´
- 9LDGLDPHWHULV´
- 3DGGLDPHWHULV´
oct
25 2009
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HFSS Simulation of Microstrip to Stripline 50 Ohm Line Input
Return Loss
-10.00
Return Loss
(dB)
-15.00
-20.00
Curve Info
dB(S(WavePort1,WavePort1))
Setup4 : Sw eep1
Move_X='0mil' Move_Y='-16mil'
dB(S(WavePort1,WavePort1))
Setup4 : Sw eep1
Move_X='0mil' Move_Y='0mil'
-25.00
dB(S(WavePort1,WavePort1))
Setup4 : Sw eep1
Move_X='16mil' Move_Y='0mil'
-30.00
0.00
5.00
Frequency
(GHz)
10.00
Courtesy of L3 Narda
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15.00
20.00
Ensuring Via to Pad Registration
Dimensional Stability Optimization of
Copper Clad Laminate Core
Dimensional stability for
TSM ceramic filled laminates
0.20000
0.18000
Machine direction (pph)
0.16000
0.14000
TSM-1
TSM-2
0.12000
Redes i gn 1
0.10000
Redes i gn 2
Redes i gn 3
0.08000
0.06000
0.04000
0.02000
0.00000
0
1
2
3
After etch =1, after bake=2, after thermal stress=3
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4
Dimensional Changes in Glass Reinforced TLY vs
Non Reinforced Laminate
Non reinforced laminate
Non
reinforced
laminate
Glass reinforced TLY
Glass
Reinforced
TLY
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Ceramic filled PTFE/fastRise27 low
temperature thermoset lamination
Almost no fiberglass
reinforcement
Good layer to layer
registration, no pad distortion
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Registration consistency of Dimensionally Stable Core
Values are mils/inch
The key is layer to layer consistency
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Prepreg Thickness Variation
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Prepreg Dielectric Thickness Variation
Teflon insensitive to heat while the rubber in the
4000 series oxidizes and turns yellow.
Dielectric Thickness spacing of prepreg will vary with artwork ± the amount
of copper etched, the thickness of the copper etc.
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Prepreg Filling Difficult Circuitry
3 oz traces
2 oz traces
One ply fastRise27 prepreg
2 plies fastRise27 prepreg
Lamination pressure and stacking of artwork affect flow and final prepre
Thickness.
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Variations in Dielectric Thickness
Teflon insensitive to heat while the rubber in the
4000 series oxidizes and turns yellow.
There can be variations in dielectric constant ± pure
resin or voids?
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Predicting Dielectric Thickness of Pressed Prepregs
With stripline structures there is a balancing act between:
(1) Do I have enough flow to fill all the artwork without voids?
(2) Do I have excessive flow where resin flows into a cavity?
(3) Can I accurately product the z axis distances for impedance and
how reproducible will they be?
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Strategy for Simple RF Multilayers
Core ² copper etched off
one side
Thin prepreg
Core ² signal etched one
side
Strategy allows you to minimize prepreg thickness and overall variation of dielectric
thickness on impedance ± not practical for high layer count multilayers
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Dielectric Materials for Multilayer Stripline Applications
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mmWave Loss Tangents for Various Multilayer Bonding Films
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Glass Reinforced vs non glass reinforced
mmWave Properties
Frequency (GHz)
Frequency (GHz)
fast Rise27 (Damaskos)
TSM mmWave Performance (Damaskos)
0.0024
0.0022
DF
DF
0.002
0.0018
0.0016
0.0014
0.0012
32
34
36
38
40
0.003
0.0028
0.0026
0.0024
0.0022
0.002
0.0018
0.0016
0.0014
0.0012
0.001
42
32
34
Frequency (GHz)
In-Plane X
In-Plane Y
36
38
40
Frequency (GHz)
Linear (In-Plane X)
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In-Plane X
In-Plane Y
Linear (In-Plane X)
Linear (In-Plane Y)
42
Fiberglass Reinforced Laminate at mmWave
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Experimental Insertion Loss Results
(provided by Verigy)
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Impedance Fluctuations with Fiber Glass Weave
(With permission of Lee W. Ritchey ± Speeding Edge)
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Fusion Bonding (295-400ºC)
Fusion Bonding ± the multilayer thermoplastic lamination of pure PTFE or ceramic
filled PTFE composites with no prepregs (no thermosets)
NEGATIVES:
(1) 10-12 Hour press cycle ± high cost
POSITIVES
Other options 3-4 hour press cycle
(1) Loss tangents of 0.009-0.0014
(2) Limited fabricator base ± high cost
can be obtained
(3) High temperatures and pressures
(2) Homogeneous stackup
cause circuitry to float
Example ± 6dk core with 6dk unclad
(4) High viscosity of PTFE not ideal for
(3) Low moisture absorption, high
encapsulating
copper
Teflon insensitive to heat while
the rubber in
the
Temperature stability
of pureoxidizes
PTFE and(5)
4000 series
turns
FEPyellow.
bonding prone to melting during
(4) Capable out to very high frequency
drilling, thermal reliability problems
(6) High loadings of PTFE ĺ drill smear
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Fiberglass Reinforced PTFE Laminate Thermal Expansion
Rapid Acceleration
Of Z axis expansion
Fusion Bonding
Fusion Bonded Multilayer
T
Fusion bonding may cause change in dielectric thickness,
dielectric constant, and build in residual stress
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Fusion Bonded Multilayer
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FEP fusion bonded Multilayer
Teflon insensitive to heat while the rubber in the
4000 series oxidizes and turns yellow.
Pad distortion during high temperature lamination and
Remelting of the FEP film during drilling can lead to
Pad /post reliability questions
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Ceramic filled PTFE/fastRise27
(215ºC Lamination)
Plating Nodule
Low temperature lamination ± no pad/post distortion
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Ceramic filled PTFE/Speedboard C
(215ºC Lamination)
Low temperature lamination ± no pad/post distortion
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Fabricating with High PTFE Content
Laminates and Thermoplastic Films
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Drilling / Plating Defects (FEP Bonded multilayer)
Does the melting of the thermoplastic film cause all these
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Problems with High Resin Content PTFE and
Thermoplastic Films (RO5880, TLY5 etc)
‡ PTFE (gel = 325C), FEP (mp = 255C), and
3&7)(PS &«PHOWGXULQJGULOOLQJ
‡ Melting or softening causes smearing of
thermoplastic across posts
‡ Plating chemistry does not get a 3 point
connection to pad, worst case an open
Taconic fastRise27-TSM29/epoxy hybrid
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TSM29
FR27
TSM29
FR27
7628
based
FR4
FR27
TSM29
FR27
A balanced construction with a low glass content will lie flat
and conform to the higher modulus FR4
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Unbalanced Hybrid subassemblies or pwbs may
warp, crack, bow, twist, and delaminate
FR4
Other
Unbalanced construction leading
To stress induced delamination
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Temperature of Decomposition
Various thermoset Prepregs vs PTFE Benchmark
Pure PTFE fiberglass Laminate
TLX-9
fastRise27
Td (2% = 377ºC)
Td (5% = 421ºC)
Speedboard C
Td (2% = 125)
Td (5% = 236)
TPG30
Td (2% = 288ºC)
Td (5% = 366ºC)
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Effect of Thermal Aging on Dielectric Constant
(PTFE vs RO4003 series rubber)
Effect of Thermal Aging on Dk at 195C
3.520
3.500
3.480
RF-34 Mode 1
RF-34 Mode 3
3.460
Dk
RF-34 Mode 5
RO-4003 Mode 1
3.440
RO-4003 Mode 3
RO-4003 Mode 5
3.420
3.400
3.380
0
2
4
6
8
Time (Days)
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10
12
14
16
Effect of Thermal Aging on Dissipation Factor
(PTFE vs RO4003 series rubber)
Effect of Thermal Aging on Df at 195C
0.0050
0.0045
0.0040
RF-34 Mode 1
0.0035
RF-34 Mode 3
Df
0.0030
RF-34 Mode 5
0.0025
RO-4003 Mode 1
0.0020
RO-4003 Mode 3
RO-4003 Mode 5
0.0015
0.0010
0.0005
0.0000
0
2
4
6
8
Time (Days)
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10
12
14
Z axis Expansion and Reliability
(standard ED copper expands 3.5%)
TLY
TLY
TLY does well in a lot of thin multilayer applications
Z axis expansion is not the whole story!!!!
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How does Modulus affect the stress on solder joints?
<RXQJ¶VPRGXOXVLVGLUHFWO\UHODWHGWRVWUHVV
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Thermoset vs Thermoplastic Z Axis Expansion
Thermoset
Tg (glass transition)
PTFE
Thermoplastic
ceramic filled
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Copper Line Width Variations
Inconsistent etching can lead to varying trace width, varying distances
between trace widths, copper nuggets left behind in laminate
VKDGRZFRSSHUWKDWFDQDWWUDFWRWKHUSODWLQJFKHPLVWULHVVKDGRZ(1,*«
««UHDOSUREOHPIRUILQHOLQHVDQGVSDFHV
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Copper Roughness Considerations
25
Skin depth
TL32 With Various Copper (16 mil DT)
20
0
15
-0.2
G (Pm)
5
10
20
TLCO16
-0.6
TLH116
TLSH16
-0.8
0
0.01
0.10
1.00 GHz
10.00
TLHH16
-1
100.00
-1.2
GHz
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30
TLS116
-0.4
dB/in
10
0
Sequential Laminations Enable Buried
Vias and Elimination of Stubs
(IPC Technology Roadmap 2000-2001)
9 Thermal reliability of prepregs necessary for multiple
Lamination cycles, high temp 260C lead free reflow
temperatures and multiple rework cycles
9 Buried and blind vias with no stubs offer smoothest
via transitions
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Summary
Many Variables Affect Stripline RF Performance and Reliability
‡ Via Design and Registration to pads critical to
performance
‡ Low temperature lamination an advantage to maintaining
dimensional control, reducing stress in finished pwbs and
reducing costs
‡ A lot of hidden factors like copper roughness and smooth
etching affect RF performance
‡ Less obvious factors like low modulus, high drill quality
affect reliability
‡ Final pwb quality will vary significantly with the fabricator
‡ Many variables not captured on any data sheet
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