Shankar R et al., International Journal of Advanced Engineering Technology E-ISSN 0976-3945
Research Paper
DESIGN SIMULATION AND ANALYSIS OF CLASS E
POWER AMPLIFIER
1
Shankar R, 2John Wiselin, 3Divya Selvathurai
Address for Correspondence
Research Scholar, Bharath University
2
Professor and Head, Department of EEE,Vidhya Institute of Technology, Thrissur
3
Rajalakshmi College of Engineering, Chennai, India
1
ABSTRACT
A new design methodology of Class E power amplifier is proposed in this paper which operates to broadband range of
6.78MHz-2.45GHz. The Broadband model is accomplished by high power and low power transistor. The Efficiency of the
power amplifier is increased by increasing the order of the input and output matching network. A GaN-HEMT transistor is
used for the high power, which is carefully modelled and characterized to prescribe the optimal output impedance for the
broadband Class-E operation. GaAs HBT is used for low power design. The circuits are simulated using Advanced Design
Systems (ADS-2011).
1
INTRODUCTION
A power amplifier is an amplifier, which is capable
of providing a large amount of power to the load such
as loudspeaker, or motor. It is essential in almost all
electronic systems where a large amount of power is
supplied to the load. The power amplifier is used as a
last stage in as electronic systems. The PA is more
commonly known as audio amplifier. It will be
interesting to know that a power amplifier does not
actually amplify the power. But indeed it takes power
from the d.c power supply connected to the output
circuit and converts it into useful ac signal power.
The power is fed to the load. The type of ac power
developed .at the output of a power amplifier, is
controlled by the input signal. Thus it is said that
power amplifier is a dc to ac power converter whose
action is controlled by the input signal. The power
amplifiers are also known as large signal amplifiers.
This term is used because these amplifiers use a large
part of the ac load line for operation.
Design of the art of Microwave Power Amplifier
(PA) is very challenging to researchers, as it requires
for providing high power with high efficiency. PA is
generally a dc to ac converter which is driven by its
input signal. During last few years, the field of
interest of microwave design has shifted to
monolithic circuit from the arena of hybrid
components; this reduces the cost of PA. This change
is due to the advancement of semiconductor
technology which makes the monolithic designs to be
delivered in the hardware as they are manufactured in
bulk numbers. Thus the substrates employing
monolithic circuits are selected by system
requirements. The other cause is that all RF and
Microwave Designs can easily be implemented by
CAD methods, which improves the circuit-modeling
techniques. These changes make the Microwave
Monolithic Integrated Circuits (MMIC) to be “time
to market”. Few applications involving large active
element of phased array antenna design considers
“efficiency” to be an important factor. Handheld
communicating equipment has PA in the transmitter
output stage. This application translates high
efficiency by low power consumption, less heat
dissipation, and smaller size. Researchers spurred
interest on Class-E PA, which provides high
efficiency topology. Class-E amplifier is a nonlinear
switching type PA makes transistor to act as a switch.
The design of MMIC generally employs Advanced
Design System (ADS) simulator for simulation of
circuits.
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With the increase in the use of hand held
communication devices, a high efficiency power
amplifier is needed at the transmitter output stage.
Low power application circuit generally considered
to have low efficiency when compared with high
power circuits. Application such as telemetry of
biological signals involves low power with low
supply voltage into it. Low power PA circuits used in
this transmission application require larger loads to
match with the output, with high DC feed inductance
when compared to high power amplifiers. Thus the
power amplifiers designed for low power application
has lower efficiency than high power circuits. In
concern with the above application, the motivation of
this research is to design a power amplifier with high
efficiency and low power consumption. This is
accomplished by Class-E PA designs which provides
high efficiency irrespective high power or low power
applications.
The following are the reasons to choose class E PA.
 The class E amplifier is designed to provide
high efficiency, and it is typically used at
high frequencies. The class E amplifier uses
an inductor to connect to the supply voltage,
and a shunting capacitance across the switch
to shape the standard waveforms for both
voltage and current and decrease the power
loss, thus, providing a better efficiency than
Class D at high frequency. Compared to
Class D, it is also less sensitive to the
transition time of the switch.
 Class E power amplifiers can be designed
with a small size, light weight and relatively
tolerance to circuit variation.
 Furthermore, class E amplifier can be
designed depending on the demand, such as
specific frequency, narrow band operation.
 Similar to Class D, all class E power
amplifiers are called power converters.
 In these circuits, the driving signal causes
switching of the transistor, but there is no
relationship between the amplitudes of the
driving signal and the output signal.
 Thus these makes the choice of selecting the
Class E amplifier over other Classes of
operation .As the project aims in achieving
the high efficiency of PA the option of Class
E is the better choice for the work to be
carried out. The proposed work has Class E
PA for providing high efficiency to the low
power application.
Shankar R et al., International Journal of Advanced Engineering Technology
The various problems that are analysed in the design
of PA are stated below:
 Optimizing PA with high efficiency with
low power level is critical.
 Selection of the higher order of matching
network has not been yet used in the
broadband design.
 Variation in supply voltage affects the
linearity of power amplifier which needs to
be taken into consideration.
 Switching speed plays a vital role in
selection of switch topology which directly
affects the efficiency of the PA.
 Inductance constraint has been a critical
problem in the design.
2
REVIEW OF PREVIOUS WORKS
Frederickh. H Raab (1977) present the idea of the
class E tuned power amplifier consists of a load
network and a single transistor that is operated as a
switch at the carrier frequency of the output signal.
The simplest type of load network consists of a
capacitor shunting the transistor and a series-tuned
output circuit, which may have a residual reactance.
Circuit operation is determined by the transistor
when it is on, and by the transient response of the
load network when the transistor is off. The basic
equations governing amplifier operation are derived
using Fourier series techniques and a high-Q
assumption.
Sokal (1975) gave us the idea of new class of high
efficiency tuned single ended switching Power
Amplifiers. The new class of amplifiers described
here is based on a load network synthesized to the
transient response which maximizes power efficiency
even if the active device switching times are
substantial fractions of the ac cycle. The new class of
amplifiers, named Class E is defined and is illustrated
by a detailed description and a set of design
equations.
Kenle Chen et al. (2011) have given the clear idea of
the Broadband Class-E amplifier designs. In this
paper the authors presents a new design methodology
for designing and implementing high-efficiency
broadband Class-E PA using high order low pass
filter prototype. GaN transistor has been
characterized and modelled to perform the operation
of broadband Class-E amplifier. The circuit is
accomplished by the matching network provided in
it. A sixth order low pass filter matching network is
designed and implemented for the output matching,
which provides optimized fundamental and harmonic
impedances within an octave bandwidth. PA is
realized from 1.2 to 2 GHz with a measured
efficiency of 80%-89% which is said to be the
highest reported today for such a bandwidth. An
overall PA bandwidth of 0.9- 2.2 GHz is measured
with 10-20W output power, 10-13 db gain and 63%89% efficiency throughout the band.
Jun Tan,Chun et al (2012) has given the idea of
obtaining high efficiency in PA. This Paper presents
a fully integrated 2.4GHz PA for short distance
communication has been implemented using 0.13μm
CMOS technology. Here the author presents a new
methodology in the design of class –E amplifier with
a π- matching output network. The inductance
constraint is removed by DC Feed Inductance instead
of RF –feed. The measured output power varies from
-3.2 to 5.7dBm while achieving maximum overall
Int J Adv Engg Tech/Vol. VII/Issue III/July-Sept.,2016/05-12
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efficiency of about 55% including the auxiliary predriver stage. The input given to the driver is the
CMOS inverter. The proposed circuit by the author is
optimized for delivering low output level with high
efficiency and allow for fully integrated circuits. The
author also discussed the analytical equations of the
Class-E amplifier.
Zhisheng et al(2012) ,the authors describes about the
switching behaviour of Class-E PA. In this work the
losses in Class-E amplifier with DC feed inductance
were analysed. By the combination of a dynamic
supply voltage and a dynamic cascode bias voltage,
high drain efficiency is achieved over a wide power
control range, covering from 2.2 up to 20 dBm. Fast
envelope switching is obtained by adding a single
switch to the common-gate nodes of both the Class-E
stage and the second driver stage. The design of the
art of work is done at 2.45GHz differential cascode
Class-E PA in 0.18-μm CMOS with on-chip dc-feed
inductor. At 20 dBm, a power-added efficiency as
high as 43.6% was measured.
Kuei-Cheng Lin and Hwann-Kaeo Chiou(2013)
presented the idea wafer level bonding of PA. The
aim of the work is to produce a complementary metal
oxide semiconductor (CMOS) power amplifier (PA)
using a wafer-level bond wire spiral inductor with
high-quality factor(Q). The proposed inductor with
2.75-nH inductance achieves a Q of 18, which is
three times as much as that of a conventional CMOS
standard spiral inductor at 2.4 GHz. The Q of the
inductor is over 15 from 2 to 14 GHz. The output
power and power-added efficiency of the PA with the
inductor are improved by 1.5 dBm and 7% as
compared with those of the fully integrated CMOS
PA.
Munir M. et al (2008) gave us the idea of using the
selection of matching network in low power
application. This paper presents a fully integrated, 2.4
GHz class-E power amplifier (PA), with a class-F
driver stage. The circuit was fabricated in a standard
0.18 μm CMOS technology. Measurement results
show a maximum drain efficiency of 38 % and a
maximum gain of 17 dB.When operating from a 1.2
V supply, the PA delivers an output power of 9 mW
with a power-added efficiency (PAE) of 33 %. The
supply voltage can go down to 0.6 V with an output
power of 2 mW and a PAE of 25 %. The circuit also
has a second output to test the effects of using an on
chip filter in low-power designs. It gives the idea of
implementing the power amplifier to biomedical
application where the concern of low power
consumption is taken into account.
Ray Pengelly et al (2008) the choice of selection of
transistor for the broadband designs is given by the
author. This presentation gave us the idea of GaN
HEMT( Gallium Nitride High Electron Mobility
Transistor) its characteristics ,attributes compared to
that of other transistor. The Analysis of the transistor
such as large signal analysis and small signal analysis
are derived and their schematic is simulated using
Advanced Design Software (ADS) is given. The
transistor modeled is checked for DC Analysis, Load
Pull Analysis.
K.L. Kotzebue (2011), A technique for the design of
broadband microwave transistor power amplifiers is
presented that utilises the powerful methods of
network synthesis to achieve optimum large-signal
performance. Only two large-signal transistor
Shankar R et al., International Journal of Advanced Engineering Technology E-ISSN 0976-3945
measurements per frequency are required to achieve
a good analytic model of the transistor's variation of
added power with load impedance, and a mapping
function is presented that translates this added-power
characteristic into an equivalent linear-circuit
reflection-coefficient characteristic. With this
representation, methods of linear-network synthesis
are used to obtain circuits which optimise the
amplifier's added-power efficiency over a broad
range of frequencies. The design technique has been
experimentally verified by the characterisation,
design and construction of a BJT amplifier of nearoctave bandwidth centred at 1 GHz, with the largesignal performance in good agreement with that
predicted by the design theory.
Acar (2007) presented the analytical design equations
in this paper for Class-E power amplifier taking into
account both finite drain inductance and switch on
resistance .The analysis indicates the existence of
infinitely many design equations; and the conclusions
given by them are based on Class-E conditions (e.g.
zero voltage and zero slope) can be satisfied in the
presence of switch-on resistance. The drainefficiency
(η) of the Class-E power amplifier is upper limited
for a certain operation frequency and transistor
technology. Using a finite dc-feed inductance instead
of an RF-choke in a Class-E power amplifier can
increase η by ≈ 30%.
3
PROPOSED BROADBAND PA DESIGN
The Class E PAs are classified into different types
depending upon the Input and output Matching
Network they are designed depending upon the
requirements.
The Designs are as follows
 Narrowband amplifier Design
 Broadband amplifier Design
 High gain amplifier Design
 Maximum gain amplifier Design
 Low-noise amplifier Design
 Minimum noise amplifier Design
 Multistage amplifier Design
The Proposed Design chooses the matching network
of Broadband amplifier Design and Narrowband
amplifier Design.
Broadband amplifier is essentially a flat response
(generally no resonant element) over a wide range of
frequencies–one to several octaves or decades of
bandwidth. In the Narrowband design as the series
LC resonator has a limited frequency response. The
Fourier series expansions of Class E indicates that the
optimum load impedance is frequency varying. The
Topology of Broadband Amplifier is given in Figure
3 .The Broadband Class-E PA when it is
implemented two problems is to be addressed.
 Matching network is needed to
transform Z0 to ZE for the switch –
capacitor tank over a significant
bandwidth, e.g.,>50%
 A Broadband filter, whose pass band
covers the desired bandwidth, is needed
to provide infinite Impedance as
Harmonic frequencies replacing the LC
resonator.
The switching behavior, characteristics of Class E
amplifier is not achievable at the gigahertz frequency.
This is due to the non-ideal effects of transistor and
non-square wave driven signal at the input. But in
Int J Adv Engg Tech/Vol. VII/Issue III/July-Sept.,2016/05-12
practical case the transistor is biased at the pinch-off
point.
Fig 1. Topology of Broadband Class E PA
So the input signal should be sufficiently large to
make the transistor switched on during the positive
half duty cycle and make it off during the negative
half duty cycle. The Design of the Broadband
Amplifier is very critical to the researchers as it
needs to work over for an octave bandwidth. It is
notorious that the bandwidth of the conventional
topology of broadband amplifier’s matching network
design is limited to only one octave, as the second
harmonic of the low-end fundamental will occur in
the pass band if the bandwidth is above one octave.
To achieve a multi octave bandwidth, one can design
multiple matching networks for different bands. The
Proposed design which produces higher efficiency by
increasing the order of matching network. The design
methodology is carried out as the steps described in
power amplifier design.
The First Step in the design of a Power Amplifier is
to select a proper device for the operation to be
carried out. The suitable transistor for Broadband
Amplifier is GaN-HEMT. To date GaN HEMTs have
been applied in numerous high-efficiency broadband
PA designs. In order to choose a transistor for
designing a Power Amplifier it involves a various
design procedure into it.
 DC and Load line analysis
 Bias and Stability
 Load Pull Analysis
 Impedance Matching
Gallium nitride power transistors have very high RF
power densities which range from 4 to 12 watts per
mm of gate periphery depending on operating drain
voltage. Even though GaN/AlGaN on SiC substrates
have high thermal conductivity it is necessary to be
aware of channel temperature rise incurred by both
DC and RF stimuli when designing power amplifiers.
Thermal management is even more important for
broadband amplifiers (a very popular application)
where drain efficiencies can vary considerably as a
function of frequency. In general, GaN transistors
exhibit high breakdown voltage, low and voltageindependent output capacitance, and low turn-on
resistance these characteristics are very important for
realizing
high-efficiency
switch-mode
PAs.
However, current commercially available GaN
HEMTs that are appropriate for discrete designs are
typically packaged. Their packages often introduce
non negligible parasitic. The GaN-HEMT transistors
are manufactured by two foundries such as Cree and
RFMD.
4
SIMULATION ANALYSIS OF THE
PROPOSED PA
The Proposed design of broadband amplifier the
efficiency of the circuit is increased by increasing the
order of the matching network. The input matching
Shankar R et al., International Journal of Advanced Engineering Technology
network is taken to be the order of six and the output
matching network is chosen to be the order of three.
4.1
MODEL OF GAN-HEMT
As the model of this transistor is not available in the
simulator the modeling of transistor is done with the
large signal analysis of FET-Model as shown in
Figure 5.5 with the values specified in the datasheet.
But in the simulator the modeling of transistor is not
possible with the design. It can be done if the
specifications are provided by the manufacturer
E-ISSN 0976-3945
the particular voltage is found using this analysis.
The characteristics of transistor are verified using this
analysis.
Fig 4.DC Analysis of RF3931-Schematic
Fig 2. Large Signal Modelling of GaN-FET
The design kit of RF3931 provided by the RFMD
manufacturer is imported into the Simulator for
further simulation designs is shown in Fig 5.6. The
transistor resembles the same as it is commercially
available in the market.
Fig 3.RF3931 Transistor in ADS.
4.2
DC AND LOAD LINE ANALYSIS
This analysis is performed to verify the minimum and
maximum voltage that the transistor requires to
perform the operation. The Id-Vgs curve that is
obtained for that particular transistor is plotted. The
load line plot helps to find the power consumption at
Fig 5.DC Analysis of RF3931-Results
4.3
BIAS AND STABILITY
Proper Bias network design is essential for any nonlinear circuit design as it is essential to ensure that
right amount of bias reaches the device and also it
doesn’t load/leak the desired RF energy. Choice of
bias network topology is pretty much dependent on
the frequency of operation. For lower frequencies
designers can use Inductors/Choke in the DC bias
path and for higher frequencies high impedance
quarter wavelength line is the preferred choice.
Necessary and sufficient conditions for device to be
stable are:
Stability Factor (K) > 1
Stability Measure > 0
Fig 6.Biasing of RF3931-Schematic
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Shankar R et al., International Journal of Advanced Engineering Technology E-ISSN 0976-3945
then sweep impedance / reflection coefficient of load
over certain section in smith chart to characterize
Output Power, PAE, IMD (with 2-tone LoadPull)
etc., to find out our optimum impedance to be
presented to device and then accordingly perform
impedance matching network design.
Fig 7.Stability Factor-Results
Fig 8 .Stability Measurement-Results
4.4
LOAD PULL ANALYSIS
Load Pull is a very commonly used and preferred
analysis for PA design applications. Load Pull is the
technique during which we keep source impedance
and source power is kept constant at certain level and
Fig 9.Loadpull Measurement RF3931Schematic
Fig 10.Results of RF3931-Loadpull Measurement
4.5
IMPEDANCE MATCHING AND S PARAMETER ANALYSIS
This is usually done with the smith chart in order to find the input and output matching network for the amplifier
design. The circuit is designed with the help of impedance calculated with the particular frequency .This
Analysis is performed to find the input reflection coefficient (S11), reverse voltage gain (S12), forward voltage
gain (S21), output reflection coefficient. The gain at the particular frequency is found using with this analysis.
Fig 11.S Parameter analysis of RF3931-Schematic
The S2P files are imported from the datasheet of vendor, to check whether the data coincides with the required
values. The output obtained for the different frequencies are given in the table 1 and 2.
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Table 1. Forward voltage gain of RF3931
Table 2 . Input Reflection Coefficient of RF3931
4 .6 Power Amplifier Designed With Rf3931
With the various analysis performed as mentioned above the designing of Power amplifier with RF 3931 is
made. The circuit is tested with the test bench of power amplifier in the simulator is shown in Fig .The circuit
works to the broadband range of 0.6-2.4GHz.
5
Fig 12.3GPP FDD RF power amplifier power added efficiency test bench
RESULTS AND DISCUSSION
Fig 13.Results of RF Power added vs Source power
The power amplifier designed is worked to the range of 0.6-2.4GHz the input and output reflection coefficient
and the forward and reverse transmission coefficient measured is shown in Fig 14 (a) and (b).
(a)
(b)
Fig 14 (a)Input Reflection coefficient of RF3931 Power Amplifier (b)Reverse Transmission of
RF3931Power Amplifier
6
LAYOUT GENERATED FOR RF3931 POWER AMPLIFIER DESIGN
The schematic mentioned above involves input and output matching network to balance the transistor. The
layout of the above schematic is shown in Fig 5.19
Fig 15.Layout of Transistor via Grounds
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Fig 16.Layout of Lumped Components
Fig 17.Layout of the complete design with measurement
7
CONCLUSION
The Idea of designing a Power Amplifier involves various analysis procedures which help to design a perfect
impedance matching network is discussed in detail. As per the objective of this project, the narrowband design
of 2.4GHz and the Broadband design of 0.6-2.4GHz were designed. Both these designs were simulated using
Advanced Design Software (ADS 2011.10) and analysed the Parameter such as Power Consumption, gain,
output power, S-Parameter, Impedance, Efficiency etc. The various analyses such as DC Analysis, Stability
Analysis, Load Pull Analysis, Impedance matching analysis, Smith chart analysis were performed to measure
these parameters. The Narrowband Power Amplifier is designed using BSIM model transistor, and the
Broadband Power Amplifier for high power Application is designed using RF3931 GaN-HEMT and for low
Power Application SXA3489BZ is used. From the DC Analysis of Narrowband and Broadband Power
Amplifier, the Power consumption is measured. It is found to be 0.010W with 1V power supply for BSIM
model Transistor, with 48V supply for RF3931 GaN HEMT 1.732 power consumption is measured. An
efficiency of 55% is calculated and plotted for Narrowband Design. for broadband power Amplifier design 65%
drain efficiency is calculated for RF3931and 43%for SXA389BZ.The maximum gain is 18.5 dB at 850MHz for
SXA389BZ,and the maximum gain 15dB at 2GHz for RF3931. The layout is generated for both RF3931 and
SXA389BZ power amplifier designs. As the broadband is fulfilling the narrowband range only the broadband
power amplifier design is taken for fabrication.
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