894
IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 50, NO. 4, APRIL 2003
Design and Performance of Tunnel Collector HBTs
for Microwave Power Amplifiers
Rebecca J. Welty, Member, IEEE, Kazuhiro Mochizuki, Senior Member, IEEE, Charles R. Lutz, Roger E. Welser, and
Peter M. Asbeck, Fellow, IEEE
Abstract—AlGaAs/GaAs/GaAs and GaInP/GaAs/GaAs n-p-n
heterojunction bipolar transistors (HBTs) are now in widespread
use in microwave power amplifiers. In this paper, improved HBT
structures are presented to address issues currently problematic
for these devices: high offset and knee voltages and saturation
charge storage. Reduced HBT offset and knee voltages (
and
) are important to improve the power amplifier efficiency.
Reduced saturation charge storage is desirable to increase
gain under conditions when the transistor saturates (such as in
over-driven Class AB amplifiers and switching mode amplifiers).
It is shown in this paper that HBT structures using a 100-Å-thick
layer of GaInP between the GaAs base, and collector layers are
to 30 mV and
measured at a
effective in reducing
collector current density of 2 104 A cm2 to 0.3 V (while for
conventional HBTs
= 0 2 V and
= 0 5 V are
typical). A five-fold reduction in saturation charge storage is
simultaneously obtained.
Index Terms—GaAs/GaInP, heterojunction bipolar transistors,
saturation charge storage, switching mode microwave power amplifiers, tunnel transistors.
I. INTRODUCTION
G
aInP/GaAs/GaAs n-p-n heterojunction bipolar transistors
(HBTs) are now in widespread use in microwave power
amplifiers. Amplifier efficiency is a key issue, particularly problematic at low power supply voltages. In representative mobile
handset applications, Class AB amplifiers are predominantly
used as a compromise between the requirements for high linearity and efficiency. With battery voltages of 3 to 5 V, these amplifiers are generally limited to an efficiency of 35–40% in linear
applications, such as code divison multiple access (CDMA),
and 55 % in saturated output applications, such as the global
system for mobile communications (GSM) family of standards.
To improve the amplifier efficiency, it is important to reduce
the HBT offset and knee voltages, which yields a larger available voltage swing. For saturated output applications, higher efficiency can also be obtained with overdriven Class B, Class F,
and switching-mode amplifiers, whose efficiency can reach over
Manuscript received August 27, 2002; revised December 3, 2002. This work
was supported in part by the U.S. Army Research Office. The review of this
paper was arranged by Editor C.-P. Lee.
R. J. Welty is with the Lawrence Livermore National Laboratory, Livermore,
CA 94550 USA (e-mail: welty2@llnl.gov).
P. M. Asbeck is with the University of California at San Diego, La Jolla, CA
92037-0407 USA.
K. Mochizuki is with the Central Research Laboratory, Hitachi, Ltd., Tokyo
185-8601, Japan.
C. R. Lutz and R. E. Welser are with Kopin Corporation, Taunton, MA 02780
USA.
Digital Object Identifier 10.1109/TED.2003.812088
70% at microwave frequencies. Bipolar transistors are not typically used in these modes because of the large saturation charge
storage, which occurs when the device is in the “on” state. When
the bipolar transistor switches into saturation, holes diffuse into
the collector from the base. The stored charge must be eliminated before the device can switch off [1], which introduces a
significant switching delay. In order to improve the performance
of these types of amplifiers, it is necessary to reduce the HBT
saturation charge storage.
Fig. 1 shows a calculated energy-band diagram for a representative single HBT (SHBT) and double HBT (DHBT)
(wide bandgap material in the collector region) using the
GaAs/GaInP material system. The calculated energy band
diagrams in this work were done with a one-dimensional (1–D)
Schrödinger/Poisson Solver. The SHBT has numerous features
that make it attractive for use in power amplifiers, including
high microwave gain, high output power per unit-chip area,
and high ruggedness. However, the SHBT has the drawbacks
of a high offset voltage and saturation charge storage because
of the homojunction base–collector junction. The DHBT has
advantages due to reduced offset and knee [1], [2] voltages, as
well as reduced saturation charge storage due to the sizable valence-band discontinuity at the base–collector heterojunction.
The wide bandgap GaInP material in the collector region of the
DHBT also provides a 1.6 time increase in breakdown voltage
over that of GaAs due to the larger breakdown field [3]. However, a prominent design challenge for DHBTs is to eliminate
the barrier at the base–collector junction, which blocks carriers
from reaching the collector, causing a significant decrease in
(that in
both the peak collector current and gain as well as
). The tunnel-collector HBT
turn leads to a reduction in
(TC-HBT) presented here addresses the requirements of low
offset and knee voltages and reduced saturation charge storage,
while maintaining good electron transport at the base–collector
junction. Although GaInP has a smaller electron velocity than
GaAs, the thickness of GaInP added to the collector of the
of the device remains high.
TC-HBT is at a minimum, so the
The increase in thermal resistance, which exacerbates thermal
runaway problems, that is expected for thick GaInP collector
layers is also avoided.
Various research groups have used tunnel and barrier layers
to design high-performance HBTs [4]–[8]. DC characteristics
of collector-up (C-up) TC-HBTs have been reported [4]. These
devices have almost zero offset voltage due to the asymmetry
of the band discontinuity between GaInP and GaAs, depending
on the growth direction. GaAs grown on GaInP has a smaller
than GaInP grown on GaAs; therefore a C-up approach
0018-9383/03$17.00 © 2003 IEEE
WELTY et al.: DESIGN AND PERFORMANCE OF TUNNEL COLLECTOR HBTs
895
Fig. 2. Energy-band schematic of a mass filter. Tunneling of electrons is
permitted (smaller barrier and effective mass), but tunneling of holes (larger
barrier and effective mass) is suppressed.
Fig. 3.
Fig. 1. Calculated energy-band diagrams for a representative (a) SHBT and
(b) DHBT in the GaAs/GaInP material system using E (GaAs) = 1:42eV and
E (GaInP) = 1:89eV. The conduction band discontinuity is taken to be 0.18
eV with the remaining difference in the valence band.
will have a smaller amount of electron blocking at the base–collector (BC) junction. The smallest offset voltage can be achieved
at the BC junction.
using a C-up approach due to minimal
Emitter-up (E-up) TC-HBTs are inherently easier to fabricate,
however. To date, RF characteristics of E-up TC-HBTs have not
been reported. In this paper, RF results on TC-HBTs are presented, which show that these devices are promising candidates
for higher efficiency power amplifiers.
In this paper, high-performance TC-HBTs are demonstrated
with a 100-Å-thick tunnel layer between the base and collector.
These devices have low offset and knee voltages of
mV and
V at a representative collector current
density of 2 10 A cm , respectively, together with a high dc
peak incremental current gain of 200. For small area devices
10 A cm , the
at a collector current density of
of 76 GHz and
of 89 GHz. In comparTC-HBT has an
ison with conventional GaInP/GaAs HBTs, these devices have
a five-time reduction in saturation charge storage.
II. DESIGN CONSIDERATIONS
The aim of the TC-HBT is to combine the positive attributes
of SHBTs and DHBTs into one device by reducing the thickness of the wide bandgap material in the collector to a minimum,
such that electrons can tunnel through the base–collector con-
Calculated energy-band diagram of a representative TC-HBT.
duction-band barrier, but simultaneously kept large enough so
that it blocks holes in the base from diffusing into the collector
when the base–collector junction is forward biased. The approach is based on the “mass filter” concept, as shown in Fig. 2.
) to
Electrons having a smaller effective mass and barrier (
tunnel through will have a higher tunneling probability than the
) to tunnel
holes, which have a larger mass and barrier (
through. In doing this, the majority of advantages of SHBTs
and DHBTs are combined into one device. The TC-HBT design
will allow reduced offset voltage, knee voltage, and saturation
charge storage compared with a conventional GaAs collector.
A calculated energy-band diagram for the TC-HBT is shown in
Fig. 3.
The TC-HBT design depends on the relative tunneling probabilities for electrons ( ) and light holes ( ) through barriers
and
. For simplification, the barrier at
of magnitude
the base–collector junction can be approximated as a square barrier; then, the tunneling probability is expressed in (1) and (2)
is the size of the barrier, is the incident energy,
[9], where
is the thickness of the barrier, is Planck’s constant, and
is the wave vector, which is dependent on the above-mentioned
parameters, as well as the effective mass of the carrier in the
tunnel layer
(1)
(2)
eV and
According to these expressions, using
eV for the heterojunction between GaAs and dis[10] and
ordered GaInP, and
896
IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 50, NO. 4, APRIL 2003
[9] for GaInP, the ratio
is 4 10 for an incident eneV. The ratio of
for a 50-, 100-, and
ergy of
, there is ade200-Å barrier is shown in Fig. 4. For large
quate suppression of holes diffusing into the collector and small
. If the barrier is too thick, then the electron transport will
be impeded, causing the knee voltage to be increased. Experimentally, we have found that a device with a 200-Å-tunnel layer
does block electrons at the base–collector junction, as determined from a significant increase in the amount of output conductance in the common emittercurrent–voltage ( – ) curves
for the 200-Å tunnel layer compared to the 100-Å tunnel layer
device. In this paper, a 100-Å tunnel layer is used. A 50-Å spacer
layer is inserted before the tunnel layer to further lower the conduction band, which eases the tunneling requirements for electrons.
The TC-HBT epilayer structure is shown in Table I. For
comparison, an SHBT was processed at the same time, with an
identical epilayer design with the exception of the tunnel and
spacer layers. The TC-HBT device design uses the GaAs/GaInP
material system using disordered GaInP lattice-matched to
GaAs with an indium composition of 0.5. GaInP can be
selectively etched (using HCl) over GaAs, which makes the
device etching routine. The device processing was done with
a nonself-aligned conventional process using wet chemical
etching, contact lithography, electron-beam metal evaporation,
and polyimide for the interlayer dielectric.
Fig. 4. Calculated transmission ratio T =T for a GaInP square barrier with
GaAs on both sides using the following values: E
:
eV, E
eV, m
:
m , m
:
m .
:
0 29
= 0 092
= 0 145
1
= 0 18
1
=
TABLE I
EPILAYER STRUCTUREOF THE TC-HBT
III. DEVICE RESULTS AND DISCUSSION
A. DC Characterization
DC measurements were done to determine the offset and knee
voltages. Fig. 5 shows the common–emitter – curves for the
TC-HBT with a 100-Å tunnel layer and for comparison, an
SBHT. Both devices have excellent peak incremental current
gain: 201 and 218 for the TC-HBT and SHBT, respectively, as
shown in Fig. 6. The TC-HBT has a smaller offset and knee
is related to
voltage than the SHBT. The offset voltage
associated
the difference between the base–emitter voltage
and the base–collector voltage
associated
with a given
with the same amount of forward current of the base–collector
junction. For the SHBT the offset voltage is relatively large because the base–emitter and base–collector heterojunctions are
not electrically symmetrical. In SHBTs, the base–collector is a
homojunction; therefore, the diode current will be due to both
electrons and holes. In DHBTs, by contrast, the base–emitter
junction is a heterojunction, and the only significant contribution to base–collector junction current will be from the electrons
in the emitter diffusing into the base (the holes are blocked by
the valence-band discontinuity). It is the decrease in base–collector current of the DHBT that decreases the offset voltage.
This is illustrated in Fig. 7. When the forward diode current
A cm , the offset voltage is significantly reduced, and
component of the current
at lower current densities, the
dominates and the offset voltage is not significantly reduced.
mV (meaThe TC-HBT has an offset voltage of
and
A), which is a 140-mV resured at
duction compared to the SHBT, as shown in Fig. 5. Expressions
for the offset voltage have been developed, taking into account
the specific device structure [11]–[13]. The expression for offset
voltage can be determined from Ebers–Moll equations [12]
(3)
The first term is due to the emitter resistance. The second term
is due to the difference in collector and emitter geometries. The
third term is from the electrical differences between each junction. For SHBTs, the difference in electrical junctions is the
dominant term. The ratio of collector to emitter geometries for
. This term
the layout of the device in Fig. 5 is
mV. Therefore, the TC-HBT
alone results in a
with a 100-Å tunnel layer is effective to reduce the difference
in diode current between the base–emitter and base–collector.
In order to further reduce the offset voltage, scaling of the collector to emitter layout geometries should be carried out.
An important determinant of amplifier efficiency is the knee
at which there is a transition between saturation
voltage
and forward-active mode. Emitter and collector resistance plus
the voltage drops associated with any internal barriers will inabove
. The TC-HBT has a knee
crease the value of
V, while the SHBT has a value of
voltage of
WELTY et al.: DESIGN AND PERFORMANCE OF TUNNEL COLLECTOR HBTs
897
Fig. 6. Peak incremental current gain for the SHBT (H
TC-HBT (H
= 201).
= 218) and
Fig. 5. Common emitter I –V curves of the TC-HBT compared to an SHBT.
The insert shows an expanded view of common emitter I -V curves, illustrating
the reduction in offset voltage for the TC-HBT, I = 25, 50, 75, and 100 A.
V, measured at representative operational current densities
of 2 10 A cm . However, the knee voltage of the TC-HBT is
a “soft knee” compared to the SHBT. Nonetheless, the reduction
in the knee voltage of the TC-HBT directly impacts the power
added efficiency (PAE) of the transistor. For example, for class
A, AB, or B operation, the PAE is dependent on according to
PAE
(4)
is the battery supply voltage. Taking
to be 3.4
where
V as appropriate for a Li ion cell, an increase of PAE by 7% may
be expected from the reduction in knee voltage from 0.5 to 0.3
V. This increase in PAE is an important development for HBT
power amplifiers.
Ruggedness is also of importance for power amplifiers. The
breakdown voltage is determined by the avalanche breakdown
in the collector region and is easily varied by changing the
doping and thickness in the collector. However, this is a design
tradeoff with , since as the collector thickness is increased,
the transit time through the collector will increase, which will
of the device. The breakdown characteristics
decrease the
of the TC-HBT were compared to the SHBT. Measurements
V and
show equivalent breakdown behavior:
V.
B. Scattering Parameter Characterization
To further characterize the TC-HBT, measurements were
done to determine the transistors’ cut-off frequency. Scattering
parameter measurements were carried out with on-wafer
probing using an HP8510C network analyzer from 0.5 to 50
10 A cm ,
GHz. At a collector current density of
of 68 GHz and
of
the SHBT control device has an
80 GHz. At the same current density, the TC-HBT has an
of 54 GHz and
of 68 GHz, which are somewhat
lower values than for the SHBT. It is likely that the barrier
to electrons at the base–collector junction decreases slightly
and
of the TC-HBT, as is further discussed in
the
Section III-D. Even though the frequency response is reduced
in the TC-HBT, it is still sufficient for most microwave power
Fig. 7. Diode characteristics of the base–collector junction for the TC-HBT
and SHBT compared to the base–emitter current, showing the reduced offset
voltage for the TC-HBT.
amplifier applications. In fact, the observed gain roll-off for
the TC-HBT is pushed to a higher current density than the
10 A cm , the TC-HBT has a peak
SHBT. At
GHz with a
GHz, as shown in Fig. 8.
C. Saturation Charge Storage Measurements
In SHBTs, holes are blocked from diffusing into the emitter
but not into the collector, when the transistor goes into saturation mode (both base–emitter and base–collector junction forward-biased). The holes that enter the collector will take a finite
amount of time to recombine. This slow recombination process
limits the use of bipolars in many switching circuit applications.
For silicon bipolar transistors, the collector region can be doped
with gold, which forms deep centers [14]. These recombination
centers reduce the recovery time of the saturated diode. However, the added recombination centers will also decrease the
of the device by increasing the charging time of the collector
region.
Saturation-charge storage measurements were done by
Chen et al., showing that the charge storage is reduced for
DHBTs [15]. Here, saturation charge storage measurements on
TC-HBTs are done using the same measurement technique. The
base–collector diode is driven with a sine wave, and the output
voltage response is measured with a high-speed oscilloscope
(HP54120T). Bias tees are used to set up the dc bias condition.
898
Fig. 8.
IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 50, NO. 4, APRIL 2003
Extrapolated f and f
for the TC-HBT.
The base–collector diode was biased at
V. The
input sine wave was at 300 MHz with 8-dBm input power. For
the SHBT, as the diode turns on and conducts forward current,
holes from the base diffuse into the collector, and electrons
from the collector diffuse to the base. The base is doped 10
times greater than the collector. Therefore, the majority of
saturation charge storage is due to holes diffusing from the
base to the collector. When the diode becomes reverse-biased,
the stored charge keeps the diode turned on, and the negative
input voltage causes a reverse current, which extracts the stored
charge. Fig. 9 shows the measured time-domain response
for the SHBT and TC-HBT. The SHBT suffers from charge
storage, which can be seen as the negative dip in the output
waveform. The ideal response is a half-wave sinusoid. From
the data, the TC-HBT has an estimated five–time reduction
in saturation charge storage. The 100-Å tunnel layer in the
base–collector junction of the TC-HBT effectively blocks holes
from diffusing into the collector. This finding opens up the
circuit designer’s freedom to use HBTs in switching mode
amplifiers.
Fig. 9. Measured time-domain response of the base–collector diode. Charge
storage is evident in the SHBT by the dip in the waveform. Charge storage is
= 1:1 V, f = 300 MHz, P =
suppressed for a 100-Å tunnel layer (V
8 dBm).
the output conductance for the TC-HBT is slightly decreased.
Depending on the design of the setback layer and tunnel barrier,
there can also be a component of electrons that accumulate in
a potential well at the base–collector junction, as shown in the
calculated base–collector conduction band diagram in Fig. 10.
D. Barrier Effects
The barrier at the base–collector of DHBTs often significantly blocks electrons from diffusing into the collector. Experimentally, the barrier has been shown to reduce the current gain
of the device, as well as decrease the early voltage [16], [17].
Setback layers and delta doping can be used to decrease the barrier between the base and collector; however, there have been
few attempts in the GaInP/GaAs material system where this was
done successfully [1]. HBTs using GaInP in both the emitter and
collector regions with AlGaAs with varying aluminum compositions across the base have been carried out and shows no evidence of a barrier at the base–collector junction [18].
In the TC-HBT, the barrier at the base–collector junction also
slightly blocks electrons from diffusing into the collector. As a
result, the minority carrier concentration at the collector edge of
the base increases over that which is obtained in an SHBT at a
given current density . In turn, the concentration of electrons
throughout the base will undergo a slight increase. This minority
carrier accumulation leads to reduced current gain and reduced
. The barrier also leads to an increased output conductance in
the – curves (as shown in Fig. 5) for the TC-HBT compared
to the SHBT. With increased
, the barrier is reduced, and
E. Device Design Improvements
The TC-HBT presented in this paper showed excellent dc and
radio frequency (RF) results; however, there is room to reduce
the barrier at the base–collector junction. With a reduced barrier at the base–collector junction, the resulting device will still
, , and
have the benefits of the hole barrier (reduced
saturation charge storage) but can be optimized such that the
electron transport at the base–collector junction is unimpeded.
Two techniques to further engineer the base–collector junction
are outlined here.
Ordered versus Disordered Materials: There is a wide range
of data published for the conduction band discontinuity for the
GaInP/GaAs material system. Most of the reports find
between 30–200 meV [19]–[21]. Some variance in the value
is likely due to the different measurement techniques.
of
However, it is widely accepted that the appropriate value of
is also technology-dependent. These values are believed
to be influenced by compositional variations in the interface regions, as well as by partial ordering of the GaInP [22], with associated changes in band energies and polarization effects [23].
Ordering depends on the conditions under which the growth was
WELTY et al.: DESIGN AND PERFORMANCE OF TUNNEL COLLECTOR HBTs
899
with a barrier layer of 100 Å, the saturation charge storage has
been reduced by a factor of five.
ACKNOWLEDGMENT
The authors wish to thank Peter J. Zampardi of Conexant Systems for insightful discussions and James Li of Rockwell Science Center for assistance with -parameter measurements.
REFERENCES
Fig. 10. Calculated conduction band edge of base–collector junction, with a
100 Å tunnel layer and a 50 Å spacer layer, showing accumulation of electrons
trapped in the spacer layer.
done including growth temperature, V/III ratio, and wafer misorientation. When GaInP is grown in the ordered regime, the
is reported to be smaller than when it is grown
measured
in the disordered regime. However, what fraction of the bandgap
reduction is in the conduction band for the ordered material is
not accurately known. It is critical that the valence band discontinuity remains large enough to block holes from diffusing into
the collector for the TC-HBT.
In this paper, the TC-HBTs were grown in the disordered
regime, which resulted in a small barrier at the base–collector
junction. Using ordered GaInP at the base–collector junction
could significantly reduce the barrier at the base–collector junction; therefore, this would be an ideal solution for the tunnel
layer as well as for DHBTs.
Graded Junctions: It has been reported that the base–emitter
than the base–collector
junction of a DHBT has a smaller
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junction) has the opposite effect and the interface may become
graded due to the incorporation of arsenic in the GaInP. It may
be possible to force the base–collector junction to be graded
by the switching of gases, which occurs naturally at the upper
junction. This technique could be applied to TC-HBTs (as well
as DHBTs) to reduce the barrier at the base–collector junction.
IV. CONCLUSION
The TC-HBT is shown to be an effective approach to combine
the advantages of SHBTs and DHBTs into a single device. The
TC-HBT in this work was implemented with a 100-Å tunnel
layer with an E-up configuration. A peak incremental current
gain of 201 was achieved with this device. The knee voltage is
reduced to 0.3 V, and the offset voltage is reduced down to 30
meV. These reductions are beneficial to power amplifiers op, which will increase the efficiency. The
erated at a small
TC-HBT is capable of high frequency operation; at a current
10 A cm the TC-HBT has an
of
density of
of 68 GHz. Additionally, we have shown that
54 GHz and
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Rebecca J. Welty (S’97–M’02) received the B.S. degree in electrical engineering from the University of
California at Davis (UCD) in 1997. She received the
M.S. and Ph.D. degrees in electrical engineering, specializing in applied physics, from the University of
California at San Diego (UCSD) in 1999 and in 2002,
respectively.
While at UCD, she was involved in developing
fiber optic switches using bulk silicon micromachining techniques. Her dissertation research
focused on the design, fabrication, and characterization of high-speed GaAs-based HBTs. While a student at UCSD, she
was a visiting researcher at Rockwell Science Center in 1998, involved in
GaInP/GaAs DHBT power amplifier fabrication and again in 2000 and 2001,
developing GaInNAs-base DHBTs for reduced turn-on voltage. In 2002, she
joined Lawrence Livermore National Laboratory, Livermore, CA, as a Staff
Research Engineer in the area of optoelectronic device development in InPand GaAs-based materials. Her research interests include device physics and
process technology development.
Dr. Welty won the BCTM best student paper award in 2001 for a paper on
GaInP/GaAs Tunnel-Collector HBTs.
Kazuhiro Mochizuki (SM’99) was born in Tokyo,
Japan, in 1963. He received the B.E., M.E., and Ph.D.
degrees in electronic engineering from the University
of Tokyo in 1986, 1988, and 1995, respectively.
In 1988, he joined the Central Reseach Laboratory,
Hitachi, Ltd., Tokyo. He has worked in the areas of
AlGaAs/GaAs and GaInP/GaAs HBTs, ZnMgSSe
laser diodes, and AlGaAs/GaAs solar cells. His
key emphasis was directed toward development of
high-speed HBTs with buried poly-GaAs and SiO2
and low-resistivity solid-phase-epitaxial contact to
ZnTe. He also worked on reliability of HBTs from the viewpoints of crystallographic orientation and dielectric stress. During 1999 and 2000, he was a
visiting researcher at University of California at San Diego, La Jolla, where
he proposed and demonstrated GaInP/GaAs collector-up tunneling-collector
HBTs and GaN/W/WO3 collector-up metal base transistors. He authored
and/or coauthored over 50 research papers. He is currently working as a Senior
Researcher with the Communication Device Research Department, Central
Research Laboratory, Hitachi, Ltd., Tokyo.
IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 50, NO. 4, APRIL 2003
Charles R. Lutz received the Ph.D. degree in electrical engineering from the University of Massachusetts, Amherst, in 1997. His dissertation research involved the design, fabrication, and characterization
of quantum well devices with an emphasis on intersubband photodetectors and emitters.
He joined Kopin Corporation, Taunton, MA,
in 1996, where he is presently serving as senior
research scientist. His responsibilities include developing new processes for improving the performance
and reliability of III/V-based HBTs as well as
investigating new material systems and structures for high-frequency device
applications. He has authored and/or co-authored over 30 papers in the areas of
semiconductor materials growth and device characterization. He has a strong
interest in experimental and applied research in the area of semiconductor
devices for photonic and high-frequency applications.
Roger E.Welser received the B.S. degree in physics
from Swarthmore College, Swarthmore, PA, in 1989
and the Ph.D. degree from Yale University, New
Haven, CT, in 1995.
He served as a post-doctoral research associate
before joining Kopin Corporation, Taunton, MA,
in 1996. He is presently serving as Director of
Transistor Technology at Kopin Corporation and is
responsible for overseeing the development of new
processes and materials to improve the performance
of III-V HBTs. While working on his dissertation at
Yale University, he was awarded a Graduate Student Researchers Fellowship
from NASA and concentrated his efforts on studying the nucleation process
during MOCVD growth, using InAs-on-GaAs as a model material system.
Peter M. Asbeck (M’75–SM’97–F’00) received the
B.S. and Ph.D. degrees in 1969 and in 1975, respectively, from the Electrical Engineering Department,
Massachusetts Institute of Technology, Cambridge.
He is the Skyworks Chair Professor in the Department of Electrical and Computer Engineering,
University of California at San Diego (UCSD), La
Jolla. He worked at the Sarnoff Research Center,
Princeton, NJ, and at Philips Laboratory, Briarcliff
Manor, NY, in the areas of quantum electronics and
GaAlAs/GaAs laser physics and applications. In
1978, he joined Rockwell International Science Center, where he was involved
in the development of high-speed devices and circuits using III-V compounds
and heterojunctions. He pioneered the effort to develop heterojunction bipolar
transistors based on GaAlAs/GaAs and InAlAs/InGaAs materials and has
contributed widely in the areas of physics, fabrication and applications of these
devices. In 1991, he joined the UCSD. His research interests are in development
of high-speed heterojunction transistors and their circuit applications. His
research has led to more than 200 publications.
Dr. Asbeck is a Distinguished Lecturer for the IEEE Electron Devices Society
and the Microwave Theory and Techniques societies.