Proceedings of the 21st Electric Vehicle Symposium (EVS-21), April 2-6 2005, Monte Carlo, Monaco
Advances in Real-Time Simulation of Fuel Cell Hybrid Electric Vehicles
Christian Dufour1, Jean Bélanger1, Tetsuhiro Ishikawa2, Kousuke Uemura2
1
Opal-RT Technologies Inc. ,1751 Richardson, bureau 2525, Montréal QC, Canada H3K 1G6
Phone. 514-935-2323 (email: christian.dufour@opal-rt.com) http://www.opal-rt.com
2
Toyota Motor Corp. Toyota MACS Inc. tetsu@ishikawa.tec.toyota.co.jp
Abstract – This paper describes the RT-LAB real-time simulator implementation of the Hardware-In-the-Loop simulation of a
fuel cell hybrid electric vehicle system with several 10 kHz converters. The paper demonstrates the necessity to use special
IGBT bridge models that implements interpolation techniques within fixed time step simulation scheme. The paper reports on
the latest advances from Opal-RT to simulate this kind of system with a 10 µs sample time. HIL computational time
measurement are provided as well as a model fidelity comparison made by Toyota Motor Corp. of the RT-LAB Electrical Drive
Simulator versus an actual fuel cell hybrid electric vehicle.
Keywords – real time simulation, hybrid electric vehicle, hardware-in-the-loop, electric drives.
I.
INTRODUCTION
Recent years have seen the emergence on a commercial basis of internal combustion engine hybrid electric cars built
by companies such as Toyota and Honda. At the same time, a lot of research is made toward the development of fuel cell
hybrid electric vehicle where the main energy source now comes from hydrogen. Toyota, for example, regularly reports
on its advances toward this objective [7][8]. Achieving this goal requires state-of-the-art technology for the fuel cell
hybrid vehicle design and also on the testing side of the development cycle. For example, thorough testing of the power
and traction subsystems is being made with Hardware-in-the-Loop simulation. In line with this, Opal-RT Technology has
recently put a lot of effort to come up with a real-time simulator suitable for electric car application testing[9] and, as a
result, the RT-LAB simulator is currently been used by Toyota Motor Corp. to test fuel cell hybrid electric vehicle
designs.
In this paper, we describe an the methodology and simulation techniques used to make the real-time simulation of a
fuel-cell hybrid vehicle with DC-DC converter and several PMSM inverter drives running with 10 kHz carrier frequency.
The paper is organized in the following manner. First, typical problems regarding the real-time simulation of electric
drives are presented along with effective solutions. The RT-LAB Electric Drive Simulator, which implements those
solutions is then introduced and the effectiveness of the RT-Events interpolating blockset is demonstrated in fully
numerical simulation cases as well as in Hardware-In-the-Loop (HIL) case. Then, the paper will present experimental
results concerning the achievable HIL simulation speed when simulating a fuel cell hybrid electric vehicle with the RTLAB Electrical Drive Simulator. The paper will finally present some tests results made on site by Toyota Motor Corp to
compare the simulation results of the RT-LAB simulator with an actual fuel cell hybrid electrical vehicle data.
II.
THE CHALLENGES OF ELECTRICAL SYSTEMS REAL-TIME SIMULATION
Making the real-time simulation of electrical systems represents a challenge for several reasons. The main reason is
that electrical systems have higher bandwidth than mechanical systems and therefore command smaller simulation time
steps. When including I/O access time, the RT-LAB real-time simulator can currently go under 10 µs time step for
example and, nevertheless even such a small time step sometimes requires special solvers and interpolation techniques to
insure accurate results.
More problems occur when simulating power converters like PWM motor inverters and DC-DC converters because
of their usually high switching frequencies with regards to the simulation sampling frequency. One of those problem
concerns the accurate time sampling of IGBT gate signals. Accurate motor flux integration is dependant upon the precise
sampling of the IGBT gate signals by the simulator. This sampling must have sub-µs precision but typical real-time
simulation time step are more in the 10-50 µs range. There are solutions to this problem.
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Proceedings of the 21st Electric Vehicle Symposium (EVS-21), April 2-6 2005, Monte Carlo, Monaco
a)
In fully numerical real-time simulation where both controllers and vehicle model are simulated, the IGBT gate
signals generation must be made with equivalent sub-µs resolution despites the fixed-time simulation. This
requires the use of RT-Events[3], a Simulink blockset designed for interpolation of in-step events in models like
the sinus-triangular comparisons occurring in PWM generation.
b) In real-time HIL simulation of the power converter interacting with an external controller, the IGBT gate signals
must be sampled by high frequency counter cards and the resulting time stamp incorporated into the simulation
process by some interpolation technique.
In both cases, the IGBT bridge model must be able to use this interpolation information to compensate the simulation
process. This must be done by appropriate algorithms like Time Stamped Bridges models[3] or ARTEMIS add-on[2] to
SimPowerSystems blockset.
A.
Interpolated fixed-step simulation with RT-Events
The simple chopper drive of Figure 1 should ideally have its load current be linearly dependant upon the chopper
duty-cycle. The simulation of this drive at 10 µs time step and a 10 kHz chopping frequency leads to gross inaccuracies
when the simulation is uncompensated, like with SimPowerSystems blockset with discrete simulation option (Figure 2,
curve r).
100 V
upper
IGBT
1 mH
0.1 Ω
load current
lower
IGBT
Figure 1
Figure 2
Simple chopper
Simple chopper load current as a function of duty cycle
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Proceedings of the 21st Electric Vehicle Symposium (EVS-21), April 2-6 2005, Monte Carlo, Monaco
In contrast, usage of compensated fixed step simulation tools like the RT-Events blockset from Opal-RT technology
lead to accurate simulation (Figure 2,curve b). This works because RT-Events blocks are built to propagate zero crossing
information at fixed time step and the Time Stamped Bridge are designed to use this information to produce compensated
output voltages and, as a consequence, correct load current.
Simulink Blocks
Time-Stamped Bridge
RT-Events Blocks
Duty-cycle selection
>=
Triangular
wave generator
upper
IGBT
RT-Events
level
comparator
lower
IGBT
NOT
RT-Events
logical NOT
Figure 3
B.
Simulink blocks, RT-Events logical blocks and Time Stamped Bridge interconnection.
Interpolated Hardware-in-the-Loop simulation with time-stamped digital I/O
When the simulated plant and Time Stamped Bridge are fed from a real controller, the same problematic still remains.
If the IGBT gate signals are sampled at the simulator sample time (ex: 10 µs) without compensation, gross errors will
result.
The solution is explained in Figure 4. The gate signals coming in the simulator from the real controller are sampled
with a high frequency counter card running at much faster rate than the simulation process. In Figure 4, the simulation rate
is 10 µs and the counter card run at 100 MHz so the card can count to 1000 each time step. When some transition occurs
on the gate, the counter card stop counting and therefore ‘stamps’ the time of the transition with 10 ns resolution. The
count is then transferred to the Time Stamped Bridge as a normalized ratio (625/1000=0.625) on the Pentium side of the
simulator where the fuel cell hybrid electric vehicle is simulated.
External controller
Firing pulse unit
Control algorithms
Fiber optic
cable
Real-time simulator
opto-isolator
FPGA counter card
10 ns clock (100 MHz)
count at transition time= 625
max count =1000
I/O
Simulator clock (10 µs)
Pentium
logic=1
stamp=0.625
To Time Stamped Bridge
(DC-DC converter &
PMSM inverters)
Figure 4
IGBT
Time stamping of a real controller gate signal
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Proceedings of the 21st Electric Vehicle Symposium (EVS-21), April 2-6 2005, Monte Carlo, Monaco
C.
Accuracy of the IGBT Bridge Inverter with Hardware-in-the-Loop
In this section we make a test by running the simple chopper of Figure 1 in RT-LAB with Hardware-in-The-Loop
(HIL) loop back of the IGBT gate signals. In the test, the IGBT gate signals are first generated inside the Simulink model
with the help of the RT-Events blockset and then outputted through time stamped digital outputs. Those digital outputs are
then read back with time stamped digital input and fed to the Time Stamped Bridge model used to model the chopper.
In the test, we drive the chopper at 49% duty cycle with IGBT gate signals with a variable dead time much smaller
than the 10 µs simulation time step. The possibility of controlling the dead time with a definition much smaller than the
simulation fixed time step in somewhat unusual (that is, impossible with standard Simulink blocks running in a fixed time
step scheme) but is demonstrated in the test.
Figure 5
Figure 6
Chopper load current for 1 us difference of deadtime
Chopper load current for 0.1 us difference of deadtime
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Proceedings of the 21st Electric Vehicle Symposium (EVS-21), April 2-6 2005, Monte Carlo, Monaco
In Figure 5, we see the no deadtime current which is equal to the (100/0.101*0.49)= 485 A theory value (The IGBT
has 0.001 Ω ON resistance). Each µs of deadtime costs 5 A at the load which is again equal to theory. In Figure 6, the
deadtime step is lowered to 0.1 µs and again, the test match well the theorical 5 A/µs deadtime current drop at the load.
The figure also shows that these models are not so-called average models because the 10 kHz carrier is present. The test
simultaneously demonstrates the accuracy of RT-Events logical blocks, Time Stamped Bridge interpolation and I/O time
stamping accuracy.
III.
THE RT-LAB ELECTRICAL DRIVE SIMULATOR
The RT-LAB Electrical Drive Simulator used for the real-time simulation of the fuel cell hybrid electric vehicle is
shown in Figure 7. It is composed of a dual Pentium Xeon PC running at 3.2 GHz under RedHawk RT-Linux operating
system from Concurrent Computer Corp. and a console PC running Windows XP. Faster processors can be used as the PC
technology improves.
The computational tasks are distributed in the following way: one CPU of the dual-CPU computer iterates the
complete fuel cell hybrid electrical vehicle equations while the other CPU is in charge of the I/O and internal controllers
of the model. Those I/O includes the time-stamped digital input signals of the IGBT gates, the generation of incremental
position encoder signals and motor current analog outputs necessary to the controllers. Digital signal generation and
sampling are in both cases made with 10 ns resolution. This FPGA card is built around the XILINX VITEX II Pro board
and comes with D/A and A/D converters. From the console PC, the user can set-up various test scenarios or evaluate
controller performance for example.
Real-time simulation
monitoring and control
Console
(Windows XP)
- test scenarios
- models parameters
- etc...
Ethernet link
Real Time Simulator
RT-LAB
Data logging, post analysis, etc
Fuel cell hybrid
electric vehicle model
CPU2
shared
memory
I/O signal preparation &
internal controllers
Opal FPGA (digital I/O)
Opal FPGA (D/A)
Figure 7
PCI bus
CPU1
Signal conditioning
Dual CPU computer (RedHawk)
IGBT gates signals
position encoder
signals
External controllers:
Controller analog inputs
Structure of the RT-LAB simulator with attached controllers
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Proceedings of the 21st Electric Vehicle Symposium (EVS-21), April 2-6 2005, Monte Carlo, Monaco
IV.
FUEL-CELL HYBRID VEHICLE DRIVE WITH HIGH FREQUENCY DC-DC CONVERTER
The fuel cell hybrid vehicle circuit used in the following tests is described in Figure 8. In addition to the fuel cell and
the battery, the circuit consists of 3 permanent magnet synchronous motor drive (6 IGBT switches per inverter) and a DCDC converter (12 IGBT switches). The battery and fuel cell models are only modeled at the electrical level: the battery is a
constant voltage source with internal impedance while the fuel cell is also a voltage source with a non-dissipative
equivalent resistance to linearly approximate the fuel voltage drop dependency upon fuel cell current output.
10 kHz DC-DC converters
Fuel cell circuit
DC drive bus
2600uF
240 380 V
0.324 Ω
5200uF
Battery circuit
240- .
400 V
PMSM vehicle
traction drive
N
S
80 kW
DC drive bus
PMSM water
pump drive
PMSM air
compressor drive
N
N
S
S
15 kW
Figure 8
2 kW
Fuel cell hybrid electric vehicle model
The real-time simulation of such drive presents serious challenges because of the high switching frequency (10 kHz)
of the converters in relation to the minimum achievable simulation step size, which is expected to be near 10 µs. The
presence of a DC-link permits the use of Time Stamped Bridge models to accurately simulate the switching actions. Time
Stamped Bridges are IGBT/GTO bridge models that can incorporate sub-time-step switching information into the
simulation. In normal fixed-step simulation, a leg-switching action can only by incorporated into the simulation at the next
time step and is considered as having occurred exactly at the simulation sample time. With Time Stamped Bridges, the instep switching time information is included in the simulation, resulting in more accuracy. Another advantage of using
Time Stamped Bridges is that it avoids algorithmic problems related to the calculation of network switch position
modification. In EMPT-based algorithms for example[5], each combination of switch position results in a distinct nodal
matrix that must be computed and store. With Time Stamped Bridges, this problem is avoided.
The study of the problems and requirements can by separate in two parts. The first part concerns the DC-DC
converter accuracy while the second one is about the PMSM inverter simulation accuracy. Both subsystems have a 10 kHz
chopping or carrier frequency. In each case, the necessity of using interpolation techniques is demonstrated.
A. Accuracy of the 10 kHz DC-DC converter
The DC-DC converter is characterized by a high switching frequency of 10 kHz. Here, precise switching event
capture and incorporation into the simulated process is necessary for overall simulation accuracy. If not, the plant model
becomes non-linear and HIL control becomes unfeasible.
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Proceedings of the 21st Electric Vehicle Symposium (EVS-21), April 2-6 2005, Monte Carlo, Monaco
Figure 9
DC-DC inductance current as a function of the duty-cycle
This test is made on slightly modified version of the full hybrid vehicle drive circuit where the machines and its
inverters are replaced with a 1Ω resistor. This is done to isolate the effect of the inverter stage from the DC-DC converter.
It shows the DC-DC converter inductance current response to a duty-cycle scan when the circuit makes use or not of the
time stamps. A portion of the scan is shown in Figure 9 and examines more closely converter duty cycle between 45 and
55%. This portion of the scan includes the fuel cell diode turn on point near 52% duty cycle.
Figure 9 shows that the use of Time Stamped Bridges models with a 10 µs time step (trace b) produces a smooth
response that perfectly matches the results obtained with a very low time-step value of 1µs (r) considered as the reference
result. The response has an unacceptable staircase shape when the time stamps are deactivated at 10 µs (g) and even with
a 1 µs time step (trace c). Clearly, the circuit would be hard to control without the time stamping technique because of the
discontinuities in the plant model in this case.
B. Simulation of the permanent magnet synchronous motor drive
One of the permanent magnet synchronous motor (PMSM) drives is simulated in this section. The IGBT inverter
drive is has a PWM carrier of 10 kHz and the simulation time step is still 10 µs. The motor controller itself has a sampling
time of 1 millisecond and no I/O where used as the controller is modeled internally in Simulink and its firing pulse unit
was modeled with RT-Events blocks.
For the purpose of the test, the motor was allowed to settle to the 5 Hz rotor speed set-point and the current
measurements were taken at this operating point. Then, in the middle of the measurement, the time stamping technique
was disabled.
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Proceedings of the 21st Electric Vehicle Symposium (EVS-21), April 2-6 2005, Monte Carlo, Monaco
Figure 10
Electrical torque of the PMS motor at 5 Hz rotor speed set-point.
The result of the test is shown in Figure 10 and is quite typical of the effect time-stamping technique. Non-use of the
time stamped technique results in increased noise jitter on the motor currents. In contrast, the correct inclusion of
switching time into the simulation results in noise free simulation.
V.
COMPUTATIONAL SPEED
This section objective is to assess the achievable real-time simulation time step of a fuel cell hybrid electrical vehicle
with RT-LAB (v7.1, RedHawk OS) running on 2.4 GHz Dual Xeon computers with Hyperthreading technology. The test
also shows the same model simulated with the QNX operating system on the real-time simulator. In this case, an
additional 2.4 GHz PC was used as a buffer between the Console and the Dual-Xeon PC running at the fast rate. In the
test, number of signals refers to the number of signals transmitted to the console PC for monitoring.
A. I/O assumptions for real-time simulation speed measurement
The I/O quantity and configuration is an important limiting factor in the quest for real-time simulation time step lower
that 10 µs. The simulation of 3 motor-inverter group takes about 8 µs to compute on a single Pentium Xeon, 2.4 GHz.
Thus, to achieve the real-time simulation, the following assumptions where made with regards to the I/O. First of all, we
have assumed that, in the worst case, 2 IGBT legs can toggle ON and OFF in the same time step. The two previous
assumption means that from the simulator digital input point of view, a maximum of 4 Digital Inputs events per time step
per motor may occur, all IGBT gate inputs being controlled independently. For the purpose of emulating the digital
encoders and other outputs to by fed to the external controller, it was also assumed that 4 Digital Outputs transitions were
allows at each time step. For its part, the number of analog output required is set to 6 per motor. All the I/O are
implemented in the Opal FPGA PCI card (device ID:0x1b).
B. Model separation
The motors, inverters, and I/O were all located in one CPU of the Dual Xeon PC and were running at the basic time
step rate. This CPU was connected to the other CPU of the Dual-Xeon running at 4 times the basic rate and was only in
charge of transmitting data to and from the console. This last CPU was communicating directly with the console PC in the
RedHawk configuration. In the QNX configuration, another PC acts as a bridge between the transmission CPU of the
Dual Xeon and the console PC. A FireWire link (400 Mbits/s) is used to communicate data between the two PC running in
real-time (QNX only).
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Proceedings of the 21st Electric Vehicle Symposium (EVS-21), April 2-6 2005, Monte Carlo, Monaco
Figure 11
Achievable real-time simulation time step with I/Os on 2.4 GHz Xeon CPU.
C. Test results
Test results are shown in Figure 11. Real-time simulation of one motor in HIL mode takes 16 µs and each additional
motor cost 4 µs. This is a considerable improvement on results reported in [10] that showed the same models running on
the 2.8 GHz PC to execute at 20 µs for 1 motor and a 6 µs cost for additional motors. The tests reported in [10] also did
not have digital outputs and half the number of digital input events per time step. Clearly, the implementation of DMA I/O
data transmission method in the FPGA card has greatly improved the overall simulator performance.
Another interesting fact is that the QNX configuration is faster than the RedHawk one. This is achieved through the
use of an additional PC in the QNX configuration. The usage of 800 Mbits/s FireWire links (IEEE-1394b) may further
improve this performance. The test also shows that faster simulation can be achieved when minimizing the number of
signals transferred to and from the Console.
VI.
TOYOTA EXPERIMENTAL RESULTS WITH THE RT-LAB SIMULATOR
The RT-LAB simulator using the algorithmic solution techniques described in section II was used on site by Toyota
to make HIL simulations of their fuel cell hybrid electric vehicle design. The vehicle HIL model was run under the
Japanese 10.15 mode and the fuel cell and battery voltage and currents levels are shown in Figure 12 to Figure 15. The
results are compared with data from an actual prototype of the fuel cell hybrid electric vehicle as well as with an older
simulator used by Toyota. The Japanese 10.15-mode Driving Schedule for Exhaust Measurement and Fuel Economy Test
Procedures consist mainly of city driving and urban traffic conditions.
This HIL simulation test results globally shows the accuracy improvements of the RT-LAB Electrical Drive Simulator
versus an older simulator used at the site. For the complete Japan 10.15 mode run, the average simulation error of the
battery current and voltage went down from 77% to 22% and 9.3% to 1.7% respectively with the new simulator. Similar
amelioration were also obtained for the fuel cell with error going down 29% to 25% for the fuel cell current and 25.5% to
5.4% for the fuel cell voltage.
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Proceedings of the 21st Electric Vehicle Symposium (EVS-21), April 2-6 2005, Monte Carlo, Monaco
Figure 12
Battery current in HIL simulation during the Japan 10.15 mode run
Figure 13
Battery voltage in HIL simulation during the Japan 10.15 mode run
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Proceedings of the 21st Electric Vehicle Symposium (EVS-21), April 2-6 2005, Monte Carlo, Monaco
Figure 14
Fuel cell current in HIL simulation during the Japan 10.15 mode run
Figure 15
Fuel cell voltage in HIL simulation during the Japan 10.15 mode run
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Proceedings of the 21st Electric Vehicle Symposium (EVS-21), April 2-6 2005, Monte Carlo, Monaco
VII.
CONCLUSION
This paper has presented the RT-LAB HIL simulation test results made on a fuel cell hybrid electric vehicle with
several permanent magnet motors and a high frequency DC-DC converter.
Accuracy tests have shown the importance of precise IGBT gate timing capture for accurate simulation. An important
result is that the DC-DC converter inductance current characteristic becomes accurate and linear with time stamping
technique whereas it is completely inaccurate without time stamps. The linearity characteristic is important for real-time
simulation and control considerations. This is quite impressive in fact if one considers that 10 kHz corresponds to 100µs,
just 10 times the sample time. The same can be said about the PMSM inverter that becomes inaccurate when time
stamping is not used.
The real-time simulation of a realistic fuel cell hybrid electric vehicle circuit consisting on fuel-cell, battery, DC-DC
converter and 3 permanent magnet motor drive, with a sufficient number of I/O for real controllers, was made on the RTLAB platform at time step below 25 µs on a dual-Xeon computer clocked at 2.4 GHz. Simulation time step below 15 µs
are achievable when less motors are simulated. Time step below 10 µs are expected in 2005 for this kind of models. In this
regards, Opal-RT recently reported in [11] that they achieved the Hardware-In-the-Loop simulation of a single PMSM
motor with similar I/O configuration and an additional AC-link at a 10 µs time step.
More complete modeling of the different components could enhance the fidelity of fuel cell hybrid electric vehicle
simulation. For example, battery modeling could be improved by including State-of-Charge parameters variations over
time. Fuel cell modelisation could be made more complete by including the control aspects of the fuel cell power
generation process like hydrogen flow control, air flow control, thermal effects, etc..
The effectiveness of interpolation-capable IGBT inverter models was demonstrated in the paper for both off-line and
HIL configurations with time stamping made by the FPGA card. Using FPGA technologies has many advantages for realtime simulation of electromechanical systems, particularly when detecting and generating pulse edges, such as PWM
signals, at high frequencies. The same technology also permits for high speed, low-latency inter-processor
communication, and simultaneously sampled analog I/O with 1 µs conversion times, all entirely configurable in software.
This technology will soon also serve as the physical support for ultra-fast simulation by allowing FPGA targeting of
Simulink models. This will provide at least a 10-fold increase in update rates, compared to execution on a PC processor,
allowing users to achieve model update times approaching 1 µs, depending on the complexity of the subsystem model.
VIII.
REFERENCES
[1] RT-LAB 7.1.3, Opal-RT Technologies inc. 1751 Richardson, bureau 2525, Montreal Qc H3K 1G6 www.opal-rt.com
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ARTEMIS", Proceedings of the ELECTRIMACS 2002 conference, Montreal, Canada, August 18-21, 2002
[3] RT-Events blockset for Simulink, v2.2, Opal-RT Technologies Inc., Montreal, Qc, Canada
[4] Power System Blockset version for Simulink, The MathWorks Inc. Nawick, MA, USA
[5] EMTP Theory Book, H.W. Dommel editor, 2nd edition, Microtran Power Analysis Corporation, May 1992.
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Vehicle Symposium, Berlin, 2001
[8] T. Ishikawa, S. Hamaguchi, T. Shimizu, T. Yano, S. Sasaki, K. Kato, M. Ando, H. Yoshida “ Development of Next Generation
Fuel-cell Hybrid System”, Proceedings of 2004 SAE International Conference
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[10] C. Dufour, J. Bélanger, T. Ishikawa, K. Uemura, “Real-Time Simulation of Fuel Cell Hybrid Electric Vehicles”, Proceedings of the 2004
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[11] M. Harakawa, H. Yamasaki, T. Nagano, S. Abourida, C. Dufour and J. Bélanger, “Real-Time Simulation of a Complete PMSM Drive at
10 µs Time Step”, accepted for publication at the 2005 International Power Electronics Conference - Niigata (IPEC-Niigata 2005)
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