TLC226x, TLC226xA
Advanced LinCMOS RAIL-TO-RAIL
OPERATIONAL AMPLIFIERS
SLOS177D – FEBRUARY 1997 – REVISED MARCH 2001
D
D
D
D
D
D
Output Swing includes Both Supply Rails
Low Noise . . . 12 nV/√Hz Typ at f = 1 kHz
Low Input Bias Current . . . 1 pA Typ
Fully Specified for Both Single-Supply and
Split-Supply Operation
Low Power . . . 500 µA Max
Common-Mode Input Voltage Range
Includes Negative Rail
D
D
D
D
Low Input Offset Voltage
950 µV Max at TA = 25°C (TLC2262A)
Macromodel Included
Performance Upgrade for the TS27M2/M4
and TLC27M2/M4
Available in Q-Temp Automotive
HighRel Automotive Applications
Configuration Control/Print Support
Qualification to Automotive Standards
description
60
V n – Equivalent Input Noise Voltage – nV/
VN
nv//HzHz
The TLC2262 and TLC2264 are dual and
quadruple operational amplifiers from Texas
Instruments. Both devices exhibit rail-to-rail
output performance for increased dynamic range
in single- or split-supply applications. The
TLC226x family offers a compromise between the
micropower TLC225x and the ac performance of
the TLC227x. It has low supply current for
battery-powered applications, while still having
adequate ac performance for applications that
demand it. The noise performance has been
dramatically improved over previous generations
of CMOS amplifiers. Figure 1 depicts the low level
of noise voltage for this CMOS amplifier, which
has only 200 µA (typ) of supply current per
amplifier.
EQUIVALENT INPUT NOISE VOLTAGE
vs
FREQUENCY
50
VDD = 5 V
RS = 20 Ω
TA = 25°C
40
30
20
10
The TLC226x, exhibiting high input impedance
0
and low noise, are excellent for small-signal
10
102
103
104
conditioning for high-impedance sources, such as
f – Frequency – Hz
piezoelectric transducers. Because of the micropower dissipation levels, these devices work well
Figure 1
in hand-held monitoring and remote-sensing
applications. In addition, the rail-to-rail output feature with single or split supplies makes this family a great
choice when interfacing with analog-to-digital converters (ADCs). For precision applications, the TLC226xA
family is available and has a maximum input offset voltage of 950 µV. This family is fully characterized at 5 V
and ± 5 V.
The TLC2262/4 also makes great upgrades to the TLC27M2/L4 or TS27M2/L4 in standard designs. They offer
increased output dynamic range, lower noise voltage and lower input offset voltage. This enhanced feature set
allows them to be used in a wider range of applications. For applications that require higher output drive and
wider input voltage range, see the TLV2432 and TLV2442. If your design requires single amplifiers, please see
the TLV2211/21/31 family. These devices are single rail-to-rail operational amplifiers in the SOT-23 package.
Their small size and low power consumption, make them ideal for high density, battery-powered equipment.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Advanced LinCMOS is a trademark of Texas Instruments.
Copyright  2001, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
TLC226x, TLC226xA
Advanced LinCMOS RAIL-TO-RAIL
OPERATIONAL AMPLIFIERS
SLOS177D – FEBRUARY 1997 – REVISED MARCH 2001
TLC2262 AVAILABLE OPTIONS
PACKAGED DEVICES
TA
VIOmax
AT 25°C
SMALL
OUTLINE
(D)
CHIP
CARRIER
(FK)
CERAMIC
DIP
(JG)
PLASTIC
DIP
(P)
TSSOP
(PW)
CERAMIC
FLATPACK
(U)
0°C to 70°C
2.5 mV
TLC2262CD
—
—
TLC2262CP
TLC2262CPW
—
– 40°C to 125°C
950 µ
µV
2.5 mV
TLC2262AID
TLC2262ID
—
—
—
—
TLC2262AIP
TLC2262IP
TLC2262AIPW
—
—
—
– 40°C to 125°C
950 µ
µV
2.5 mV
TLC2262AQD
TLC2262QD
—
—
—
—
—
—
—
—
—
—
– 55°C to 125°C
950 µV
2.5 mV
—
—
TLC2262AMFK
TLC2262MFK
TLC2262AMJG
TLC2262MJG
—
—
—
—
TLC2262AMU
TLC2262MU
The D packages are available taped and reeled. Add R suffix to device type (e.g., TLC2262CDR). The PW package is available only left-end taped
and reeled. Chips are tested at 25°C.
TLC2264 AVAILABLE OPTIONS
PACKAGED DEVICES
TA
VIOmax
AT 25°C
SMALL
OUTLINE
(D)
CHIP
CARRIER
(FK)
CERAMIC
DIP
(J)
PLASTIC
DIP
(N)
TSSOP
(PW)
CERAMIC
FLATPACK
(W)
0°C to 70°C
2.5 mV
TLC2264CD
—
—
TLC2264CN
TLC2264CPW
—
– 40°C to 125°C
950 µ
µV
2.5 mV
TLC2264AID
TLC2264ID
—
—
—
—
TLC2264AIN
TLC2264IN
TLC2264AIPW
—
—
—
– 40°C to 125°C
950 µ
µV
2.5 mV
TLC2264AQD
TLC2264QD
—
—
—
—
—
—
—
—
—
—
– 55°C to 125°C
950 µV
2.5 mV
—
—
TLC2264AMFK
TLC2264MFK
TLC2264AMJ
TLC2264MJ
—
—
—
—
TLC2264AMW
TLC2264MW
The D packages are available taped and reeled. Add R suffix to device type (e.g., TLC2264CDR). The PW package is available only left-end taped
and reeled. Chips are tested at 25°C.
2
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
TLC226x, TLC226xA
Advanced LinCMOS RAIL-TO-RAIL
OPERATIONAL AMPLIFIERS
SLOS177D – FEBRUARY 1997 – REVISED MARCH 2001
TLC2262C, TLC2262AC
TLC2262I, TLC2262AI
TLC2262Q, TLC2262AQ
D, P, OR PW PACKAGE
(TOP VIEW)
1
8
2
7
3
6
4
5
NC
1OUT
NC
VDD+
NC
VDD +
2OUT
2IN –
2IN +
NC
1IN –
NC
1IN +
NC
4
3 2 1 20 19
18
5
17
6
16
7
15
8
14
9 10 11 12 13
NC
2OUT
NC
2IN –
NC
NC
VDD– /GND
NC
2IN+
NC
1OUT
1IN –
1IN +
VDD – /GND
TLC2262M, TLC2262AM . . . FK PACKAGE
(TOP VIEW)
NC – No internal connection
TLC2262M, TLC2262AM . . . JG PACKAGE
(TOP VIEW)
1OUT
1IN –
1IN +
VDD – /GND
1
8
2
7
3
6
4
5
TLC2262M, TLC2262AM . . . U PACKAGE
(TOP VIEW)
VDD +
2OUT
2IN –
2IN +
NC
1OUT
1IN –
1IN +
VCC – /GND
1
10
2
9
3
8
4
7
5
6
NC
VCC +
2OUT
2IN –
2IN +
NC – No internal connection
1OUT
1IN –
1IN +
VDD +
2IN +
2IN –
2OUT
1
14
2
13
3
12
4
11
5
10
6
9
7
8
4OUT
4IN –
4IN +
VDD – / GND
3IN +
3IN –
3OUT
TLC2264M, TLC2264AM . . . FK PACKAGE
(TOP VIEW)
1OUT
1IN –
1IN +
VDD +
2IN +
2IN –
2OUT
1
14
2
13
3
12
4
11
5
10
6
9
7
8
4OUT
4IN –
4IN +
VDD – / GND
3IN +
3IN –
3OUT
1IN –
1OUT
NC
4OUT
4IN –
TLC2264M, TLC2264AM . . . J OR W PACKAGE
(TOP VIEW)
1IN +
NC
VCC +
NC
2IN +
4
3 2 1 20 19
18
5
17
6
16
7
15
8
14
9 10 11 12 13
4IN +
NC
VCC – /GND
NC
3IN +
2IN –
2OUT
NC
3OUT
3IN –
TLC2264C, TLC2264AC
TLC2264I, TLC2264AI
TLC2264Q, TLC2264AQ
D, N, OR PW PACKAGE
(TOP VIEW)
NC – No internal connection
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
3
TLC226x, TLC226xA
Advanced LinCMOS RAIL-TO-RAIL
OPERATIONAL AMPLIFIERS
SLOS177D – FEBRUARY 1997 – REVISED MARCH 2001
equivalent schematic (each amplifier)
VDD +
Q3
Q6
Q9
Q12
Q14
Q16
IN +
OUT
C1
IN –
R5
Q1
Q4
Q13
Q15
Q17
D1
Q2
Q5
R3
R4
Q7
Q8
Q10
Q11
R1
VDD – / GND
ACTUAL DEVICE COMPONENT COUNT†
TLC2262
TLC2264
Transistors
COMPONENT
38
76
Resistors
28
56
9
18
Diodes
Capacitors
3
6
† Includes both amplifiers and all ESD, bias, and trim circuitry
4
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
R2
TLC226x, TLC226xA
Advanced LinCMOS RAIL-TO-RAIL
OPERATIONAL AMPLIFIERS
SLOS177D – FEBRUARY 1997 – REVISED MARCH 2001
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage, VDD + (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 V
Supply voltage, VDD – (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 8 V
Differential input voltage, VID (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 16 V
Input voltage, VI (any input, see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDD– – 0.3 V to VDD+
Input current, II (each input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 5 mA
Output current, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 50 mA
Total current into VDD + . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 50 mA
Total current out of VDD – . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 50 mA
Duration of short-circuit current at (or below) 25°C (see Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . unlimited
Continuous total dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table
Operating free-air temperature range, TA: C suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
I suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 40°C to 125°C
Q suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 40°C to 125°C
M suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 55°C to 125°C
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D, N, P, and PW packages . . . . . . . 260°C
J, JG, U, and W packages . . . . . . . 300°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values, except differential voltages, are with respect to the midpoint between VDD+ and VDD – .
2. Differential voltages are at IN+ with respect to IN –. Excessive current flows if input is brought below VDD – – 0.3 V.
3. The output may be shorted to either supply. Temperature and/or supply voltages must be limited to ensure that the maximum
dissipation rating is not exceeded.
DISSIPATION RATING TABLE
PACKAGE
TA ≤ 25°C
POWER RATING
DERATING FACTOR
ABOVE TA = 25°C
TA = 70°C
POWER RATING
TA = 85°C
POWER RATING
TA = 125°C
POWER RATING
D–8
725 mW
5.8 mW/°C
464 mW
377 mW
145 mW
D–14
950 mW
7.6 mW/°C
608 mW
494 mW
190 mW
FK
1375 mW
11.0 mW/°C
880 mW
715 mW
275 mW
J
1375 mW
11.0 mW/°C
880 mW
715 mW
275 mW
210 mW
JG
1050 mW
8.4 mW/°C
672 mW
546 mW
N
1150 mW
9.2 mW/°C
736 mW
598 mW
230 mW
P
1000 mW
8.0 mW/°C
640 mW
520 mW
200 mW
PW–8
525 mW
4.2 mW/°C
336 mW
273 mW
105 mW
PW–14
700 mW
5.6 mW/°C
448 mW
364 mW
140 mW
U
700 mW
5.5 mW/°C
452 mW
370 mW
150 mW
W
700 mW
5.5 mW/°C
452 mW
370 mW
150 mW
recommended operating conditions
C SUFFIX
MIN
Supply voltage, VDD ±
± 2.2
Input voltage range, VI
Common-mode input voltage, VIC
VDD –
VDD –
Operating free-air temperature, TA
0
MAX
±8
VDD + – 1.5
VDD + – 1.5
70
I SUFFIX
MIN
± 2.2
VDD –
VDD –
– 40
POST OFFICE BOX 655303
MAX
±8
VDD + – 1.5
VDD + – 1.5
125
Q SUFFIX
MIN
± 2.2
VDD –
VDD –
– 40
• DALLAS, TEXAS 75265
MAX
±8
VDD + – 1.5
VDD + – 1.5
125
M SUFFIX
MIN
± 2.2
VDD –
VDD –
– 55
MAX
UNIT
±8
V
VDD + – 1.5
VDD + – 1.5
V
125
°C
V
5
TLC226x, TLC226xA
Advanced LinCMOS RAIL-TO-RAIL
OPERATIONAL AMPLIFIERS
SLOS177D – FEBRUARY 1997 – REVISED MARCH 2001
TLC2262C electrical characteristics at specified free-air temperature, VDD = 5 V (unless otherwise
noted)
PARAMETER
TEST CONDITIONS
Input offset voltage
αVIO
Temperature coefficient of input offset voltage
IIB
Input bias current
VICR
VDD ± = ± 2.5 V,
RS = 50 Ω
VIC = 0,
VO = 0,
RS = 50 Ω
Ω,
Common mode input voltage range
Common-mode
25°C
0.003
µV/mo
25°C
0.5
100
1
Low-level output voltage
Large-signal
g
g
differential voltage
g amplification
IOL = 500 µA
IOL = 1
mA
VIC = 2
2.5
5V
V,
IOL = 4
mA
2 5 V,
V
VIC = 2.5
VO = 1 V to 4 V
RL = 50 kه
VIC = 2
2.5
5V
V,
100
25°C
0
to
4
Full range
0
to
3.5
25°C
IOL = 50 µA
RL = 1 Mه
Differential input resistance
µV
µV/°C
|VIO| ≤ 5 mV
IOH = – 100 µA
High-level output voltage
UNIT
2
25°C
VIC = 2
2.5
5V
V,
ri(d)
2500
Full range
VIC = 2.5 V,
AVD
300
Full range
IOH = – 400 µA
VOL
MAX
3000
25°C
to 70°C
IOH = – 20 µA
VOH
TYP
Full range
Input offset voltage long-term drift
(see Note 4)
Input offset current
TLC2262C
MIN
25°C
VIO
IIO
TA†
– 0.3
to
4.2
pA
pA
V
4.99
25°C
4.85
Full range
4.82
25°C
4.70
Full range
4.60
4.94
V
4.85
25°C
0.01
25°C
0.09
Full range
0.15
0.15
25°C
0.2
Full range
0.3
V
0.3
25°C
0.7
Full range
1
1.2
25°C
80
Full range
55
170
V/mV
25°C
550
25°C
1012
Ω
Ω
ri(c)
Common-mode input resistance
25°C
1012
ci(c)
Common-mode input capacitance
f = 10 kHz,
P package
25°C
8
pF
zo
Closed-loop output impedance
f = 100 kHz,
AV = 10
25°C
240
Ω
CMRR
Common mode rejection ratio
Common-mode
VIC = 0 to 2.7 V,, VO = 2.5 V,,
RS = 50 Ω
25°C
70
Full range
70
kSVR
Supply voltage rejection ratio (∆VDD/∆VIO)
Supply-voltage
VDD = 4.4 V to 16 V,,
VIC = VDD /2,
No load
25°C
80
Full range
80
IDD
Supply current
VO = 2
2.5
5V
V,
No load
25°C
Full range
83
dB
95
400
dB
500
500
µA
† Full range is 0°C to 70°C.
‡ Referenced to 2.5 V
NOTE 4: Typical values are based on the input offset voltage shift observed through 500 hours of operating life test at TA = 150°C extrapolated
to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
6
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
TLC226x, TLC226xA
Advanced LinCMOS RAIL-TO-RAIL
OPERATIONAL AMPLIFIERS
SLOS177D – FEBRUARY 1997 – REVISED MARCH 2001
TLC2262C operating characteristics at specified free-air temperature, VDD = 5 V
PARAMETER
SR
Slew rate at unity gain
Vn
Equivalent input noise voltage
VN(PP)
Peak-to-peak equivalent
input noise
q
voltage
In
Equivalent input noise current
THD + N
Total harmonic distortion plus noise
BOM
ts
φm
TEST CONDITIONS
VO = 1.5 V to 3.5 V,,
CL = 100 pF‡
RL = 50 kه,
TYP
25°C
0.35
0.55
Full range
0.3
25°C
40
f = 1 kHz
25°C
12
f = 0.1 Hz to 1 Hz
25°C
0.7
f = 0.1 Hz to 10 Hz
25°C
1.3
25°C
0.6
AV = 1
Gain-bandwidth product
f = 10 kHz,
CL = 100 pF‡
RL = 50 kه,
Maximum output-swing bandwidth
VO(PP) = 2 V,
RL = 50 kه,
AV = 1,
CL = 100 pF‡
To 0.1%
0 1%
Settling time
AV = – 1,
Step = 0.5 V to 2.5 V,,
RL = 50 kه,
CL = 100 pF‡
‡
RL = 50 kه,
CL = 100 pF‡
Gain margin
TLC2262C
MIN
f = 10 Hz
VO = 0.5 V to 2.5 V,
f = 20 kHz,
kHz
RL = 50 kه
Phase margin at unity gain
TA†
MAX
UNIT
V/µs
nV/√Hz
µV
fA√Hz
0.017%
25°C
AV = 10
0.03%
25°C
0.71
MHz
25°C
185
kHz
64
6.4
µs
25°C
01%
To 0
0.01%
14 1
14.1
25°C
56°
25°C
11
dB
† Full range is 0°C to 70°C.
‡ Referenced to 2.5 V
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
7
TLC226x, TLC226xA
Advanced LinCMOS RAIL-TO-RAIL
OPERATIONAL AMPLIFIERS
SLOS177D – FEBRUARY 1997 – REVISED MARCH 2001
TLC2262C electrical characteristics at specified free-air temperature, VDD± = ±5 V (unless
otherwise specified)
PARAMETER
TEST CONDITIONS
Input offset voltage
αVIO
Temperature coefficient of input offset voltage
IIB
Input bias current
VICR
VIC = 0,
RS = 50 Ω
VO = 0,
2500
|VIO| ≤ 5 mV
mV,
25°C
0.003
µV/mo
25°C
0.5
100
1
Maximum negative peak output voltage
Large-signal differential voltage amplification
IO = 50 µA
VIC = 0
0,
IO = 500 µA
VIC = 0
0,
IO = 1
mA
IO = 4
mA
VO = ± 4 V
–5
to
4
Full range
g
–5
to
3.5
25°C
VIC = 0,
VIC = 0
0,
100
25°C
RS = 50 Ω
IO = – 100 µA
RL = 50 kΩ
RL = 1 MΩ
Differential input resistance
µV
µV/°C
Full range
Common mode input voltage range
Common-mode
UNIT
2
25°C
IO = – 400 µA
ri(d)
300
Full range
VOM + Maximum positive peak output voltage
AVD
MAX
3000
25°C
to 70°C
IO = – 20 µA
VOM –
TYP
Full range
Input offset voltage long-term drift (see Note 4)
Input offset current
TLC2262C
MIN
25°C
VIO
IIO
TA†
25°C
4.85
4.82
25°C
4.7
Full range
4.6
25°C
V
4.94
V
4.85
– 4.99
25°C
– 4.85
Full range
– 4.85
25°C
– 4.7
Full range
– 4.7
Full range
pA
4.99
Full range
25°C
– 5.3
to
4.2
pA
–4
– 4.91
V
– 4.8
– 4.3
– 3.8
25°C
80
Full range
55
200
V/mV
25°C
1000
25°C
1012
Ω
25°C
1012
Ω
ri(c)
Common-mode input resistance
ci(c)
Common-mode input capacitance
f = 10 kHz,
P package
25°C
8
pF
zo
Closed-loop output impedance
f = 100 kHz,
AV = 10
25°C
220
Ω
Common mode rejection ratio
CMRR Common-mode
VIC = – 5 V to 2.7 V,,
VO = 0 V,
RS = 50 Ω
25°C
75
Full range
75
25°C
80
Full range
80
kSVR
Supply voltage rejection ratio (∆VDD ± /∆VIO)
Supply-voltage
VDD ± = 2.2 V to ± 8 V,,
VIC = 0,
No load
IDD
Supply current
VO = 0 V
V,
No load
25°C
Full range
88
dB
95
425
dB
500
500
µA
† Full range is 0°C to 70°C.
NOTE 4: Typical values are based on the input offset voltage shift observed through 500 hours of operating life test at TA = 150°C extrapolated
to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
8
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
TLC226x, TLC226xA
Advanced LinCMOS RAIL-TO-RAIL
OPERATIONAL AMPLIFIERS
SLOS177D – FEBRUARY 1997 – REVISED MARCH 2001
TLC2262C operating characteristics at specified free-air temperature, VDD ± = ±5 V
PARAMETER
TEST CONDITIONS
VO = ± 1
1.9
9V
V,
CL = 100 pF
F
SR
Slew rate at unity gain
Vn
Equivalent input noise voltage
VN(PP)
Peak-to-peak equivalent
q
input noise
voltage
In
Equivalent input noise current
THD + N
Total harmonic distortion pulse duration
RL = 50 kΩ
TA†
TLC2262C
MIN
TYP
25°C
0.35
0.55
Full
range
03
0.3
MAX
UNIT
V/µs
f = 10 Hz
25°C
43
f = 1 kHz
25°C
12
f = 0.1 Hz to 1 Hz
25°C
0.8
f = 0.1 Hz to 10 Hz
25°C
1.3
25°C
0.6
nV/√Hz
µV
fA√Hz
VO = ± 2.3 V,
f = 20 kHz,
kHz
RL = 50 kΩ
AV = 1
Gain bandwidth product
Gain-bandwidth
f = 10 kHz,,
CL = 100 pF
RL = 50 kΩ
25°C
0 73
0.73
MHz
BOM
Maximum output-swing
output swing bandwidth
VO(PP) = 4.6 V,
RL = 50 kΩ,
AV = 1,
CL = 100 pF
25°C
85
kHz
Settling time
AV = – 1,
Step = – 2.3 V to 2.3 V,,
RL = 50 kΩ,
CL = 100 pF
To 0.1%
0 1%
ts
RL = 50 kΩ,
kΩ
CL = 100 pF
φm
Phase margin at unity gain
Gain margin
0.014%
25°C
AV = 10
0.024%
71
7.1
µs
25°C
To 0.01%
0 01%
16 5
16.5
25°C
57°
25°C
11
dB
† Full range is 0°C to 70°C.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
9
TLC226x, TLC226xA
Advanced LinCMOS RAIL-TO-RAIL
OPERATIONAL AMPLIFIERS
SLOS177D – FEBRUARY 1997 – REVISED MARCH 2001
TLC2264C electrical characteristics at specified free-air temperature, VDD = 5 V (unless otherwise
noted)
PARAMETER
TEST CONDITIONS
Input offset voltage
αVIO
Temperature coefficient of input offset voltage
IIB
Input bias current
VICR
VDD ± = ± 2.5 V,
RS = 50 Ω
VIC = 0,
VO = 0,
2500
RS = 50 Ω
Ω,
25°C
0.003
µV/mo
25°C
0.5
100
1
High-level output voltage
Low-level output voltage
Large-signal
g
g
differential voltage
g amplification
0
to
4
Full range
0
to
3.5
25°C
IOL = 50 µA
IOL = 500 µA
VIC = 2
2.5
5V
V,
100
25°C
|VIO| ≤ 5 mV
IOH = – 100 µA
– 0.3
to
4.2
4.85
Full range
4.82
25°C
4.70
Full range
4.60
V
0.01
0.09
Full range
Full range
VIC = 2
2.5
5V
V,
IOL = 4
mA
Full range
VIC = 2.5
2 5 V,
V
VO = 1 V to 4 V
RL = 50 kه
V
4.85
25°C
mA
pA
4.94
25°C
IOL = 1
pA
4.99
25°C
VIC = 2
2.5
5V
V,
RL = 1 Mه
µV
µV/°C
Full range
Common mode input voltage range
Common-mode
UNIT
2
25°C
VIC = 2.5 V,
AVD
300
Full range
IOH = – 400 µA
VOL
MAX
3000
25°C
to 70°C
IOH = – 20 µA
VOH
TYP
Full range
Input offset voltage long-term drift
(see Note 4)
Input offset current
TLC2264C
MIN
25°C
VIO
IIO
TA†
0.15
0.15
25°C
0.2
0.3
V
0.3
25°C
0.7
1
1.2
25°C
80
Full range
55
170
V/mV
25°C
550
ri(d)
Differential input resistance
25°C
1012
Ω
ri(c)
Common-mode input resistance
25°C
1012
Ω
ci(c)
Common-mode input capacitance
f = 10 kHz,
N package
25°C
8
pF
zo
Closed-loop output impedance
f = 100 kHz,
AV = 10
25°C
240
Ω
CMRR
Common mode rejection ratio
Common-mode
VIC = 0 to 2.7 V,,
RS = 50 Ω
VO = 2.5 V,,
kSVR
Supply voltage rejection ratio (∆VDD /∆VIO)
Supply-voltage
VDD = 4.4 V to 16 V,
VIC = VDD /2,
No load
IDD
Supply current (four amplifiers)
VO = 2
2.5
5V
V,
No load
25°C
70
Full range
70
25°C
80
Full range
80
25°C
Full range
83
dB
95
0.8
dB
1
1
mA
† Full range is 0°C to 70°C.
‡ Referenced to 2.5 V
NOTE 4. Typical values are based on the input offset voltage shift observed through 500 hours of operating life test at TA = 150°C extrapolated
to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
10
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
TLC226x, TLC226xA
Advanced LinCMOS RAIL-TO-RAIL
OPERATIONAL AMPLIFIERS
SLOS177D – FEBRUARY 1997 – REVISED MARCH 2001
TLC2264C operating characteristics at specified free-air temperature, VDD = 5 V
PARAMETER
SR
Slew rate at unity gain
Vn
Equivalent input noise voltage
VN(PP)
Peak-to-peak equivalent
q
input noise
voltage
In
Equivalent input noise current
THD + N
ts
φm
VO = 1
1.4
4 V to 2
2.6
6V
V,
CL = 100 pF
F‡
RL = 50 kه,
25°C
0.35
0.55
Full
range
03
0.3
40
12
f = 0.1 Hz to 1 Hz
25°C
0.7
f = 0.1 Hz to 10 Hz
25°C
1.3
25°C
0.6
AV = 1,
CL = 100 pF‡
To 0.1%
0 1%
Settling time
AV = – 1,
Step = 0.5 V to 2.5 V,,
RL = 50 kه,
CL = 100 pF‡
RL = 50 kه,
CL = 100 pF‡
POST OFFICE BOX 655303
nV/√Hz
µV
fA /√Hz
25°C
0.03%
25°C
0.71
MHz
25°C
185
kHz
64
6.4
µs
25°C
To 0.01%
0 01%
• DALLAS, TEXAS 75265
UNIT
0.017%
AV = 10
RL = 50 kه,
MAX
V/µs
25°C
VO(PP) = 2 V,
RL = 50 kه,
Gain margin
† Full range is 0°C to 70°C.
‡ Referenced to 2.5 V
TYP
25°C
Maximum output-swing bandwidth
Phase margin at unity gain
MIN
f = 1 kHz
AV = 1
Total harmonic distortion plus noise
TLC2264C
TA†
f = 10 Hz
VO = 0.5 V to 2.5 V,
f = 20 kHz,
kHz
RL = 50 kه
f = 10 kHz,
CL = 100 pF‡
Gain-bandwidth product
BOM
TEST CONDITIONS
14 1
14.1
25°C
56°
25°C
11
dB
11
TLC226x, TLC226xA
Advanced LinCMOS RAIL-TO-RAIL
OPERATIONAL AMPLIFIERS
SLOS177D – FEBRUARY 1997 – REVISED MARCH 2001
TLC2264C electrical characteristics at specified free-air temperature, VDD± = ±5 V (unless
otherwise specified)
PARAMETER
TEST CONDITIONS
Input offset voltage
αVIO
Temperature coefficient of input offset voltage
IIB
Input bias current
VICR
300
2500
VIC = 0,
RS = 50 Ω
VO = 0,
25°C
0.003
µV/mo
25°C
0.5
100
25°C
|VIO| ≤ 5 mV
mV,
1
IO = 50 µA
IO = 500 µA
VIC = 0
0,
Maximum negative peak output voltage
Large-signal differential voltage amplification
–5
to
4
Full range
g
–5
to
3.5
25°C
IO = – 400 µA
VIC = 0,
4.85
Full range
4.82
25°C
4.7
Full range
4.6
25°C
– 4.85
Full range
– 4.85
25°C
– 4.7
– 4.7
mA
Full range
VIC = 0
0,
IO = 4
mA
Full range
RL = 50 kΩ
RL = 1 MΩ
25°C
pA
V
4.94
V
4.85
– 4.99
25°C
IO = 1
– 5.3
to
4.2
pA
4.99
25°C
VIC = 0
0,
VO = ± 4 V
100
25°C
RS = 50 Ω
IO = – 100 µA
µV
µV/°C
Full range
Common mode input voltage range
Common-mode
UNIT
2
Full range
VOM + Maximum positive peak output voltage
AVD
MAX
3000
25°C
to 70°C
IO = – 20 µA
VOM –
TYP
Full range
Input offset voltage long-term drift (see Note 4)
Input offset current
TLC2264C
MIN
25°C
VIO
IIO
TA†
–4
– 4.91
V
– 4.8
– 4.3
– 3.8
25°C
80
Full range
55
200
V/mV
25°C
1000
ri(d)
Differential input resistance
25°C
1012
Ω
ri(c)
Common-mode input resistance
25°C
1012
Ω
ci(c)
Common-mode input capacitance
f = 10 kHz,
25°C
8
pF
zo
Closed-loop output impedance
f = 100 kHz,
25°C
220
Ω
N package
AV = 10
VIC = – 5 V to 2.7 V,
Common mode rejection ratio
CMRR Common-mode
kSVR
Supply voltage rejection ratio (∆VDD ± /∆VIO)
Supply-voltage
IDD
Supply current (four amplifiers)
25°C
75
VO = 0,
RS = 50 Ω
VDD ± = ± 2.2 V to ± 8 V,
Full range
75
25°C
80
VIC = 0,
No load
Full range
80
VO = 0
0,
No load
25°C
Full range
88
dB
95
0.85
dB
1
1
mA
† Full range is 0°C to 70°C.
NOTE 4: Typical values are based on the input offset voltage shift observed through 500 hours of operating life test at TA = 150°C extrapolated
to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
12
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
TLC226x, TLC226xA
Advanced LinCMOS RAIL-TO-RAIL
OPERATIONAL AMPLIFIERS
SLOS177D – FEBRUARY 1997 – REVISED MARCH 2001
TLC2264C operating characteristics at specified free-air temperature, VDD ± = ±5 V
PARAMETER
SR
Slew rate at unity gain
Vn
Equivalent input noise voltage
VN(PP)
Peak-to-peak equivalent
q
input noise
voltage
In
Equivalent input noise current
THD + N
Total harmonic distortion plus noise
BOM
ts
φm
TEST CONDITIONS
VO = ± 1
1.9
9V
V,
CL = 100 pF
F
RL = 50 kΩ,
kΩ
TLC2264C
TA†
MIN
TYP
25°C
0.35
0.55
Full
range
03
0.3
MAX
UNIT
V/µs
f = 10 Hz
25°C
43
f = 1 kHz
25°C
12
f = 0.1 Hz to 1 Hz
25°C
0.8
f = 0.1 Hz to 10 Hz
25°C
1.3
25°C
0.6
nV/√Hz
µV
fA /√Hz
VO = ± 2.3 V,
f = 20 kHz,
kHz
RL = 50 kΩ
AV = 1
Gain bandwidth product
Gain-bandwidth
f = 10 kHz,,
CL = 100 pF
RL = 50 kΩ,,
25°C
0 73
0.73
MHz
Maximum output-swing
output swing bandwidth
VO(PP) = 4.6 V,,
RL = 50 kΩ,
AV = 1,,
CL = 100 pF
25°C
70
kHz
0 1%
To 0.1%
Settling time
AV = – 1,
Step = – 2.3 V to 2.3 V,,
RL = 50 kΩ,
CL = 100 pF
kΩ
RL = 50 kΩ,
CL = 100 pF
Phase margin at unity gain
Gain margin
† Full range is 0°C to 70°C.
POST OFFICE BOX 655303
0.014%
25°C
AV = 10
0.024%
71
7.1
µs
25°C
To 0
0.01%
01%
• DALLAS, TEXAS 75265
16 5
16.5
25°C
57°
25°C
11
dB
13
TLC226x, TLC226xA
Advanced LinCMOS RAIL-TO-RAIL
OPERATIONAL AMPLIFIERS
SLOS177D – FEBRUARY 1997 – REVISED MARCH 2001
TLC2262I electrical characteristics at specified free-air temperature, VDD = 5 V (unless otherwise
noted)
PARAMETER
VIO
Input offset voltage
αVIO
Temperature
coefficient
of input offset voltage
Input offset voltage
long-term drift
(see Note 4)
IIO
TEST CONDITIONS
TA†
TLC2262I
MIN
25°C
MAX
300
2500
Full range
VIC = 0,
RS = 50 Ω
Input offset current
VICR
RS = 50 Ω
Ω,
VOH
High level output
High-level
voltage
0.003
0.003
µV/mo
25°C
0.5
IOH = – 400 µA
VIC = 2.5 V,
VOL
Low-level
Low
level output
voltage
VIC = 2
2.5
5V
V,
VIC = 2
2.5
5V
V,
AVD
Large signal
Large-signal
differential
voltage amplification
VIC = 2
2.5
5V
V,
VO = 1 V to 4 V
IOL = 50 µA
IOL = 500 µA
IOL = 4
mA
0.5
150
150
800
800
1
1
pA
pA
pA
85°C
150
150
pA
Full range
800
800
pA
25°C
0
to
4
Full range
g
0
to
3.5
25°C
IOH = – 100 µA
µV
25°C
|VIO| ≤ 5 mV
IOH = – 20 µA
950
1500
UNIT
µV/°C
25°C
Common-mode input
voltage range
300
MAX
2
85°C
Input bias current
TYP
2
Full range
IIB
MIN
3000
25°C
to 85°C
VDD ± = ± 2.5 V,
VO = 0,,
TLC2262AI
TYP
– 0.3
to
4.2
0
to
4
4.85
Full range
4.82
25°C
4.7
Full range
4.5
V
0
to
3.5
4.99
25°C
– 0.3
to
4.2
4.99
4.94
4.85
4.94
V
4.82
4.85
4.7
4.85
4.5
25°C
0.01
25°C
0.09
Full range
0.01
0.15
0.09
0.15
25°C
0.8
Full range
0.15
1
0.7
1.2
100
0.15
V
1
1.2
RL = 50 kه
25°C
80
80
170
Full range
50
RL = 1 Mه
25°C
550
550
50
V/mV
ri(d)
Differential input
resistance
25°C
1012
1012
Ω
ri(c)
Common-mode input
resistance
25°C
1012
1012
Ω
ci(c)
Common-mode input
capacitance
f = 10 kHz,
P package
25°C
8
8
pF
zo
Closed-loop output
impedance
f = 100 kHz,
AV = 10
25°C
240
240
Ω
CMRR
Common-mode
rejection ratio
VIC = 0 to 2.7 V,, VO = 2.5 V,,
RS = 50 Ω
25°C
70
Full range
70
83
70
70
83
dB
† Full range is – 40°C to 125°C.
‡ Referenced to 2.5 V
NOTE 4: Typical values are based on the input offset voltage shift observed through 500 hours of operating life test at TA = 150°C extrapolated
to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
14
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
TLC226x, TLC226xA
Advanced LinCMOS RAIL-TO-RAIL
OPERATIONAL AMPLIFIERS
SLOS177D – FEBRUARY 1997 – REVISED MARCH 2001
TLC2262I operating characteristics at specified free-air temperature, VDD = 5 V
PARAMETER
TEST CONDITIONS
TA†
TLC2262I
MIN
25°C
80
Full
range
80
TYP
TLC2262AI
MAX
95
MIN
80
TYP
MAX
UNIT
95
kSVR
Supply-voltage
y
g rejection ratio
(∆VDD /∆VIO)
VDD = 4
4.4
4 V to 16 V,
V
VIC = VDD /2,
No load
IDD
Supply current
VO = 2.5 V,
No load
SR
Slew rate at unity
gain
VO = 1
1.5
5 V to 3
3.5
5V
V,
CL = 100 pF
F‡
RL = 50 kه,
Vn
Equivalent
q
input
noise voltage
f = 10 Hz
25°C
40
40
f = 1 kHz
25°C
12
12
Peak-to-peak
equivalent input
noise voltage
f = 0.1 Hz to 1 Hz
25°C
0.7
0.7
VN(PP)
f = 0.1 Hz to 10 Hz
25°C
1.3
1.3
In
Equivalent input
noise current
25°C
0.6
0.6
Total harmonic
distortion plus
noise
VO = 0.5 V to 2.5 V,
f = 20 kHz,
kHz
RL = 50 kه
AV = 1
0.017%
0.017%
THD + N
0.03%
0.03%
Gain-bandwidth
product
f = 50 kHz,
CL = 100 pF‡
RL = 50 kه,
25°C
0 82
0.82
0 82
0.82
MHz
BOM
Maximum outputswing bandwidth
VO(PP) = 2 V,,
RL = 50 kه,
AV = 1,,
CL = 100 pF‡
25°C
185
185
kHz
64
6.4
64
6.4
Settling time
AV = – 1,
Step = 0.5 V to 2.5 V,,
RL = 50 kه,
CL = 100 pF‡
To 0.1%
0 1%
ts
14 1
14.1
14 1
14.1
RL = 50 kه,
CL = 100 pF‡
25°C
56°
56°
25°C
11
11
25°C
φm
Phase margin at
unity gain
dB
80
400
Full
range
500
400
500
25°C
0.35
Full
range
0 25
0.25
0.55
500
0.35
0.55
V/µs
0 25
0.25
nV/√Hz
µV
fA√Hz
µs
25°C
01%
To 0
0.01%
POST OFFICE BOX 655303
µA
25°C
AV = 10
Gain margin
† Full range is – 40°C to 125°C.
‡ Referenced to 2.5 V
500
• DALLAS, TEXAS 75265
dB
15
TLC226x, TLC226xA
Advanced LinCMOS RAIL-TO-RAIL
OPERATIONAL AMPLIFIERS
SLOS177D – FEBRUARY 1997 – REVISED MARCH 2001
TLC2262I electrical characteristics at specified free-air temperature, VDD± = ±5 V (unless otherwise
noted)
PARAMETER
VIO
Input offset voltage
αVIO
Temperature coefficient of
input offset voltage
Input offset voltage
long-term drift
(see Note 4)
IIO
TA†
TEST CONDITIONS
TLC2262I
MIN
25°C
25°C
to 85°C
25°C
0.003
0.003
µV/mo
25°C
0.5
VOM –
VIC = 0
0,
IO = 4
mA
RL = 50 kΩ
pA
pA
Full range
800
800
pA
1
1
pA
85°C
150
150
pA
Full range
800
800
pA
–5
to 4
4.85
4.82
25°C
4.7
Full range
4.5
25°C
– 4.85
Full range
– 4.85
–4
4.94
80
Full range
50
V
4.99
4.85
4.94
V
4.82
4.85
4.7
4.85
4.5
– 4.91
– 4.99
– 4.85
– 4.91
V
– 4.85
– 4.3
– 3.8
25°C
– 5.3
to 4.2
–5
to 3.5
– 4.99
25°C
Full range
–5
to 4
4.99
25°C
25°C
– 5.3
to 4.2
–5
to 3.5
Full range
IO = 50 µA
IO = 500 µA
0.5
150
25°C
IO = – 100 µA
VIC = 0
0,
µV
µV/°C
|VIO| ≤ 5 mV
IO = – 400 µA
Maximum
M
i
negative
ti peak
k
out
ut voltage
output
1500
2
Full range
VIC = 0,
950
150
IO = – 20 µA
M i
Maximum
positive
iti peak
k
VOM +
out ut voltage
output
300
UNIT
85°C
Input bias current
RS = 50 Ω
Ω,
MAX
2
25°C
VICR
2500
TYP
VO = 0
Input offset current
Common-mode input
voltage range
300
MIN
3000
25°C
IIB
MAX
Full range
VIC = 0,
RS = 50 Ω
TLC2262AI
TYP
–4
– 4.3
– 3.8
200
80
200
AVD
L
i
l diff
ti l
Large-signal
differential
voltage am
lification
amplification
25°C
1000
1000
ri(d)
Differential input
resistance
25°C
1012
1012
Ω
ri(c)
Common-mode input
resistance
25°C
1012
1012
Ω
ci(c)
Common-mode input
capacitance
f = 10 kHz,
P package
25°C
8
8
pF
zo
Closed-loop output
impedance
f = 100 kHz,
AV = 10
25°C
220
220
Ω
CMRR
Common-mode
rejection ratio
VIC = – 5 V to 2.7 V,,
VO = 0,
RS = 50 Ω
25°C
75
Full range
75
kSVR
Supply-voltage
y
g rejection
j
ratio (∆VDD ± /∆VIO)
VDD = 4.4 V to 16 V,,
VIC = VDD /2, No load
25°C
80
Full range
80
VO = ± 4 V
RL = 1 MΩ
V/mV
50
88
75
88
75
95
80
80
95
dB
dB
† Full range is – 40°C to 125°C.
NOTE 4: Typical values are based on the input offset voltage shift observed through 500 hours of operating life test at TA = 150°C extrapolated
to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
16
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
TLC226x, TLC226xA
Advanced LinCMOS RAIL-TO-RAIL
OPERATIONAL AMPLIFIERS
SLOS177D – FEBRUARY 1997 – REVISED MARCH 2001
TLC2262I operating characteristics at specified free-air temperature, VDD ± = ±5 V
PARAMETER
TEST CONDITIONS
TA†
TLC2262I
MIN
25°C
TLC2262AI
TYP
MAX
425
500
MIN
TYP
MAX
425
500
UNIT
IDD
Supply Current
VO = 2.5 V,
No load
SR
Slew rate at unity
gain
9V
VO = ± 1
1.9
V,
CL = 100 pF
F
kΩ
RL = 50 kΩ,
Vn
Equivalent
q
input
noise voltage
f = 10 Hz
25°C
43
43
f = 1 kHz
25°C
12
12
Peak-to-peak
equivalent input
noise voltage
f = 0.1 Hz to 1 Hz
25°C
0.8
0.8
VN(PP)
f = 0.1 Hz to 10 Hz
25°C
1.3
1.3
In
Equivalent input
noise current
25°C
0.6
0.6
Total harmonic
distortion plus
noise
VO = ± 2.3 V,
RL = 50 kΩ,
kΩ
f = 20 kHz
AV = 1
0.014%
0.014%
THD + N
0.024%
0.024%
Gain-bandwidth
product
f =10 kHz,,
CL = 100 pF
RL = 50 kΩ,,
25°C
0 73
0.73
0 73
0.73
MHz
Maximum
output swing
output-swing
bandwidth
VO(PP) = 4.6 V,,
RL = 50 kΩ,
AV = 1,,
CL = 100 pF
25°C
85
85
kHz
0 1%
To 0.1%
71
7.1
71
7.1
Settling time
AV = – 1,
Step = – 2.3 V to 2.3 V,,
RL = 50 kΩ,
CL = 100 pF
16 5
16.5
16 5
16.5
RL = 50 kΩ,
CL = 100 pF
25°C
57°
57°
25°C
11
11
BOM
ts
φm
Phase margin at
unity gain
Full
range
500
25°C
0.35
Full
range
0 25
0.25
0.55
500
0.35
0.55
V/µs
0 25
0.25
fA√Hz
µs
25°C
To 0
0.01%
01%
POST OFFICE BOX 655303
µV
25°C
AV = 10
Gain margin
† Full range is – 40°C to 125°C.
nV/√Hz
• DALLAS, TEXAS 75265
dB
17
TLC226x, TLC226xA
Advanced LinCMOS RAIL-TO-RAIL
OPERATIONAL AMPLIFIERS
SLOS177D – FEBRUARY 1997 – REVISED MARCH 2001
TLC2264I electrical characteristics at specified free-air temperature, VDD = 5 V (unless otherwise
noted)
PARAMETER
VIO
Input offset voltage
αVIO
Temperature coefficient
of input offset voltage
Input offset voltage
long-term drift (see Note 4)
IIO
TA†
TEST CONDITIONS
TLC2264I
MIN
25°C
VICR
25°C
to 125°C
VIC = 0,
RS = 50 Ω
Input offset current
Input bias current
Common-mode input
voltage range
RS = 50 Ω
Ω,
High-level
High
level output
voltage
IOH = – 100 µA
VIC = 2.5 V,
Low-level
Low
level output
voltage
VIC = 2
2.5
5V
V,
VIC = 2
2.5
5V
V,
AVD
Large-signal
Large
signal differential
amplification
voltage am
lification
VIC = 2
2.5
5V
V,
VO = 1 V to 4 V
IOL = 50 µA
IOL = 500 µA
IOL = 4
mA
300
MAX
950
1500
UNIT
µV
2
µV/°C
25°C
0.003
0.003
µV/mo
25°C
0.5
0.5
85°C
150
150
Full range
800
800
1
150
150
Full range
800
800
25°C
0
to
4
Full range
0
to
3.5
– 0.3
to
4.2
0
to
4
4.85
Full range
4.82
25°C
4.7
Full range
4.5
– 0.3
to
4.2
4.99
4.94
4.85
4.94
V
4.82
4.85
4.7
4.85
4.5
25°C
0.01
25°C
0.09
Full range
0.01
0.15
0.09
0.15
25°C
pA
V
0
to
3.5
4.99
25°C
pA
1
85°C
25°C
IOH = – 400 µA
VOL
2500
TYP
2
|VIO| ≤ 5 mV
IOH = – 20 µA
VOH
300
MIN
3000
25°C
IIB
MAX
Full range
VDD ± =±
± 2.5 V,
VO = 0,
TLC2264AI
TYP
0.8
Full range
0.15
1
0.7
1.2
100
0.15
V
1
1.2
RL = 50 kه
25°C
80
80
170
Full range
50
RL = 1 Mه
25°C
550
550
50
V/mV
ri(d)
Differential input
resistance
25°C
1012
1012
Ω
ri(c)
Common-mode
input resistance
25°C
1012
1012
Ω
ci(c)
Common-mode
input capacitance
f = 10 kHz,
N package
25°C
8
8
pF
zo
Closed-loop
output impedance
f = 100 kHz,
AV = 10
25°C
240
240
Ω
CMRR
Common-mode
rejection ratio
VIC = 0 to 2.7 V,
RS = 50 Ω
VO = 2.5 V,
kSVR
Supply-voltage
rejection ratio
(∆VDD /∆VIO)
VDD = 4.4 V to 16 V,
VIC = VDD /2,
No load
25°C
70
Full range
70
25°C
80
Full range
80
83
70
83
70
95
80
dB
95
dB
80
† Full range is – 40°C to 125°C.
‡ Referenced to 2.5 V
NOTE 4: Typical values are based on the input offset voltage shift observed through 500 hours of operating life test at TA = 150°C extrapolated
to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
18
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
TLC226x, TLC226xA
Advanced LinCMOS RAIL-TO-RAIL
OPERATIONAL AMPLIFIERS
SLOS177D – FEBRUARY 1997 – REVISED MARCH 2001
TLC2264I operating characteristics at specified free-air temperature, VDD = 5 V
PARAMETER
TEST CONDITIONS
TA†
TLC2264I
MIN
25°C
TLC2264AI
TYP
MAX
0.8
1
MIN
TYP
MAX
0.8
1
UNIT
IDD
Supply current
(four amplifiers)
VO = 2.5 V,
No load
SR
Slew rate at unity
gain
4 V to 2
6V
VO = 1
1.4
2.6
V,
CL = 100 pF
F‡
RL = 50 kه,
Vn
Equivalent
q
input
noise voltage
f = 10 Hz
25°C
40
40
f = 1 kHz
25°C
12
12
Peak-to-peak
equivalent input
noise voltage
f = 0.1 Hz to 1 Hz
25°C
0.7
0.7
VN(PP)
f = 0.1 Hz to 10 Hz
25°C
1.3
1.3
In
Equivalent input
noise current
25°C
0.6
0.6
Total harmonic
distortion plus
noise
VO = 0.5 V to 2.5 V,
f = 20 kHz,
kHz
RL = 50 kه
AV = 1
0.017%
0.017%
THD + N
0.03%
0.03%
Gain-bandwidth
product
f = 50 kHz,
CL = 100 pF‡
RL = 50 kه,
25°C
0 71
0.71
0 71
0.71
MHz
Maximum outputswing bandwidth
VO(PP) = 2 V,,
RL = 50 kه,
AV = 1,,
CL = 100 pF‡
25°C
185
185
kHz
To 0.1%
0 1%
64
6.4
64
6.4
Settling time
AV = – 1,
Step = 0.5 V to 2.5 V,,
RL = 50 kه,
CL = 100 pF‡
14 1
14.1
14 1
14.1
RL = 50 kه,
CL = 100 pF‡
25°C
56°
56°
25°C
11
11
BOM
ts
φm
Phase margin at
unity gain
Full
range
1
25°C
0.35
Full
range
0 25
0.25
0.55
1
0.35
0.55
V/µs
0 25
0.25
µV
fA /√Hz
µs
25°C
To 0
0.01%
01%
POST OFFICE BOX 655303
nV/√Hz
25°C
AV = 10
Gain margin
† Full range is – 40°C to 125°C.
‡ Referenced to 2.5 V
V/µs
• DALLAS, TEXAS 75265
dB
19
TLC226x, TLC226xA
Advanced LinCMOS RAIL-TO-RAIL
OPERATIONAL AMPLIFIERS
SLOS177D – FEBRUARY 1997 – REVISED MARCH 2001
TLC2264I electrical characteristics at specified free-air temperature, VDD± = ±5 V (unless otherwise
noted)
PARAMETER
VIO
Input offset voltage
αVIO
Temperature coefficient of
input offset voltage
Input offset voltage
long-term drift
(see Note 4)
IIO
TA†
TEST CONDITIONS
TLC2264I
MIN
25°C
VICR
25°C
to 125°C
VO = 0,
Input offset current
RS = 50 Ω
Ω,
µV/°C
25°C
0.003
0.003
µV/mo
25°C
0.5
VOM –
Maximum negative peak
out
ut voltage
output
IO = 500 µA
VIC = 0
0,
VIC = 0
0,
AVD
Large signal differential
Large-signal
voltage am
lification
amplification
IO = 4
VO = ± 4 V
mA
RL = 50 kΩ
0.5
150
Full range
800
800
1
1
pA
pA
85°C
150
150
pA
Full range
800
800
pA
25°C
–5
to
4
Full range
g
–5
to
3.5
4.85
Full range
4.82
25°C
4.7
Full range
4.5
25°C
– 4.85
Full range
– 4.85
Full range
–4
80
Full range
50
– 5.3
to
4.2
V
–5
to
3.5
4.94
4.99
4.85
4.94
V
4.82
4.85
4.7
4.85
4.5
– 4.91
– 4.99
– 4.85
– 4.91
V
– 4.85
– 4.3
– 3.8
25°C
RL = 1 MΩ
–5
to
4
– 4.99
25°C
25°C
– 5.3
to
4.2
4.99
25°C
IO = 50 µA
VIC = 0,
µV
2
25°C
IO = – 400 µA
950
1500
UNIT
2
|VIO| ≤ 5 mV
IO = – 100 µA
300
MAX
150
IO = – 20 µA
Maximum positive peak
VOM +
out
ut voltage
output
2500
TYP
85°C
Input bias current
Common-mode input
voltage range
300
MIN
3000
25°C
IIB
MAX
Full range
VIC = 0,
RS = 50 Ω
TLC2264AI
TYP
–4
– 4.3
– 3.8
200
80
200
V/mV
50
25°C
1000
1000
ri(d)
Differential input
resistance
25°C
1012
1012
Ω
ri(c)
Common-mode input
resistance
25°C
1012
1012
Ω
ci(c)
Common-mode input
capacitance
f = 10 kHz,
N package
25°C
8
8
pF
zo
Closed-loop output
impedance
f = 100 kHz,
AV = 10
25°C
220
220
Ω
CMRR
Common-mode
rejection ratio
VIC = – 5 V to 2.7 V,
RS = 50 Ω
VO = 0,
25°C
75
Full range
75
kSVR
Supply-voltage
y
g rejection
j
ratio (∆VDD ± /∆VIO)
VDD± = ± 2.2 V to ± 8 V,
VIC = VDD /2, No load
25°C
80
Full range
80
88
75
88
75
95
80
80
95
dB
dB
† Full range is – 40°C to 125°C.
NOTE 4: Typical values are based on the input offset voltage shift observed through 500 hours of operating life test at TA = 150°C extrapolated
to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
20
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
TLC226x, TLC226xA
Advanced LinCMOS RAIL-TO-RAIL
OPERATIONAL AMPLIFIERS
SLOS177D – FEBRUARY 1997 – REVISED MARCH 2001
TLC2264I operating characteristics at specified free-air temperature, VDD ± = ±5 V
PARAMETER
TEST CONDITIONS
TA†
TLC2264I
MIN
25°C
TLC2264AI
TYP
MAX
0.85
1
MIN
TYP
MAX
0.85
1
UNIT
IDD
Supply current
(four amplifiers)
VO = 0,
No load
SR
Slew rate at unity
gain
9V
VO = ± 1
1.9
V,
CL = 100 pF
F
kΩ
RL = 50 kΩ,
Vn
Equivalent
q
input
noise voltage
f = 10 Hz
25°C
43
43
f = 1 kHz
25°C
12
12
Peak-to-peak
equivalent input
noise voltage
f = 0.1 Hz to 1 Hz
25°C
0.8
0.8
VN(PP)
f = 0.1 Hz to 10 Hz
25°C
1.3
1.3
In
Equivalent input
noise current
25°C
0.6
0.6
THD + N
Total harmonic
distortion plus
noise
VO = ± 2.3 V,
RL = 50 kΩ,
kΩ
f = 20 kHz
AV = 1
Gain-bandwidth
product
f =10 kHz,,
CL = 100 pF
RL = 50 kΩ,,
25°C
0 73
0.73
0 73
0.73
MHz
Maximum outputswing bandwidth
VO(PP) = 4.6 V,,
RL = 50 kΩ,
AV = 1,,
CL = 100 pF
25°C
70
70
kHz
To 0.1%
0 1%
71
7.1
71
7.1
Settling time
AV = – 1,
Step = – 2.3 V to 2.3 V,,
RL = 50 kΩ,
CL = 100 pF
16 5
16.5
16 5
16.5
RL = 50 kΩ,
CL = 100 pF
25°C
57°
57°
25°C
11
11
BOM
ts
φm
Phase margin at
unity gain
Full
range
1
25°C
0.35
Full
range
0 25
0.25
0.55
1
0.35
0.55
V/µs
0 25
0.25
0.014%
0.014%
0.024%
0.024%
fA /√Hz
µs
25°C
To 0
0.01%
01%
POST OFFICE BOX 655303
µV
25°C
AV = 10
Gain margin
† Full range is – 40°C to 125°C.
nV/√Hz
• DALLAS, TEXAS 75265
dB
21
TLC226x, TLC226xA
Advanced LinCMOS RAIL-TO-RAIL
OPERATIONAL AMPLIFIERS
SLOS177D – FEBRUARY 1997 – REVISED MARCH 2001
TLC2262Q/M electrical characteristics at specified free-air temperature, VDD = 5 V (unless
otherwise noted)
PARAMETER
TA†
TEST CONDITIONS
TLC2262Q,
TLC2262M
MIN
VIO
Input offset voltage
αVIO
Temperature coefficient
of input offset voltage
Input offset voltage
long-term drift
(see Note 4)
IIO
Input offset current
IIB
Input bias current
VICR
Common-mode input
voltage
g range
g
25°C
VIC = 0,
RS = 50 Ω
Low level output
Low-level
voltage
IOL = 50 µA
5V
VIC = 2
2.5
V,
IOL = 500 µA
Large signal differential
Large-signal
voltage am
lification
amplification
5V
VIC = 2
2.5
V,
VO = 1 V to 4 V
IOL = 4
mA
950
1500
µV
25°C
0.003
0.003
µV/mo
25°C
0.5
0.5
800
800
1
1
800
0 to 4
– 0.3
to 4.2
800
0 to 4
0 to
3.5
35
25°C
VIC = 2.5 V,
300
UNIT
MAX
µV/°C
|VIO| ≤ 5 mV
IOH = – 100 µA
TYP
5
25°C
RS = 50 Ω
Ω,
MIN
5
25°C
VIC = 2
2.5
5V
V,
AVD
2500
125°C
IOH = – 400 µA
VOL
300
125°C
IOH = – 20 µA
High-level
High
level output
voltage
MAX
3000
Full range
Full range
VOH
TYP
Full range
VDD ± = ± 2.5 V,
VO = 0,
TLC2262AQ,
TLC2262AM
4.85
Full range
4.82
25°C
4.7
Full range
4.5
4.99
4.94
4.85
4.94
V
4.82
4.85
4.7
4.85
4.5
25°C
0.01
25°C
0.09
Full range
0.01
0.15
0.09
0.15
25°C
pA
V
0 to
3.5
35
4.99
25°C
– 0.3
to 4.2
pA
0.8
Full range
0.15
1
0.7
1.2
100
0.15
V
1
1.2
RL = 50 kه
25°C
80
80
170
Full range
50
RL = 1 Mه
25°C
550
550
50
V/mV
ri(d)
Differential input
resistance
25°C
1012
1012
Ω
ri(c)
Common-mode input
resistance
25°C
1012
1012
Ω
ci(c)
Common-mode input
capacitance
f = 10 kHz,
P package
25°C
8
8
pF
zo
Closed-loop output
impedance
f = 100 kHz,
AV = 10
25°C
240
240
Ω
CMRR
Common-mode
rejection ratio
VIC = 0 to 2.7 V, VO = 2.5 V,
RS = 50 Ω
kSVR
Supply-voltage
y
g rejection
j
ratio (∆VDD /∆VIO)
VDD = 4.4 V to 16 V,
VIC = VDD /2,
No load
IDD
Supply current
VO = 2
2.5
5V
V,
No load
25°C
70
Full range
70
25°C
80
Full range
80
25°C
Full range
83
70
83
dB
70
95
80
95
dB
80
400
500
500
400
500
500
µA
† Full range is – 40°C to 125°C for Q suffix, – 55°C to 125°C for M suffix.
‡ Referenced to 2.5 V
NOTE 4: Typical values are based on the input offset voltage shift observed through 500 hours of operating life test at TA = 150°C extrapolated
to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
22
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
TLC226x, TLC226xA
Advanced LinCMOS RAIL-TO-RAIL
OPERATIONAL AMPLIFIERS
SLOS177D – FEBRUARY 1997 – REVISED MARCH 2001
TLC2262Q/M operating characteristics at specified free-air temperature, VDD = 5 V
PARAMETER
TLC2262Q,
TLC2262M
TA†
TEST CONDITIONS
RL = 50 kه,
MIN
TYP
25°C
0.35
0.55
Full
range
0 25
0.25
TLC2262AQ,
TLC2262AM
MAX
MIN
TYP
0.35
0.55
Slew rate at unity
gain
VO = 0
0.5
5 V to 3
3.5
5V
V,
CL = 100 pF
F‡
Vn
Equivalent
q
input
noise voltage
f = 10 Hz
25°C
40
40
f = 1 kHz
25°C
12
12
Peak-to-peak
equivalent input
noise voltage
f = 0.1 Hz to 1 Hz
25°C
0.7
0.7
VN(PP)
f = 0.1 Hz to 10 Hz
25°C
1.3
1.3
In
Equivalent input
noise current
25°C
0.6
0.6
THD + N
Total harmonic
distortion plus
noise
SR
BOM
ts
φm
VO = 0.5 V to 2.5 V,
f = 20 kHz,
kHz
RL = 50 kه
AV = 1
Gain-bandwidth
product
f = 50 kHz,
CL = 100 pF‡
RL = 50 kه,
Maximum outputswing bandwidth
VO(PP) = 2 V,,
RL = 50 kه,
AV = 1,,
CL = 100 pF‡
0 1%
To 0.1%
Settling time
AV = – 1,
Step = 0.5 V to 2.5 V,,
RL = 50 kه,
CL = 100 pF‡
RL = 50 kه,
CL = 100 pF‡
Phase margin at
unity gain
V/µs
0 25
0.25
nV/√Hz
µV
fA√Hz
0.017%
0.017%
0.03%
0.03%
25°C
0 82
0.82
0 82
0.82
MHz
25°C
185
185
kHz
64
6.4
64
6.4
14 1
14.1
14 1
14.1
25°C
56°
56°
25°C
11
11
25°C
AV = 10
µs
25°C
To 0
0.01%
01%
Gain margin
† Full range is – 40°C to 125°C for Q suffix, – 55°C to 125°C for M suffix.
‡ Referenced to 2.5 V
POST OFFICE BOX 655303
UNIT
MAX
• DALLAS, TEXAS 75265
dB
23
TLC226x, TLC226xA
Advanced LinCMOS RAIL-TO-RAIL
OPERATIONAL AMPLIFIERS
SLOS177D – FEBRUARY 1997 – REVISED MARCH 2001
TLC2262Q/M electrical characteristics at specified free-air temperature, VDD± = ±5 V (unless
otherwise noted)
PARAMETER
TA†
TEST CONDITIONS
TLC2262Q,
TLC2262M
MIN
VIO
Input offset voltage
αVIO
Temperature coefficient of
input offset voltage
Input offset voltage longterm drift (see Note 4)
IIO
Input offset current
IIB
Input bias current
VICR
Common-mode input
voltage range
25°C
VO = 0,
Large-signal
Large
signal differential
amplification
voltage am
lification
IO = 4
VO = ± 4 V
mA
RL = 50 kΩ
0.003
µV/mo
25°C
0.5
0.5
800
–5
to 4
– 5.3
to 4
800
–5
to 4
–5
to 3.5
4.82
25°C
4.7
Full range
4.5
25°C
– 4.85
Full range
– 4.85
–4
4.85
80
Full range
50
pA
V
4.94
V
4.82
4.85
4.7
4.85
4.5
– 4.99
– 4.91
– 4.85
– 4.91
V
– 4.85
– 4.3
–4
– 3.8
25°C
pA
4.99
4.94
– 4.99
25°C
– 5.3
to 4.2
–5
to 3.5
4.99
Full range
Full range
1
800
4.85
25°C
800
1
25°C
RL = 1 MΩ
µV
0.003
25°C
IO = 500 µA
VIC = 0
0,
950
1500
25°C
Full range
IO = 50 µA
300
UNIT
MAX
µV/°C
|VIO| ≤ 5 mV
IO = – 100 µA
TYP
5
25°C
RS = 50 Ω
Ω,
MIN
5
25°C
VIC = 0
0,
AVD
2500
125°C
VIC = 0,
Maximum negative peak
output
out
ut voltage
300
125°C
IO = – 400 µA
VOM –
MAX
3000
Full range
IO = – 20 µA
Maximum positive peak
VOM +
out
ut voltage
output
TYP
Full range
VIC = 0,
RS = 50 Ω
TLC2262AQ,
TLC2262AM
– 4.3
– 3.8
200
80
200
V/mV
50
25°C
1000
1000
ri(d)
Differential input
resistance
25°C
1012
1012
Ω
ri(c)
Common-mode input
resistance
25°C
1012
1012
Ω
ci(c)
Common-mode input
capacitance
f = 10 kHz,
P package
25°C
8
8
pF
zo
Closed-loop output
impedance
f = 100 kHz,
AV = 10
25°C
220
220
Ω
CMRR
Common-mode
rejection ratio
VIC = – 5 V to 2.7 V,
VO = 0,
RS = 50 Ω
25°C
75
Full range
75
kSVR
Supply-voltage
y
g rejection
j
ratio (∆VDD ± /∆VIO)
VDD = 4.4 V to 16 V,
VIC = VDD /2, No load
25°C
80
Full range
80
IDD
Supply current
VO = 0
0,
No load
25°C
Full range
88
75
88
dB
75
95
80
95
dB
80
425
500
500
425
500
500
µA
† Full range is – 40°C to 125°C for Q suffix, – 55°C to 125°C for M suffix.
NOTE 4: Typical values are based on the input offset voltage shift observed through 500 hours of operating life test at TA = 150°C extrapolated
to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
24
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
TLC226x, TLC226xA
Advanced LinCMOS RAIL-TO-RAIL
OPERATIONAL AMPLIFIERS
SLOS177D – FEBRUARY 1997 – REVISED MARCH 2001
TLC2262Q/M operating characteristics at specified free-air temperature, VDD ± = ±5 V
PARAMETER
TLC2262Q,
TLC2262M
TA†
TEST CONDITIONS
MIN
TYP
25°C
0.35
0.55
Full
range
0 25
0.25
TLC2262AQ,
TLC2262AM
MAX
MIN
TYP
0.35
0.55
UNIT
MAX
SR
Slew rate at unity
gain
VO = ± 2 V
V,
CL = 100 pF
F
Vn
Equivalent
q
input
noise voltage
f = 10 Hz
25°C
43
43
f = 1 kHz
25°C
12
12
Peak-to-peak
equivalent input
noise voltage
f = 0.1 Hz to 1 Hz
25°C
0.8
0.8
VN(PP)
f = 0.1 Hz to 10 Hz
25°C
1.3
1.3
In
Equivalent input
noise current
25°C
0.6
0.6
Total harmonic
distortion plus
noise
VO = ± 2.3 V,
RL = 50 kΩ,
kΩ
f = 20 kHz
AV = 1
0.014%
0.014%
THD + N
0.024%
0.024%
Gain-bandwidth
product
f =10 kHz,,
CL = 100 pF
RL = 50 kΩ,,
25°C
0 73
0.73
0 73
0.73
MHz
Maximum outputswing bandwidth
VO(PP) = 4.6 V,,
RL = 50 kΩ,
AV = 1,,
CL = 100 pF
25°C
85
85
kHz
To 0.1%
0 1%
71
7.1
71
7.1
Settling time
AV = – 1,
Step = – 2.3 V to 2.3 V,,
RL = 50 kΩ,
CL = 100 pF
16 5
16.5
16 5
16.5
RL = 50 kΩ,
CL = 100 pF
25°C
57°
57°
25°C
11
11
BOM
ts
φm
Phase margin at
unity gain
RL = 50 kΩ,
kΩ
V/µs
0 25
0.25
µV
fA√Hz
25°C
AV = 10
µs
25°C
To 0
0.01%
01%
Gain margin
† Full range is – 40°C to 125°C for Q suffix, – 55°C to 125°C for M suffix.
POST OFFICE BOX 655303
nV/√Hz
• DALLAS, TEXAS 75265
dB
25
TLC226x, TLC226xA
Advanced LinCMOS RAIL-TO-RAIL
OPERATIONAL AMPLIFIERS
SLOS177D – FEBRUARY 1997 – REVISED MARCH 2001
TLC2264Q/M electrical characteristics at specified free-air temperature, VDD = 5 V (unless
otherwise noted)
PARAMETER
TA†
TEST CONDITIONS
TLC2264Q,
TLC2264M
MIN
VIO
Input offset voltage
αVIO
Temperature coefficient
of input offset voltage
Input offset voltage
long-term drift
(see Note 4)
IIO
Input offset current
IIB
Input bias current
VICR
Common-mode input
voltage range
25°C
High-level output voltage
VIC = 0,
RS = 50 Ω
VIC = 2
2.5
5V
V,
Large-signal
Large
signal differential
voltage am
lification
amplification
VIC = 2
2.5
5V
V,
VO = 1 V to 4 V
IOL = 4
mA
µV
0.003
0.003
µV/mo
25°C
0.5
0.5
800
800
1
1
800
0
to 4
– 0.3
to 4.2
800
0
to 4
0
to 3.5
25°C
IOL = 500 µA
950
1500
25°C
Full range
IOL = 50 µA
300
UNIT
MAX
µV/°C
|VIO| ≤ 5 mV
IOH = – 100 µA
TYP
2
25°C
RS = 50 Ω
Ω,
MIN
2
25°C
VIC = 2
2.5
5V
V,
AVD
2500
125°C
VIC = 2.5 V,
Low-level output voltage
300
125°C
IOH = – 400 µA
VOL
MAX
3000
Full range
IOH = – 20 µA
VOH
TYP
Full range
VDD ± = ± 2.5 V,
VO = 0,
TLC2264AQ,
TLC2264AM
4.85
Full range
4.82
25°C
4.7
Full range
4.5
4.99
4.94
4.85
4.94
V
4.82
4.85
4.7
4.85
4.5
25°C
0.01
25°C
0.09
Full range
0.01
0.15
0.09
0.15
25°C
pA
V
0
to 3.5
4.99
25°C
– 0.3
to 4.2
pA
0.8
Full range
0.15
1
0.7
1.2
100
0.15
V
1
1.2
RL = 50 kه
25°C
80
80
170
Full range
50
RL = 1 Mه
25°C
550
550
50
V/mV
ri(d)
Differential input
resistance
25°C
1012
1012
Ω
ri(c)
Common-mode input
resistance
25°C
1012
1012
Ω
ci(c)
Common-mode input
capacitance
f = 10 kHz,
N package
25°C
8
8
pF
zo
Closed-loop output
impedance
f = 100 kHz,
AV = 10
25°C
240
240
Ω
CMRR
Common-mode rejection
j
ratio
VIC = 0 to 2.7 V,
RS = 50 Ω
VO = 2.5 V,
kSVR
Supply-voltage rejection
ratio (∆VDD /∆VIO)
VDD = 4.4 V to 16 V,
IDD
Supplyy current
(four amplifiers)
VO = 2
2.5
5V
V,
No load
25°C
70
Full range
70
25°C
80
25°C
Full range
83
70
83
dB
70
95
0.8
80
1
1
95
0.8
dB
1
1
mA
† Full range is – 40°C to 125°C for Q suffix, – 55°C to 125°C for M suffix.
‡ Referenced to 2.5 V
NOTE 4: Typical values are based on the input offset voltage shift observed through 500 hours of operating life test at TA = 150°C extrapolated
to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
26
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
TLC226x, TLC226xA
Advanced LinCMOS RAIL-TO-RAIL
OPERATIONAL AMPLIFIERS
SLOS177D – FEBRUARY 1997 – REVISED MARCH 2001
TLC2264Q/M operating characteristics at specified free-air temperature, VDD = 5 V
PARAMETER
TEST CONDITIONS
RL = 50 kه,
TLC2264Q,
TLC2264M
TA†
MIN
TYP
25°C
0.35
0.55
Full
range
0 25
0.25
TLC2264AQ,
TLC2264AM
MAX
MIN
TYP
0.35
0.55
UNIT
MAX
SR
Slew rate at unity
gain
VO = 0
0.5
5 V to 3
3.5
5V
V,
CL = 100 pF
F‡
Vn
Equivalent
q
input
noise voltage
f = 10 Hz
25°C
40
40
f = 1 kHz
25°C
12
12
Peak-to-peak
equivalent input
noise voltage
f = 0.1 Hz to 1 Hz
25°C
0.7
0.7
VN(PP)
f = 0.1 Hz to 10 Hz
25°C
1.3
1.3
In
Equivalent input
noise current
25°C
0.6
0.6
Total harmonic
distortion plus
noise
VO = 0.5 V to 2.5 V,
f = 20 kHz,
kHz
RL = 50 kه
AV = 1
0.017%
0.017%
THD + N
0.03%
0.03%
Gain-bandwidth
product
f = 50 kHz,
CL = 100 pF‡
RL = 50 kه,
25°C
0 71
0.71
0 71
0.71
MHz
Maximum outputswing bandwidth
VO(PP) = 2 V,,
RL = 50 kه,
AV = 1,,
CL = 100 pF‡
25°C
185
185
kHz
To 0.1%
0 1%
64
6.4
64
6.4
Settling time
AV = – 1,
Step = 0.5 V to 2.5 V,,
RL = 50 kه,
CL = 100 pF‡
14 1
14.1
14 1
14.1
RL = 50 kه,
CL = 100 pF‡
25°C
56°
56°
Gain margin
25°C
† Full range is – 40°C to 125°C for Q suffix, – 55°C to 125°C for M suffix.
‡ Referenced to 2.5 V
11
11
BOM
ts
φm
Phase margin at
unity gain
V/µs
0 25
0.25
µV
fA /√Hz
25°C
AV = 10
µs
25°C
To 0
0.01%
01%
POST OFFICE BOX 655303
nV/√Hz
• DALLAS, TEXAS 75265
dB
27
TLC226x, TLC226xA
Advanced LinCMOS RAIL-TO-RAIL
OPERATIONAL AMPLIFIERS
SLOS177D – FEBRUARY 1997 – REVISED MARCH 2001
TLC2264Q/M electrical characteristics at specified free-air temperature, VDD± = ±5 V (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
TA†
TLC2264Q,
TLC2264M
MIN
VIO
Input offset voltage
αVIO
Temperature coefficient of
input offset voltage
Input offset voltage
long-term drift (see Note 4)
IIO
Input offset current
IIB
Input bias current
VICR
Common-mode input
voltage range
25°C
VO = 0,
2500
950
1500
µV
25°C
0.003
0.003
µV/mo
25°C
0.5
0.5
800
800
1
1
800
–5
to 4
–5
5.3
3
to 4
2
4.2
800
–5
to 4
pA
pA
–5
5.3
3
to 4
2
4.2
V
Full range
–5
to 3.5
35
25°C
IO = 50 µA
IO = 500 µA
VIC = 0
0,
300
UNIT
MAX
µV/°C
25°C
25
C
IO = – 100 µA
VIC = 0
0,
TYP
2
25°C
RS = 50 Ω,,
|VIO| ≤ 5 mV
MIN
2
125°C
VIC = 0,
VOM –
300
125°C
IO = – 400 µA
Maximum
M
i
negative
ti peak
k
out
ut voltage
output
MAX
3000
Full range
IO = – 20 µA
M i
Maximum
positive
iti peak
k
VOM +
out ut voltage
output
TYP
Full range
VIC = 0,
RS = 50 Ω
TLC2264AQ,
TLC2264AM
IO = 4
mA
RL = 50 kΩ
4.99
25°C
4.85
Full range
4.82
25°C
4.7
Full range
4.5
25°C
– 4.85
Full range
– 4.85
Full range
4.99
4.94
4.85
–4
4.85
4.7
80
Full range
50
V
4.85
4.5
– 4.99
– 4.91
– 4.85
– 4.91
V
– 4.85
– 4.3
–4
– 3.8
25°C
4.94
4.82
– 4.99
25°C
25°C
–5
to 3.5
35
– 4.3
– 3.8
200
80
200
AVD
Large-signal
L
i
l diff
differential
ti l
voltage am
lification
amplification
25°C
1000
1000
ri(d)
Differential input resistance
25°C
1012
1012
Ω
ri(c)
Common-mode input
resistance
25°C
1012
1012
Ω
ci(c)
Common-mode input
capacitance
f = 10 kHz,
N package
25°C
8
8
pF
zo
Closed-loop output
impedance
f = 100 kHz,
AV = 10
25°C
220
220
Ω
CMRR
Common-mode
rejection ratio
VIC = – 5 V to 2.7 V,
VO = 0,
RS = 50 Ω
kSVR
Supply-voltage
y
g rejection
j
ratio (∆VDD ± /∆VIO)
VDD± = ± 2.2 V to ± 8 V,
VIC = VDD /2, No load
IDD
Supply
y current
(four amplifiers)
VO = 0
0,
VO = ± 4 V
RL = 1 MΩ
No load
25°C
75
Full range
75
25°C
80
Full range
80
25°C
Full range
V/mV
50
88
75
88
dB
75
95
80
95
dB
80
0.85
1
1
0.85
1
1
mA
† Full range is – 40°C to 125°C for Q suffix, – 55°C to 125°C for M suffix.
NOTE 4: Typical values are based on the input offset voltage shift observed through 500 hours of operating life test at TA = 150°C extrapolated
to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
28
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
TLC226x, TLC226xA
Advanced LinCMOS RAIL-TO-RAIL
OPERATIONAL AMPLIFIERS
SLOS177D – FEBRUARY 1997 – REVISED MARCH 2001
TLC2264Q/M operating characteristics at specified free-air temperature, VDD ± = ±5 V
PARAMETER
TEST CONDITIONS
TLC2264Q,
TLC2264M
TA†
MIN
TYP
25°C
0.35
0.55
Full
range
0 25
0.25
TLC2264AQ,
TLC2264AM
MAX
MIN
TYP
0.35
0.55
UNIT
MAX
SR
Slew rate at unity
gain
VO = ± 2 V
V,
CL = 100 pF
F
Vn
Equivalent
q
input
noise voltage
f = 10 Hz
25°C
43
43
f = 1 kHz
25°C
12
12
Peak-to-peak
equivalent input
noise voltage
f = 0.1 Hz to 1 Hz
25°C
0.8
0.8
VN(PP)
f = 0.1 Hz to 10 Hz
25°C
1.3
1.3
In
Equivalent input
noise current
25°C
0.6
0.6
THD + N
Total harmonic
distortion plus
noise
VO = ± 2.3 V,
RL = 50 kΩ,
kΩ
f = 20 kHz
AV = 1
Gain-bandwidth
product
f =10 kHz,,
CL = 100 pF
RL = 50 kΩ,,
25°C
0 73
0.73
0 73
0.73
MHz
Maximum outputswing bandwidth
VO(PP) = 4.6 V,,
RL = 50 kΩ,
AV = 1,,
CL = 100 pF
25°C
70
70
kHz
To 0.1%
0 1%
71
7.1
71
7.1
Settling time
AV = – 1,
Step = – 2.3 V to 2.3 V,,
RL = 50 kΩ,
CL = 100 pF
16 5
16.5
16 5
16.5
RL = 50 kΩ,
CL = 100 pF
25°C
57°
57°
Gain margin
25°C
† Full range is – 40°C to 125°C for Q suffix, – 55°C to 125°C for M suffix.
11
11
BOM
ts
φm
Phase margin at
unity gain
RL = 50 kΩ,
kΩ
V/µs
0 25
0.25
0.014%
0.014%
0.024%
0.024%
µV
fA /√Hz
25°C
AV = 10
µs
25°C
To 0.01%
0 01%
POST OFFICE BOX 655303
nV/√Hz
• DALLAS, TEXAS 75265
dB
29
TLC226x, TLC226xA
Advanced LinCMOS RAIL-TO-RAIL
OPERATIONAL AMPLIFIERS
SLOS177D – FEBRUARY 1997 – REVISED MARCH 2001
TYPICAL CHARACTERISTICS
Table of Graphs
FIGURE
VIO
Input offset voltage
Distribution
vs Common-mode input voltage
αVIO
IIB/IIO
Input offset voltage temperature coefficient
Distribution
Input bias and input offset currents
vs Free-air temperature
12
VI
Input voltage range
vs Supply voltage
vs Free-air temperature
13
14
VOH
VOL
High-level output voltage
vs High-level output current
15
Low-level output voltage
vs Low-level output current
16, 17
VOM +
VOM –
Maximum positive output voltage
vs Output current
18
Maximum negative output voltage
vs Output current
19
VO(PP)
Maximum peak-to-peak output voltage
vs Frequency
20
IOS
Short-circuit output current
vs Supply voltage
vs Free-air temperature
21
22
VO
Output voltage
vs Differential input voltage
Differential gain
vs Load resistance
AVD
Large-signal differential voltage amplification
vs Frequency
vs Free-air temperature
26, 27
28, 29
zo
Output impedance
vs Frequency
30, 31
CMRR
Common-mode rejection ratio
vs Frequency
vs Free-air temperature
32
33
kSVR
Supply-voltage rejection ratio
vs Frequency
vs Free-air temperature
34, 35
36
IDD
Supply current
vs Supply voltage
vs Free-air temperature
37, 38
39, 40
SR
Slew rate
vs Load capacitance
vs Free-air temperature
41
42
VO
Vn
THD + N
φm
B1
30
2–5
6, 7
8 – 11
23, 24
25
Inverting large-signal pulse response
43, 44
Voltage-follower large-signal pulse response
45, 46
Inverting small-signal pulse response
47, 48
Voltage-follower small-signal pulse response
49, 50
Equivalent input noise voltage
vs Frequency
Noise voltage (referred to input)
Over a 10-second period
53
Integrated noise voltage
vs Frequency
54
Total harmonic distortion plus noise
vs Frequency
55
Gain-bandwidth product
vs Supply voltage
vs Free-air temperature
56
57
Phase margin
vs Frequency
vs Load capacitance
26, 27
58
Gain margin
vs Load capacitance
59
Unity-gain bandwidth
vs Load capacitance
60
Overestimation of phase margin
vs Load capacitance
61
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
51, 52
TLC226x, TLC226xA
Advanced LinCMOS RAIL-TO-RAIL
OPERATIONAL AMPLIFIERS
SLOS177D – FEBRUARY 1997 – REVISED MARCH 2001
TYPICAL CHARACTERISTICS
DISTRIBUTION OF TLC2262
INPUT OFFSET VOLTAGE
DISTRIBUTION OF TLC2262
INPUT OFFSET VOLTAGE
25
25
1274 Amplifiers From 2 Wafer Lots
VDD± = ± 5 V
TA = 25°C
20
Percentage of Amplifiers – %
Precentage of Amplifiers – %
1274 Amplifiers From 2 Wafer Lots
VDD± = ± 2.5 V
TA = 25°C
15
10
5
20
15
10
5
0
– 1.6
– 0.8
0
0.8
VIO – Input Offset Voltage – mV
0
– 1.6
1.6
Figure 2
DISTRIBUTION OF TLC2264
INPUT OFFSET VOLTAGE
16
Percentage of Amplifiers – %
Percentage of Amplifiers – %
20
2272 Amplifiers From 2 Wafer Lots
VDD ± = ± 2.5 V
TA = 25°C
12
8
4
0
– 1.6
1.6
Figure 3
DISTRIBUTION OF TLC2264
INPUT OFFSET VOLTAGE
20
– 0.8
0
0.8
VIO – Input Offset Voltage – mV
– 0.8
0
0.8
VIO – Input Offset Voltage – mV
1.6
2272 Amplifiers From 2 Wafer Lots
VDD ± = ± 5 V
TA = 25°C
16
12
8
4
0
– 1.6
– 0.8
0
0.8
VIO – Input Offset Voltage – mV
1.6
Figure 5
Figure 4
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
31
TLC226x, TLC226xA
Advanced LinCMOS RAIL-TO-RAIL
OPERATIONAL AMPLIFIERS
SLOS177D – FEBRUARY 1997 – REVISED MARCH 2001
TYPICAL CHARACTERISTICS
INPUT OFFSET VOLTAGE
vs
COMMON-MODE INPUT VOLTAGE
INPUT OFFSET VOLTAGE
vs
COMMON-MODE INPUT VOLTAGE
1
VDD = 5 V
RS = 50 Ω
TA = 25°C
VVIO
IO – Input Offset Voltage – mV
VVIO
IO – Input Offset Voltage – mV
1
0.5
0
ÁÁÁ
ÁÁÁ
0.5
0
ÁÁ
ÁÁ
ÁÁ
– 0.5
–1
–1
VDD± = ± 5 V
RS = 50 Ω
TA = 25°C
0
1
2
3
4
– 0.5
–1
–6 –5 –4 –3 –2 –1 0
5
VIC – Common-Mode Input Voltage – V
† For curves where VDD = 5 V, all loads are referenced to 2.5 V.
4
30
128 Amplifiers From 2 Wafer Lots
VDD± = ± 2.5 V
P Package
TA = 25°C to 125°C
Percentage of Amplifiers – %
25
20
15
10
5
128 Amplifiers From 2 Wafer Lots
VDD± = ± 5 V
P Package
TA = 25°C to 125°C
20
15
10
5
–4 –3 –2 –1 0
1
2
3
4
αVIO – Temperature Coefficient – µV / °C
5
0
–5
–4 –3 –2 –1 0
1
2
3
4
αVIO – Temperature Coefficient – µV / °C
Figure 8
Figure 9
† Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
32
5
DISTRIBUTION OF TLC2262 INPUT OFFSET
VOLTAGE TEMPERATURE COEFFICIENT †
30
Percentage of Amplifiers – %
3
Figure 7
DISTRIBUTION OF TLC2262 INPUT OFFSET
VOLTAGE TEMPERATURE COEFFICIENT †
0
–5
2
VIC – Common-Mode Input Voltage – V
Figure 6
25
1
POST OFFICE BOX 655303
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5
TLC226x, TLC226xA
Advanced LinCMOS RAIL-TO-RAIL
OPERATIONAL AMPLIFIERS
SLOS177D – FEBRUARY 1997 – REVISED MARCH 2001
TYPICAL CHARACTERISTICS
DISTRIBUTION OF TLC2264 INPUT OFFSET
VOLTAGE TEMPERATURE COEFFICIENT†
DISTRIBUTION OF TLC2264 INPUT OFFSET
VOLTAGE TEMPERATURE COEFFICIENT†
35
35
128 Amplifiers From
2 Wafer Lots
VDD ± = ± 2.5 V
N Package
TA = 25°C to 125°C
25
30
Percentage of Amplifiers – %
Percentage of Amplifiers – %
30
128 Amplifiers From
2 Wafer Lots
VDD ± = ± 5 V
N Package
TA = 25°C
to 125°C
20
15
10
25
20
15
10
5
5
0
0
–5
–4
–3
–2
–1
0
1
2
3
4
–5
5
–4
αVIO – Temperature Coefficient of
Input Offset Voltage – µV / °C
–3
2
3
4
5
10
VDD± = ± 2.5 V
VIC = 0 V
VO = 0
RS = 50 Ω
RS = 50 Ω
TA = 25°C
8
V
VII – Input Voltage Range – V
IIO – Input Bias and Input Offset Currents – pA
IIIB
IB and IIO
1
INPUT VOLTAGE RANGE
vs
SUPPLY VOLTAGE
450
300
IIB
250
200
150
100
ÁÁ
ÁÁ
0
Figure 11
INPUT BIAS AND INPUT OFFSET CURRENTS†
vs
FREE-AIR TEMPERATURE
350
–1
αVIO – Temperature Coefficient of
Input Offset Voltage – µV / °C
Figure 10
400
–2
50
IIO
6
4
2
0
| VIO | ≤ 5 mV
–2
–4
–6
–8
– 10
0
25
45
65
85
105
TA – Free-Air Temperature – °C
125
2
Figure 12
3
6
7
4
5
| VDD ± | – Supply Voltage – V
8
Figure 13
† Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
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33
TLC226x, TLC226xA
Advanced LinCMOS RAIL-TO-RAIL
OPERATIONAL AMPLIFIERS
SLOS177D – FEBRUARY 1997 – REVISED MARCH 2001
TYPICAL CHARACTERISTICS
INPUT VOLTAGE RANGE†‡
vs
FREE-AIR TEMPERATURE
HIGH-LEVEL OUTPUT VOLTAGE†‡
vs
HIGH-LEVEL OUTPUT CURRENT
5
6
VDD = 5 V
V
VOH
OH – High-Level Output Voltage – V
VDD = 5 V
V
VII – Input Voltage Range – V
4
3
| VIO | ≤ 5 mV
2
ÁÁ
ÁÁ
1
ÁÁ
ÁÁ
0
–1
– 75 – 55 – 35 – 15 5
25 45 65 85
TA – Free-Air Temperature – °C
105 125
5
4
TA = 125°C
3
TA = 25°C
2
TA = – 40°C
1
0
0
500
1000 1500 2000 2500 3000
| IOH| – High-Level Output Current – µA
Figure 14
LOW-LEVEL OUTPUT VOLTAGE†‡
vs
LOW-LEVEL OUTPUT CURRENT
1.4
VDD = 5 V
TA = 25°C
1
V
VOL
OL – Low-Level Output Voltage – V
VOL
VOL – Low-Level Output Voltage – V
1.2
VIC = 1.25 V
VIC = 0
0.8
0.6
VIC = 2.5 V
0.4
ÁÁ
ÁÁ
0.2
VDD = 5 V
VIC = 2.5 V
1.2
TA = 125°C
1
0.8
TA = 25°C
0.6
TA = – 40°C
TA = – 55°C
0.4
0.2
0
0
0
1
2
3
4
5
IOL – Low-Level Output Current – mA
0
1
2
3
4
5
IOL – Low-Level Output Current – mA
Figure 16
Figure 17
† Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
‡ For curves where VDD = 5 V, all loads are referenced to 2.5 V.
34
3500
Figure 15
LOW-LEVEL OUTPUT VOLTAGE‡
vs
LOW-LEVEL OUTPUT CURRENT
ÁÁ
ÁÁ
ÁÁ
TA = – 55°C
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TLC226x, TLC226xA
Advanced LinCMOS RAIL-TO-RAIL
OPERATIONAL AMPLIFIERS
SLOS177D – FEBRUARY 1997 – REVISED MARCH 2001
TYPICAL CHARACTERISTICS
MAXIMUM POSITIVE OUTPUT VOLTAGE†
vs
OUTPUT CURRENT
VVOM
OM ++ – Maximum Positive Output Voltage – V
VDD± = ± 5 V
5
TA = – 55°C
4
TA = 125°C
3
TA = 25°C
2
TA = – 40°C
1
0
0
500
1000 1500 2000 2500
| IO | – Output Current – µA
3000
3500
VOM –
VOM
– – Maximum Negative Output Voltage – V
– 3.8
6
ÁÁ
ÁÁ
ÁÁ
MAXIMUM NEGATIVE OUTPUT VOLTAGE†
vs
OUTPUT CURRENT
VDD ± = ± 5 V
VIC = 0
–4
TA = 125°C
– 4.2
TA = 25°C
– 4.4
TA = – 40°C
TA = – 55°C
– 4.6
ÁÁ
ÁÁ
ÁÁ
ÁÁ
– 4.8
–5
0
1
2
3
4
IO – Output Current – mA
SHORT-CIRCUIT OUTPUT CURRENT
vs
SUPPLY VOLTAGE
ÁÁ
ÁÁ
ÁÁ
12
10
RL = 10 kΩ
TA = 25°C
VDD± = ± 5 V
8
7
6
VDD = 5 V
4
3
2
1
0
103
I OS – Short-Circuit Output Current – mA
IOS
VO(PP)
VO(PP) – Maximum Peak-to-Peak Output Voltage – V
MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE†‡
vs
FREQUENCY
5
6
Figure 19
Figure 18
9
5
10
VID = – 100 mV
8
VO = 0
TA = 25°C
6
4
2
0
VID = 100 mV
–2
–4
104
105
106
2
3
f – Frequency – Hz
4
5
6
7
| VDD ± | – Supply Voltage – V
8
‡ For curves where VDD = 5 V, all loads are referenced to 2.5 V.
Figure 20
Figure 21
† Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
POST OFFICE BOX 655303
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35
TLC226x, TLC226xA
Advanced LinCMOS RAIL-TO-RAIL
OPERATIONAL AMPLIFIERS
SLOS177D – FEBRUARY 1997 – REVISED MARCH 2001
TYPICAL CHARACTERISTICS
SHORT-CIRCUIT OUTPUT CURRENT †
vs
FREE-AIR TEMPERATURE
OUTPUT VOLTAGE‡
vs
DIFFERENTIAL INPUT VOLTAGE
5
VO = 0
VDD± = ± 5 V
12
VDD = 5 V
RL = 50 kΩ
VIC = 2.5 V
TA = 25°C
11
10
9
4
VO – Output Voltage – V
IIOS
OS – Short-Circuit Output Current – mA
13
VID = – 100 mV
8
7
1
0
–1
VID = 100 mV
–2
3
2
1
–3
–4
– 75
– 50
– 25
0
25
50
75
100
0
0
250 500 750 1000
– 1000 – 750 – 500 – 250
VID – Differential Input Voltage – µV
125
TA – Free-Air Temperature – °C
Figure 22
Figure 23
DIFFERENTIAL GAIN‡
vs
LOAD RESISTANCE
OUTPUT VOLTAGE
vs
DIFFERENTIAL INPUT VOLTAGE
VO – Output Voltage – V
3
104
VDD± = ± 5 V
VIC = 0 V
RL = 50 kΩ
TA = 25°C
VO(PP) = 2 V
TA = 25°C
Differential Gain – V/ mV
5
1
–1
103
102
VDD± = ± 5 V
VDD = 5 V
10
–3
–5
0
250 500 750 1000
– 1000 – 750 – 500 – 250
VID – Differential Input Voltage – µV
1
103
Figure 24
104
105
RL – Load Resistance – kΩ
Figure 25
† Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
‡ For curves where VDD = 5 V, all loads are referenced to 2.5 V.
36
POST OFFICE BOX 655303
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106
TLC226x, TLC226xA
Advanced LinCMOS RAIL-TO-RAIL
OPERATIONAL AMPLIFIERS
SLOS177D – FEBRUARY 1997 – REVISED MARCH 2001
TYPICAL CHARACTERISTICS
LARGE-SIGNAL DIFFERENTIAL VOLTAGE†
AMPLIFICATION AND PHASE MARGIN
vs
FREQUENCY
ÁÁ
ÁÁ
ÁÁ
60
180°
VDD = 5 V
CL= 100 pF
TA = 25°C
135°
40
Phase Margin
20
90°
45°
Gain
0
0°
– 20
φom
m – Phase Margin
AVD
AVD – Large-Signal Differential
Voltage Amplification – dB
80
– 45°
– 40
10 3
10 4
10 5
10 6
– 90°
10 7
f – Frequency – Hz
† For curves where VDD = 5 V, all loads are referenced to 2.5 V.
Figure 26
LARGE-SIGNAL DIFFERENTIAL VOLTAGE
AMPLIFICATION AND PHASE MARGIN
vs
FREQUENCY
ÁÁ
ÁÁ
ÁÁ
60
180°
VDD± = ± 5 V
CL = 100 pF
TA = 25°C
135°
40
Phase Margin
20
90°
45°
Gain
0
0°
– 20
– 40
10 3
φom
m – Phase Margin
AVD
AVD – Large-Signal Differential
Voltage Amplification – dB
80
– 45°
10 4
10 5
10 6
– 90°
10 7
f – Frequency – Hz
Figure 27
POST OFFICE BOX 655303
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37
TLC226x, TLC226xA
Advanced LinCMOS RAIL-TO-RAIL
OPERATIONAL AMPLIFIERS
SLOS177D – FEBRUARY 1997 – REVISED MARCH 2001
TYPICAL CHARACTERISTICS
LARGE-SIGNAL DIFFERENTIAL
VOLTAGE AMPLIFICATION†‡
vs
FREE-AIR TEMPERATURE
ÁÁ
ÁÁ
104
VDD = 5 V
VIC = 2.5 V
VO = 1 V to 4 V
AVD
AVD – Large-Signal Differential
Voltage Amplification – V/mV
AVD
AVD – Large-Signal Differential
Voltage Amplification – V/mV
104
LARGE-SIGNAL DIFFERENTIAL
VOLTAGE AMPLIFICATION†
vs
FREE-AIR TEMPERATURE
RL = 1 MΩ
103
RL = 50 kΩ
102
ÁÁ
ÁÁ
RL = 10 kΩ
101
– 75
– 50
– 25
0
25
50
75
100
TA – Free-Air Temperature – °C
RL = 1 MΩ
103
RL = 50 kΩ
102
RL = 10 kΩ
101
– 75 – 50
125
– 25
0
25
50
75
100
TA – Free-Air Temperature – °C
OUTPUT IMPEDANCE‡
vs
FREQUENCY
OUTPUT IMPEDANCE
vs
FREQUENCY
1000
1000
VDD± = ± 5 V
TA = 25°C
z o – Output Impedance – 0
zo
Ω
VDD = 5 V
TA = 25°C
100
AV = 100
10
AV = 10
1
100
10
0.1
102
AV = 100
AV = 10
1
AV = 1
AV = 1
103
104
105
f – Frequency – Hz
106
0.1
102
Figure 30
103
104
105
f – Frequency – Hz
Figure 31
† Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
‡ For curves where VDD = 5 V, all loads are referenced to 2.5 V.
38
125
Figure 29
Figure 28
z o – Output Impedance – 0
zo
Ω
VDD± = ± 5 V
VIC = 0 V
VO = ± 4 V
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106
TLC226x, TLC226xA
Advanced LinCMOS RAIL-TO-RAIL
OPERATIONAL AMPLIFIERS
SLOS177D – FEBRUARY 1997 – REVISED MARCH 2001
TYPICAL CHARACTERISTICS
COMMON-MODE REJECTION RATIO†‡
vs
FREE-AIR TEMPERATURE
COMMON-MODE REJECTION RATIO†
vs
FREQUENCY
90
CMRR – Common-Mode Rejection Ratio – dB
CMRR – Common-Mode Rejection Ratio – dB
100
VDD± = ± 5 V
80
VDD = 5 V
60
40
20
0
101
102
103
104
105
VDD± = ± 5 V
88
86
84
VDD = 5 V
82
80
– 75
106
f – Frequency – Hz
– 50 –25
0
25
50
75 100
TA – Free-Air Temperature – °C
Figure 32
Figure 33
SUPPLY-VOLTAGE REJECTION RATIO†
vs
FREQUENCY
SUPPLY-VOLTAGE REJECTION RATIO
vs
FREQUENCY
100
VDD = 5 V
TA = 25°C
KSVR
k SVR – Supply-Voltage Rejection Ratio – dB
KSVR
k SVR – Supply-Voltage Rejection Ratio – dB
100
80
kSVR +
60
kSVR –
40
20
ÁÁ
ÁÁ
ÁÁ
0
– 20
101
125
102
103
104
105
106
f – Frequency – Hz
VDD± = ± 5 V
TA = 25°C
80
kSVR +
60
kSVR –
40
20
ÁÁ
ÁÁ
ÁÁ
0
– 20
101
Figure 34
102
103
104
f – Frequency – Hz
105
106
Figure 35
† For curves where VDD = 5 V, all loads are referenced to 2.5 V.
‡ Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
39
TLC226x, TLC226xA
Advanced LinCMOS RAIL-TO-RAIL
OPERATIONAL AMPLIFIERS
SLOS177D – FEBRUARY 1997 – REVISED MARCH 2001
TYPICAL CHARACTERISTICS
TLC2262
SUPPLY CURRENT †
vs
SUPPLY VOLTAGE
SUPPLY-VOLTAGE REJECTION RATIO†
vs
FREE-AIR TEMPERATURE
600
ÁÁ
ÁÁ
ÁÁ
VO = 0
No Load
VDD ± = ± 2.2 V to ± 8 V
VO = 0
500
IDD
µA
I DD – Supply Current – uA
k
KSVR
SVR – Supply-Voltage Rejection Ratio – dB
110
105
100
TA = – 55°C
400
TA = 25°C
TA = 125°C
TA = 40°C
300
ÁÁ
ÁÁ
95
200
100
90
– 75
0
– 50
– 25
0
25
50
75
100
0
125
1
TA – Free-Air Temperature – °C
Figure 36
6
2
3
4
5
| VDD ± | – Supply Voltage – V
7
8
Figure 37
TLC2264
SUPPLY CURRENT †
vs
SUPPLY VOLTAGE
TLC2262
SUPPLY CURRENT †‡
vs
FREE-AIR TEMPERATURE
1200
600
VO = 0
No Load
VDD± = ± 5 V
VO = 0
500
TA = – 55°C
µA
IDD
I DD – Supply Current – uA
IDD
µA
I DD – Supply Current – uA
1000
800
TA = 125°C
TA = 25°C
TA = 40°C
600
ÁÁ
ÁÁ
ÁÁ
400
VDD = 5 V
VO = 2.5 V
300
ÁÁ
ÁÁ
ÁÁ
400
200
200
100
0
0
1
6
2
3
4
5
| VDD ± | – Supply Voltage – V
7
8
0
– 75
– 50 – 25
0
25
50
75 100
TA – Free-Air Temperature – °C
Figure 39
Figure 38
† Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
‡ For curves where VDD = 5 V, all loads are referenced to 2.5 V.
40
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
125
TLC226x, TLC226xA
Advanced LinCMOS RAIL-TO-RAIL
OPERATIONAL AMPLIFIERS
SLOS177D – FEBRUARY 1997 – REVISED MARCH 2001
TYPICAL CHARACTERISTICS
TLC2264
SUPPLY CURRENT †‡
vs
FREE-AIR TEMPERATURE
SLEW RATE‡
vs
LOAD CAPACITANCE
1
1200
VDD ± = ± 5 V
VO = 0
0.8
SR – Slew Rate – V/
v/us
µs
1000
µA
IDD
I DD – Supply Current – uA
VDD = 5 V
AV = – 1
TA = 25°C
800
VDD = 5 V
VO = 2.5 V
600
ÁÁ
ÁÁ
400
0.6
SR +
0.4
0.2
200
0
– 75
SR –
– 50
– 25
0 25
50
75 100
TA – Free-Air Temperature – °C
0
101
125
102
103
CL – Load Capacitance – pF
Figure 40
Figure 41
SLEW RATE†‡
vs
FREE-AIR TEMPERATURE
INVERTING LARGE-SIGNAL PULSE
RESPONSE‡
5
1.2
VO
VO – Output Voltage – V
SR – Slew Rate – v/uss
V/ µ
1
SR –
0.8
SR +
0.6
0.4
0.2
0
– 75
104
VDD = 5 V
RL = 50 kΩ
CL = 100 pF
AV = 1
VDD = 5 V
RL = 50 kΩ
CL = 100 pF
4 A = –1
V
TA = 25°C
3
2
1
0
– 50 – 25
0
25
50
75
100
TA – Free-Air Temperature – °C
125
0
2
4
6
8
10
12
14
16
18
20
t – Time – µs
Figure 43
Figure 42
† Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
‡ For curves where VDD = 5 V, all loads are referenced to 2.5 V.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
41
TLC226x, TLC226xA
Advanced LinCMOS RAIL-TO-RAIL
OPERATIONAL AMPLIFIERS
SLOS177D – FEBRUARY 1997 – REVISED MARCH 2001
TYPICAL CHARACTERISTICS
VOLTAGE-FOLLOWER LARGE-SIGNAL
PULSE RESPONSE†
INVERTING LARGE-SIGNAL PULSE
RESPONSE
5
5
VDD± = ± 5 V
RL = 50 kΩ
CL = 100 pF
AV = – 1
TA = 25°C
VO
VO – Output Voltage – V
3
2
VDD = 5 V
RL = 50 kΩ
CL = 100 pF
AV = 1
TA = 25°C
4
VO
VO – Output Voltage – V
4
1
0
–1
–2
3
2
1
–3
–4
–5
0
0
2
4
6
8
10 12
t – Time – µs
14
16
18
0
20
2
4
Figure 44
2
18
20
2.65
VDD = 5 V
RL = 50 kΩ
CL = 100 pF
AV = – 1
TA = 25°C
2.6
VO
VO – Output Voltage – V
VO
VO – Output Voltage – V
3
16
INVERTING SMALL-SIGNAL
PULSE RESPONSE†
VDD± = ± 5 V
RL = 50 kΩ
CL = 100 pF
AV = 1
TA = 25°C
4
8
10 12 14
t – Time – µs
Figure 45
VOLTAGE-FOLLOWER LARGE-SIGNAL
PULSE RESPONSE
5
6
1
0
–1
–2
–3
2.55
2.5
2.45
–4
–5
2.4
0
2
4
6
8
10 12
t – Time – µs
14
16
18
20
0
2
Figure 46
6
8
10 12
t – Time – µs
Figure 47
† For curves where VDD = 5 V, all loads are referenced to 2.5 V.
42
4
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
14
16
18
20
TLC226x, TLC226xA
Advanced LinCMOS RAIL-TO-RAIL
OPERATIONAL AMPLIFIERS
SLOS177D – FEBRUARY 1997 – REVISED MARCH 2001
TYPICAL CHARACTERISTICS
INVERTING SMALL-SIGNAL
PULSE RESPONSE
2.65
VDD± = ± 5 V
RL = 50 kΩ
CL = 100 pF
AV = – 1
TA = 25°C
50
VDD = 5 V
RL = 50 kΩ
CL = 100 pF
AV = 1
TA = 25°C
2.6
VO
VO – Output Voltage – V
VO
VO – Output Voltage – mV
100
VOLTAGE-FOLLOWER SMALL-SIGNAL
PULSE RESPONSE†
0
– 50
2.55
2.5
2.45
2.4
– 100
0
2
4
6
8
10
12
14
16
18
20
0
2
4
6
t – Time – µs
Figure 48
V n – Equivalent Input Noise Voltage – nV/
VN
nv//HzHz
VO
VO – Output Voltage – V
– 50
– 100
2
4
6
18
20
60
0
0
16
EQUIVALENT INPUT NOISE VOLTAGE†
vs
FREQUENCY
VDD ± = ± 5 V
RL = 50 kΩ
CL = 100 pF
AV = 1
TA = 25°C
50
14
Figure 49
VOLTAGE-FOLLOWER SMALL-SIGNAL
PULSE RESPONSE
100
8
10 12
t – Time – µs
8
10 12
t – Time – µs
14
16
18
20
50
VDD = 5 V
RS = 20 Ω
TA = 25°C
40
30
20
10
0
101
102
103
104
f – Frequency – Hz
Figure 51
Figure 50
† For curves where VDD = 5 V, all loads are referenced to 2.5 V.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
43
TLC226x, TLC226xA
Advanced LinCMOS RAIL-TO-RAIL
OPERATIONAL AMPLIFIERS
SLOS177D – FEBRUARY 1997 – REVISED MARCH 2001
TYPICAL CHARACTERISTICS
EQUIVALENT INPUT NOISE VOLTAGE
vs
FREQUENCY
EQUIVALENT INPUT NOISE VOLTAGE OVER
A 10-SECOND PERIOD†
1000
VDD± = ± 5 V
RS = 20 Ω
50 TA = 25°C
750
500
Noise Voltage – nV
V n – Equivalent Input Noise Voltage – nv//Hz
VN
nV/ Hz
60
40
30
20
250
0
– 250
– 500
10
VDD = 5 V
f = 0.1 Hz to 10 Hz
TA = 25°C
– 750
– 1000
0
101
102
103
f – Frequency – Hz
104
0
2
4
6
t – Time – s
Figure 52
TOTAL HARMONIC DISTORTION PLUS NOISE†
vs
FREQUENCY
THD + N – Total Harmonic Distortion Plus Noise – %
Integrated Noise Voltage – µ V
100
Calculated Using Ideal Pass-Band Filter
Low Frequency = 1 Hz
TA = 25°C
10
1
101
102
103
f – Frequency – Hz
104
105
0.1
AV = 100
0.01
AV = 10
AV = 1
VDD = 5 V
RL = 50 kΩ
TA = 25°C
0.001
101
102
103
f – Frequency – Hz
Figure 54
Figure 55
† For curves where VDD = 5 V, all loads are referenced to 2.5 V.
44
10
Figure 53
INTEGRATED NOISE VOLTAGE
vs
FREQUENCY
0.1
100
8
POST OFFICE BOX 655303
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104
105
TLC226x, TLC226xA
Advanced LinCMOS RAIL-TO-RAIL
OPERATIONAL AMPLIFIERS
SLOS177D – FEBRUARY 1997 – REVISED MARCH 2001
TYPICAL CHARACTERISTICS
GAIN-BANDWIDTH PRODUCT †‡
vs
FREE-AIR TEMPERATURE
GAIN-BANDWIDTH PRODUCT
vs
SUPPLY VOLTAGE
1200
f = 10 kHz
RL = 50 kΩ
CL = 100 pF
900 TA = 25°C
VDD = 5 V
f = 10 kHz
CL = 100 pF
Gain-Bandwidth Product – kHz
Gain-Bandwidth Product – kHz
940
860
820
780
1000
800
600
740
0
1
2
3
5
4
7
6
400
– 75
8
– 50
– 25
Figure 56
50
75
100
125
GAIN MARGIN
vs
LOAD CAPACITANCE
20
TA = 25°C
TA = 25°C
60°
15
Gain Margin – dB
Rnull = 100 Ω
φom
m – Phase Margin
25
Figure 57
PHASE MARGIN
vs
LOAD CAPACITANCE
75°
0
TA – Free-Air Temperature – °C
| VDD ± | – Supply Voltage – V
Rnull = 50 Ω
45°
30°
Rnull = 20 Ω
50 kΩ
15°
50 kΩ
VI
0°
101
Rnull = 100 Ω
10
Rnull = 50 Ω
5
–
+
VDD –
Rnull = 20 Ω
Rnull = 10 Ω
VDD +
Rnull
CL
Rnull = 10 Ω
Rnull = 0
10 2
10 3
CL – Load Capacitance – pF
Rnull = 0
10 4
0
101
Figure 58
10 2
10 3
CL – Load Capacitance – pF
10 4
Figure 59
† Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
‡ For curves where VDD = 5 V, all loads are referenced to 2.5 V.
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45
TLC226x, TLC226xA
Advanced LinCMOS RAIL-TO-RAIL
OPERATIONAL AMPLIFIERS
SLOS177D – FEBRUARY 1997 – REVISED MARCH 2001
TYPICAL CHARACTERISTICS
UNITY-GAIN BANDWIDTH†
vs
LOAD CAPACITANCE
OVERESTIMATION OF PHASE MARGIN†
vs
LOAD CAPACITANCE
1000
14°
ÁÁ
ÁÁ
TA = 25°C
12°
Overestimation of Phase Margin
B1 – Unity-Gain Bandwidth – kHz
TA = 25°C
800
600
400
Rnull = 100 Ω
10°
8°
Rnull = 50 Ω
6°
4°
Rnull = 10 Ω
200
101
10 2
10 3
CL – Load Capacitance – pF
10 4
0
101
Figure 60
10 2
10 3
CL – Load Capacitance – pF
Figure 61
† See application information
46
Rnull = 20 Ω
2°
POST OFFICE BOX 655303
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10 4
TLC226x, TLC226xA
Advanced LinCMOS RAIL-TO-RAIL
OPERATIONAL AMPLIFIERS
SLOS177D – FEBRUARY 1997 – REVISED MARCH 2001
APPLICATION INFORMATION
driving large capacitive loads
The TLC226x is designed to drive larger capacitive loads than most CMOS operational amplifiers. Figure 58
and Figure 59 illustrate its ability to drive loads greater than 400 pF while maintaining good gain and phase
margins (Rnull = 0).
A smaller series resistor (Rnull) at the output of the device (see Figure 62) improves the gain and phase margins
when driving large capacitive loads. Figure 58 and Figure 59 show the effects of adding series resistances of
10 Ω, 20 Ω, 50 Ω, and 100 Ω. The addition of this series resistor has two effects: the first is that it adds a zero
to the transfer function and the second is that it reduces the frequency of the pole associated with the output
load in the transfer function.
The zero introduced to the transfer function is equal to the series resistance times the load capacitance. To
calculate the improvement in phase margin, equation 1 can be used.
∆Θ m1
+ tan–1
ǒ
2 × π × UGBW × R
null
× C
Ǔ
L
(1)
Where :
+ improvement in phase margin
UGBW + unity-gain bandwidth frequency
R null + output series resistance
C L + load capacitance
∆Θ m1
The unity-gain bandwidth (UGBW) frequency decreases as the capacitive load increases (see Figure 60). To
use equation 1, UGBW must be approximated from Figure 60.
Using equation 1 alone overestimates the improvement in phase margin, as illustrated in Figure 61. The
overestimation is caused by the decrease in the frequency of the pole associated with the load, thus providing
additional phase shift and reducing the overall improvement in phase margin. The pole associated with the load
is reduced by the factor calculated in equation 2.
F
+ 1 ) gm1 × R
(2)
null
Where :
+ factor reducing frequency of pole
g m + small-signal output transconductance (typically 4.83 × 10 – 3 mhos)
R null + output series resistance
F
For the TLC226x, the pole associated with the load is typically 7 MHz with 100-pF load capacitance. This value
varies inversely with CL: at CL = 10 pF, use 70 MHz, at CL = 1000 pF, use 700 kHz, and so on.
Reducing the pole associated with the load introduces phase shift, thereby reducing phase margin. This results
in an error in the increase in phase margin expected by considering the zero alone (equation 1). Equation 3
approximates the reduction in phase margin due to the movement of the pole associated with the load. The
result of this equation can be subtracted from the result of the equation in equation 1 to better approximate the
improvement in phase margin.
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TLC226x, TLC226xA
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OPERATIONAL AMPLIFIERS
SLOS177D – FEBRUARY 1997 – REVISED MARCH 2001
APPLICATION INFORMATION
driving large capacitive loads (continued)
∆Θ m2
Where :
+ tan–1
ȱȧǒ Ǔȳȧ
Ȳ ȴ
UGBW
F × P2
– tan –1
ǒ Ǔ
UGBW
P2
+ reduction in phase margin
UGBW + unity-gain bandwidth frequency
F + factor from equation 2
P 2 + unadjusted pole (70 MHz @10 pF,
(3)
∆Θ m2
7 MHz @100 pF, etc.)
Using these equations with Figure 60 and Figure 61 enables the designer to choose the appropriate output
series resistance to optimize the design of circuits driving large capacitive loads.
50 kΩ
VDD +
50 kΩ
VI
–
Rnull
+
CL
VDD – / GND
Figure 62. Series-Resistance Circuit
48
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TLC226x, TLC226xA
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OPERATIONAL AMPLIFIERS
SLOS177D – FEBRUARY 1997 – REVISED MARCH 2001
APPLICATION INFORMATION
macromodel information
Macromodel information provided was derived using Microsim Parts, the model generation software used
with Microsim PSpice . The Boyle macromodel (see Note 5) and subcircuit in Figure 63 are generated using
the TLC226x typical electrical and operating characteristics at TA = 25°C. Using this information, output
simulations of the following key parameters can be generated to a tolerance of 20% (in most cases):
D
D
D
D
D
D
D
D
D
D
D
D
Maximum positive output voltage swing
Maximum negative output voltage swing
Slew rate
Quiescent power dissipation
Input bias current
Open-loop voltage amplification
Unity-gain frequency
Common-mode rejection ratio
Phase margin
DC output resistance
AC output resistance
Short-circuit output current limit
NOTE 5: G. R. Boyle, B. M. Cohn, D. O. Pederson, and J. E. Solomon, “Macromodeling of Integrated Circuit Operational Amplifiers,” IEEE Journal
of Solid-State Circuits, SC-9, 353 (1974).
99
3
VCC +
9
RSS
92
FB
10
J1
DP
VC
J2
IN +
11
RD1
VAD
DC
12
C1
R2
–
53
HLIM
–
+
C2
6
–
–
–
+
VLN
+
GCM
GA
VLIM
8
–
RD2
54
4
91
+
VLP
7
60
+
–
+ DLP
90
RO2
VB
IN –
VCC –
–
+
ISS
RP
2
1
DLN
EGND +
–
RO1
DE
5
+
VE
OUT
.SUBCKT TLC226x 1 2 3 4 5
C1
11
12
3.560E–12
C2
6
7
15.00E–12
DC
5
53
DX
DE
54
5
DX
DLP
90
91
DX
DLN
92
90
DX
DP
4
3
DX
EGND
99
0
POLY (2) (3,0) (4,0) 0 .5 .5
FB
7
99
POLY (5) VB VC VE VLP
+ VLN 0 21.04E6 –30E6 30E6 30E6 –30E6
GA
6
0
11
12 47.12E–6
GCM
0
6
10
99 4.9E–9
ISS
3
10
DC 8.250E–6
HLIM
90
0
VLIM 1K
J1
11
2
10 JX
J2
12
1
10 JX
R2
6
9
100.0E3
RD1
60
11
21.22E3
RD2
60
12
21.22E3
R01
8
5
120
R02
7
99
120
RP
3
4
26.04E3
RSS
10
99
24.24E6
VAD
60
4
–.6
VB
9
0
DC 0
VC
3
53
DC .65
VE
54
4
DC .65
VLIM
7
8
DC 0
VLP
91
0
DC 1.4
VLN
0
92
DC 9.4
.MODEL DX D (IS=800.0E–18)
.MODEL JX PJF (IS=500.0E–15 BETA=281E–6
+ VTO= –.065)
.ENDS
Figure 63. Boyle Macromodel and Subcircuit
PSpice and Parts are trademarks of MicroSim Corporation.
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SLOS177D – FEBRUARY 1997 – REVISED MARCH 2001
MECHANICAL INFORMATION
D (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PIN SHOWN
PINS **
0.050 (1,27)
8
14
16
A MAX
0.197
(5,00)
0.344
(8,75)
0.394
(10,00)
A MIN
0.189
(4,80)
0.337
(8,55)
0.386
(9,80)
DIM
0.020 (0,51)
0.014 (0,35)
14
0.010 (0,25) M
8
0.244 (6,20)
0.228 (5,80)
0.008 (0,20) NOM
0.157 (4,00)
0.150 (3,81)
1
Gage Plane
7
A
0.010 (0,25)
0°– 8°
0.044 (1,12)
0.016 (0,40)
Seating Plane
0.069 (1,75) MAX
0.010 (0,25)
0.004 (0,10)
0.004 (0,10)
4040047 / B 03/95
NOTES: A.
B.
C.
D.
E.
50
All linear dimensions are in inches (millimeters).
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion, not to exceed 0.006 (0,15).
Four center pins are connected to die mount pad.
Falls within JEDEC MS-012
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TLC226x, TLC226xA
Advanced LinCMOS RAIL-TO-RAIL
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SLOS177D – FEBRUARY 1997 – REVISED MARCH 2001
MECHANICAL INFORMATION
FK (S-CQCC-N**)
LEADLESS CERAMIC CHIP CARRIER
28 TERMINAL SHOWN
18
17
16
15
14
13
NO. OF
TERMINALS
**
12
19
11
20
10
A
B
MIN
MAX
MIN
MAX
20
0.342
(8,69)
0.358
(9,09)
0.307
(7,80)
0.358
(9,09)
28
0.442
(11,23)
0.458
(11,63)
0.406
(10,31)
0.458
(11,63)
21
9
22
8
44
0.640
(16,26)
0.660
(16,76)
0.495
(12,58)
0.560
(14,22)
23
7
52
0.740
(18,78)
0.761
(19,32)
0.495
(12,58)
0.560
(14,22)
24
6
68
25
5
0.938
(23,83)
0.962
(24,43)
0.850
(21,6)
0.858
(21,8)
84
1.141
(28,99)
1.165
(29,59)
1.047
(26,6)
1.063
(27,0)
B SQ
A SQ
26
27
28
1
2
3
4
0.080 (2,03)
0.064 (1,63)
0.020 (0,51)
0.010 (0,25)
0.020 (0,51)
0.010 (0,25)
0.055 (1,40)
0.045 (1,14)
0.045 (1,14)
0.035 (0,89)
0.045 (1,14)
0.035 (0,89)
0.028 (0,71)
0.022 (0,54)
0.050 (1,27)
4040140 / C 11/95
NOTES: A.
B.
C.
D.
E.
All linear dimensions are in inches (millimeters).
This drawing is subject to change without notice.
This package can be hermetically sealed with a metal lid.
The terminals are gold plated.
Falls within JEDEC MS-004
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TLC226x, TLC226xA
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OPERATIONAL AMPLIFIERS
SLOS177D – FEBRUARY 1997 – REVISED MARCH 2001
MECHANICAL INFORMATION
J (R-GDIP-T**)
CERAMIC DUAL-IN-LINE PACKAGE
14 PIN SHOWN
PINS **
14
16
18
20
22
A MAX
0.310
(7,87)
0.310
(7,87)
0.310
(7,87)
0.310
(7,87)
0.410
(10,41)
A MIN
0.290
(7,37)
0.290
(7,37)
0.290
(7,37)
0.290
(7,37)
0.390
(9,91)
B MAX
0.785
(19,94)
0.785
(19,94)
0.910
(23,10)
0.975
(24,77)
1.100
(28,00)
B MIN
0.755
(19,18)
0.755
(19,18)
C MAX
0.280
(7,11)
0.300
(7,62)
0.300
(7,62)
0.300
(7,62)
C MIN
0.245
(6,22)
0.245
(6,22)
0.245
(6,22)
0.245
(6,22)
DIM
B
14
8
C
1
7
0.065 (1,65)
0.045 (1,14)
0.100 (2,54)
0.070 (1,78)
0.020 (0,51) MIN
0.930
(23,62)
0.388
(9,65)
A
0.200 (5,08) MAX
Seating Plane
0.130 (3,30) MIN
0°– 15°
0.100 (2,54)
0.023 (0,58)
0.015 (0,38)
0.014 (0,36)
0.008 (0,20)
4040083 / B 04/95
NOTES: A.
B.
C.
D.
E.
52
All linear dimensions are in inches (millimeters).
This drawing is subject to change without notice.
This package can be hermetically sealed with a ceramic lid using glass frit.
Index point is provided on cap for terminal identification on press ceramic glass frit seal only.
Falls within MIL-STD-1835 GDIP1-T14, GDIP1-T16, GDIP1-T18, GDIP1-T20, and GDIP1-T22
POST OFFICE BOX 655303
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TLC226x, TLC226xA
Advanced LinCMOS RAIL-TO-RAIL
OPERATIONAL AMPLIFIERS
SLOS177D – FEBRUARY 1997 – REVISED MARCH 2001
MECHANICAL INFORMATION
JG (R-GDIP-T8)
CERAMIC DUAL-IN-LINE PACKAGE
0.400 (10,20)
0.355 (9,00)
8
5
0.280 (7,11)
0.245 (6,22)
1
4
0.065 (1,65)
0.045 (1,14)
0.310 (7,87)
0.290 (7,37)
0.020 (0,51) MIN
0.200 (5,08) MAX
Seating Plane
0.130 (3,30) MIN
0.063 (1,60)
0.015 (0,38)
0°–15°
0.023 (0,58)
0.015 (0,38)
0.015 (0,38)
0.008 (0,20)
0.100 (2,54)
4040107 / B 04/95
NOTES: A.
B.
C.
D.
E.
All linear dimensions are in inches (millimeters).
This drawing is subject to change without notice.
This package can be hermetically sealed with a ceramic lid using glass frit.
Index point is provided on cap for terminal identification on press ceramic glass frit seal only
Falls within MIL-STD-1835 GDIP1-T8
POST OFFICE BOX 655303
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53
TLC226x, TLC226xA
Advanced LinCMOS RAIL-TO-RAIL
OPERATIONAL AMPLIFIERS
SLOS177D – FEBRUARY 1997 – REVISED MARCH 2001
MECHANICAL INFORMATION
N (R-PDIP-T**)
PLASTIC DUAL-IN-LINE PACKAGE
16 PIN SHOWN
PINS **
14
16
18
20
A MAX
0.775
(19,69)
0.775
(19,69)
0.920
(23.37)
0.975
(24,77)
A MIN
0.745
(18,92)
0.745
(18,92)
0.850
(21.59)
0.940
(23,88)
DIM
A
16
9
0.260 (6,60)
0.240 (6,10)
1
8
0.070 (1,78) MAX
0.035 (0,89) MAX
0.310 (7,87)
0.290 (7,37)
0.020 (0,51) MIN
0.200 (5,08) MAX
Seating Plane
0.125 (3,18) MIN
0.100 (2,54)
0.021 (0,53)
0.015 (0,38)
0.010 (0,25) M
0°– 15°
0.010 (0,25) NOM
14/18 PIN ONLY
4040049/C 08/95
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Falls within JEDEC MS-001 (20 pin package is shorter then MS-001.)
54
POST OFFICE BOX 655303
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TLC226x, TLC226xA
Advanced LinCMOS RAIL-TO-RAIL
OPERATIONAL AMPLIFIERS
SLOS177D – FEBRUARY 1997 – REVISED MARCH 2001
MECHANICAL INFORMATION
P (R-PDIP-T8)
PLASTIC DUAL-IN-LINE PACKAGE
0.400 (10,60)
0.355 (9,02)
8
5
0.260 (6,60)
0.240 (6,10)
1
4
0.070 (1,78) MAX
0.310 (7,87)
0.290 (7,37)
0.020 (0,51) MIN
0.200 (5,08) MAX
Seating Plane
0.125 (3,18) MIN
0.100 (2,54)
0.021 (0,53)
0.015 (0,38)
0°– 15°
0.010 (0,25) M
0.010 (0,25) NOM
4040082 / B 03/95
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Falls within JEDEC MS-001
POST OFFICE BOX 655303
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55
TLC226x, TLC226xA
Advanced LinCMOS RAIL-TO-RAIL
OPERATIONAL AMPLIFIERS
SLOS177D – FEBRUARY 1997 – REVISED MARCH 2001
MECHANICAL INFORMATION
PW (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PIN SHOWN
0,32
0,19
0,65
14
0,13 M
8
0,15 NOM
4,50
4,30
6,70
6,10
Gage Plane
0,25
1
7
0°– 8°
0,75
0,50
A
Seating Plane
1,20 MAX
0,10
0,10 MIN
PINS **
8
14
16
20
24
28
A MAX
3,10
5,10
5,10
6,60
7,90
9,80
A MIN
2,90
4,90
4,90
6,40
7,70
9,60
DIM
4040064 / D 10/95
NOTES: A.
B.
C.
D.
56
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion not to exceed 0,15.
Falls within JEDEC MO-153
POST OFFICE BOX 655303
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TLC226x, TLC226xA
Advanced LinCMOS RAIL-TO-RAIL
OPERATIONAL AMPLIFIERS
SLOS177D – FEBRUARY 1997 – REVISED MARCH 2001
MECHANICAL INFORMATION
U (S-GDFP-F10)
CERAMIC DUAL FLATPACK
0.250 (6,35)
0.246 (6,10)
0.006 (0,15)
0.004 (0,10)
0.080 (2,03)
0.050 (1,27)
0.045 (1,14)
0.026 (0,66)
0.300 (7,62)
0.350 (8,89)
0.250 (6,35)
1
0.350 (8,89)
0.250 (6,35)
10
0.019 (0,48)
0.015 (0,38)
0.050 (1,27)
0.250 (6,35)
5
6
0.025 (0,64)
0.005 (0,13)
1.000 (25,40)
0.750 (19,05)
4040179 / B 03/95
NOTES: A.
B.
C.
D.
E.
All linear dimensions are in inches (millimeters).
This drawing is subject to change without notice.
This package can be hermetically sealed with a ceramic lid using glass frit.
Index point is provided on cap for terminal identification only.
Falls within MIL STD 1835 GDFP1-F10 and JEDEC MO-092AA
POST OFFICE BOX 655303
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57
TLC226x, TLC226xA
Advanced LinCMOS RAIL-TO-RAIL
OPERATIONAL AMPLIFIERS
SLOS177D – FEBRUARY 1997 – REVISED MARCH 2001
MECHANICAL INFORMATION
W (R-GDFP-F16)
CERAMIC DUAL FLATPACK
Base and Seating Plane
0.285 (7,24)
0.245 (6,22)
0.006 (0,15)
0.004 (0,10)
0.085 (2,16)
0.045 (1,14)
0.045 (1,14)
0.026 (0,66)
0.305 (7,75)
0.275 (6,99)
0.355 (9,02)
0.235 (5,97)
1
0.355 (9,02)
0.235 (5,97)
16
0.019 (0,48)
0.015 (0,38)
0.050 (1,27)
0.440 (11,18)
0.371 (9,42)
0.025 (0,64)
0.015 (0,38)
8
9
1.025 (26,04)
0.745 (18,92)
4040180-3 / B 03/95
NOTES: A.
B.
C.
D.
E.
58
All linear dimensions are in inches (millimeters).
This drawing is subject to change without notice.
This package can be hermetically sealed with a ceramic lid using glass frit.
Index point is provided on cap for terminal identification only.
Falls within MIL-STD-1835 GDFP1-F16 and JEDEC MO-092AC
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
15-Oct-2009
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
5962-9469201Q2A
ACTIVE
LCCC
FK
20
1
TBD
5962-9469201QHA
ACTIVE
CFP
U
10
1
TBD
5962-9469201QPA
ACTIVE
CDIP
JG
8
1
TBD
5962-9469202Q2A
ACTIVE
LCCC
FK
20
1
TBD
5962-9469202QCA
ACTIVE
CDIP
J
14
1
TBD
5962-9469202QDA
ACTIVE
CFP
W
14
1
TBD
5962-9469203Q2A
ACTIVE
LCCC
FK
20
1
TBD
5962-9469203QHA
ACTIVE
CFP
U
10
1
TBD
5962-9469203QPA
ACTIVE
CDIP
JG
8
1
TBD
5962-9469204Q2A
ACTIVE
LCCC
FK
20
1
TBD
5962-9469204QCA
ACTIVE
CDIP
J
14
1
TBD
5962-9469204QDA
ACTIVE
CFP
W
14
1
TLC2262AID
ACTIVE
SOIC
D
8
75
TLC2262AIDG4
ACTIVE
SOIC
D
8
75
TLC2262AIDR
ACTIVE
SOIC
D
TLC2262AIDRG4
ACTIVE
SOIC
TLC2262AIP
ACTIVE
TLC2262AIPE4
Lead/Ball Finish
MSL Peak Temp (3)
POST-PLATE N / A for Pkg Type
A42
N / A for Pkg Type
A42
N / A for Pkg Type
POST-PLATE N / A for Pkg Type
A42
N / A for Pkg Type
A42
N / A for Pkg Type
POST-PLATE N / A for Pkg Type
A42
N / A for Pkg Type
A42
N / A for Pkg Type
POST-PLATE N / A for Pkg Type
A42
N / A for Pkg Type
TBD
A42
N / A for Pkg Type
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
PDIP
P
8
50
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
ACTIVE
PDIP
P
8
50
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
TLC2262AIPW
ACTIVE
TSSOP
PW
8
150
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC2262AIPWG4
ACTIVE
TSSOP
PW
8
150
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC2262AIPWLE
OBSOLETE
TSSOP
PW
8
TLC2262AIPWR
ACTIVE
TSSOP
PW
8
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC2262AIPWRG4
ACTIVE
TSSOP
PW
8
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC2262AMFKB
ACTIVE
LCCC
FK
20
1
TBD
TLC2262AMJG
ACTIVE
CDIP
JG
8
1
TBD
A42
N / A for Pkg Type
TLC2262AMJGB
ACTIVE
CDIP
JG
8
1
TBD
A42
N / A for Pkg Type
TLC2262AMUB
ACTIVE
CFP
U
10
1
TBD
A42
N / A for Pkg Type
TLC2262AQD
ACTIVE
SOIC
D
8
75
TBD
CU NIPDAU
Level-1-220C-UNLIM
TLC2262AQDG4
ACTIVE
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC2262AQDR
ACTIVE
SOIC
D
8
2500
Pb-Free
(RoHS)
CU NIPDAU
Level-2-250C-1 YEAR/
Level-1-235C-UNLIM
TLC2262AQDRG4
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC2262CD
ACTIVE
SOIC
D
8
CU NIPDAU
Level-1-260C-UNLIM
TBD
75
Addendum-Page 1
Green (RoHS &
no Sb/Br)
Call TI
Call TI
POST-PLATE N / A for Pkg Type
PACKAGE OPTION ADDENDUM
www.ti.com
15-Oct-2009
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
TLC2262CDG4
ACTIVE
SOIC
D
8
TLC2262CDR
ACTIVE
SOIC
D
TLC2262CDRG4
ACTIVE
SOIC
TLC2262CP
ACTIVE
TLC2262CPE4
75
Lead/Ball Finish
MSL Peak Temp (3)
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
PDIP
P
8
50
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
ACTIVE
PDIP
P
8
50
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
TLC2262CPW
ACTIVE
TSSOP
PW
8
150
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC2262CPWG4
ACTIVE
TSSOP
PW
8
150
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC2262CPWLE
OBSOLETE
TSSOP
PW
8
TLC2262CPWR
ACTIVE
TSSOP
PW
8
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC2262CPWRG4
ACTIVE
TSSOP
PW
8
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC2262ID
ACTIVE
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC2262IDG4
ACTIVE
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC2262IDR
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC2262IDRG4
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC2262IP
ACTIVE
PDIP
P
8
50
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
TLC2262IPE4
ACTIVE
PDIP
P
8
50
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
TLC2262MFKB
ACTIVE
LCCC
FK
20
1
TBD
TLC2262MJGB
ACTIVE
CDIP
JG
8
1
TBD
A42
N / A for Pkg Type
TLC2262MUB
ACTIVE
CFP
U
10
1
TBD
A42
N / A for Pkg Type
75
TBD
TBD
Call TI
Call TI
POST-PLATE N / A for Pkg Type
TLC2262QD
ACTIVE
SOIC
D
8
CU NIPDAU
Level-1-220C-UNLIM
TLC2262QDG4
ACTIVE
SOIC
D
8
1500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
CU NIPDAU
Level-1-220C-UNLIM
CU NIPDAU
Level-1-260C-UNLIM
TLC2262QDR
ACTIVE
SOIC
D
8
2500
TLC2262QDRG4
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
TLC2264AID
ACTIVE
SOIC
D
14
50
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC2264AIDG4
ACTIVE
SOIC
D
14
50
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC2264AIDR
ACTIVE
SOIC
D
14
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC2264AIDRG4
ACTIVE
SOIC
D
14
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC2264AIN
ACTIVE
PDIP
N
14
CU NIPDAU
N / A for Pkg Type
25
Addendum-Page 2
TBD
Pb-Free
(RoHS)
PACKAGE OPTION ADDENDUM
www.ti.com
15-Oct-2009
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
TLC2264AINE4
ACTIVE
PDIP
N
14
25
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
TLC2264AIPW
ACTIVE
TSSOP
PW
14
90
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC2264AIPWG4
ACTIVE
TSSOP
PW
14
90
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC2264AIPWLE
OBSOLETE
TSSOP
PW
14
TLC2264AIPWR
ACTIVE
TSSOP
PW
14
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC2264AIPWRG4
ACTIVE
TSSOP
PW
14
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC2264AMFKB
ACTIVE
LCCC
FK
20
1
TBD
TLC2264AMJ
ACTIVE
CDIP
J
14
1
TBD
A42
N / A for Pkg Type
TBD
Lead/Ball Finish
Call TI
MSL Peak Temp (3)
Call TI
POST-PLATE N / A for Pkg Type
TLC2264AMJB
ACTIVE
CDIP
J
14
1
TBD
A42
N / A for Pkg Type
TLC2264AMWB
ACTIVE
CFP
W
14
1
TBD
A42
N / A for Pkg Type
TLC2264AQD
ACTIVE
SOIC
D
14
50
TBD
CU NIPDAU
Level-1-220C-UNLIM
TLC2264AQDG4
ACTIVE
SOIC
D
14
50
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC2264AQDR
ACTIVE
SOIC
D
14
2500
TBD
CU NIPDAU
Level-1-220C-UNLIM
TLC2264AQDRG4
ACTIVE
SOIC
D
14
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC2264CD
ACTIVE
SOIC
D
14
50
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC2264CDG4
ACTIVE
SOIC
D
14
50
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC2264CDR
ACTIVE
SOIC
D
14
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC2264CDRG4
ACTIVE
SOIC
D
14
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC2264CN
ACTIVE
PDIP
N
14
25
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
TLC2264CNE4
ACTIVE
PDIP
N
14
25
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
TLC2264CPW
ACTIVE
TSSOP
PW
14
90
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC2264CPWG4
ACTIVE
TSSOP
PW
14
90
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC2264CPWLE
OBSOLETE
TSSOP
PW
14
TLC2264CPWR
ACTIVE
TSSOP
PW
14
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC2264CPWRG4
ACTIVE
TSSOP
PW
14
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC2264ID
ACTIVE
SOIC
D
14
50
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC2264IDG4
ACTIVE
SOIC
D
14
50
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC2264IDR
ACTIVE
SOIC
D
14
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC2264IDRG4
ACTIVE
SOIC
D
14
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TBD
Addendum-Page 3
Call TI
Call TI
PACKAGE OPTION ADDENDUM
www.ti.com
15-Oct-2009
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
TLC2264IN
ACTIVE
PDIP
N
14
25
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
TLC2264INE4
ACTIVE
PDIP
N
14
25
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
TLC2264MFKB
ACTIVE
LCCC
FK
20
1
TBD
TLC2264MJB
ACTIVE
CDIP
J
14
1
TBD
TLC2264MWB
ACTIVE
CFP
W
14
1
TLC2264QD
ACTIVE
SOIC
D
14
50
TLC2264QDG4
ACTIVE
SOIC
D
14
TLC2264QDR
ACTIVE
SOIC
D
TLC2264QDRG4
ACTIVE
SOIC
D
Lead/Ball Finish
MSL Peak Temp (3)
POST-PLATE N / A for Pkg Type
A42
N / A for Pkg Type
TBD
A42
N / A for Pkg Type
TBD
CU NIPDAU
Level-1-220C-UNLIM
50
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
14
2500
TBD
CU NIPDAU
Level-1-220C-UNLIM
14
1500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF TLC2262, TLC2262A, TLC2262AM, TLC2262M, TLC2264, TLC2264A, TLC2264AM, TLC2264M :
• Automotive: TLC2264A-Q1
NOTE: Qualified Version Definitions:
• Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects
Addendum-Page 4
PACKAGE MATERIALS INFORMATION
www.ti.com
15-Dec-2008
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
Diameter Width
(mm) W1 (mm)
A0 (mm)
B0 (mm)
K0 (mm)
P1
(mm)
W
Pin1
(mm) Quadrant
TLC2262AIDR
SOIC
D
8
2500
330.0
12.4
6.4
5.2
2.1
8.0
12.0
Q1
TLC2262AIPWR
TSSOP
PW
8
2000
330.0
12.4
7.0
3.6
1.6
8.0
12.0
Q1
TLC2262CDR
SOIC
D
8
2500
330.0
12.4
6.4
5.2
2.1
8.0
12.0
Q1
TLC2262CPWR
TSSOP
PW
8
2000
330.0
12.4
7.0
3.6
1.6
8.0
12.0
Q1
TLC2262IDR
SOIC
D
8
2500
330.0
12.4
6.4
5.2
2.1
8.0
12.0
Q1
TLC2264AIDR
SOIC
D
14
2500
330.0
16.4
6.5
9.0
2.1
8.0
16.0
Q1
TLC2264AIPWR
TSSOP
PW
14
2000
330.0
12.4
7.0
5.6
1.6
8.0
12.0
Q1
TLC2264CDR
SOIC
D
14
2500
330.0
16.4
6.5
9.0
2.1
8.0
16.0
Q1
TLC2264CPWR
TSSOP
PW
14
2000
330.0
12.4
7.0
5.6
1.6
8.0
12.0
Q1
TLC2264IDR
SOIC
D
14
2500
330.0
16.4
6.5
9.0
2.1
8.0
16.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
15-Dec-2008
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
TLC2262AIDR
SOIC
D
8
2500
340.5
338.1
20.6
TLC2262AIPWR
TSSOP
PW
8
2000
346.0
346.0
29.0
TLC2262CDR
SOIC
D
8
2500
340.5
338.1
20.6
TLC2262CPWR
TSSOP
PW
8
2000
346.0
346.0
29.0
TLC2262IDR
SOIC
D
8
2500
340.5
338.1
20.6
TLC2264AIDR
SOIC
D
14
2500
333.2
345.9
28.6
TLC2264AIPWR
TSSOP
PW
14
2000
346.0
346.0
29.0
TLC2264CDR
SOIC
D
14
2500
333.2
345.9
28.6
TLC2264CPWR
TSSOP
PW
14
2000
346.0
346.0
29.0
TLC2264IDR
SOIC
D
14
2500
333.2
345.9
28.6
Pack Materials-Page 2
MECHANICAL DATA
MLCC006B – OCTOBER 1996
FK (S-CQCC-N**)
LEADLESS CERAMIC CHIP CARRIER
28 TERMINAL SHOWN
18
17
16
15
14
13
NO. OF
TERMINALS
**
12
19
11
20
10
A
B
MIN
MAX
MIN
MAX
20
0.342
(8,69)
0.358
(9,09)
0.307
(7,80)
0.358
(9,09)
28
0.442
(11,23)
0.458
(11,63)
0.406
(10,31)
0.458
(11,63)
21
9
22
8
44
0.640
(16,26)
0.660
(16,76)
0.495
(12,58)
0.560
(14,22)
23
7
52
0.739
(18,78)
0.761
(19,32)
0.495
(12,58)
0.560
(14,22)
24
6
68
0.938
(23,83)
0.962
(24,43)
0.850
(21,6)
0.858
(21,8)
84
1.141
(28,99)
1.165
(29,59)
1.047
(26,6)
1.063
(27,0)
B SQ
A SQ
25
5
26
27
28
1
2
3
4
0.080 (2,03)
0.064 (1,63)
0.020 (0,51)
0.010 (0,25)
0.020 (0,51)
0.010 (0,25)
0.055 (1,40)
0.045 (1,14)
0.045 (1,14)
0.035 (0,89)
0.045 (1,14)
0.035 (0,89)
0.028 (0,71)
0.022 (0,54)
0.050 (1,27)
4040140 / D 10/96
NOTES: A.
B.
C.
D.
E.
All linear dimensions are in inches (millimeters).
This drawing is subject to change without notice.
This package can be hermetically sealed with a metal lid.
The terminals are gold plated.
Falls within JEDEC MS-004
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
MECHANICAL DATA
MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999
PW (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0,30
0,19
0,65
14
0,10 M
8
0,15 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
1
7
0°– 8°
A
0,75
0,50
Seating Plane
0,15
0,05
1,20 MAX
PINS **
0,10
8
14
16
20
24
28
A MAX
3,10
5,10
5,10
6,60
7,90
9,80
A MIN
2,90
4,90
4,90
6,40
7,70
9,60
DIM
4040064/F 01/97
NOTES: A.
B.
C.
D.
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion not to exceed 0,15.
Falls within JEDEC MO-153
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
MECHANICAL DATA
MPDI001A – JANUARY 1995 – REVISED JUNE 1999
P (R-PDIP-T8)
PLASTIC DUAL-IN-LINE
0.400 (10,60)
0.355 (9,02)
8
5
0.260 (6,60)
0.240 (6,10)
1
4
0.070 (1,78) MAX
0.325 (8,26)
0.300 (7,62)
0.020 (0,51) MIN
0.015 (0,38)
Gage Plane
0.200 (5,08) MAX
Seating Plane
0.010 (0,25) NOM
0.125 (3,18) MIN
0.100 (2,54)
0.021 (0,53)
0.015 (0,38)
0.430 (10,92)
MAX
0.010 (0,25) M
4040082/D 05/98
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Falls within JEDEC MS-001
For the latest package information, go to http://www.ti.com/sc/docs/package/pkg_info.htm
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
MECHANICAL DATA
MCER001A – JANUARY 1995 – REVISED JANUARY 1997
JG (R-GDIP-T8)
CERAMIC DUAL-IN-LINE
0.400 (10,16)
0.355 (9,00)
8
5
0.280 (7,11)
0.245 (6,22)
1
0.063 (1,60)
0.015 (0,38)
4
0.065 (1,65)
0.045 (1,14)
0.310 (7,87)
0.290 (7,37)
0.020 (0,51) MIN
0.200 (5,08) MAX
Seating Plane
0.130 (3,30) MIN
0.023 (0,58)
0.015 (0,38)
0°–15°
0.100 (2,54)
0.014 (0,36)
0.008 (0,20)
4040107/C 08/96
NOTES: A.
B.
C.
D.
E.
All linear dimensions are in inches (millimeters).
This drawing is subject to change without notice.
This package can be hermetically sealed with a ceramic lid using glass frit.
Index point is provided on cap for terminal identification.
Falls within MIL STD 1835 GDIP1-T8
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
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