Matched Terminated Stub VIA Technology
Higher
Bandwidth Transmission
Matched Terminated Stubfor
VIA
Technology
in Line Cards and Back Planes.
for Higher Bandwidth Transmission
in Line Cards and Back Planes.
Printed Circuit Board
Operations
George Dudnikov
Senior Vice President & CTO
george.dudnikov@sanmina-sci.com
Dr. Vladimir Duvanenko
Manager Signal Integrity
vladimir.duvanenko@sanmina-sci.com
© 2008 Sanmina-SCI Corporation. Sanmina-SCI is a trademark of Sanmina-SCI Corporation.
All trademarks and registered trademarks are the property of their respective owners.
Abstract
•
In line cards and backplanes the inherent impedance mismatch of a via
stub is a significant impediment to obtaining higher transmission
bandwidth.
•
This obstacle has been circumvented by using back drilling production
methods resulting in higher product cost for backplanes.
In line cards, the tighter dimensions on vias and pads make back drilling
difficult if not impossible. Buried and blind vias can reduce stubs but are
even more costly
At data transmission rates > 10 Gbps, backdrilling alone may not be
adequate enough to reduce jitter and BER
•
•
•
An optimized via technology is presented as an additional SI improvement
to backdrilling
•
A matched terminated stub (MTS) via technology is presented as an
alterative approach to the high cost of stub back drilling that can be applied
to lines cards and backplanes
PCB Signal Integrity Drivers
Bandwidth 2.5 Gbps X 5 Gbps
Production
10 Gbps X
20 Gbps X 40 Gbps
Demonstrated Development
Larger trace widths and
lower dielectric losses
push this curve up
Increased trace-to-trace
separation distance,
better impedance control
push this curve down
Noise increases with increasing
frequency/distance due to crosstalk
and impedance mismatch reflections (via stubs)
Increasing Frequency/Distance
Signal < Noise
(Non-functional)
Signal > Noise
(Marginal)
Signal >> Noise
(Excellent)
Relative Level
Signal strength decreases (is attenuated) with
increasing frequency/distance due to skin depth (trace),
And loss tangent (dielectric) losses
Performance Trends/Expectations
Difficult
BER
More
Difficult
103 BER
Reductions
Technology
Domains
10 Gig
20 Gig
40 Gig
80 Gig
160 Gig
(per 4 lanes)
(per 4 lanes)
(per 4 lanes)
(per 4 lanes)
(per 4 lanes)
3.125 Gb/s
6.25 Gb/s
12.5 Gb/s
25 Gb/s
50 Gb/s
(per diff pair)
(per diff pair)
(per diff pair)
(per diff pair)
(per diff pair)
10-12
10-13
10-14
10-15
10-16
10-17
10-18
10-19
10-20
10-21
Squeeze Out One More Rate Increase
Market
Drivers
Most
Difficult
2X Data Rate Increases
Brand New Design
1:
2:
3:
Active compensation (waveshaping, driver pre/de-emphasis, receiver equalization)
Connector and attachment technology (press-fit, pressure-fit, SMT, BGA)
Backplane/PCB material (dielectric) and interconnect geometry (via/trace size/shape)
Sources of Passive Interconnect
Losses and Distortions
PCB/Backplane
Losses
Via Field
Conduction Losses 1
Impedance Mismatches 2
X
X
Crosstalk
X
X
X
X
Geometry
Geometry
X
Material 4
Geometry
Note how geometry (size/shape) in the connector/via
field regions dominates the majority of undesired
sources of interconnect distortion at higher data rates.
Includes skin depth, surface roughness and non-uniform current crowding effects
Includes distributed/lumped element mismatches and memory effects
3 Includes via thru/stub ratio effect
4 Technology does not exist to tweak at the molecular level. Can only change molecules (materials).
2
Trace
X
Systemic/Random
Variations 3
Connectors
migrating away
from Press-Fit
Dielectric
X
Dielectric Losses
Primary Source of Grief
1
Connector
Distortions
Undesired Effect
1
5 10 20
Data Rate (Gb/s)
Via-Fields
migrating away
from PTH
Bad Agents: Long Via Stubs
Normal Signal Flow
Distorted Signal
Unterminated
Stub
(5 mil wide, 20” long traces in FR4)
Degrading Stub Reflections
F
G
H
G
A
E
B
D
C
Nulls are difficult to control
Note only connector/via field regions [geometry sizes/shapes] were changed to reduce distortions.
Via “Stub” Versus “Thru” Performance
(Bare Backplane)
Note: Distortions due to long stub lengths dominate over distortions
due to long line lengths (skin depth/dielectric losses)
Via Stub Loss Versus Dielectric Loss
Locations of Via Stub Structures
Higher
Distortion
Df .021
Df .008
Lower Loss
Note: Improving dielectric material can actually increase distortion!
Improving Signal Integrity Performance
using Backdrilling
Backdrilling eliminates detrimental plated-through-hole
(PTH) via stub effects that distort signals passing
through them
Without Backdrilling
With Backdrilling
6.25 Gb/s Data Rate
Unusable Eye Diagram
Usable Eye Diagram
Approximate Stub Loss Effects
Signal Loss
(Percent)
1
0.25%
2
0.5%
5
1.25%
10
2.5%
20
5%
40
10%
60
15%
100
25%
150
37.5%
60
Approximate Signal Loss (%)
Stub Length
(mils)
50
40
30
20
10
10% Trace Impedance Mismatch ≈ 20 mil Stub = 5% Loss
200
50%
250
62.5%
0
0
50
100
150
200
Stub Length (mils)
** Applicable for Dk > 3.5, DF > 0.005, 20 – 35 mil connector drill diameters, data rates < 8 Gb/s.
(This is a rule of thumb, not a design guide.)
250
High Speed Interconnect World Shift
Diff Pair
h
Diff Pair
Diff Pair
w
Old Metric: GB/s/diff pair ⇒ New Metric: GB/s/in2
Applicable to PCBs, Back/Midplanes and Connectors
• Approach A (Traditional/Long Term)
• Develop technology to increase GB/s/diff pair
• Better Dielectrics
• Lower loss tangents
• More uniform (solve glass weave issues)
• Smoother traces (surface roughness)
• More complex active comp
• Volume 25 GB/s/diff pair circa 2013
• Approach B (Near Term Focus)
• Develop technology to increase routing density
• Focus on GB/s/in2 not GB/s/diff pair
• 25 GB/s/diff pair not as important
• Smaller trace widths (8-10 mils ⇒ 3 - 4 mils)
• Thinner dielectric thicknesses (8-10 mils ⇒ 3 - 4 mils)
• Higher aspect-ratio vias (25:1 and up)
• Smaller connector pin pitches (1.8/1.5 mm)
• Press fit and BGA
• Smaller press-fit vias (9-10 mil finished hole size)
SSCI is developing new processes to
increase via/trace routing density
(Examples: MTS-Via, SVP, 85 Ω Diff Pairs)
Examples: Tyco Multi-Gig, Tinman
FCI Airmax, Zipline
Molex Impact
Smaller diameter holes are harder to backdrill
due to drill breakage and registration
At higher frequencies ( >10 Gbps ), backdrilled vias
may still have distortion effects which will increase BER
Opti-vias™are a family of engineered via structures
whose S-parameters have been optimized for high
speed performance
Proprietary algorithms adjust pad and antipad
geometries , sizes, and locations to “tune” the
residual portion of the barrel by optimizing the
inherent L and C components of the via structure.
Before Optimization
After Optimization
Standard
Via
Non-uniform S-parameters
Flat S-parameters
Opti-Via™
Unusable Eye Diagram
12.5 Gb/s Data Rate
Usable Eye Diagram
Backdrill Limitations
• Too Many Backdrill Depths increases cost
Two sided Backdrill increases cost ( up to 12 depths from each side)
• New High Speed Connectors will require smaller diameter holes
• BGA Vias require backdrilling 6-10 mil diameter holes on potentially
tens of thousands of I/O
•Special drilling machines required for small diameter backdrilling
tolerance
• Drill breakage and yield issues
• Capacity issues
• Can get costly
•
8 mil BGA Via
An Alternative Approach: MTS-Via™
Matched Terminated Stub Technology
Concept: Terminate stub reflections to ground
using a resistor equal to the Zo of the via
210a 210b
215c
215a
215b
110a
110b
300
305
310
315
320
325
110c
110d
110e
110f
330a 330b 330c
Single Ended
330d
330e
330f
Diff Pair
215d
Concept Validation in Lab Testing
51 ohm resistors connects via stubs to ground
Control case: same board, no resistors
Measured using Anritsu PPG, Tektronix CSA 8000B
32 bit increasing psuedo-random pattern
Semi-rigid coax cables connected directly with via
MTSvia Assembly
Measurement Results
MTSvia using 51 Ohms
Control
0.3 V
V
O
L
T
A
G
E
-0.3 V
0 ps
Time (ps)
•
•
•
•
•
320
0 ps
Time (ps)
6.25 GB/s from Anritsu MD17636 PPG
22 Layer Motherboard
Control: Unterminated
Control Jitter: 160 ps (1.00 UI) - Eye Completely Closed
MTSvia Jitter: 52 ps (0.325 UI) 3 to 1 improvement
The MTSvia resistor absorbs the reflected signal resulting in a reduction in signal strength
The MTSvia reduces the signal distortion due to elimination of ISI and crosstalk
Eye opens up
320
Simulation Tools used to optimize MTSvia ™
resistor values , S parameters, and design rules
MTSvia using 50 Ohms
Control
1.5 V
V
O
L
T
A
G
E
-0.5 V
0 ps
Time (ps)
640
0 ps
Time (ps)
•3.125 GB/s from CJPAT PWL voltage source
•Using 1us of simulated data
•Control Eye: 134.5 ps width, 713 mV height
•MTSvia Eye: 208.8 ps width, 404 mV height
Ansoft 3D Model
640
BER is more sensitive to width of eye closure than
height of eye closure.
MTS-Via sacrifices some eye height in order to get a
much larger increase (10x) in eye width.
Stub creates
“pedestal/staircase”
distortion during a
transition that
decreased width of
eye.
Jitter/BER is nonlinear.
A10X decrease in jitter can often decrease BER by
many orders of magnitude.
MTS-Via (25 Ohms)
Control
0.2 V
0.40 UI
0.04 UI
V
O
L
T
A
G
E
-0.2 V
0 ps
Time (ps)
320
•
•
•
•
•
0 ps
6.25 GB/s from CJPAT PWL voltage source
Using 500ns of simulated data
Control Jitter: 64 ps (0.40 UI)
MTS-Via Eye: 6 ps (0.04 UI)
Jitter Reduction: 0.40/0.04 = 10X
Time (ps)
MTS-Via removes
pedestal/staircase”
distortion, thereby
increasing width of
eye.
320
ABR™ Annular Buried Resistor for MTSvia
applications
Via to Signal
Via to Via
Via to Plane
Buried Resistor Advantages
Frequency independent terminator
Eliminates need for discrete surface resistors
Saves space
No routing required
Low Cost Polymer Thick Film
High Speed Laser Trimming Available
MTSvia™ using Annular Buried Resistor
MTS Via = Matched Terminated Stub Via
Terminated Via Stub Eliminates Stub Reflections, Reduces Jitter
Normal Signal Flow
Distorted Signal
Unterminated
Stub
Large
Jitter
Without
Stub
Termination
Degrading Stub Reflections
It is easier to compensate for a reduction
in amplitude than correct for distortion
Undistorted Signal
Terminated
Stub
Small
Jitter
With
Stub
Termination
Stub Reflections Eliminated
Stub Terminating Resistor
(in anti-pad region)
MTSvia resistor value is adjusted to balance
Signal Strength vs Signal Distortion
MTS-via™ application for internal signal routing
eliminates need for 2 sided backdrill or subcomposites
EM wave
Stub
Useless
portion
Useful
MTS-VIA
Residual Stub
portion
Stub
Signal
Reference/Ground
R
Summary
•Via
stubs degrade the signal integrity ( SI) performance of PCB interconnects
because they attenuate and distort signals that propagate through them.
•This
degradation is frequency/data rate dependent, with larger amounts of
degradation occurring at higher operating frequencies/data rates
•Backdrilling
of via stubs is a cost effective way of minimizing stub effects but is
limited in capability for higher density designs and higher frequencies ( > 10
Gbps)
•Via
structures whose stub sections have been terminated into a resistance do
not have back-reflections and therefore do not introduce as much signal
distortion.
•MTSvia
is an alternative technology utilizing an impedance matched stub with
an adjustable signal / distortion ratio to cost effectively optimize signal integrity
for higher density designs and higher data rates.
Buried Capacitance®, MTS-via™, Opti-via™, ABR™ are trademarks of HSCI and Sanmina-SCI and
are technologies covered by multiple US and foreign patents. Licensing is available.