12th WSEAS International Conference on CIRCUITS, Heraklion, Greece, July 22-24, 2008 A novel Single-Input-Single-Output multifunctional filter based on Current-Starved Pseudo-Floating Gate MEHDI AZADMEHR Institute for Microsystems Technology Vestfold University College Raveien 197, 3184 Horten NORWAY YNGVAR BERG Institute for Microsystems Technology Vestfold University College Raveien 197, 3184 Horten NORWAY Abstract: In this paper a Multifunctional single-input-single-output (SISO) voltage-mode filter, based on CurrentStarved Pseudo-Floating Gate (CSP F G) inverters is presented. Using 3 bias voltages we are able to change the circuits functionality to perform various types of filter operations such as band pass, band reject, low and high pass. These filters have the advantage of being tunable, i.e. the frequency band can be tuned using bias voltages. Typical applications are detection of high frequency components in sensor signals, i.e. airbag sensors. AC simulation of the inverter is presented to show that the circuit is suited for high performance filter design. Key–Words: Analog, CMOS, Floating gate, Inverter, Multifunctional filter. 1 Introduction 2 CSPFG inverter As the demands regarding power consumption and compactness increases in analog VLSI and ULSI circuits design, multifunctional circuits has gained a lot of attention. One of areas where multifunctionality has become very popular is in filter design. There has been proposed many circuits that can realize various filters such as low pass, high pass, band pass, band stop outputs. These filters can be categorized based on the number of inputs and outputs. Four main categories are single-input-multiple-output (SIM O) [1, 2], multiple-input-single-output (M ISO) [3, 4], multiple-input-multiple-output (M IM O) [5, 6] and single-input-single-output (SISO) [7, 8]. In this paper we propose new type of SISO multifunctional filter based on Current-Starved Pseudo Floating-Gate (CSP F G) inverters [9,10]. These filters enjoy tuning ability, low power consumption, large gain and compactness. The first frequency selective circuit based on CSPFG was a band pass amplifier presented by Y. Berg et al [9]. This paper is organized as follow: Section 2 presents an analog CSPFG inverter and describe the inverters operation principle. In section 3 the CSPFG SISO multifunctional filter is presented where the different filters are presented in subsections. Section 4 is the conclusion of this work. The simulations presented in this paper are being done in the cadence environment with 90 nm CM OS transistor models from the ST M with a V DD equal 1.2 volts and threshold voltage of 0.25 volts. ISBN: 978-960-6766-82-4 Figure 1: Schematic of the CSPFG inverter The analog CSPFG inverter is shown in figure 1 (schematic) and 2 (symbol). This circuit is an current-starved inverter with a weak positive feedback. The positive feedback circuitry is basically a current starved inverter where the P M OS transistors are connected between the output and GN D and the N M OS transistors between output and V DD, the opposite of the inverter. This positive feedback has 108 ISSN: 1790-5117 12th WSEAS International Conference on CIRCUITS, Heraklion, Greece, July 22-24, 2008 Realization of different filters using the SISO multifunctional filter, shown in figure 3, is done through the bias voltages V hf 1, V hf 2 and V hf 3. Each bias voltage controls the highest cut-off frequency of it’s respective inverter. The bias values for each mode is listed in table 1. Low pass High Pass Band Pass Band Stop All pass All Stop Figure 2: Symbol of the analog CSPFG inverter 2 important functions in the circuit, it sets the operational point (DC level) of the circuit [11, 12] and it decides the lower cutoff frequency. Bias voltages on Vhf and Vlf limit the current flowing through the inverter and the feedback circuitry respectively. In the symbol the biases V lf ′ and V hf ′ are excluded since they are biased V DD − V lf and V DD − V hf respectively in all circuits presented in this paper. Input capacitance Cin, blocks DC signals from the other circuitry connected to the input and make the circuit floating [13]. Capacitors connected in parallel with the input capacitor can be used for weighting different input signals compared to each other simply by choosing the right values [14]. The closed loop gain of the circuit can be adjusted by changing the value of the feedback capacitor, Cf compared to Cin, and is given by: Cin A≈− (1) Cf Vhf1 GND F F F GND VDD Vhf2 GND VDD F VDD VDD GND Vhf3 F GND GND F VDD GND Table 1: The V hf values for each bias for each operation mode. If the value is F , the bias is used to tune the filter To understand the filters operation we have divided it into 3 parts marked as A, B, C and separated by a dashed square. The various filter operations are achieved by activation and/or deactivation of these blocks. 3.1 Low pass Different values for vhf=vlf 10 5 0 Assuming the inverter is ideal with infinite gain and Vhf larger than vdd/2. 20dB −5 3 Multifunctional CSPFG filter 0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.6 −10 −15 −20 −25 −30 10 2 10 4 10 6 10 8 10 10 Hz Figure 4: The AC response of the analog CSPFG inverter for different values of V hf , assuming V lf = V hf Figure 4 Shows the AC response of the CSPFG inverter when the bias voltages, V hf and V lf are varied from 0.25 to 0.6 volts simultaneous. We can see that the forwarding inverter suppresses high frequencies depending on the value of V hf , but it can operate Figure 3: Multifunctional CSPFG filter ISBN: 978-960-6766-82-4 109 ISSN: 1790-5117 12th WSEAS International Conference on CIRCUITS, Heraklion, Greece, July 22-24, 2008 on frequencies as high as 800 MHz. The positive feedback suppresses low frequencies based on the voltage on V lf . The lowest frequencies that can pass are as low as 5 KHz. This shows that the circuit behaves as wide band pass filter where the lowest and highest cut-off frequencies are adjustable. If we ignore the lowest cut-off frequencies of the inverter and consider only the highest cut-off frequencies the single inverter becomes a low pass filter. The bias voltages V lf 1, V lf 2, V lf 3 are set to 0.35 volts to achieve a stable, weak DC value at the input of the inverter. This is valid for all circuits presented in this paper. The highest cut-off frequency of the inverter can be obtained using simple transistor models and assuming that the starving transistor operates in the linear region: fmax ≈ βW b Vhfef f ective 2Cl V DD Figure 5: CSPFG high pass filter result is attenuation of the signal at output for frequencies within the pass band of the inverter and a signal equal to the input signal for frequencies higher than the pass band of the inverter. The behavior of the filter is presented in figure 6. AC response for differnt values of vhf (2) 5 0 where Vhfef f ective is Vhf − V t and Wb is the starving transistor, see fig 1. If Cin and Cf are equal, the transfer function of the inverter can be obtained by: Vout 1 SCl −5 −10 Gain 20dB −15 Cl => Sτ Vout = −Vin − Vout gm Vout −1 H(S)lp = = Vin 1 + τS −25 −35 −40 −45 −50 6 10 7 10 8 10 Hz 9 10 10 10 11 10 (3) Figure 6: The AC response of the analog CSPFG high pass filter for different values of Vhf Equation 3 shows that the inverter has a 1 order low pass filter behavior. In the multifunctional filter shown in figure 3 there are 2 low pass filters, these are marked as block B and C. The multifunctional circuit will become low pass filter if we turn off block A and B by biasing vhf 1 and vhf 2 to GN D. The only active component will then be the inverter in block C. To achieve maximum gain the inverter has no feedback capacitor . The cut-off frequency of the filter in the low pass mode is adjusted using bias V hf 3. The transfer function of the high pass filter is given by: −1 +1 1 + τS Vout (S) τS = = Vin (S) 1 + τS H(S)hp = H(S)lp + H(S)Cf 2 = H(S)hp (4) Block A in the SISO multifunctional filter shown in figure 3 performs the high pass operation. Block B is biased V DD so it becomes a all pass filter with a large Gain. Block C is turned of by biasing it to GN D. 3.2 High pass filter A CSPFG high pass filter is shown i figure 5. The high pass behavior is achieved by adding the input signal to the output of the low pass filter through the capacitor Cf 2. All the frequencies within the passband of the inverter are being summed at the output with the input signal. Due to the opposite sign of these signals, the ISBN: 978-960-6766-82-4 −20 −30 = −gm(Vin + Vout ) SCl Vout = −Vin − Vout gm τ= 0.25 0.35 0.45 0.55 0.65 3.3 Band pass filter Cascading a high pass filter and a low pass filter in series as shown in figure 7 results in a band pass filter 110 ISSN: 1790-5117 12th WSEAS International Conference on CIRCUITS, Heraklion, Greece, July 22-24, 2008 AC Response of the band pass filter 5 0 Gain 20dB −5 −10 0.25 0. 3 0.35 0. 4 0.45 0. 5 0.55 0. 6 −15 −20 Figure 7: The CSPFG band pass filter −25 −30 6 10 given that the low pass filter is biased higher that the high pass filter. These circuits will combine additively in bode plot and multiplicatively in the S domain. In the multifunctional filter presented in figure 3, block A and B will form a band pass filter. The transfer function of the band pass pass filter is given by: H(S)bp = H(S)hp × H(S)lp = H(S)bp = Vout (S) = Vin (S) S2 + −1 τS × 1 + τS 1 + τS − τ1lp S (τlp +τhp ) τhp τlp S + 1 τhp τlp Q≈ τlp τhp and ωc ≈ √ 1 τhp τlp (7) fmax ≈ βW b Vhf 2ef f ective 2Cl V DD (8) (5) βW b (Vhf 2ef f ective − Vhf 1ef f ective ) 2Cl V DD fcenter ≈ Vhf 2ef f ective +Vhf 1ef f ective ) 2 2Cl V DD ISBN: 978-960-6766-82-4 The band stop filter is the parallel connection of the low pass (block C) and the high pass filter (block A). Block B is biased to V DD to operate as an all pass filter. In order for the filter to work the high pass filter must be biased larger then the low pass filter. In simulations presented in this paper the high pass filter is biased 40mV higher. The transfer function of the band stop filter can be obtained by summing the transfer function of the low pass filter, (block C) and the high pass filter (block A) and is given as: Vout (S) = H(S)hp + H(S)lp Vin (S) τS −1 H(S)bs = + 1 + τS 1 + τS τhp τlp S 2 − 1 H(S)bs = (τ +τ ) S 2 + τlphp τlphp S + τhp1τlp (11) Figure 9 shows the AC simulation result of the band stop filter for different values for vhf as shown in the legend box. The bandwidth of the band stop filter can be estimated as: (9) and the center frequency is: βW b ( 11 10 H(S)bs = The frequency width is: fwidth ≈ 10 10 3.4 Band stop filter The low pass filter can also be used as an amplifier to increase the gain of the filter without adding any extra amplifier to the output of the filter. The bias voltages V hf 1 and V hf 2 can be used to change the bandwidth of the filter as they change the highest cutoff frequencies of the A and B respectively. We may express the cutoff frequencies as: βW b Vhf 1ef f ective 2Cl V DD 9 10 Figure 8: The AC response of the band pass filter shown in figure 6 where vhf 2 is biased 40mV larger than vhf 1, the results are for different voltages at vhf 1 according to the legend box (6) fmin ≈ 8 10 Hz This gives: s 7 10 (10) fwidth ≈ 111 βW b (Vhf 3ef f ective − Vhf 1ef f ective ) 2Cl V DD (12) ISSN: 1790-5117 12th WSEAS International Conference on CIRCUITS, Heraklion, Greece, July 22-24, 2008 AC response for different values of vhf 20 15 0.15 0.25 0.35 0.45 0.55 [4] Gain in 20dB 10 5 0 [5] −5 −10 1 10 2 10 3 10 4 10 5 10 6 10 7 10 8 10 9 10 10 10 Hz [6] Figure 9: AC response of the filter shown in figure 3 for different values of vhf1 when biased as a band stop filter, assuming vhf1 40mv larger than vhf3 [7] 4 Conclusion [8] The CSPFG SISO multifunctional filter presented in this paper offers multifunctionality and tunability without the use of switches. The circuit has low component spread, made of only capacitors and inverts. The capacitors are used only as coupling capacitors without effecting the frequency response of the filter directly and can be chosen small resulting in spacesaving circuits, very well suited for use in VLSI and ULSI circuits. The CSPFG filters are useful in application where a narrow band is to be detected or rejected. One important area is detecting frequency bands in resonating sensors. Other good properties of the CSPFG filters are simplicity and versatility. The ability to choose functionality and frequency area simply using a few bias voltages allows tuning even after production and installation. [9] [10] [11] [12] References: [1] N. A. Shah, M. F. Rather, M. A. Malik, S . Z. Iqbal, ”CASCADABLE ELECTRONICALLY TUNABLE SITO CURRENT-MODE ACTIVEONLY UNIVERSAL FILTER”, Proceedings of the XXVIIIth URSI, New Delhi, Oct 05. [2] T. DOSTAL, ”Universal N-order ARC Filters Using Current Conveyors and Multi-output Current followers ”, WSEAS Press, 2003. s. 207 - 210. ISBN 960-8052-88-2. [3] M. Sagbas, K. Fidanboylu and M. Bayram, ”Triple-input Single-output Voltage-mode Multifunction Filter Using Only Two Current Con- ISBN: 978-960-6766-82-4 [13] [14] 112 veyors”, Proceedings of world academy of science, engineering andD technology, volume 4, feb 05 ISSN 1307-6884. Y.H. Ghallab, M.Abou El-Ela and M.Elsaid, ”A novel universal voltage-mode filter with three inputs and single output using only two Operational Floating Current Conveyor”, The 12’h International Conference on Microelectronics Tehran, Oct. 31- Nov. 2, 2000 R. Weng, J. Lay, C. Lin, and M. Lee, ”Novel Voltage-Mode Universal Filters Using Two Current Conveyors”, The 1998 IEEE Asia-Pacific Conference on Circuits and Systems, 1998. IEEE APCCAS 1998. J. W. Horng, ”Voltage-Mode Universal Biquadratic Filter Using Two Otas”, Active and Passive Electronic Components Volume 27 (2004), Issue 2, Pages 85-89. M. Higanshimura., and Y. Fukui, ”Universal filter using plus type CCIIs”,Electronics Letters, 32, pp. 810 811, 1996. M. Higanshimura, ”VRealization of voltage mode biquads using CCIIs”, Electronics Letters, 27, pp. 1345 1346, 1991. Y. Berg, M. Azadmehr, O. Mirmotahari, S. Aunet. ”Band pass pseudo floating-gate amplifier”, IEEE International Conference on electronics, Circuits and Systems, ICESC 2007. M. Azadmehr, Y. Berg. ”Current-starved pseudo floating-gate amplifier”, WSEAS International Conference on circuits, systems, electronics, control & signal processing, CSECS 2007. Y. Berg, O. Mirmotahari, S. Aunet. ”Pseudo Floating-Gate Inverter with Feedback Control”, IFIP International Conference on Very Large Scale Integration, 2006 0. Ness, E. A. Olsen, Y. Berg and T.S.Lande”A Low Voltage Second Order Biquad Using Pseudo Floating-Gate Transistors”, Proc,IEEE ISCAS 2003, no 1, pp.125-128, May 2528,2003. Hasler, P.; Lande, T.S. ”Overview of floatinggate devices, circuits, and systems”, Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions on On page(s): 1-3, Volume: 48, Issue: 1, Jan 2001 T. Shihata and T. Ohmni. ”A Functional MOS Transistor Featuring Gate-Level Weighted Sum and Threshold Operations”, IEEE transactions on Electron Devices, Vol. 39, 1992 ISSN: 1790-5117