NI 5781R - Data Sheet - National Instruments

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Last Revised: 2014-11-06 07:14:09.0
NI 5781R
Baseband Transceiver for NI FlexRIO
Dual 100 MS/s, 14-bit inputs
40 MHz bandwidth (-3 dB)
Dual 100 MS/s, 16-bit outputs
External clock input and output
2 Vpp differential I/O (1 Vpp single-ended capable)
8 general-purpose digital I/O lines
Overview
The NI 5781 is an analog dual-input, dual-output NI FlexRIO adapter module optimized for interfacing with baseband to RF upconverters and downconverters. When you pair it
with an NI FlexRIO field-programmable gate array (FPGA) module, the resulting NI 5781R is an FPGA-enabled RIO baseband transceiver that you can use to implement custom
RF modulation and demodulation, channel emulation, bit error rate testing, or spectral monitoring and jamming. Additionally, you can use the low latency and high throughput of
FPGA-based processing for ultrahigh-speed control and inline processing applications.
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Application and Technology
Key Specifications
The NI 5781 features dual, simultaneously sampled, 14-bit, 100 MS/s differential inputs and dual, simultaneously generated, 16-bit, 100 MS/s differential outputs. Connectivity
includes MCX connectors for the eight differential analog input and output lines, clock input, and clock output, along with a 9-pin DIN connector for auxiliary digital I/O. You also
can use the module in single-ended mode with the supplied 50 Ω terminators. Table 1 shows the key specifications.
Specification
Analog Input
Analog Output
Sample Rate
100 MS/s
100 MS/s
Resolution
14 bits
16 bits
Number of Channels
2
2
Bandwidth (-3 dB)
40 MHz
40 MHz
Range (differential)
2 Vpp
2 Vpp
Range (single-ended)
1 Vpp
1 Vpp
Coupling
DC
DC
Impedance
50 Ω
50 Ω
SFDR (@ 5 MHz)
70 dBc
64 dBc
THD (@ 5 MHz)
-70 dBc
-64 dBc
Average Noise Density (DC to 50 MHz)
-136 dBm/Hz
Phase Noise Density (@ 10 MHz, 1 kHz offset)
-127 dBc/Hz
-146 dBm/Hz
-127 dBc/Hz
Table 1. Key NI 5781 Specifications
The analog input on the NI 5781 provides the high dynamic range and low noise necessary for acquiring and demodulating baseband communication signals. Figure 1 shows
these attributes through the acquisition of a 5 MHz tone.
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Figure 1. A 5 MHz Tone Acquired by the NI 5781
The analog outputs offer equally high dynamic characteristics (Figure 2) and feature onboard interpolation to sample rates up to 400 MS/s for attenuating the high-frequency
reconstruction images found on all digital-to-analog converters (DACs).
Figure 2. A 5 MHz Tone Generated by the NI 5781
Application Areas
The NI 5781 is optimized for interfacing with baseband to RF upconverters and downconverters. In these applications, the two inputs or outputs of the NI 5781 acquire or generate
the in-phase and quadrature (I and Q) or real and imaginary components of the downconverted or upconverted RF signals. With 40 MHz of baseband bandwidth on each of the I
and Q channels, you can access up to 80 MHz of RF bandwidth.
On the NI FlexRIO FPGA, RF signals can be measured, generated, modulated, demodulated, filtered, decoded, and more. In radio applications, on the FPGA you can implement
various layers of a communications standard – most often the modulation, demodulation, and tuning, but other layers including coding are also possible. For RF signal test and
signals intelligence (SIGINT) applications, you can convert the time domain I and Q signals into the frequency domain and compare the resulting frequency spectrum with an
arbitrary mask to implement a real-time spectrum analyzer. You can use this technology to identify unanticipated transmitters in signals intelligence or to ensure proper spectral
performance of the device under test (DUT) in test applications. Also, you can add custom filtering, delay, and nonlinearities to acquired signals for immediate generation in
custom channel emulation applications, where the low latency and high throughput of an FPGA are critical.
Beyond RF, the NI 5781 is useful in frequency-based control. In these applications, high-frequency sinusoids are the stimulus and response signals, so you need a
high-bandwidth front end for acquisition and generation. While the NI 5781 samples and generates at 100 MS/s, or with a period of 10 ns, pipelining on the analog-to-digital
converter (ADC), DAC, and FPGA, along with the algorithm running on the FPGA, introduce latency. Without any processing, the latency of the NI 5781 is shown in Table 2.
Input-to-Output Latency
DAC Interpolation Disabled
DAC Interpolation Enabled
350 ns
550 ns
Table 2. Input-to-Output Latency of the NI 5781
Depending on the complexity of the algorithm on the FPGA, additional latency can range from tens of nanoseconds to several microseconds.
Architecturally similar to control applications, inline processing with the NI 5781 helps you add FPGA-defined functionality to your baseband signals. Possible algorithms include
delay generation for precision phase control, notch filtering to eliminate unwanted tones coupling into a signal, custom triggering for data reduction, or noise filtering to remove
out-of-band noise. These operations are often performed in real time and can return data to a host processor for additional calculation and logging, or you can regenerate the
processed signal for interfacing with other equipment.
About NI FlexRIO
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The NI FlexRIO hardware family consists of PXI and PXI Express FPGA modules coupled to I/O adapter modules. Programmed with the NI LabVIEW FPGA Module, these
modules together provide high-performance I/O and user-defined hardware processing on the PXI platform.
Figure 3. NI FlexRIO Architecture
NI FlexRIO FPGA modules feature the latest in FPGA technology and high-performance bus interfaces.
Table 3. NI FlexRIO FPGA Module Options
PXI Express NI FlexRIO FPGA modules feature Xilinx Virtex-5 SXT FPGAs with up to 512 MB of onboard DRAM, which you can access at bandwidths up to 3.2 GB/s. In addition
to general-purpose reconfigurable logic, SXT FPGAs are optimized for high-speed digital signal processing (DSP), with up to 640 DSP slices for single-cycle multiplication and
filtering functions. PXI Express NI FlexRIO FPGA modules also feature the NI STC-3 application-specific integrated circuit (ASIC), providing an optimized, high-bandwidth PCI
Express x4 communications link to the backplane of the PXI Express chassis. This ASIC reduces the FPGA resources needed to implement host communication and enables new
data transfer technology in the unique peer-to-peer (P2P) streaming feature. With NI P2P data streaming technology, you can continuously transfer data to and from PXI Express
NI FlexRIO FPGA modules at rates greater than 800 MB/s for additional processing and I/O integration. You can also stream to and from select PXI Express NI modular
instruments for an even greater variety of I/O.
PXI NI FlexRIO FPGA modules feature Xilinx Virtex-5 LX FPGAs with up to 128 MB of onboard DRAM, which you can access at bandwidths up to 1.6 GB/s. They feature all the
benefits of the PXI platform including synchronization, triggering, and high-speed data transfer to and from their host.
Table 4. PXI and PXI Express FPGA Module Comparison
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National Instruments and third parties offer NI FlexRIO adapter modules, and you can build your own adapter modules using the NI FlexRIO Adapter Module Development Kit
(MDK). With custom adapter modules, you can implement the exact analog and digital I/O your application requires, along with graphical FPGA programming provided by
LabVIEW. View a current list of NI and third-party adapter modules at ni.com/flexrio. This ability to easily create high-bandwidth P2P data streams helps provide scalable signal
processing and I/O integration.
LabVIEW FPGA
With the high-level graphical programming capabilities of LabVIEW FPGA, programming for the NI 5781 is far simpler than low-level HDL programming. Acquiring samples from
one of the NI 5781 ADCs at its configured rate and placing the data into an FPGA FIFO is depicted in Figure 4.
Figure 4. LabVIEW FPGA Code for Acquiring Data from an NI 5781 ADC
From this point, you may implement your own processing, filtering, fast Fourier transform (FFT), or control. Figure 5 shows custom demodulation using IP from the FPGA RF
Communications Library on ni.com/labs.
Figure 5. LabVIEW FPGA Code for Demodulating and Decoding I and Q Signals after 4X Decimation
For implementing a real-time spectrum analyzer, Figure 6 shows code that performs windowing, conversion to the frequency domain, comparison against a frequency mask, and
assertion of a trigger when that mask is exceeded.
Figure 6. LabVIEW FPGA Code for a Real-Time Spectrum Analyzer
Figure 7 shows a custom, 128-tap inline FIR filter with reloadable coefficients. After filtering, the data is generated through the NI 5781 DAC.
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Figure 7. LabVIEW FPGA Code for an Inline Filter
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Ordering Information
For a complete list of accessories, visit the product page on ni.com.
Products
Part Number
Recommended Accessories
Part Number
NI_5781_FlexRIO_Adapter_Module
NI 5781 Baseband Transceiver Adapter Module for NI FlexRIO
Requires: 1 FlexRIO Accessories ;
781267-01
FlexRIO Accessories: FlexRIO_PXIE - NI PXIe-7962R
781206-01
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Support and Services
System Assurance Programs
NI system assurance programs are designed to make it even easier for you to own an NI system. These programs include configuration and deployment services for your NI PXI,
CompactRIO, or Compact FieldPoint system. The NI Basic System Assurance Program provides a simple integration test and ensures that your system is delivered completely
assembled in one box. When you configure your system with the NI Standard System Assurance Program, you can select from available NI system driver sets and application
development environments to create customized, reorderable software configurations. Your system arrives fully assembled and tested in one box with your software preinstalled.
When you order your system with the standard program, you also receive system-specific documentation including a bill of materials, an integration test report, a recommended
maintenance plan, and frequently asked question documents. Finally, the standard program reduces the total cost of owning an NI system by providing three years of warranty
coverage and calibration service. Use the online product advisors at ni.com/advisor to find a system assurance program to meet your needs.
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Get answers to your technical questions using the following National Instruments resources.
Support - Visit ni.com/support to access the NI KnowledgeBase, example programs, and tutorials or to contact our applications engineers who are located in NI sales
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Repair
While you may never need your hardware repaired, NI understands that unexpected events may lead to necessary repairs. NI offers repair services performed by highly trained
technicians who quickly return your device with the guarantee that it will perform to factory specifications. For more information, visit ni.com/repair.
Training and Certifications
The NI training and certification program delivers the fastest, most certain route to increased proficiency and productivity using NI software and hardware. Training builds the skills
to more efficiently develop robust, maintainable applications, while certification validates your knowledge and ability.
Classroom training in cities worldwide - the most comprehensive hands-on training taught by engineers.
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Visit ni.com/training for more information.
Extended Warranty
NI offers options for extending the standard product warranty to meet the life-cycle requirements of your project. In addition, because NI understands that your requirements may
change, the extended warranty is flexible in length and easily renewed. For more information, visit ni.com/warranty.
OEM
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NI offers design-in consulting and product integration assistance if you need NI products for OEM applications. For information about special pricing and services for OEM
customers, visit ni.com/oem.
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700 independent consultants and integrators. Services range from start-up assistance to turnkey system integration. Visit ni.com/alliance.
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Detailed Specifications
This topic lists the specifications of the National Instruments 5781 FlexRIO adapter module. Pair these specifications with the NI FlexRIO FPGA Module Specifications.
Caution To avoid permanent damage to the NI 5781, disconnect all signals connected to the NI 5781 before powering down the module, and only connect signals after
the module has been powered on by the NI FlexRIO FPGA module.
NI 5781 Block Diagram
AD9511 Reference clock can be driven only by the NI PXIe-796 xR FlexRIO FPGA modules, and it is limited to a 10 MHz clock.
Typical values describe useful product performance that are not covered by warranty. Typical values cover the expected performance of units over ambient temperature ranges of
23 ±5 °C with a 90% confidence level, based on measurements taken during development or production.
All specifications are typical unless otherwise noted.
Note All graphs depicted in these specifications illustrate the performance of a representative module.
Analog Input (AI CH 0 and AI CH 1)
General Characteristics
Two, differential, simultaneously sampled
Number of channels
MCX
Connector
Input range (normal operating conditions)
Fixed 2 Vpk-pk
Differential
±1 VDC
Common mode input range
Fixed 1 Vpk-pk
Single-ended
±2 V, per connector
Absolute maximum input
50 Ω, per connector
Input impedance
DC
Input coupling
Sample rate
Internal Sample clock
10 MHz to 100 MHz (100 MHz, default)
External Sample clock
20 MHz to 100 MHz
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Sample rate
Data rate (IOModClk0)
±8,191
Digital data range
AD9640/105 1 ; 14-bit resolution, dual ADC, multistage, differential pipelined
architecture
ADC part number
Typical Specifications
Fixed 7th-order elliptical
Filter type
Bandwidth (–3 dB)
40 MHz for each I and Q input
Baseband
80 MHz when used with external I/Q demodulator
Complex baseband
AI Bandwidth (Passband): Single-Ended Acquisition at 100 MS/s, 64 kS, Gain Referenced to Reading at 50 kHz
Spurious-free dynamic range (SFDR) and total harmonic distortion (THD)
The following table shows the SFDR and THD of the analog input with a source generating a differential 5 MHz sine wave at −1 dBFS input amplitude and the NI 5781 acquiring
data at 100 MS/s. The SFDR measurement includes aliased and nonaliased harmonics, measured from DC to 50 MHz. The THD measurement includes the 2 nd through 6th
harmonics.
Generation Frequency (MHz) SFDR (dBc) THD (dBc)
5
70
–70
AI SFDR and THD: Differential Acquisition at 100 MS/s, 64 kS, Hanning Window, 10 Averages. Source Generating –1 dBFS Sine Wave at 5 MHz, with 5 MHz Low Pass
Filters.
Third-order intermodulation distortion (IMD3)
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Generation Frequency (MHz) IMD3 (dBc)
20 and 21
–69
AI IMD3 (Centered at 20.5 MHz): Differential Acquisition at 100 MS/s, 64 kS, Hanning Window, 10 Averages. Source Generating Two –7 dBFS Sine Tones at 20 MHz
and 21 MHz.
AI IMD3 (Centered at 5 MHz): Differential Acquisition at 100 MS/s, 64 kS, Hanning Window, 10 Averages. Source Generating Two –7 dBFS Sine Tones at 4.8 MHz and
5.2 MHz.
Average noise density 2
Differential Amplitude Range
Vpk-pk
2
Average Noise Density
dBm
dBm/Hz dBFS/Hz
10
35
–136
–146
Phase noise density 4
Offset from Carrier (Hz) Phase Noise (dBc/Hz) 3
100
–114
1k
–127
10 k
–138
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AI Phase Noise: Differential Acquisition at 100 MS/s, 2 MS, Hanning Window, 500 Averages, using Free-Running Internal VCXO as Sample Clock. Source Generating
a Differential 10 MHz Tone.
DC absolute accuracy
±3.6% full-scale range (FSR)
Gain error
±15 mV
Differential offset
Note DC accuracy measured with a DMM. Differential gain and offset may be adjusted through waveform data. Offset is measured with differential inputs grounded
through 50 Ω.
Analog Output (AO CH 0 and AO CH 1)
General Characteristics
Two, differential, simultaneously sampled
Number of channels
MCX
Connector
Output range
Differential
Into 100 Ω
Fixed 2 Vpk-pk
Into High Z
Fixed 4 Vpk-pk
Common mode output voltage
0 V, not adjustable
Single-ended 5
Into 50 Ω
Fixed 1 Vpk-pk
Into High Z
Fixed 2 Vpk-pk
±4 V per connector
Absolute maximum input
50 Ω, per connector
Output impedance
DC
Output coupling
Data rate (IOModClk1)
10 MHz to 100 MHz (100 MHz, default)
Internal Sample clock
20 MHz to 100 MHz
External Sample clock
Sample rate
AO data rate × Interpolation factor
Interpolation factors
1×, 2×, 4× (default), 8×
Maximum sample rate
400 MS/s
Digital data range
±32,767
DAC part number
AD9777 6 ; 16-bit resolution, dual DAC, selectable interpolation rate
Note Output terminals support waveform summing. The outputs of multiple NI 5781 channels can be connected together.
Typical Specifications
Fixed 7th-order elliptical
Filter type
Bandwidth (–3 dB)
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40 MHz for each I and Q output
Baseband
80 MHz when used with external I/Q modulator
Complex baseband
AO Bandwidth (Passband): Measured Single-Ended, AO Generating at 400 MS/s (100 MS/s Data Rate and 4× Interpolation), Gain Referenced to Reading at 50 kHz
Spurious-Free Dynamic Range (SFDR) and Total Harmonic Distortion (THD)
The following table shows the SFDR and THD of the analog output generating a 5 MHz sine wave at 400 MS/s (100 MS/s data rate and 4× interpolation) and −1 dBFS waveform
data amplitude. The measurement is single-ended with both terminals terminated to ground through 50 Ω. The SFDR measurement includes aliased and nonaliased harmonics,
measured from DC to 50 MHz. The THD measurement includes the 2 nd through 6th harmonics.
Generation Frequency (MHz) SFDR (dBc) THD (dBc)
5
64
–64
AO SFDR and THD: AO Generating a –1 dBFS 5 MHz Sine Wave with 100 MS/s Data Rate and 4× Interpolation. Measured Single-Ended using 10 Averages.
Third-Order Intermodulation Distortion (IMD3)
Generation Frequency (MHz) IMD3 (dBc)
20 and 21
–58
AO IMD3 (Centered at 20.5 MHz): AO Generating Two –7 dBFS Sine Tones at 20 MHz and 21 MHz with 100 MS/s Data Rate and 4× Interpolation. Measured
Single-Ended using 10 Averages.
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AO IMD3 (Centered at 5 MHz): AO Generating Two –7 dBFS Sine Tones at 4.8 MHz and 5.2 MHz with 100 MS/s Data Rate and 4× Interpolation. Measured
Single-Ended using 10 Averages.
Average Noise Density 7
Amplitude Range
Vpk-pk
Average Noise Density
dBm
dBm/Hz dBFS/Hz
Single-ended 1
4
8
–149
–153
Differential
10
11
–146
–156
2
Phase Noise Density 4
Offset from Carrier (Hz) Phase Noise (dBc/Hz) 8
100
–114
1k
–127
10 k
–138
AO Phase Noise: AO Generating a 0 dBFS 20 MHz Sine Wave with 100 MS/s Data Rate and 4× Interpolation, using Free-Running Internal VCXO as the Sample Clock.
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DC absolute accuracy (into high impedance)
Differential gain error
±0.8% full-scale range (FSR)
Differential offset
±15 mV
±5 mV
Common mode offset
Note DC accuracy measured with a DMM. Differential gain and offset may be adjusted through waveform data. Measured with both terminals into high impedance.
Internal Sample Clock
General Characteristics
VCXO
Oscillator type
100 MHz ±100 ppm
Frequency range
Clock distribution part number
AD9511 10 ; clock distribution and on-chip PLL core
Reference clock sources
IoModSyncClk 9 (10 MHz from PXI backplane)
Typical Specifications
Frequency stability
±30 ppm over operating temperature range
Temperature
±5 ppm per year
Aging
CLK OUT
General Characteristics
1, single-ended
Number of channels
MCX
Connector
Output range
Into 50 Ω
Fixed 1 Vpk-pk
Into High Z
Fixed 2 Vpk-pk
Absolute maximum input
±8 V
DC
4 Vpk-pk
AC
50 Ω
Output impedance
AC
Output coupling
Sample clock/N; where N = 1, 2*M; M = <1..16>
Frequency range
AD9511 10 ; clock distribution and on-chip PLL core
Clock distribution part number
CLK IN
General Characteristics
1, single-ended
Number of channels
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MCX
Connector
400 mVpk-pk to 2 Vpk-pk
Input voltage range
Absolute maximum input
±8 V
DC
4 Vpk-pk
AC
20 MHz to 100 MHz
Input frequency range
40% to 60%
Duty cycle requirements
50 Ω
Input impedance
AC
Input coupling
AD9511 10 ; clock distribution and on-chip PLL core
Clock distribution part number
PFI<0..7>
General Characteristics
8; 5 output, 2 input, 1 bidirectional
Number of channels
Note PFI Out 4 and PFI In 7/PFI Out 7 are available for interfacing with an I 2C bus. Refer to AUX I/O Connector Pin Assignments for more information.
9-pin DIN with shield
Connector type
3.3 V LVTTL
Interface logic
VIH
≥2 V
VIL
≤0.8 V
Zin
5 kΩ
≥2.4 V
VOH
≤0.6 V
VOL
50 Ω
Zout
–1 V to +5 V per channel
Absolute maximum input
5 MHz
Maximum toggle frequency
EEPROM Map
Byte Address Size (Bytes)
Field Name
0x0
2
Vendor ID
0x2
2
Product ID
0x4
4
Serial Number
0x8
116
Reserved
0x7C
132
User Space
Caution Only write to User Space. Writing to any other offset may cause the NI 5781 to stop functioning.
Power
5.5 W
Total power, typical operation 11
Physical
12.9 × 2.0 × 12.1 cm (5.1 × 0.8 × 4.7 in.)
Dimensions
284 g (10 oz)
Weight
10 MCX and one 9-pin DIN with shield
Front panel connectors
Environmental
The NI 5781 is intended for indoor use only.
0 °C to 55 °C, tested in accordance with IEC-60068-2-1 and IEC-60068-2-2.
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Operating environment
10% to 90%, noncondensing, tested in accordance with IEC-60068-2-56.
Relative humidity range
2,000 m at 25 °C ambient temperature.
Altitude
2
Pollution Degree
Storage environment
–20 °C to 70 °C, tested in accordance with IEC-60068-2-1 and IEC-60068-2-2.
Ambient temperature range
5% to 95%, noncondensing, tested in accordance with IEC-60068-2-56.
Relative humidity range
Note Clean the device with a soft, non-metallic brush. Make sure that the device is completely dry and free from contaminants before returning it to service.
Safety Standards
This product is designed to meet the requirements of the following standards of safety for electrical equipment for measurement, control, and laboratory use:
IEC 61010-1, EN 61010-1
UL 61010-1, CSA 61010-1
Note For UL and other safety certifications, refer to the product label or the Online Product Certification section.
Electromagnetic Compatibility
This product meets the requirements of the following EMC standards for electrical equipment for measurement, control, and laboratory use:
EN 61326 (IEC 61326): Class A emissions; Basic immunity
EN 55011 (CISPR 11): Group 1, Class A emissions
AS/NZS CISPR 11: Group 1, Class A emissions
FCC 47 CFR Part 15B: Class A emissions
ICES-001: Class A emissions
Note For the standards applied to assess the EMC of this product, refer to the Online Product Certification section.
Note For the standards applied to assess the EMC of this product, refer to the Online Product Certification section.
Note For EMC compliance, you must install two ferrites per cable, on the 9-pin DIN and CLK OUT cables (NI part number 711849-01 for CLK OUT, and NI part number
711627-01 for the 9-pin DIN cable). For best results, snap the ferrites onto the cables as close as possible to the plug at each end. For more information about how to
use the cable ferrites with the NI 5781, refer to the Attaching Ferrites to Your Cables Note to Users included in your kit.
Note For EMC compliance, operate this device with shielded cables and according to the documentation.
CE Compliance
This product meets the essential requirements of applicable European Directives, as amended for CE marking, as follows:
2006/95/EC; Low-Voltage Directive (safety)
2004/108/EC; Electromagnetic Compatibility Directive (EMC)
Online Product Certification
Refer to the product Declaration of Conformity (DoC) for additional regulatory compliance information. To obtain product certifications and the DoC for this product, visit
ni.com/certification, search by module number or product line, and click the appropriate link in the Certification column.
Environmental Management
National Instruments is committed to designing and manufacturing products in an environmentally responsible manner. NI recognizes that eliminating certain hazardous
substances from our products is beneficial not only to the environment but also to NI customers.
For additional environmental information, refer to the NI and the Environment Web page at ni.com/environment. This page contains the environmental regulations and directives
with which NI complies, as well as other environmental information not included in this document.
Waste Electrical and Electronic Equipment (WEEE)
EU Customers At the end of the product life cycle, all products must be sent to a WEEE recycling center. For more information about WEEE recycling centers, National
Instruments WEEE initiatives, and compliance with WEEE Directive 2002/96/EC on Waste Electrical and Electronic Equipment, visit ni.com/environment/weee.htm.
1
For additional information on the AD9640, refer to the Analog Devices device data sheet at www.analog.com.
2
Average noise density from DC to 50 MHz, acquiring at 100 MS/s; inputs grounded through 50 Ω terminations.
3
Measured on a 10 MHz tone using the free-running internal VCXO as the Sample clock.
4
The bandwidth of the PLL is 200 Hz when locking to IoModSyncClk.
5
Both output terminals must be terminated to ground with the same impedance.
6
For additional information about the AD9777, refer to the Analog Devices device data sheet at www.analog.com.
7
The average noise density is measured from DC to 50 MHz. The AO generates 0 V DC at 400 MS/s (100 MS/s data rate and 4× interpolation).
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8
Measured on a 10 MHz tone using the free-running internal VCXO as the Sample clock and the DAC using 4× interpolation and 100 MS/s data rate (400 MS/s).
9
IoModSyncClk is available only on the NI PXIe-796xR FPGA module.
10
For additional information about the AD9511, refer to the Analog Devices device data sheet at www.analog.com.
11
100 MHz DAC data rate, 4× interpolation ON, and DAC modulation OFF.
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Pinouts/Front Panel Connections
NI 5781 AUX I/O Connector Pin Assignments
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NI 5781 Front Panel Connectors
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