R10 Code No: R21013 SET - 1 II B. Tech I Semester, Regular Examinations, Nov – 2012 ELECTRICAL AND ELECTRONICS ENGINEERING (Com. to CE, ME, CHEM, PE, AME, MM) Time: 3 hours Max. Marks: 75 All Questions carry Equal Marks Note: Answer any FIVE Questions, not exceeding Three Questions from any one part PART-A 1. a) State and explain Ohms law and its limitation b) Two resistances of 50Ω and 40Ω respectively are connected in parallel. A third resistance of 10Ω is connected in series with the combination and a D.C supply of 220 V is applied to the ends of the completed circuit. Calculate the current in each resistance. 2. With a neat sketch explain the main parts of the DC machine and state the material of which each part is made and their function 3. a)From the fundamentals, derive the expression for the EMF equation of a single phase transformer. b) A transformer has a primary winding of 600 turns and a secondary turns of 300. When the load current on the secondary is 50A at 0.85 p.f lagging, the primary current is 25A at 0.707 lagging. Determine the no load current of the transformer and the phase angle with respect to the voltage. 4. a) Explain the slip-torque characteristics of three phase induction motor b) Find the no-load phase and line voltage of a star-connected 3-phase, 6-pole alternator which runs at 1200 rpm, having flux per pole of 0.1 wb sinusoidally distributed. Its stator has 54 slots having double layer winding. Each coil has 8 turns and the coil is chorded by 1 slot. PART-B 5. a) Explain the working of P-N junction diode b) What is a rectifier? Discuss the operation of half wave rectifier with a neat circuit diagram. 6. a) Explain the concept of feedback amplifier b) If a transistor with α = 0.96 and emitter to base resistance 80Ω is placed in common emitter configuration, find the gains of Ai, Av, and AP? 7. a) What are the various types of induction heating? b) Explain Dielectric Heating with a neat diagram. 8. Explain the following with neat diagram i) LVDT ii) Thermistors 1 of 1 |''|'||||''|''||'|'| Code No: R21013 R10 SET --22 SET II B. Tech I Semester, Regular Examinations, Nov – 2012 ELECTRICAL AND ELECTRONICS ENGINEERING (Com. to CE, ME, CHEM, PE, AME, MM) Time: 3 hours Max. Marks: 75 All Questions carry Equal Marks Note: Answer any FIVE Questions, not exceeding Three Questions from any one part PART-A 1. a) state and explain Kirchoffs laws b) In the circuit shown in below figure, find the current in the each resistance. 2. Compare DC generator and DC motor with respect to principle of operation of mention the application of each machine 3. a) Explain the principle of operation of transformer b) In a 25 kVA, 2000/200V, 50Hz single phase transformer, the iron and full load copper losses are 350 and 400 W respectively. Calculate the efficiency at unity power factor on full load and half load. 4. a) Explain the principle of operation of alternator b) A 3-phase induction motor has 2 poles and is connected to 400V, 50Hz, supply. Calculate the actual rotor speed and rotor frequency when the slip is 4%. PART-B 5. a)Draw and explain the equivalent circuit of the P-N junction diode b) An a.c. voltage of peak value 20V is connected in series with a silicon diode and load resistance of 500Ω. If the forward resistance of diode is 10Ω, find the following: i) peak current through diode ii) peak output voltage What will be these values if the diode is assumed to be ideal? 6. a)Explain the V-I characteristics of common emitter configuration b) Explain the static characteristics of the SCR? 7. Explain the dielectric heating with necessary diagrams? List out its merits and give some applications. 8. Explain the working principle of the following with neat diagrams a) Strain gauge b) Piezo-electric transistors 1 of 1 |''|'||||''|''||'|'| R10 Code No: R21013 SET --33 SET II B. Tech I Semester, Regular Examinations, Nov – 2012 ELECTRICAL AND ELECTRONICS ENGINEERING (Com. to CE, ME, CHEM, PE, AME, MM) Time: 3 hours Max. Marks: 75 All Questions carry Equal Marks Note: Answer any FIVE Questions, not exceeding Three Questions from any one part PART-A 1. A Wheatstone bridge consists of AB = 4Ω, BC=3Ω, CD=6Ω and DA=5Ω. A 10V cell is connected between B and D and a galvanometer of 8Ω is connected between A and C. Find the current through the galvanometer. 2. a) Derive the emf equation of a DC generator b) A 4-pole DC motor is fed at 400V and takes an armature current of 35A. The resistance of the armature circuit is 0.2Ω. The armature winding is wave connected with 800 conductors and useful flux per pole is 0.023 Wb. Calculate the speed of the motor. 3. a) What are the different losses occurring in a transformer on load? and what are the tests required for finding these losses. b) Short-circuit test is conducted on a 5kVA, 400V/100 V single phase transformer with 100 V winding shorted. The input voltage at full load current is 40 V. The wattmeter, on the input reads 250 W. Find the power factor for which regulation at full load is zero. 1 of 2 |''|'||||''|''||'|'| Code No: R21013 4. R10 SET - 3 a) Explain the regulation of alternator by synchronous impedance method b) A 3-phase induction motor is wound for 4 poles and is supplied from 50 Hz systems. Calculate (i) the synchronous speed, (ii) the speed of the motor when slip is 4% and (iii) the rotor current frequency when the motor runs at 600 r.p.m. PART-B 5. a) Explain the forward current, peak inverse voltage and reverse current in a P-N junction diode b) Compare half wave and full wave rectifiers and their output voltage waveforms 6. a) Explain the V-I characteristics of SCR? b) A transistor is operated at a forward current of 2µA and with the collector open circuited . Calculate the junction voltages Vc and Ve the collector to emitter voltage Vce assuming, IC0=2µA , IE0=1.6µA, αn=0.98. 7. a) What are the various core type induction furnaces? Explain one of them. b) Discuss the industrial applications of dielectric heating. 8. a) Explain the working of CRO with neat diagram. b) Explain the working of digital multimeter. 2 of 2 |''|'||||''|''||'|'| Code No: R21013 SET - 4 R10 II B. Tech I Semester, Regular Examinations, Nov – 2012 ELECTRICAL AND ELECTRONICS ENGINEERING (Com. to CE, ME, CHEM, PE, AME, MM) Time: 3 hours Max. Marks: 75 All Questions carry Equal Marks Note: Answer any FIVE Questions, not exceeding Three Questions from any one part PART-A 1. a) Three equal resistances of value R ohms are connected in a delta fashion. This is to be replaced by an equivalent star connected resistance R1, R2 and R3. What are the values of R1, R2 and R3 in terms of R. b) By applying Kirchhoff’s law, find the current through all the elements in the circuit as shown in the figure? 2. a) What is DC generator and explain the basic principle of operation of a DC generator? b) Derive the torque equation of a DC motor. 3. a) State and prove the condition for maximum efficiency of a transformer? b) In a 25KVA, 2000/200V transformer the constant and variable losses are 350 W and 400 W respectively calculate the efficiency on u.p.f at i) Full load and ii) Half full load. 4. a) Explain the principle of operation of alternator b) A 6-pole, 3-phase, 50 Hz induction motor is running at full-load with a slip of 4%. The rotor is star-connected and its resistance and standstill reactance are 0.25 Ω and 1.5 Ω per phase. The e.m.f. between slip rings is 100 V. Find the rotor current per phase and p.f., assuming the slip rings are short-circuited. PART-B 5. a) With a neat circuit diagram, explain the operation of centre tap full wave rectifier b) The applied input a.c. power to a half-wave rectifier is 100 watts. The d.c. output power obtained is 40 watts. i) What is the rectifier efficiency? ii) What happens to remaining 60 watts? 6. a) Compare the characteristics of transistor amplifiers in the three configurations? b) Explain the necessary conditions for oscillators 7. a) Explain the generation of ultrasonic’s and mention the applications b) Explain the principle of induction heating. 8. a) Draw the schematic diagram of a CRO and explain its principle of working b) Explain the working of a thermocouples. 1 of 1 |''|'||||''|''||'|'| Code No: R21023 R10 SET - 1 II B. Tech I Semester, Regular Examinations, Nov – 2012 ELECTRICAL CIRCUIT ANALYSIS - I (Electrical and Electronics Engineering) Time: 3 hours Max. Marks: 75 Answer any FIVE Questions All Questions carry Equal Marks ~~~~~~~~~~~~~~~~~~~~~~~~~ 1. a) Explain the difference between independent and dependent source with suitable examples. b) The voltage waveform shown in figure 1 is applied to a pure capacitor of 60 µF. Sketch i(t) and p(t) and determine Imax and Pmax . 2. a) For the circuit shown in figure 2, use nodal analysis to determine voltage across 3 Ω and 12 Ω resistance. Compute power absorbed by 6 Ω resistor. b) Calculate the mesh currents in the network shown in Figure 3. 3. a) Construct the phasor and impedance diagram and determine the circuit constants for the following voltage and current. V (t ) = 150 sin(5000t + 50 0 ) V, i (t ) = 5 sin(5000t - 25 0 ) b) A current of 4 A flows through a non-inductive resistance in series, with a choking coil when supplied at 230 V, 50 Hz. If the voltage across the resistance is 100 V and across the coil is 180 V, draw the phasor diagram and calculate i) impedance, reactance and resistance of the coil ii) the power absorbed by the coil iii) the total power. 1 of 3 |''|'||||''|''||'|'| 4. SET - 1 R10 Code No: R21023 a) A series RLC circuit with R = 100 Ω, L = 0.5 H and C =40 µF has applied voltage of 100V with variable frequency. Calculate the resonant frequency, current at resonance, voltage across R, L and C. Also calculate the Q-factor, upper and lower half power frequencies and bandwidth. b) Construct an admittance locus and determine the variable inductance values, so that the phase angle between the supply voltage and supply current is zero for the circuit shown in Fig. 5. Assume ω = 5000 rad/sec. 5Ω 7Ω 100 V ~ 20 µF XL Fig. 5 5. a) Two coils with inductances in the ratio of 5:1 have a coupling coefficient k = 0.5. When these coils are connected in series aiding, the equivalent inductance is 44.4 mH. Find L1, L2 and M. b) In the network shown in figure 6, determine the value of the load impedance (ZL) for maximum power transfer. 6. a) Draw the graph of the network given in figure 7, find tie test schedule and determine loop currents. + 10 V - 2Ω 2Ω 4A 2Ω 2Ω 2Ω Figure 7 b) Draw a graph of the network shown in figure 8. Select a tree with branches R1, R2, R5, R3 and R4.Write fundamental loop matrix and cut set matrix. R9 R1 R5 R3 R8 R4 R2 Figure 8 R7 2 of 3 |''|'||||''|''||'|'| R6 7. SET - 1 R10 Code No: R21023 a) Find the current in 10 Ω resistance of the circuit shown in figure 9 using Millman’s theorem. b) In the network given in figure 10, impedance Z 1 = 20∠0 0 Ω be connected between the terminals A and B. Find the power dissipated in the above impedance. 00 V 50 5Ω A 10 Ω 8. 5Ω j10 Ω Figure 10 j5 Ω B a) Find VL in the circuit shown in figure 11, using superposition theorem. b) Verify the Tellegen’s theorem for the circuit shown in Figure 12. 2Ω 5Ω 5A 1Ω + 1Ω 2V 5A - RL 2Ω + VL - + 50 V 5Ω Figure 12 Figure 11 3 of 3 |''|'||||''|''||'|'| 3Ω 2Ω SET - 2 R10 Code No: R21023 II B. Tech I Semester, Regular Examinations, Nov – 2012 ELECTRICAL CIRCUIT ANALYSIS - I (Electrical and Electronics Engineering) Time: 3 hours 1. Max. Marks: 75 Answer any FIVE Questions All Questions carry Equal Marks ~~~~~~~~~~~~~~~~~~~~~~~~~ a) Explain the principle of source transformation using suitable examples. b) A pure inductance of 3 mH carries a current of the waveform shown in figure 1. Sketch the waveform of v(t) and p(t). Determine the average value of power. i(t) 10A 4 1 5 7 8 3 t (milli-sec) -10 A Figure 1 2. a) Using nodal analysis, find current i in the circuit shown in figure 2. 12 mA i 2 KΩ 1 KΩ 3 KΩ 2 mA 6 mA Figure 2 b) Find the source currents in the resistance network shown in figure 3 by using Y- ∆ transformation. a 5Ω 5Ω + 5V d b 8Ω - 3Ω 2Ω c Figure 3 1 of 3 |''|'||||''|''||'|'| Code No: R21023 R10 SET - 2 3. a) In an electrical circuit R, L and C are connected in parallel. R = 10 Ω, L= 0.1 H and C = 100 µF. The circuit is energized with supply at 230 V, 50 Hz. Calculate (i) the impedance ii) current taken from the supply (iii) power factor of the circuit and power consumed by the circuit. b) Find the currents flowing through different elements in the circuit shown in figure 4. 4. a) In a series resonance circuit, the resistance is 5 Ω, the resonant frequency is 4×105 rad/sec and the bandwidth is 104 rad/sec. Compute L and C of the network, half-power frequencies and Q of the circuit. b) Draw the admittance locus for the circuit shown in figure 5 and calculate C which results in resonance when ω= 5000 rad/sec. 5. a) Discuss about the analogy between magnetic and electric circuits. b) For the circuit shown in figure 6, find the voltage across j5 Ω reactance. 2 of 3 |''|'||||''|''||'|'| 6. SET - 2 R10 Code No: R21023 a) Define the following. i) Tree ii) co-tree iii) cut-set iv) Loop b) Draw the graph of the network shown in figure 7. Find the tie set schedule, obtain equilibrium equation on loop current basis and find the branch currents. 1 5Ω 5Ω 5Ω + 5Ω 10 V 5Ω 3 5Ω 2 Figure 7 7. a) Find Norton’s equivalent circuit for the circuit shown in Figure 8. b) Find the current through 15 Ω resistance using Millman’s theorem for the circuit shown in Figure 9. 8. a) Find ‘i' using super position theorem for the circuit given in figure 10. 5Vx i + + 5Ω + 6V 2A 1Ω Vx Figure 10 b) Verify the reciprocity theorem for the circuits given in figure 11. 10∠90 0 V 5Ω 5Ω ~ 1Ω 0 10∠90 V 4Ω 4Ω ~ j2 Ω -j4 Ω Figure 11 3 of 3 |''|'||||''|''||'|'| 1Ω j2 Ω -j4 Ω SET - 3 R10 Code No: R21023 II B. Tech I Semester, Regular Examinations, Nov – 2012 ELECTRICAL CIRCUIT ANALYSIS - I (Electrical and Electronics Engineering) Time: 3 hours Max. Marks: 75 Answer any FIVE Questions All Questions carry Equal Marks ~~~~~~~~~~~~~~~~~~~~~~~~~ 1. a) Define Ohm’s law. Explain about ideal and non-ideal voltage and current sources. b) The waveform given in figure 1 is the voltage across a linear time invariant inductor of 2H. If iL(0) = 0, sketch the waveform of current i(t) up to 3 sec. 0 2. 1 2 3 a) Write a set of node-voltage equations for the network shown in Figure 2 and solve all node voltages. b) Find the current in 3 Ω resistor and voltage across the current source in the network shown in Figure 3 using mesh analysis. 1 of 3 |''|'||||''|''||'|'| Code No: R21023 R10 SET - 3 3. a) When a resistor and choke coil in series are connected to a supply of 240 V, a current of 3 A flows lagging the supply voltage by 400. The voltage across the inductor is 180 V. Find the resistance of the resistor and the parameters of the coil. b) Determine the branch currents and the current supplied by the mains in the circuit shown in Figure 4. 4. a) Show that in a series RLC circuit, f 0 = f1 f 2 , where fo is the resonant frequency and f1, f2 are half power frequencies. b) For the circuit shown in figure 5, draw the admittance locus and sate whether resonance is possible. 5. a) Explain the concept of mutual inductance and derive the expression for coefficient of coupling. b) Determine the voltage V across the 10 Ω resistor in the magnetically coupled circuit shown in Figure 6. 2 of 3 |''|'||||''|''||'|'| 6. SET - 3 R10 Code No: R21023 a) Calculate the source current for the circuit shown in figure 7 using network topology. b) Draw the dual of the network shown figure 8. R =2 Ω R =1 Ω 2 1 1Ω 1Ω S1 + 4V + 1Ω - 2Ω 2Ω 2V - L2=2H C2=4 F R3=3 Ω L1=3H 4A Figure 7 Figure 8 S2 7. a) Find the value of ZL to be connected between the terminals AB of the circuit shown in figure 9, for maximum power transfer. Find maximum power. b) Find the voltage V using Norton’s theorem for the circuit shown in Figure 10. 8. a) Show the validity of reciprocity theorem for the circuits shown in figure 11. 5Ω + 50 V - 20Ω 10 Ω 5Ω 10Ω 10Ω 50 V 10Ω 10 Ω + 20Ω Figure 11 b) Find V0 in the network shown in figure 12 using superposition theorem. 4V 5Ω 1Ω + + + + 0.5V0 10V 1A 2Ω V0 Figure 12 3 of 3 |''|'||||''|''||'|'| 10Ω SET - 4 R10 Code No: R21023 II B. Tech I Semester, Regular Examinations, Nov – 2012 ELECTRICAL CIRCUIT ANALYSIS - I (Electrical and Electronics Engineering) Time: 3 hours Max. Marks: 75 Answer any FIVE Questions All Questions carry Equal Marks ~~~~~~~~~~~~~~~~~~~~~~~~~ 1. a) The waveform shown in the below Figure 1 has a period of 10secs i(A) 8 6 4 2 10 2 4 -2 -4 6 8 12 14 16 18 Time in sec Figure 1 i) What is the average value of the current over one period? ii) How much charge is transferred in the interval 1 < t < 14 secs? iii) If q(0)=0, sketch q(t), 0 < t < 16secs. b) A current of the waveform shown in figure 2, flows through a capacitor C = 25 µF. Sketch the voltage waveform and determine Vmax and qmax. i(t) 5A 0 -5A 2. 4 2 5 Time in macro secs 3 Figure 2 a) Use nodal analysis to find currents in different resistances of the circuit given in Figure 3. b) Find the currents I1, I2, and I3 in the circuit given in Figure 4, using node voltage analysis 1 of 3 |''|'||||''|''||'|'| SET - 4 R10 Code No: R21023 3. a) A series combination of R and C is in parallel with a 25 Ω resistor. A 50 Hz source results in a total current of 6.5 A, a current of 5 A through 25 Ω resistance and a current of 2.3 A in the RC branch. (i) Draw the phasor diagram of the circuit and find values of R and C (ii) Find apparent, active, reactive power and power factor of the circuit. b) A resistance and inductance are connected in series across a voltage given by v(t ) = 283 sin ωt . The power drawn by the series combination is 400 W and the current has a maximum value of 4 A. Determine the circuit parameters and the power factor of the circuit. 4. a) In a series RLC network, R = 50 Ω and C = 20 µF, and L = 50 mH. Find the voltage across each element, when the voltage across the resistor is a maximum, given that the applied voltage is 100 V with a variable frequency. b) Using the locus diagrams, determine the value of RL for which the circuit shown in figure 5 will be under resonance. 100 V RL ~ 10 Ω -j 5Ω j 10 Ω Fig. 5 5. a) Two coupled coils with L1 = 0.01 H and L2 = 0.04 H and k = 0.6 can be connected in four different ways such as series aiding, series opposing, parallel aiding and parallel opposing. Find equivalent inductance in each case. b) For the circuit shown in figure 6, determine the currents i1 & i2 using loop method of analysis. j 2Ω -j8Ω 2Ω V1=10 0 0V i1 j4 j3 Figure 6 2 of 3 |''|'||||''|''||'|'| i2 V2=10 00 V 6. SET - 4 R10 Code No: R21023 a) For the network given in figure 6A, draw its dual and write KCL in matrix form of the dual network. b) For the network given in figure 6B, calculate the branch voltages and branch currents using node- basis method. S R1 R2 + V L + 1V 1Ω C Figure 6A 7. 2Ω 1Ω 1Ω 2Ω 1Ω Figure 6B a) Use the Thevinin’s theorem to find the deflection of galvanometer having a resistance of 100 ohm and a sensitivity of 0.5x10-5 A per mm connected to terminals AB of the bridge shown in Figure 7. b) Find the voltage across 10 Ω resistance in the network shown in Figure 8 using Norton’s theorem. 8. a) Use superposition to determine voltage Vx in the network given in Figure 9. b) Verify Tellegen’s theorem for the below circuit shown in Figure 10. 10Ω 20Ω + 88V 50Ω 40 Figure 10 3 of 3 |''|'||||''|''||'|'| 10 SET - 1 R10 Code No: R21042 II B. Tech I Semester, Regular Examinations, Nov – 2012 NETWORK ANALYSIS (Com. to ECE, EIE, ECC) Time: 3 hours Max. Marks: 75 Answer any FIVE Questions All Questions carry Equal Marks ~~~~~~~~~~~~~~~~~~~~~~ 1. a) What are the types of sources? Explain them with suitable diagrams and characteristics? b) Calculate the voltage that is to be connected across terminals x-y is shown in below figure such that the voltage across the 2Ω resister is 10 V. Also find Ia and Ib .what is the total power loss in the circuit. Ia 4 Ω x Ib 6 Ω 2Ω 5Ω y 2. Explain the principles of duality? Write a graphical procedure to draw a dual network? A periodic voltage waveform has been shown in the below figure. Determine the following. i) Frequency of the waveform ii) Wave equation for 0< t <100 m sec iii) R.M.S. value and iv) Average value V(t) Vm 0 2π π t (ms) 3. a) Define the following i) Impedance ii) Phase angle iii) Power factor b) State and explain star-delta conversion in AC systems. 1 of 2 |''|'||||''|''||'|'| 4. For the network shown in below figure, find the voltage across load resistance RL. k=0.5 j2Ω j5Ω 50 V 5. SET - 1 R10 Code No: R21042 ~ RL=5Ω -j3Ω Find the current through the capacitor of –j5Ω reactance as shown in below figure using superposition theorem 3Ω -j5Ω 2Ω 100 V∠0 0 ~ I = 10∠30 0 A 5Ω j4 Ω 6. Find the open circuit impedance parameters of the circuit shown in below figure. Also find the Y-parameters 1Ω I1 V1 7. I2 4Ω 2V1 2Ω 3Ω V2 In the network shown in below figure, the switch is closed at t= 0. Find the value of current in each loop. 5Ω 1H 3H t=0 100 V 10Ω 20Ω 8. a) What are the properties of filters b) Design an m-derived T-section low pass filter having cut off frequency, fc=7000Hz, design impedance Ro=600Ω and frequency of infinite attenuation. 2 of 2 |''|'||||''|''||'|'| SET - 2 R10 Code No: R21042 II B. Tech I Semester, Regular Examinations, Nov – 2012 NETWORK ANALYSIS (Com. to ECE, EIE, ECC) Time: 3 hours Max. Marks: 75 Answer any FIVE Questions All Questions carry Equal Marks ~~~~~~~~~~~~~~~~~~~~~~ 1. a) What are the network elements? Explain them b) What is the magnitude of current drained from the 10V source in the circuit shown below? 1Ω P 2Ω 3Ω 2Ω 3Ω 5Ω 10V Q 2. a) Define the following terms i) Node ii) Tree iii) Incidence matrix iv) Basic tie set b) A non-alternating periodic waveform has been shown in below figure. Find its form factor and peak factor x(t) 2A 1A 0 3. 10 20 30 40 t (ms) a) Obtain the expressions for star-delta equivalence of impedance network. b) A two element series circuit is connected across AC source e(t ) = 200 2 sin( ωt + 20 0 ) V . The current in the circuit then found to be i (t ) = 10 2 cos( ωt − 25 0 ) A. Determine the parameters of the circuit. 4. a) Derive the expression for bandwidth of series RLC circuit. b) Two coils with 300 turns and 700 turns are wound side by side on a closed magnetic circuit of area of cross section 400cm2 and mean length 80 cm, the magnetic circuit has relative permeability of 4000. Determine the mutual inductance, self induced e.m.f and mutually induced e.m.f when the current in the coil with 300 turns grows from zero to 25A in a time of 0.3 sec 1 of 2 |''|'||||''|''||'|'| 5. SET - 2 R10 Code No: R21042 Obtain equivalent circuit across A-B terminals in figure shown below and find the value of ZL to have maximum power. 2Ω j3Ω A j1Ω ~ 100 V j2Ω ZL j4Ω B 6. Determine Y-parameters of the network shown in below figure I1 V1 7. 3Ω I2 2Ω 4Ω V2 Using Laplace transformation technique, find current in each loop at t = 0+ following switching at t = 0 of switch K is shown in below figure. Assume the network previously de-energized. 3Ω + 10 V 8. 3I2 - 1H 1H K 2Ω 4Ω a) What are the classifications of filters? Discuss them briefly. b) Design a constant k-low pass filter having fc = 2 kHz and design impedance Ro=600Ω. Obtain the value of attenuation at 4 kHz. 2 of 2 |''|'||||''|''||'|'| SET - 3 R10 Code No: R21042 II B. Tech I Semester, Regular Examinations, Nov – 2012 NETWORK ANALYSIS (Com. to ECE, EIE, ECC) Time: 3 hours Max. Marks: 75 Answer any FIVE Questions All Questions carry Equal Marks ~~~~~~~~~~~~~~~~~~~~~~ 1. a) Explain the source transformation techniques with suitable circuits. b) Find mesh currents and determine voltage across each element in the circuit shown in below Figure. 5Ω 8Ω + - 10 V 5A 2Ω 4Ω 2. a) Explain the RMS value and average value of alternating quantity. Derive its necessary expressions. b) Find the branch currents shown in below figure by using the concept of the tie-set matrix. 3Ω 2Ω 5Ω 25V + - 1Ω 6Ω 2Ω 3. In the two-mesh network shown in below figure, determine the a) Mesh currents b) Power supplied by the source and c) Power dissipated in each resistor 2Ω 100 V ~ -j5Ω -j3Ω 1Ω j4Ω 1 of 2 |''|'||||''|''||'|'| 3Ω SET - 3 R10 Code No: R21042 4. a) Determine the coefficient of coupling of two magnetically coupled coils of turns N1 and N2 b) For the circuit shown in below figure, find the value of Xc in ohms at which the circuit under resonance 8Ω 5Ω -jXC j3 Ω 5. In the circuit shown in below figure, find the current through RL connected across A-B terminals by utilizing Thevenin’s theorem. Verify the results by Norton’s theorem. 5Ω 25 V A 2Ω 4Ω ~ 5A j5 Ω B 6. For the network shown in below figure, find ABCD parameters 3Ω 2 1 1Ω 5Ω 2Ω 11 21 7. In the network shown in below figure find the current through the inductor for all values of‘t’. t=0 4Ω t=1 + 10 V - S1 S2 2Ω 1H 3Ω 8. a) Explain the concept of m-derived filters. b) Design a prototype band stop filter section having cut-off frequencies of 2000 Hz and 5000 Hz and design resistance of 600Ω. 2 of 2 |''|'||||''|''||'|'| SET - 4 R10 Code No: R21042 II B. Tech I Semester, Regular Examinations, Nov – 2012 NETWORK ANALYSIS (Com. to ECE, EIE, ECC) Time: 3 hours Max. Marks: 75 Answer any FIVE Questions All Questions carry Equal Marks ~~~~~~~~~~~~~~~~~~~~~~ 1. a) State and explain Kirchhoff’s laws. b) Using nodal analysis techniques to determine current ‘i’ in the network shown in below figure. 6Ω i 3i 3A 10Ω 5A 4Ω 2. a) Define the following i) Time period ii) Frequency iii) RMS value iv) Average value b) Draw the dual of the network shown in below figure and explain its procedure. I G2 C2 + V - C1 S G1 L 3. Find the source voltage ‘Vs’ by using nodal technique, assume I = 5 /450 A. 2Ω 3Ω -j2 Ω j4Ω I VS ~ -j4Ω 4Ω 3Ω j5Ω 4. a) Contrast between magnetic circuits and electrical circuits. b) A series RLC circuit has the following parameters. R = 15 ohms, L = 2H, C = 100 micro F. Calculate the resonant frequency. Under resonant condition, calculate current, power, and voltage drops across various elements, if the applied voltage is 100V. 1 of 2 |''|'||||''|''||'|'| SET - 4 R10 Code No: R21042 5. Find the current through the 10 ohm resistor in the following circuit using Norton’s Theorem. 5∠30 0 V + A ~ + 2Ω ~ 10V 10Ω 5Ω 1Ω -j2Ω B 6. Obtain Z-parameters and transmission parameters of the network shown in below figure. 2Ω I1 V1 5Ω I2 3I1 4Ω V2 7. In the below figure, the initial voltage in the capacitor is 1V as the polarity shown. Find the voltage appearing across the capacitor with application of the step voltage I1 4Ω + 2 u(t) - 3I1 2Ω + - 1F 8. a) Explain the analysis of band pass filter. b) Design a T-section constant K-high pass filter having cut-off frequency of 10 kHz and design impedance R0 = 600 ohms. Find its characteristic impedance and phase constant at 25 kHz. 2 of 2 |''|'||||''|''||'|'| SET - 1 R10 Code No: R21052 II B. Tech I Semester, Regular Examinations, Nov – 2012 PROBABILITY AND STATISTICS (Com. to CSE, IT) Time: 3 hours Max. Marks: 75 Answer any FIVE Questions All Questions carry Equal Marks ~~~~~~~~~~~~~~~~~~~~~~ 1. a) Four cards are drawn from a pack of cards. Find the probability that i) all are diamonds ii) there is one card of each suit, and (iii) there are two spades and two hearts. b) A bag X contains 2 white and 3 red balls and a bag Y contains 4 white and 5 red balls. One ball is drawn at random from one of the bags and is found to be red. Find the probability that it was drawn from bag Y. 2. a) A random variable X has the following probability function : Values of X, x 0 1 2 3 4 5 6 7 2 2 P(x) 0 k 2k 2k 3k 2k 7k2 + k k i) Find k , ii) Evaluate p ( X < 6), p ( X ≥ 6), p (3 < X ≤ 6) 1 iii) Find the minimum value of x so that p ( X ≤ x) > . 2 b) Let X be a continuous random variable with distribution : 1 x + k , if 0 ≤ x ≤ 3 f ( x) = 6 0 elsewhere i) Evaluate k ii) Find P (1 ≤ X ≤ 2). 3. a) Assume that on the average one telephone number out of fifteen called between 2 P.M. and 3 P.M. on week-days is busy. What is the probability that if 6 randomly selected telephone numbers are called i) not more than three ii) at least three of them will be busy? b) In a normal distribution, 31% of the items are under 45 and 8% are over 64. Find the mean and standard deviation of the distribution? 4. a) A population consists of the four numbers 1, 5, 6, 8. Consider all possible samples of size two that can be drawn without replacement from this population. Find i) The population mean, ii) The population standard deviation, iii) The mean of the sampling distribution of means, iv) The standard deviation of the sampling distribution of means. b) Determine a 95% confidence interval for the mean of a normal distribution with variance σ 2 = 9 , using a sample of n = 100 values with mean x = 5. 1 of 2 |''|'||||''|''||'|'| Code No: R21052 R10 SET - 1 5. a) In a random sample of 100 tube lights produced by company A, the mean life time of tube light is 1190 hours with standard deviation of 90 hours. Also in a random sample of 75 tube lights from company B the mean life time is 1230 hours with standard deviation of 120 hours. Is there a difference between the mean lifetimes of the two brands of tube lights at a significance level of 0.01? b) An urban community would like to show that the incidence of breast cancer is higher than in a nearby rural area. If it is found that 20 of 200 adult women in the urban community have breast cancer and 10 of 150 adult women in the rural community have breast cancer, can we conclude at the 0.05 level of significance that breast cancer is more prevalent in the urban community? 6. a) The mean life of 10 electric motors was found to be 1450 hrs with a S.D. of 423 hrs. A second sample of 17 motors chosen from a different batch showed a mean life of 1280 hrs with a S.D. of 398 hrs. Is there a significant difference between the means of the two samples? Use a 0.01 level of significance. b) In two independent samples of sizes 8 and 10 the sum of squares of deviations of the sample values from the respective sample means were 84.4 and 102.6. Test whether the difference of variances of the populations is significant or not. Use a 0.05 level of significance. 7. a) The following data show the values of sample mean X and the range R for the sample of size 5 each. Calculate the values for central line and control limits for mean-chart and range chart and determine whether the process is in control Sample No. 1 2 3 4 5 6 7 8 9 10 43 49 37 44 45 47 51 46 43 47 Mean( X ) Range(R) 05 06 05 07 07 04 08 06 04 06 ( Given n = 5, A2 = 0.577, D3 = 0, D4 = 2.115 ) 8. a) Explain briefly the main characteristics of Queuing system? b) The arrival rate of customers at a counter in a bank follows Poisson distribution with a mean of 45/hour; service rate of the clerk follows Poisson distribution with a mean of 60/hour. Find the probability of having 0, 5, 10 customers in the system. Find Ls , Lq , Ws and Wq . 2 of 2 |''|'||||''|''||'|'| Code No: R21052 R10 SET - 2 II B. Tech I Semester, Regular Examinations, Nov – 2012 PROBABILITY AND STATISTICS (Com. to CSE, IT) Time: 3 hours Max. Marks: 75 Answer any FIVE Questions All Questions carry Equal Marks ~~~~~~~~~~~~~~~~~~~~~~ 1. 2. a) In a given race, the odds in favor of four horses A, B, C, D are 1:3, 1:4, 1:5, 1:6 respectively. Assuming that a dead heat is impossible; find the chance that one of them wins the race. b) In a bolt factory, machines A, B and C manufacture respectively 25%, 35% and 40% of the total. Of their output 5, 4 and 2 percent are defective bolts. A bolt is drawn at random from the product and is found to be defective. What is the probability that it was manufactured by machine B? a) A random variable X has the following probability function : Values of X, x 0 1 2 3 4 5 6 7 8 P(x) a 3a 5a 7a 9a 11a 13a 15a 17a i) Determine the value of a, ii) Evaluate P ( X < 3), P( X ≥ 3), P(2 ≤ X < 5) . b) Let X be a continuous random variable with distribution : 3. 4. 1 if 0 ≤ x ≤ 8 f ( x) = 8 0 elsewhere Find i) P (2 ≤ X ≤ 5) ii) P (3 ≤ X ≤ 7 ) iii) P ( X ≤ 6) iv) Determine and plot the graph of the cumulative distribution function F of X. a) Out of 800 families with 4 children each, how many families would be expected to have (i) 2 boys and 2 girls (ii) at least one boy (iii) no girl (iv) at most two girls? Assume equal probabilities for boys and girls. b) In a normal distribution, 7% of the items are under 35 and 89% are under 63. What are the mean and standard deviation of the distribution? a) A population consists of the four numbers 1, 5, 6, 8. Consider all possible samples of size two that can be drawn with replacement from this population. Find i) The population mean, ii) The population standard deviation, iii) The mean of the sampling distribution of means, iv) The standard deviation of the sampling distribution of means b) Determine a 99% confidence interval for the mean of a normal distribution with variance σ 2 = 4 , using a sample of n = 200 values with mean x = 10 1 of 2 |''|'||||''|''||'|'| 5. SET - 2 R10 Code No: R21052 a) A manufacturer claims that the average tensile strength of thread A exceed the average tensile strength of thread B by at least 12 kilograms. To test his claim, 50 pieces of each type of thread are tested under similar conditions. Type A thread had an average tensile strength of 86.7 kilograms with known standard deviation of σ A = 6.28 kilograms, while type B thread had an average tensile strength of 77.8 kilograms with known standard deviation of σ B = 5.61 kilograms. Test the manufacturers claim at 0.05 level of significance. b) In a study to estimate the proportion of residents in a certain city and its suburbs who favor the construction of a nuclear power plant, it is found that 63 of 100 urban residents favor the construction while only 59 of 125 suburban residents are in favor. Is there a significant difference between the proportion of urban and suburban residents who favor construction of the nuclear plant? Use a 0.05 level of significance. 6. a) Two samples of sodium vapor bulbs were tested for length of life and the following results were returned : Size Sample mean Sample S.D. Type I 8 1234 hrs 36 hrs Type II 7 1036 hrs 40 hrs Is the difference in the means significant to generalize that type I is superior to type II regarding length of life? Use a 0.05 level of significance. b) Two independent samples of size 9 and 8 had the following values of the variables: Sample I Sample II 17 16 27 16 18 20 25 16 27 20 29 17 27 15 23 21 17 Do the estimates of the population variance differ significantly? Use a 0.05 level of significance. 7. The following data show the values of sample mean X and the range R for The sample of size 5 each. Calculate the values for central line and control limits for mean-chart and range chart and determine whether the process is in control Sample No. 1 Mean( X ) Range(R) 11.2 11.8 10.8 11.6 11.0 9.6 10.4 9.6 10.6 10.0 07 2 04 3 08 4 05 5 07 6 04 7 08 8 04 9 07 10 09 ( Given n = 5, A2 = 0.577, D3 = 0, D4 = 2.115 ) 8. a) Explain (M/ M/ 1): (∞ / FCFS) Queuing model. b) Assume that both arrival rate and service rate following Poisson distribution. The arrival rate and service rate are 25 and 35 customers/hour respectively, at a single window in RTC reservation counter. Find Ls , L q Ws and W q . 2 of 2 |''|'||||''|''||'|'| R10 Code No: R21052 SET - 3 II B. Tech I Semester, Regular Examinations, Nov – 2012 PROBABILITY AND STATISTICS (Com. to CSE, IT) Time: 3 hours Max. Marks: 75 Answer any FIVE Questions All Questions carry Equal Marks ~~~~~~~~~~~~~~~~~~~~~~ 1. a) A card is drawn from a well-shuffled pack of playing cards. What is the probability that it is either a spade or an ace? b) The contents of bags I, II and III are as follows: 1 white, 2 black and 3 red balls, 2 white, 1 black and 1 red balls, and 4 white, 5 black and 3 red balls. One bag is chosen at random and two balls drawn. They happen to be white and red. What is the probability that they come from bags I, II or III? 2. a) A random variable X has the following probability function : Values of X, X -3 -1 2 5 P(X = x) 2k − 3 k + 1 k − 1 k − 2 10 10 10 10 i) Find the value of k (ii) Determine the distribution of X. b) Let X be a continuous random variable with distribution: kx if 0 ≤ x ≤ 5 f ( x) = elsewhere 0 i) Evaluate k. ii) Find: P (1 ≤ X ≤ 3) , P (2 ≤ X ≤ 4) and P ( X ≤ 3) . 3. a) The probability that a pen manufactured by a company will be defective is 1 . If 12 such 10 pens are manufactured, find the probability that i) exactly two will be defective ii) at least two will be defective iii) none will be defective. b) A sample of 100 dry battery cells tested to find the length of life produced the following results: x = 12 hours, σ = 3 hours. Assuming the data to be normally distributed, what percentage of battery cells are expected to have life i) more than 15 hours ii) less than 6 hours iii) between 10 and 14 hours? 1 of 2 |''|'||||''|''||'|'| Code No: R21052 SET - 3 R10 4. a) A population consists of the four numbers 3, 7, 11, 15. Consider all possible samples of size two that can be drawn without replacement from this population. Find: i) The population mean, ii) The population standard deviation, iii) The mean of the sampling distribution of means, iv) The standard deviation of the sampling distribution of means b) Determine a 95% confidence interval for the mean of a normal distribution with variance σ 2 = 0.25 , using a sample of n = 100 values with mean x = 212.3. 5. a) A random sample of 64 bags of white cheddar popcorn weighed, on average, 5.23 ounces with a standard deviation of 0.24 ounces. Test the hypothesis that µ = 5.5 ounces against the alternative hypothesis, µ < 5.5 ounces at the 0.05 level of significance. b) If 57 out of 150 patients suffering with certain disease are cured by allopathy and 33 out of 100 patients with same disease are cured by homeopathy, is there reason to believe that allopathy is better than homeopathy at 0.05 level of significance. 6. a) Samples of sizes 10 and 14 were taken from two normal populations with S.D. 3.5 and 5.2. The sample means were found to be 20.3 and 18.6. Test whether the means of the two populations are the same at 5% level. b) The two random samples reveal the following data : Sample no. Size Mean Variance I 16 440 40 II 25 460 42 Test whether the samples come the same normal population. 7. A machine is set to deliver packets of a given weight. recorded. Below are given the relevant data Sample No. 1 2 3 4 5 6 7 8 15 17 15 18 17 14 18 15 Mean( X ) Range(R) 07 07 04 09 08 07 12 04 10 samples of size 5 each were 9 17 11 10 16 05 Calculate the values of the central line and the control limits for the mean chart and range chart and then comment on the state of control. ( Given n = 5, A2 = 0.577, D3 = 0, D4 = 2.115 ) 8. a) Derive the average number of customers in the queue. In (M/M/1): (∞/FCFS) model. b) The containers from railway goods wagons are unloaded at a single platform of a railway goods yard. The arrival rate of wagons is 8 wagons per day and service rate is 14 wagons per day. Assuming the arrival rate and service rate to follow Poisson distribution, determine the following: 2 of 2 |''|'||||''|''||'|'| SET - 4 R10 Code No: R21052 II B. Tech I Semester, Regular Examinations, Nov – 2012 PROBABILITY AND STATISTICS (Com. to CSE, IT) Time: 3 hours Max. Marks: 75 Answer any FIVE Questions All Questions carry Equal Marks ~~~~~~~~~~~~~~~~~~~~~~ 1. 2. a) A problem in statistics is given to five students. Their chances of solving it are 1 1 1 1 1 , , , and . What is the probability that the problem will be solved? 2 3 4 4 5 b) A factory has two machines A and B. Past records shows that machine A produced 60% of the items of output and machine B produced 40% of the items. Further, 2% of the items produced by machine A were defective and 1% produced by machine B was defective. If a defective item is drawn at random, what is the probability that it was produced by machine A? a) A random variable X has the following probability function : Values of X, X -3 2 4 7 P(X = x) k + 1 2k − 2 3k − 5 k +2 10 10 10 10 i) Find the value of k ii) Determine the distribution of X. ( ) 0.75 1 − x 2 , − 1 ≤ x ≤ 1 b) Let X have the density function f ( x ) = , otherwise 0 1 1 1 Find the distribution function .Find the Probabilities P − ≤ X ≤ and. P ≤ X ≤ 2 2 2 4 3. a) In 800 families with 5 children each, how many families would be expected to have (i) 3 boys and 2 girls (ii) 2 boys and 3 girls (iii) no girl (iv) at the most two girls. b) An aptitude test for selecting offers in a bank is conducted on 1000 candidates. The average score is 42 and the standard deviation of score is 24. Assuming normal distribution for the scores, find: i) The number of candidates whose scores exceed 60 ii) The number of candidates whose scores lie between 30 and 60. 4. a) A population consists of the four numbers 3, 7, 11, 15. Consider all possible samples of size two that can be drawn with replacement from this population. Find i) The population mean, ii) The population standard deviation, iii) The mean of the sampling distribution of means, iv) The standard deviation of the sampling distribution of means b) Determine a 99% confidence interval for the mean of a normal distribution with variance σ 2 = 9 , using a sample of n = 100 values with mean x = 5. 1 of 2 |''|'||||''|''||'|'| Code No: R21052 SET - 4 R10 5. a) A random sample of 100 recorded deaths in the United States during the past year showed an average life span of 71.8 years. Assuming a population standard deviation of 8.9 years, does this seem to indicate that the mean life span today is greater than 70 years? Use a 0.05 level of significance. b) A commonly prescribed drug for relieving nervous tension is believed to be only 60% effective. Experimental results with a new drug administered to a random sample of 100 adults who were suffering from nervous tension show that 70 received relief. Is this sufficient evidence to conclude that the new drug is superior to the one commonly prescribed? Use a 0.05 level of significance. 6. a) The height of 6 randomly chosen sailors is, in inches 63, 65, 68, 69, 71 and 72. Those of 9 randomly chosen soldiers are 61, 62, 65, 66, 69, 70, 71, 72 and 73. Test whether the sailors are on the average taller than soldiers. Use a 0.05 level of significance. b) Two independent samples of size 8 and 9 had the following values of the variables: Sample I 20 30 23 25 21 22 23 24 Sample II 30 31 32 34 35 29 28 27 26 Do the estimates of the population variance differ significantly? Use a 0.05 level of significance. 7. a) The following data show the values of sample mean X and the range R for The sample of size 5 each. Calculate the values for central line and control limits for mean-chart and range chart and determine whether the process is in control Sample No. 1 2 3 4 5 6 7 8 9 10 Sample Mean 12.8 13.1 13.5 12.9 13.2 14.1 12.1 15.5 13.9 14.2 Sample Range 2.1 3.1 3.9 2.1 1.9 3.0 2.5 2.8 2.5 2.0 ( Given n = 5, A2 = 0.577, D3 = 0, D4 = 2.115 ) 8. a) Derive the average number of customers in the system, In (M/M/1): (∞/FCFS) model. b) A self-service store employs one cashier at its counter. Nine customers arrive on an average every 5 minutes while the cashier can serve 10 customers in 5 minutes. Assuming Poisson distribution for arrival rate and exponential distribution for service rate, find a) Average number of customers in the system. b) Average number of customers in queue or average queue length. c) Average time a customer spends in the system. d) Average time a customer waits before being served. 2 of 2 |''|'||||''|''||'|'| SET - 1 R07 Code No: X0224 II B. Tech I Semester, Supplementary Examinations, Nov – 2012 SWITCHING THEORY AND LOGIC DESIGN (Com. to EEE, EIE, BME, ECC) Time: 3 hours Max. Marks: 80 Answer any FIVE Questions All Questions carry Equal Marks ~~~~~~~~~~~~~~~~~~~~~~~~~ 1. a) Convert (0011101.1011)2 to decimal b) Represent the 12 bit Hamming code word for the 8 bit data words 10110110 and 10101100 c) Draw a conversion table to convert BCD to Gray code 2. (4M+6M+6M) a) Explain the fundamental postulates of Boolean algebra b) Obtain the compliment and dual for the following expressions i) AB’ + ABD +ABD’+A’C’D’ + A’BC’C 3. ii) BD +BCD’+ A’B’C’D’ (8M+8M) a) Simplify the following Boolean function F using k maps and implement the circuit using NAND gates only F= ∑m(5,6,7,10,11,13,14,15) b) Express the simplified Boolean function in sum of min terms. i) F(x,y,z)=∑(0,2,6,11,12,13,14) 4. ii) F(x,y,z)=∑(0,1,3,5,6,8,9,11,12,13) a) Design a 64X1 multiplexer with four 16X1 and one 4X1 multiplexers. b) Explain 3 to 8 line decoder with the help of logic diagram and truth table 5. (8M+8M) (8M+8M) Realize the following functions using a PLA with 6 inputs, 4outputs and 10 AND gates i) F(A,B,C,D,E,F) = ∑m( 0,1,2,3,7,8,9,10,11,15,32,33,34,35,39,40,41,42,43,45,47). ii) F(A,B,C,D,E,F) = ∑m(8,9,10,11,12,14,21,25,27,40,41,42,43,44,46,57,59). 6. (8M+8M) a) Design a modulo 12 counter using a shift register and feedback logic. b) A 5 stage ripple counter uses flip flops having a delay time of 30 ns and a decode time of 50 ns. Determine the maximum frequency of operation of the counter. 1 of 2 |''|'||||''|''||'|'| (8M+8M) R07 Code No: X0224 7. a) Describe the procedure to reduce the state table. b) Convert the following Mealy machine into the corresponding Moore machine PS 8. SET - 1 (6M+10M) NS,Z X=0 X=1 A B,0 E,0 B D,0 A,1 C D,1 A,0 D B,1 C,1 E A,0 A,0 a) Design a digital system with three 4-bit registers A, B and C to perform the following operations by drawing the ASM chart. i) Transfer two binary numbers to A and B when a start signal is enabled. ii) If A<B shift left the contents of A and transfer the result to register C iii) If A>B shift right the contents of B and transfer the result to register C iv) If A=B transfer the number to register C unchanged. b) Realize the above using JK flip flops and D flip flops. 2 of 2 |''|'||||''|''||'|'| (8M+8M) Code No: X0224 SET - 2 R07 II B. Tech I Semester, Supplementary Examinations, Nov – 2012 SWITCHING THEORY AND LOGIC DESIGN (Com. to EEE, EIE, BME, ECC) Time: 3 hours Max. Marks: 80 Answer any FIVE Questions All Questions carry Equal Marks ~~~~~~~~~~~~~~~~~~~~~~~~~ 1. a) Convert the following decimal numbers to octal numbers i) 6987 ii) 9351.25 b) Convert the following numbers to Gray code i) 6482 ii) 754 c) What is self complementary code? Explain . (6M+6M+4M) 2. a) Find the compliment and dual of i) F = AB + C D + E ii) F = AB C + B + BD + ABD + A C b) Minimize the functions Y = AB + A(B+C) + B(B+C) and Y = (AB + C) (B +AC) using Boolean theorems. (8M+8M) 3. Minimize the following function using tabular minimization and verify the same with K-map minimization F=∑(0,2,4,6,9,13,21,23,25,29,31) (16M) 4. Implement the following Boolean function by a hazard free OR-AND network f = ∑m(0,2,6,7) and explain in detail what are the hazards encountered in implementing the above function (16M) a) Tabulate the PLA programming table for the two Boolean functions listed below i) A(x,y,z) = ∑m(1,23,5,7) ii) B(x,y,z) = ∑m(0,1,6,7) b) Give the logic implementation of a 32X4 bit ROM using decoder of suitable size. (8M+8M) 5. 6. a) Draw and explain Master-Slave D flip flop. b) Explain SR flip flop with the help of NAND gates and also obtain its excitation table c) Discuss about Race-around condition (6M+6M+4M) 1 of 2 |''|'||||''|''||'|'| R07 Code No: X0224 7. a) Distinguish between Moore and Mealy machines. b) For the state table of the machine given below find the equivalent partition and corresponding reduced machine in standard form (4M+12M) PS 8. SET - 2 NS,Z A B X=0 B,1 F,1 X=1 H,1 D,1 C D,0 E,1 D C,1 F,1 E D,1 C,1 F C,1 C,1 G C,1 D,1 H C,0 A,1 Draw the ASM chart of binary multiplier and design the control circuit using each of the following methods: i) JK flip flop & gates ii) D flip flop& decoder.. (8M+8M) 2 of 2 |''|'||||''|''||'|'| Code No: X0224 R07 SET - 3 II B. Tech I Semester, Supplementary Examinations, Nov – 2012 SWITCHING THEORY AND LOGIC DESIGN (Com. to EEE, EIE, BME, ECC) Time: 3 hours Max. Marks: 80 Answer any FIVE Questions All Questions carry Equal Marks ~~~~~~~~~~~~~~~~~~~~~~~~~ 1. a) Design single error correcting Hamming code for standard BCD and explain how error is detected and corrected. b) Subtract the following numbers using 10’s and 9’s complement i) 7642-428 ii) 527-309. (8M+8M) 2. a) Realize a 2 input EX-OR gate using minimum number of 2 input NAND gates b) Implement the Boolean function F = A B + A BC + A BC D E with exclusive OR and AND gates. (8M+8M) 3. Minimize the following function using tabular minimization and verify the same with K-map minimization F=∑(1,4,6,7,8,9,10,11,15) (16M) 4. a) Realize the function F = ∑m(0,1,4,7,9,12,14) using 1:16 de-Mux. b) What is meant by hazard in combinational circuit? How do you design hazard free circuit explain with suitable example. (8M+8M) 5. a) Realize the following Boolean functions using Threshold gate i) F = ∑m(0,3,5,6,8,9,14,15) ii) F = ∑m(1,2,5,11,12,13,14,15). b) Write short notes on PLA 6. (12M+4M) a) Design a modulo-7 binary counter using JK flip flop. b) Mention the applications of flip flops. c) A ripple counter uses flip flops having tpd = 12 ns. What can be the largest mode counter constructed from flip flops and operated at 10MHz frequency (8M+4M+4M) 1 of 2 |''|'||||''|''||'|'| R07 Code No: X0224 7. SET - 4 a) What is a merger graph? Explain. b) For the state table of the machine given below, find the equivalent partition and a corresponding reduced machine in standard form. (4M+12M) PS NS,Z A B X=0 D,0 F,1 X=1 H,1 C,1 C D,0 F,1 D C,0 E,1 E C,1 D,1 F D,1 D,1 G D,1 C,1 H B,1 A,1 8. a) Differentiate between an ASM chart and a conventional flow chart. b) Draw the state diagram and ASM chart of a J-K flip-flop. 2 of 2 |''|'||||''|''||'|'| (8M+8M) Code No: X0224 R07 SET - 4 II B. Tech I Semester, Supplementary Examinations, Nov – 2012 SWITCHING THEORY AND LOGIC DESIGN (Com. to EEE, EIE, BME, ECC) Time: 3 hours Max. Marks: 80 Answer any FIVE Questions All Questions carry Equal Marks ~~~~~~~~~~~~~~~~~~~~~~~~~ 1. 2. a) Convert the numbers to octal and decimal number system i) (A50C)16 ii) (1101011.0110)2 b) Explain error correction and detection codes with examples (8M+8M) a) Simplify the following Boolean expressions i) A C + ABC + AC ii) ( X Y Z ) + Z + XY + WZ iii) A (B(D + C D )) + B(A + A CD ) iv) (A + C )(A + C )(A + B + C D ) b) Briefly describe about the standard form and canonical form of switching functions with suitable examples. (8M+8M) 3. Obtain minimal SOP expression for the given Boolean function, using K-map method F = ∑ (0,1,4,6,8,9,10,12) + d(3,7,11,13,14,15) and draw the circuit using 2 input NAND gates. (16M) 4. What are hazards? Explain in detail significance of hazards. Differentiate between static and dynamic hazards. (16M) 5. a) Implement the following Boolean functions using PROM i) P(A,B,C,D) = ∑m(0,2,6,7,8,9,12,13,14) ii) Q(A,B,C,D) = ∑m(1,3,4,6,9,12,14) b) Write short notes on i) PLA ii) PLD (8M+8M) a) With the aid of external logic convert D type flip flop to a JK flip flop. b) Design a synchronous modulo 12 counter using NAND gates and JK flip flops (8M+8M) 6. 1 of 2 |''|'||||''|''||'|'| Code No: X0224 R07 SET - 4 7. a) Draw the state stable for a synchronous circuit, with one input x and one output z, which operates according to the following sequences at t = 0, the initial state is A and x(t) = 0 for t < 0 i) z(t) = x(t) + x(t-1) ii) z(t) = x(t).x(t-1) where the change from equation(i) to equation(ii) occurs at time such that x(τ) = x(t-τ) = x(τ-2) = 1 and change from (ii) to (i) occurs at time T such that x(T) = X(T-1) = X(T-2) = 0 b) Define successor and terminal state (10M+6M) 8. a) Name the elements of an ASM chart and define each one of them. b) Draw the state diagram, state table and ASM chart for a D flip-flop. 2 of 2 |''|'||||''|''||'|'| (8M+8M) Code No: X0322 R07 SET - 1 II B. Tech I Semester, Supplementary Examinations, Nov – 2012 OBJECT ORIENTED PROGRAMMING (Com. to ME, AME, MM) Time: 3 hours Max. Marks: 80 Answer any FIVE Questions All Questions carry Equal Marks ~~~~~~~~~~~~~~~~~~~~~~ 1. 2. a) Explain the concepts of OOP. b) What is meant by class and object? Explain with example. a) What is meant by scope and life time of a variable? b) What are different data types defined in java? Explain. c) What is meant by constructor? (8M+8M) (4M+6M+6M) 3. Explain about the different types of inheritances with example. 4. a) How a package can be created and accessed? Explain with example. b) What are the importance of super, final and this keywords? (8M+8M) a) How threads will be created? What is meant by daemon threads? b) How do you differentiate between multitasking and multithreading? c) Explain about finally block. (8M+4M+4M) 5. 6. 7. 8. a) What is meant by event class? explain b) Explain about different user interface components. a) What are the types of applets? explain. b) Write an applet program to do arithmetic calculations using menu bar. Explain about the following a) Ports b) Event handling c) Server socket (8M+8M) (6M+10M) (6M+5M+5M) 1 of 1 |''|'||||''|''||'|'| (16M) Code No: X0322 R07 SET - 2 II B. Tech I Semester, Supplementary Examinations, Nov – 2012 OBJECT ORIENTED PROGRAMMING (Com. to ME, AME, MM) Time: 3 hours Max. Marks: 80 Answer any FIVE Questions All Questions carry Equal Marks ~~~~~~~~~~~~~~~~~~~~~~ 1. Explain about different parameter passing methods with examples (16M) 2. a) Discuss java, buzzwords. b) Explain about this keyword? How is it different from super keyword? c) What is meant by array? How declaration and assignment of arrays is done? (6M+4M+6M) 3. What is meant by multiple inheritance? Write a java program by using multiple inheritance for calculating total and average marks of 60 students present in a class. Consider four subjects and one laboratory for calculation. In addition to this consider the sports marks as bonus for the student who are under NSS. (16M) 4. a) Discuss about java.io package. b) By using packages, write a java program to find n value. C r (8M+8M) 5. a) What are the benefits of exception handling? b) Write a java program to handle divide by zero error and array out of bound error. (8M+8M) 6. a) What are different keyboard events? Write an applet for handling keyboard events? b) Explain about Event listeners. (8M+8M) 7. a) What is the difference between applet and application? b) Write an applet program to create a login form which asks for username and password. If the given username and password is correct it has to display message in the dialog box as valid user otherwise invalid user. (6M+10M) 8. Explain about the following a) Java.util package b) constructor c) Client Server program (6M+5M+5M) 1 of 1 |''|'||||''|''||'|'| Code No: X0322 R07 SET - 3 II B. Tech I Semester, Supplementary Examinations, Nov – 2012 OBJECT ORIENTED PROGRAMMING (Com. to ME, AME, MM) Time: 3 hours Max. Marks: 80 Answer any FIVE Questions All Questions carry Equal Marks ~~~~~~~~~~~~~~~~~~~~~~ 1. a) What is the difference between overloading and overriding? Give examples. b) What is recursion? Write a java program to find GCD using recursion (8M+8M) 2. a) Explain about overloading b) Write a java program to swap two variable values which are of type integer, float, char and string using overloading methods. (8M+8M) 3. a) Differentiate between super and final keywords b) Which type of inheritance is not there in java and how it will be compensated? Explain. c) What are the benefits of inheritance? Explain. (4M+8M+4M) 4. a) Differentiate between class and interface b) How interfaces will be implemented? c) Explain about the java.util package (4M+6M+6M) a) Explain about the thread life cycle b) Differentiate between throw and throws clauses c) What are the importance of try, catch and throw keywords? (6M+4M+6M) 5. 6. 7. 8. a) What is meant by event handling? b) What are different mouse events? Write an applet to handle mouse events a) How parameter passing is done in applets? b) Explain about the container’ of swing. Explain about the following i) Java.net package ii) Sockets iii) polymorphism (8M+8M) (5M+6M+5M) 1 of 1 |''|'||||''|''||'|'| (6M+10M) Code No: X0322 R07 SET - 4 II B. Tech I Semester, Supplementary Examinations, Nov – 2012 OBJECT ORIENTED PROGRAMMING (Com. to ME, AME, MM) Time: 3 hours Max. Marks: 80 Answer any FIVE Questions All Questions carry Equal Marks ~~~~~~~~~~~~~~~~~~~~~~ 1. a) What is meant by method binding? Explain. b) Write a java program to find whether the given number is strong number or not? (8M+8M) 2. a) Explain about the access control mechanism in Java. b) How string handling is done in Java? (8M+8M) a) What is meant by polymorphism? Explain with examples. b) Explain about multilevel inheritance with example. (8M+8M) 3. 4. 5. a) What is the importance of packages? b) How packages will be imported? c) Explain about CLASSPATH? (5M+6M+5M) a) How to synchronize threads? Explain with an example program b) Explain about built-in exceptions. 6. Explain about different layout managers in detail. 7. a) What are the limitations of AWT? b) Explain about checkboxes, radio buttons and combo boxes in Swings. 8. Explain about the following. a) Inet addresses b) Containers c) Sockets (16M) (6M+10M) (5M+6M+5M) 1 of 1 |''|'||||''|''||'|'| (8M+8M) Code No: X0425 R07 SET - 1 II B. Tech I Semester, Supplementary Examinations, Nov – 2012 ELECTRONIC CIRCUIT ANALYSIS (Electronics and Communications Engineering) Time: 3 hours Max. Marks: 80 Answer any FIVE Questions All Questions carry Equal Marks ~~~~~~~~~~~~~~~~~~~~~~~~ 1. a) Explain the small signal analysis of FET Amplifier in CD configuration and draw its characteristic curves. b) A single stage CE amplifier with Rs = 1KΩ, RE = 50 KΩ, R2 = 2KΩ, RC = 1KΩ, RL = 1.2KΩ, hfe = 50, hoe = hre = 0. hie = 1.1KΩ. Find Ai, Rin, Av, Ro, and power gain using approximate method of Analysis. (8M+8M) 2. a) Draw and perform the analysis of Boot-Strapped emitter follower multi-stage amplifier circuit. b) Three identical non-interacting amplifier stages are cascaded with an overall gain of 0.3dB down at 50 kHz compared to mid-band. Calculate the upper cutoff frequency of the individual stages. (8M+8M) 3. a) Discuss the concept of CE short circuit current gain with its hybrid-π equivalent circuit. b) Following measurements of a certain transistor are available at room temperature and with IC = 5 mA, hfe = 100, hie = 0.62 KΩ. Short circuit current gain = AIS = 10 at 10MHz. (8M+8M) Cb’c = 3pF. Calculate fT and fβ. 4. a) Derive the expression for maximum value of conversion efficiency of Class A transformer coupled power amplifier. b) A power transistor is to be used as a class A transformer coupled amplifier and is to deliver a maximum of 5W to a 4 ohm load. Operating point is adjusted for symmetrical clipping with collector supply voltage of 20V. Assume ideal characteristics with Vmin = 0V. Calculate. i) Transformer turns ratio. ii) Peak collector current iii) Operating point values of ICQ and VCEQ. iv) Power dissipation rating of transistor.v) Collector circuit efficiency. (8M+8M) a) Draw the circuit diagram of a Double-tuned amplifier and explain the different stages of simplification with its equivalent circuit. b) Draw and explain the circuit diagram of single tuned capacitive coupled amplifier and derive the expression for (A/Areso) . (8M+8M) 5. 6. a) Draw and explain the working of class-C tuned power amplifier. Derive the expression for its efficiency. b) Draw the circuit diagram for JFET tuned R.F. amplifier and explain its working. (8M+8M) 7. a) Draw and explain the circuit diagram of series type voltage regulator. b) Design and draw a voltage regulator circuit to give output voltage adjustable from 10V to 15V. Maximum output current is 100mA and input voltage is 20V. (8M+8M) 8. a) With suitable circuit diagram explain the working principle of IC 723 Voltage Regulator. b) IC 7824 regulator can deliver a maximum current of 700 mA. Design a circuit using same IC to deliver a current of 3 Amps. (8M+8M) 1 of 1 |''|'||||''|''||'|'| Code No: X0425 R07 SET - 2 II B. Tech I Semester, Supplementary Examinations, Nov – 2012 ELECTRONIC CIRCUIT ANALYSIS (Electronics and Communications Engineering) Time: 3 hours Max. Marks: 80 Answer any FIVE Questions All Questions carry Equal Marks ~~~~~~~~~~~~~~~~~~~~~~~~ 1. a) Perform the small Signal analysis of FET amplifier in CS configuration and explain its characteristics. b) The emitter follower circuit is with Rs = 1KΩ and RL = 5 KΩ, determine the AV, AI, Ri, Ro. using h-parameters, hfe = 75, hie = 1.1KΩ, hoe = 25 µA/v. (8M+8M) 2. a) Draw and explain the circuit diagram of differential amplifier with its equivalent circuit. b) Draw and analyze the circuit diagram of two-stage RC-Coupled amplifier. (8M+8M) 3. a) Discuss about Hybrid-π capacitances. How do Hybrid-π parameters vary with temperature? b) Following measurements of a certain transistor are available at room temperature and with IC = 5mA, VCE=10V, hfe = 100, hie = 600Ω. [Aie] = 10 at 10MHz. Cc = 3pF. Calculate fβ, fT, Ce,, rb’e and rbb’. (8M+8M) 4. a) Derive the expression for maximum value of conversion efficiency for Class B push pull power amplifier. b) Explain Class D and Class S power amplifiers. Mention their salient features and applications. (8M+8M) 5. a) Draw and explain the circuit diagram of double-tuned amplifier with its equivalent circuit. b) Perform the analysis of single-tuned FET amplifier with synchronous tuning. (8M+8M) 6. a) What is stagger tuning? How it is different from synchronous tuning? Derive an expression for the selectivity of a stagger tuned amplifier. b) Explain the principle and working of class-C tuned power amplifier. Derive the expression for its efficiency. (8M+8M) 7. a) Define performance parameters of voltage regulators and explain their significance. b) Design a Zener-shunt voltage regulator with VZ = 10V. Input supply voltage varies from 15V to 25V and the load current varies between 0 and 15 mA. Determine the line and load regulation. (8M+8M) 8. a) What are the limitations of linear voltage regulators? How are they overcome with switching regulators? b) Design a voltage regulator using IC 723 for 5 V output and 3A load current. Vin = 10V and VSC = 0.65V. (8M+8M) 1 of 1 |''|'||||''|''||'|'| Code No: X0425 R07 SET - 3 II B. Tech I Semester, Supplementary Examinations, Nov – 2012 ELECTRONIC CIRCUIT ANALYSIS (Electronics and Communications Engineering) Time: 3 hours Max. Marks: 80 Answer any FIVE Questions All Questions carry Equal Marks ~~~~~~~~~~~~~~~~~~~~~~~~ 1. a) Perform the small signal analysis of FET Amplifier in CG configuration and explain its characteristic curves. b) Consider a single stage CE amplifier with Rs = 750KΩ, RE = 40 KΩ, R2 = 2KΩ, Rc = 1KΩ, RL = 1.8KΩ, hfe = 50, hoe = hre = 0. hie = 1.1KΩ. Find Ai, Ro, Av and power gain using exact method of analysis. (8M+8M) 2. a) Draw and explain the circuit diagram of cascode-transistor amplifier. b) With suitable circuit diagram, explain the working of a RC Coupled amplifier and derive the expression for voltage gain. (8M+8M) 3. a) Derive the expression for short circuit current gain of an amplifier at high frequency and obtain the expression for fT. b) Following measurements of a certain transistor are available at room temperature and with IC = 10 A, hfe = 100, hie = 0.62 KΩ. Short circuit current gain = AIS = 10 at 5MHz. Cb’c = 3pF. Calculate fT and fβ. (8M+8M) 4. a) Deduce the expression which gives the relationship between maximum collector dissipation and maximum power output of class-B push pull amplifier. b) Ideal class – B transformer-coupled audio amplifier is fed from 20V DC. Transformer ratio Np is = 4 . A 4 ohm speaker is connected to load. Calculate: Ns i) Maximum signal power delivered to load. ii) Power dissipation rating to each transistor. iii) Maximum excitation current at input if transfer characteristic is linear. (hfe = 20) (8M+8M) 1 of 2 |''|'||||''|''||'|'| Code No: X0425 R07 SET - 3 5. a) Derive the expression for the gain of a single-tuned capacitance coupled amplifier. Discuss about its Selectivity. b) A single-tuned class A transformer-coupled RF amplifier has the following parameters: Transconductance, gm of the transistor = 5mA/V Primary inductance = 100 µH Secondary inductance = 50 µH Coefficient of coupling = 0.01 Primary resistance = 10 Ω Secondary resistance = 8 Ω The primary is tuned with a 100 pF capacitor and the secondary is loaded by a 10KΩ resistance. Find: The resonant frequency The effective Q of the tuned circuit The 3 dB bandwidth Assume ro of the transistor to be very large. (8M+8M) 6. Draw the circuit diagram of single tuned direct-coupled RF amplifier and explain its operation with its equivalent circuit. Also derive the following expressions for the same circuit. i) Voltage gain at resonance ii) Voltage gain at frequencies other than resonance and iii) Bandwidth (16M) 7. a) Draw the circuit and explain how short circuit over load protection is provided in voltage regulators circuits. b) A series regulator has stability factor of 6×10-3 and output resistance of 10-4 ohms. Calculate the change in output voltage when i) Unregulated input d.c voltage varies by 10V ii) Load current varies by 250mA. (8M+8M) 8. a) Explain the principle of operation of switching regulators and also mention the various types of them. b) Design a voltage regulator using IC 723 to provide an output voltage of 5 volts at 1.5A. Fold back current limiting is to be provided so that knee current is 1.6 Amps, short circuit current is 300mA and input voltage is 13 volts. (8M+8M) 2 of 2 |''|'||||''|''||'|'| Code No: X0425 R07 SET - 4 II B. Tech I Semester, Supplementary Examinations, Nov – 2012 ELECTRONIC CIRCUIT ANALYSIS (Electronics and Communications Engineering) Time: 3 hours Max. Marks: 80 Answer any FIVE Questions All Questions carry Equal Marks ~~~~~~~~~~~~~~~~~~~~~~~~ 1. a) Perform the Small Signal Analysis of CC Amplifier and explain the characteristics with the relevant graphs. b) With the help of necessary equations, discuss the variations of Av, AI, Ri, Ro, Ap with RS and RL in common Emitter configuration. (8M+8M) 2. a) Draw the circuit diagram for Darlington pair amplifier and derive the expressions for AI, Av, Ri and Ro. b) Design a two-stage CE-CE amplifier for the given data. hfe1=hfe2=180, RL=1KΩ IE1=IE2=1mA, S=3, VCC=12V, f=100Hz. Assume identical transistors. (8M+8M) 3. a) Draw the equivalent circuit of hybrid-π model and derive the expressions for Hybrid-π impedances in terms of low frequency h-parameters. b) The following low-frequency parameters are available for a transistor at ICQ = 5 mA hie = 1K, hfe = 100 hoe = 4 x 10-5 A/V hre = 10-4 Cob = 2 pF fT = 10 MHz (8M+8M) Compute the values of hybrid-π parameters at room temperature. 4. a) Show that class B push pull amplifiers exhibit half wave symmetry. b) A power transistor is to be used as a class A transformer coupled amplifier and is to deliver a maximum of 10W to a 4 ohm load. Operating point is adjusted for symmetrical clipping with collector supply voltage of 15V. Assume ideal characteristics with Vmin = 0V. Calculate. Transformer turns ratio. Peak collector current Operating point values of ICQ and VCEQ. Power dissipation rating of transistor. Collector circuit efficiency. (8M+8M) 1 of 2 |''|'||||''|''||'|'| Code No: X0425 R07 SET - 4 5. a) Derive the expression for the gain of a Single-tuned inductively coupled amplifier. Discuss about its bandwidth. b) A parallel resonant circuit comprises of an inductor (having inductance of 1mH and resistance of 10Ω) and a parallel capacitor of 100 pF. Calculate: Resonant frequency, ignoring the resistance. Resonant frequency, considering the resistance. Q-factor. Impedance at resonant frequency. (8M+8M) 6. a) What is stagger tuning? How it is different from synchronous tuning? Derive an expression for the selectivity of a stagger tuned amplifier. b) Write notes on wide band tuned amplifiers. (8M+8M) 7. a) Define the terms: i) Load Regulation ii) Line Regulation iii) Ripple Rejection and iv) Temperature Stability pertaining to voltage regulator ICs. b) A shunt regulator utilizes a Zener diode whose voltage is 5.1 V at 50 mA and whose rz = 7Ω. The diode is fed from a 15V DC supply through a 200 Ω resistor. What is the output voltage at no load? Find the line and load regulations. (8M+8M) 8. a) Draw the circuit for 7805 Voltage Regulator IC and explain its working. b) Design a voltage regulator using IC 723 for 5 V output and 3A load current. Vin = 10V, VSC = 0.65V. (8M+8M) 2 of 2 |''|'||||''|''||'|'| Set No. 1 Code No: X0524/R07 II B.Tech I Semester Supplementary Examinations, November 2012 DIGITAL LOGIC DESIGN ( Common to Computer Science & Engineering, Information Technology and Computer Science & Systems Engineering) Time: 3 hours Max Marks: 80 Answer any FIVE Questions All Questions carry equal marks ????? 1. Convert the following to Decimal and then to Octal. (a) 123416 (b) 12EF 16 (c) 101100112 (d) 100011112 (e) 35210 (f) 99910 [3+3+3+3+2+2] 2. (a) Write short notes about the various digital logic families. (b) Obtain the complement of the following Boolean expressions. i. AB + A(B + C) + B’(B + D) ii. A + B + A’B’C. (c) Obtain the dual of the following Boolean expressions. i. A’B + A’BC’ + A’BCD + A’BC’D’E ii. ABEF + ABE’F’ + A’B’EF. [8+4+4] 3. (a) Draw the multiple level NOR circuit for the following expression: A (B + C + D) + BCD (b) Simplify the following functions and implement two level NOR gates: [8+8] i. f (A, B, C, D) = Σ0, 2, 4, 6, 8, 9, 10, 11, 12 ii. F (w, x, y, z) = Σ5, 6, 9, 11 4. (a) If F1 (A, B, C, D) = Σ (1, 3, 4, 5, 9, 10, 11) + d (6, 8) and F2 (A, B, C, D) = Π (1, 3, 5, 6, 10, 11, 13, 14) + d (9, 12) Design a minimal SOP logical circuit for F3 (A, B, C, D) = F1 ⊕ F2 Draw the circuit using NOR- gates. (b) Design a Code converter circuit to convert 9’s complement code to BCD code using Full-adders and additional gates. (Use block diagram of Full adders). [8+8] 5. A sequential circuit with 3 D-flip-flops A, B and C has only one input ‘X’ and one output ‘X’ with following relationship DA = B ⊕ C ⊕ X, DB = A, DC = B |''|'||||''|''||'|'| 1 of 2 Set No. 1 Code No: X0524/R07 (a) Draw the logic diagram of the circuit. (b) Obtain logic diagram, state table and state diagram. [16] 6. (a) What is the maximum frequency required for a 10-bit ripple counter and synchronous counter, if the propagation delay of the flip flop is 10ns. (b) Design a clocked sequential circuit to detect 1111 or 0000. Overlapping is allowed. Draw the circuit using flip flops. [6+10] 7. (a) Give the HDL code for a memory read , write operations if the memory size is 64 words of 4 bits each. Also explain the code (b) Obtain the 15-bit Hamming code for the 11-bit data word 11001001010. [8+8] 8. (a) Explain critical and non critical races with the help of examples. (b) An asynchronous sequential circuit has two internal states and one output. The excitation and output functions describing the functions are: [6+10] Y1 = x1 x2 + x1 y20 + x02 y1 Y2 = x2 + x1 y10 y2 +x01 y1 Z = x2 + y 1 i. Draw the logic diagram of the circuit. ii. Derive the transition table and output map. iii. Obtain a flow table for the circuit. ????? |''|'||||''|''||'|'| 2 of 2 Set No. 2 Code No: X0524/R07 II B.Tech I Semester Supplementary Examinations, November 2012 DIGITAL LOGIC DESIGN ( Common to Computer Science & Engineering, Information Technology and Computer Science & Systems Engineering) Time: 3 hours Max Marks: 80 Answer any FIVE Questions All Questions carry equal marks ????? 1. (a) Explain different methods used to represent negative numbers in binary system. [6] (b) Perform the subtraction with the following unsigned binary numbers by taking the 2’s complement of the subtrahend. [5×2] i. ii. iii. iv. v. 11010 - 10010 11011-1101 100-110000 1010100-1010100 11-1011. 2. (a) Reduce the following Boolean Expressions. i. ii. iii. iv. AB + A(B + C) + B’(B + D) A +B + A’B’C A’B + A’BC’ + A’BCD + A’BC’D’E ABEF + AB(EF)’ + (AB)’EF. (b) Obtain the Dual of the following Boolean expressions. i. ii. iii. iv. x’yz’+ x’yz’ + xy’z’ + xy’z x’yz + xy’z’ + xyz + xyz’ x’z + x’y + xy’z + yz x’y’z’ + x’yz’ + xy’z’ + xy’z + xyz’. [8+8] 3. (a) Construct K-map for the following expression and obtain minimal SOP expression. Implement the function with 2-level form. NAND -NAND f (A, B, C, D) = (A + C + D) A + B + D A + B + C A + B + D A + B + D (b) Implement the following Boolean function F using the two - level form: i. NAND-AND ii. AND-NOR F (A, B, C, D) = Σ0, 1, 2, 3, 4, 8, 9, 12 [8+8] 4. (a) Using five lower - order demultiplexer, construct 6 to 64 line demultiplexer circuit. Use only block diagrams. (b) Design a Combinational logic circuit with three inputs A, B, C and three outputs x, y, z. If the binary input is 0, 1, 2, or 3, the binary output is one greater than the input. When the binary input is 4, 5, 6, or 7, the binary output is one less than the input. Draw the circuit using three-2 input AND gates, one 3 input OR gate, one 3 input X - OR gate and one inverter. [4+12] |''|'||||''|''||'|'| 1 of 2 Set No. 2 Code No: X0524/R07 5. (a) Draw the circuit diagram of clocked D- flip-flop with NAND gates and explain its operation using truth table. Give its timing diagram. (b) Explain the procedure for the design of sequential circuits with example. [8+8] 6. A counter is to be designed to count either in 5421 code or 8421 code based on a control signal input. Draw the state diagram for such a counter and synthesize it using T flip flops. Assume that the control signal cannot change in the middle of a counting sequence. [16] 7. (a) What is parity checking? Explain its necessity and how is it implemented? (b) If the Hamming code sequence 1100110 is transmitted & due to error in one position, is received as 1110110, locate the position of the error bit using parity checks and give the method for obtaining the correct sequence. [8+8] 8. (a) Describe the operation of the SR Latch using NAND gate with the help of truth table, transition table and the circuit. (b) An asynchronous sequential circuit has two internal states and one output. The excitation and output functions describing the functions are: Y1 = x1 x2 + x1 y20 + x02 y1 Y2 = x2 + x1 y10 y2 +x01 y1 z= x2 + y1 Implement the circuit defined above with NAND SR latches. [8+8] ????? |''|'||||''|''||'|'| 2 of 2 Set No. 3 Code No: X0524/R07 II B.Tech I Semester Supplementary Examinations, November 2012 DIGITAL LOGIC DESIGN ( Common to Computer Science & Engineering, Information Technology and Computer Science & Systems Engineering) Time: 3 hours Max Marks: 80 Answer any FIVE Questions All Questions carry equal marks ????? 1. (a) Explain, How error occurred in a data transmission can be detected using parity bit. [6] (b) Perform the subtraction with the following unsigned binary numbers by taking the 2’s complement of the subtrahend. [5×2] i. ii. iii. iv. v. 111011 - 111000 1110-110110 10010-1101 110-10100 11011-10000. 2. (a) Explain in detail, the various levels of integration in ICs. (b) Obtain the Dual of the following Boolean expressions. i. AB + A(B + C) + B’(B + D) ii. A + B + A’B’C. (c) Obtain the complement of the following Boolean expressions. [8+4+4] i. A’B + A’BC’ + A’BCD + A’BC’D’E ii. ABEF + ABE’F’ + A’B’EF. 3. (a) Implement the following Boolean expression with Excusive-NOR and NOR gates: F = ABCD + ABCD + AB CD + ABCD (b) If F1 = wxy+y z+wyz+xyz And F2 = (w + x + y + z) (x + y + z) (w + y + z) Obtain minterms list of F1 • F2 using K-map obtain minimal SOP function of F1 • F2 . [8+8] 4. (a) A multiple output combinational logic circuit is defined by the following functions. Draw the schematic circuits for F1 and F2 . F1 (A, B, C, D) = A • AD • A + BC F2 (A, B, C, D) = AD • A + BC Using K-Maps simplify F1 and F2 and draw the reduced diagram circuit. (b) Design a full - subtractor circuit with three inputs x,y,z and outputs D, B. The circuit subtracts X - Y - Z where Z is the input borrow, B is the output borrow and D is the difference draw the circuit using NAND gates. [8+8] |''|'||||''|''||'|'| 1 of 2 Set No. 3 Code No: X0524/R07 5. (a) Define the following terms related to filp-flops. i. ii. iii. iv. v. set-up time hold time propagation delay preset and clear. (b) Distinguish between combinational logic and sequential logic. [10+6] 6. Design a circuit with three 4-bit registers A,B and C to perform the following operations. (a) Transfer two binary numbers to A and B when a start signal is enabled, (b) If A <B, shift left the contents of A and transfer the result to register C. (c) If A >B, shift right the contents of B and transfer the result to register C. (d) If A=B, transfer the number to register C unchanged. Explain the procedure. [16] 7. (a) What is parity checking? Explain its necessity and how is it implemented? (b) How many parity check bits must be included with the data word to achieve single error-connection and double-error detection when the data contains i. 16 bits ii. 32 bits iii. 48 bits. [8+8] 8. (a) Describe the operation of the SR Latch using NAND gate with the help of truth table, transition table and the circuit. (b) Explain the operation and use of De bounce circuit. ????? |''|'||||''|''||'|'| 2 of 2 [8+8] Set No. 4 Code No: X0524/R07 II B.Tech I Semester Supplementary Examinations, November 2012 DIGITAL LOGIC DESIGN ( Common to Computer Science & Engineering, Information Technology and Computer Science & Systems Engineering) Time: 3 hours Max Marks: 80 Answer any FIVE Questions All Questions carry equal marks ????? 1. (a) Generate Hamming code for the given 11 bit message 11001001100 and rewrite the entire message with Hamming code. (b) The binary numbers listed have a sign bit in the left most position and , if negative numbers are in 1’s complement form. Perform the arithmetic operations indicated and verify the answers. [8+8] i. ii. iii. iv. 101011 001111 111001 101111 + 111001 + 110010 - 011010 - 100110. 2. (a) Express the following functions in sum of minterms and product of maxterms. i. F (A,B,C,D) = B’D + A’D + BD ii. F(x,y,z) = (xy + z)(xz + y). (b) Obtain the complement of the following Boolean expressions. i. ii. iii. iv. (AB’ + AC’)(BC + BC’)(ABC) AB’C + A’BC + ABC (ABC)’(A + B + C)’ A + B’C (A + B + C’). [8+8] 3. (a) With the use of map obtain minimal SOP expression for the function F3 = F1 • F2 Where F1 and F2 are shown below: F1 = ABC + CD + ACD + BCD F2 = A + B + C + D B + C + D A + C + D (b) Use K - map to obtain minimal SOP expression for the function given below and draw the circuit using NOR - gates. F (A, B, C, D) = ABC + ABC + ABC + A BC + CD + AB + ABCD 4. (a) Design a code converter to convert 8421 code to excess - 3 code. Consider all invalid combinations, as don’t cares. Draw the circuit using only NAND gates. (b) A Boolean function is defined as follows. Draw schematic circuit for the given function F. Using K-map obtain its minimal SOP expression and draw the reduced diagram.F = A + BC + AB ⊕ D [8+8] |''|'||||''|''||'|'| 1 of 2 Set No. 4 Code No: X0524/R07 5. (a) Explain the following terms related to filp-flops. i. race round conditions ii. propagation delay iii. clock. (b) Explain the operation of R-S flip-flop with negative edge triggering with neat sketch. And explain its truth table. [8+8] 6. Draw the sequential circuit for serial adder using shift registers, full adder and D-FF. Explain its operation with state equations and state table . [16] 7. (a) Give the HDL code for a memory read, write operations if the memory size is 64 words of 4 bits each. Also explain the code. (b) A 16K * 4 memory uses coincident decoding by splitting the internal decoder into X-selection and Y-selection. [8+8] i. What is the size of each decoder and how many AND gates are required for decoding the address? ii. Determine the X and Y selection lines that are enabled when the input address is the binary equivalent of 6,000. 8. (a) Describe the analysis procedure of asynchronous sequential logic using flow table. (b) Obtain a primitive flow table for a circuit with two inputs, x1 and x2 and two outputs z1 and z2 , which satisfy the following four conditions: i. ii. iii. iv. When x1 x2 = 00, the output z1 z2 = 00 When x1 = 1 and x2 changes from 0 to 1, the output is z1 z2 = 01 When x2 = 1 and x1 changes from 0 to 1, the output is z1 z2 = 10. Otherwise, the output does not change. [6+10] ????? |''|'||||''|''||'|'| 2 of 2