Electric Power Systems Research 81 (2011) 1132–1143
Contents lists available at ScienceDirect
Electric Power Systems Research
journal homepage: www.elsevier.com/locate/epsr
A four-leg unified series–parallel active filter system for periodic
and non-periodic disturbance compensation
Mehmet Ucar, Sule Ozdemir, Engin Ozdemir ∗
Department of Electrical Education, Technical Education Faculty, Kocaeli University, Umuttepe Kampus, Izmit 41380, Kocaeli, Turkey
a r t i c l e
i n f o
Article history:
Received 10 August 2010
Received in revised form 3 December 2010
Accepted 4 January 2011
Available online 22 January 2011
Keywords:
Active filter
Four-leg voltage source inverter
Harmonics
Non-periodic
Sub-harmonic
Unbalance
a b s t r a c t
This paper presents a three-phase four-leg (3P4L) unified series–parallel active filter (USPAF) system,
compensating for both periodic and non-periodic disturbances using a generalized non-active power
theory (GNAP) based control strategy. The 3P4L USPAF system is realized by the integration of series and
parallel active filters (AFs), composed of the two 3P4L voltage source inverters (VSIs) sharing a common
dc-link capacitor. The GNAP theory was implemented previously in the parallel AF. In this study, the
theory is proposed for the 3P4L USPAF system to compensate non-sinusoidal periodic and non-periodic
currents and voltages. Distorted source voltages and unbalanced non-linear load currents compensation
were verified simultaneously through the 3P4L USPAF system experimental prototype. Sub-harmonic
and stochastic non-periodic current/voltage compensations were analyzed through simulations with
Matlab/Simulink software. The simulation and experimental results showed that the theory proposed
for the 3P4L USPAF system was applicable to non-active power compensation in three-phase four-wire
(3P4W) systems under periodic and non-periodic disturbances.
© 2011 Elsevier B.V. All rights reserved.
1. Introduction
In recent years, the increasing use of power electronic devices
and unbalanced/non-linear loads has led to the generation of nonsinusoidal periodic and non-periodic current/voltage disturbances
in electrical power systems. Generally, power electronic converters
generate harmonic components with frequencies that are integer
multiplies of the line frequency. However, in some cases, such as
line commutated three-phase thyristor based rectifiers, arc furnaces and welding machines are typical loads, the line currents
may contain both frequency lower than the line frequency (subharmonic) and frequency higher than the line frequency (stochastic
non-periodic, the wave-shape and amplitude are constantly changing) components but not integer multiple of the line frequency
[1–5]. These waveforms are considered as non-periodic, although
mathematically the currents may still have a periodic waveform,
but in any event, the period of the currents is not equal to the period
of the line voltage [1,2]. The non-periodic components can occur as
well in the source voltage. The effects of non-periodic components
of current and voltage are similar to that caused by harmonics.
They may contribute power loss, disturbances, measurement errors
and control malfunctions, thus degradation of the power quality in
distribution systems [2].
∗ Corresponding author. Tel.: +90 262 3032248; fax: +90 262 3032203.
E-mail addresses: eozdemir@kocaeli.edu.tr, eozdemir@hotmail.com
(E. Ozdemir).
0378-7796/$ – see front matter © 2011 Elsevier B.V. All rights reserved.
doi:10.1016/j.epsr.2011.01.001
Unified series–parallel active filter (USPAF) systems have been
widely studied to compensate the disturbances of source voltage
and load current simultaneously. The USPAF system consists of a
series active filter (AF) and a parallel AF combined with a common dc-link. The parallel AF compensates the current disturbances
and regulates the dc-link voltage, while the series AF compensates
the voltage disturbances [6–9]. Fig. 1 shows the general power circuit configuration of the USPAF system. The USPAF structures are
used in the literature such as two three-phase three-leg (3P3L)
voltage source inverter (VSI) with split capacitor [7,10–14], a 3P3L
VSI for the series AF and a three-phase four-leg (3P4L) VSI for
the parallel AF [15,16] and two 3P4L VSI topology [17] for solving power quality disturbances at the point of common coupling
(PCC).
The conventional 3P3L VSI with split capacitor topology has a
neutral line directly connected to the midpoint of the dc-link. This
topology has been widely used in the USPAF systems due to its
simplicity to compensate the zero-sequence components in the
three-phase four-wire (3P4W) power system. However, this topology needs two capacitors and an extra control loop to maintain a
zero voltage error difference between both the capacitor voltages,
resulting in a more complex control loop to maintain the dc-link
voltage at constant level [16]. In addition, it has poor dc-link voltage utilization performance and requires the dc-link voltage to be
maintained to be at least twice as large as the peak value of the
inverter nominal output voltage [17]. Furthermore, due to the ripple voltage of the dc-link caused by harmonic power resulting from
the negative and zero-sequence currents, the capacitance of the dc-
M. Ucar et al. / Electric Power Systems Research 81 (2011) 1132–1143
vector i(t) in an m-phase system,
Other
non-linear loads
3∼
LS
vS
iS
Source
PCC
LL
+ vSF –
N1/N2
RSF CSF
iPF
v(t) = [v1 (t), v2 (t), . . . , vm (t)]T ,
vL
i L LL
T
i(t) = [i1 (t), i2 (t), . . . , im (t)] .
CPF RPF
Non-linear loads
LPF
LSF
Sensitive
loads
Cdc
m
USPAF system
Parallel AF
P(t) =
Fig. 1. General power circuit configuration of the USPAF system.
link should be large enough to satisfy the permitted ripple current
specification of the dc-link capacitor [18].
In this paper, two 3P4L VSI based USPAF system is proposed.
The 3P4L VSI topology uses an additional leg to control the zerosequence component compared to the conventional 3P3L VSI with
split capacitor topology. The zero-sequence component is circulated in the system via the fourth leg, the dc-link voltage oscillations
can be made small [18]. Therefore, smaller dc-link capacitor than
those of the conventional topology is required and the dc-link
capacitor voltage balancing algorithm is not necessary. The dc-link
voltage utilization performance of the 3P4L topology is better and
to obtain a specific output voltage, a lower dc-link voltage than
the conventional topology suffices [17,19]. This also provides an
advantage for combined operation of the proposed 3P4L USPAF system and distributed generation system such as photovoltaic arrays
and wind turbines, which is connected to the dc-link, due to compensate voltage interruption, as well as voltage sag, voltage swell,
harmonics and reactive power.
In the previous studies, the control algorithms for current and
voltage compensators were often based on the assumption that the
load currents and the source voltages were periodic. The USPAF
systems have been applied to the compensation of voltage fluctuations related non-periodic waveform in recent years [6,10,20–22].
Different non-active power theories in the time domain have been
discussed in [23]. The generalized non-active power (GNAP) theory
was applied for the compensation of the periodic and non-periodic
load current with the parallel AF [24–26], the static synchronous
compensator (STATCOM) [27] and voltage and current unbalance
compensation using an active filter [28]. The theory does not specify
the characteristics of the voltage and current, they can theoretically
be any waveshape. The main objective of this paper is to compensate the non-sinusoidal periodic and non-periodic current/voltage
disturbances using the 3P4L USPAF system based on the GNAP theory. The simulation and experimental results show that the 3P4L
USPAF system using the proposed theory can regulate the load
voltage, compensating the source voltage harmonics and the nonperiodic voltage components while simultaneously eliminating the
load current harmonics, unbalance and non-periodic current components.
2. Generalized non-active power theory
The instantaneous non-active power theory was first presented
by Fryze [29] for periodic (but non-sinusoidal) waveforms in the
time domain. The GNAP theory [25] implemented on the 3P4L
USPAF system is based on Fryze’s idea of non-active power and
an extension of the theory proposed in [30] for periodic and nonperiodic waveforms in the time domain. In this paper, all vectors are
denoted by lower case bold letters. Voltage vector v(t) and current
(1)
(2)
The instantaneous power p(t) and the average power P(t), is
defined as the average value of the instantaneous power p(t) over
the averaging interval [t − Tc , t], that are:
p(t) = vT (t)i(t) =
Vdc
Series AF
1133
1
Tc
vk (t)ik (t),
(3)
k=1
t
p()d.
(4)
t−Tc
In Eq. (4), the averaging time interval Tc can be chosen manually for different cases such as a periodic system with harmonics, a
periodic system with sub-harmonics, and a non-periodic system. A
specific value of Tc can be chosen to fit the application or to achieve
an optimal result for each case. The instantaneous active current
ia (t) and the instantaneous non-active current in (t) are given in
Eqs. (5) and (6) respectively.
ia (t) =
P(t)
vp (t)
(5)
in (t) = i(t) − ia (t)
(6)
Vp2 (t)
In Eq. (5), voltage vp (t) is the reference voltage which is chosen
on the basis of the characteristics of the system and the desired
compensation results. Vp (t) is the corresponding rms value of the
reference voltage vp (t), that is:
1
Tc
Vp (t) =
t
vTp ()vp ()d.
(7)
t−Tc
The instantaneous active power pa (t) and the instantaneous
non-active power pn (t) are defined by following equations,
pa (t) = vT (t)ia (t) =
m
vk (t)iak (t),
(8)
k=1
pn (t) = vT (t)in (t) =
m
vk (t)ink (t).
(9)
k=1
The average active power Pa (t) and average non-active power
Pn (t) are defined by averaging the instantaneous powers over time
interval [t − Tc , t], that are:
Pa (t) =
Pn (t) =
1
Tc
1
Tc
t
pa ()d,
(10)
pn ()d.
(11)
t−Tc
t
t−Tc
The rms values of the system voltage, the active current ia (t),
the non-active current in (t) and the current i(t) are given in [25].
The apparent power S(t), the apparent active power Pp (t), and the
apparent non-active power Q(t) are also defined based on the rms
values of the voltage and currents. In the GNAP theory, the standard definitions for an ideal three-phase sinusoidal power system
use the fundamental period T to define the rms values, the average
active power and the non-active power. The averaging interval Tc
does not change the compensation results as long as it is an integral
multiple of T/2, where T is the fundamental period of the system,
if there are only harmonics in the load current in the periodic
disturbances conditions. The non-active current is completely compensated and purely sinusoidal source current with unity power
1134
M. Ucar et al. / Electric Power Systems Research 81 (2011) 1132–1143
Table 1
Tc selections for different compensation objectives [25].
Compensation objective
vp
Tc
Resulting active current ia (t)
Single-phase or polyphase reactive current
Single-phase or polyphase reactive current and harmonic current
Instantaneous reactive power for polyphase system
Non-periodic disturbance current
Sub-harmonic current
Stochastic non-periodic current
v
vf
v
vf
vf
vf
T/2 or T
T/2 or T
Tc → 0
n(T/2)
nT
nT
Unity power factor and sinusoidal for sinusoidal vS
Sinusoidal regardless of vS distortion
Instantaneously unity power factor for polyphase system
Reduced amplitude and near sine wave with unity power factor
Pure sine wave or smoothed sine wave with unity power factor
Smoothed sine wave with near power factor
factor is achieved. However, in other cases, if the disturbance is
non-periodic such as a three-phase load with sub-harmonics, or a
non-periodic load, Tc has significant influence on the compensation
results, and the power and energy storage rating of the compensator’s components [27]. The Tc selection procedure is explained in
Sections 4.2 and 4.3 under these conditions.
The choice of the time averaging interval Tc is also significant
in the energy storage design consideration of the 3P4L USPAF system. Choosing a longer Tc results in a smoother source current with
smaller amplitude; however, this requires that the compensator
current increase as well as the energy storage requirement of the
compensator. If Tc is large enough, increasing Tc further will not
typically improve the compensation results significantly. Generally, there is no need to increase Tc to a larger value as the small
decrease in total harmonic distortion (THD) is often not worth the
larger capital costs (higher ratings of the compensator components
and therefore higher capital expenses) [25]. This depends on the
frequency of the non-periodic or periodic signal. Tc is identified
as an offline process based on the specific application as given in
Table 1. Also, vp (t) can be source voltage vS (t) itself or vf (t), which
is the fundamental component of vS (t), as shown in Table 1.
3. Control of the 3P4L USPAF system
3.1. Series AF control strategy
The series AF, which uses 3P4L VSI, control block diagram is
shown in Fig. 2. In this control strategy, the positive sequence
detector generates auxiliary control signals (ia1+ , ib1+ , ic1+ ) used as
a reference current ip (t) for the GNAP theory.
Block diagram of the positive sequence detector is shown in
Fig. 3. The fundamental frequency ω1 (250) is used in a sine
wave generator to produce sin(ω1 t) and cos(ω1 t) signals at unity
magnitude. The source voltages (vSa , vSb , vSc ) are input of the
positive-sequence detector. These voltages are transformed into
the synchronous dq reference frame by using Eq. (12) with the
reference frame rotating at the fundamental frequency ω1 .
dq
vSdq = Tabc
vSabc ,
Positive
sequence i1+
detector
1
(Fig. 3)
2
3
dq
Tabc =
sin(ω1 t)
cos(ω1 t)
sin(ω1 t
− 120◦ )
sin(ω1 t
cos(ω1 t
− 120◦ )
cos(ω1 t + 120◦ )
v̄d,q =
1
Tc
V
Vam
(19)
X
÷
vS1+ −+ v*SF
∑
2
X
Carrier-based
PWM
voltage
controller
(Fig. 5)
vSF
Fig. 2. The series AF control block diagram.
QSF
vc
t
vd,q dt
(14)
t−Tc
abc
vabc1+ = Tdq
v̄d,q ;
dq −1
abc
(Tdq
= Tabc
)
(15)
As shown in Fig. 3, the v1+ (t) is divided by its amplitude Vdqm
using Eq. (16) and the output signals of the positive-sequence
detector (ia1+ , ib1+ , ic1+ ), have unity amplitude and in phase with
the fundamental positive-sequence component of the source voltages (vSa1+ , vSb1+ , vSc1+ ) are obtained. Also, effective value of this
reference current ip (t) is given in Eq. (17).
Vdqm =
Ip (t) =
v̄2d + v̄2q
1
Tc
t
(16)
iTp ()ip ()d
(17)
t−Tc
The average power is calculated given Eq. (4) by using the reference currents and the source voltages. The sinusoidal load voltage
va (t) is derived by using Eq. (18) [31]. Fig. 4 shows block diagram of the sinusoidal load voltage calculation which is applied
to the series AF control. As clearly shown in Fig. 2, the va (t) is
divided by its amplitude Vam using Eq. (19) and multiplied the
desired load voltage magnitude VLm* for converting the va (t) to
the desired load voltage vS1+ . Then, the compensation reference
voltages (v∗SFa , v∗SFb ,v∗SFc ) of the series AF are derived by Eq. (20).
va (t) =
P(t)
Ip2 (t)
ip (t)
(18)
Vdqm (16)
vS
Sinusoidal
load
va
voltage
calculation
(18) (Fig. 4)
⎡ ⎤
va
⎢ ⎥
⎣ vb ⎦
By this transform, fundamental positive sequence component,
which is transformed into dc quantities in d and q axes, can be
extracted by Eq. (14) and then transformed back into the abc reference frame using Eq. (15).
(12)
*
Lm
+ 120◦ )
(13)
The proposed 3P4L USPAF system is realized with two four-leg
VSIs with a dc-link capacitor and the GNAP theory based voltage and
current control strategies. This theory, used at first for the parallel
AF, is now proposed for the 3P4L USPAF system.
vS
where the transformation matrix is shown in Eq. (13).
dq
Tabc
(13)
vd
vq
vd (14)
abc
Tdq
vq (14)
(15)
÷
v1+
Sine generator
[sin(ω1t) cos(ω1t)]
Fig. 3. Block diagram of the positive sequence detector.
X
i1+
M. Ucar et al. / Electric Power Systems Research 81 (2011) 1132–1143
vS
1/s
i1+
∑
+
1/Tc P
ip
1
∑
+
Sinusoidal
source
ia
current
calculation
(5)
−
Tc delay
1/s
iL
X
1/Tc
I p2
÷
va
vS1+
v∗no =
−
vmin
(20)
vmin > 0
v
,
<0
(21)
where
v∗min
=
min(v∗an , v∗bn , v∗cn ),
(22)
=
max (v∗an ,
(23)
v∗max
and
ica (t) =
are defined as following,
v∗bn ,
v∗cn ).
v∗xo = v∗xn + v∗no ,
QPF
(24)
where x = a, b, c. Finally, the series AF switching signals QSF are generated by comparing the modulation signals with triangular carrier
wave.
3.2. Parallel AF control strategy
The parallel AF, which uses 3P4L VSI, control block diagram is
shown in Fig. 6.
PI
∑
+
Vdc*
dc voltage
control
The average power is calculated given Eq. (4) by using load
currents and fundamental positive sequence source voltages
(vSa1+ , vSb1+ , vSc1+ ) over the averaging interval [t − Tc , t]. Desired
sinusoidal source currents (iSa1+ , iSb1+ , iSc1+ ) are derived by using Eq.
(5) and similar block diagram as shown in Fig. 4. The instantaneous
non-active current in (t) is calculated as in Eq. (6). An additional
active current ica (t) also required to meet the losses in Eq. (25) is
drawn from the source by regulating the dc-link voltage vdc to the
∗ . The PI controller is used to regulate the dcreference voltage Vdc
link voltage vdc as shown in Fig. 6. The error between the actual dc
voltage and its reference value is treated in the PI controller and the
output is multiplied by a sinusoidal fundamental template of unity
amplitude for each phase of the three phases. The compensation
∗ , i∗ , i∗ ) of the parallel AF are obtained by
reference currents (iPFa
PFb PFc
Eq. (26). The reference neutral current is obtained in terms of phase
currents with Eq. (27). The reference currents are compared the parallel AF currents and applied to hysteresis current controller. Thus,
the parallel AF switching signals QPF are obtained.
2
v∗min
v∗max
ica
Hysteresis
current
controller
Fig. 6. The parallel AF control block diagram.
(19)
max
2
⎪
⎪
⎪
∗
∗
⎪
⎩ − vmax + vmin , otherwise
i*PFn
−
X
vdc
The obtained reference voltages compared with the series AF
voltages in a simple carrier-based PWM controller, shown in Fig. 5,
the voltage references (v∗an , v∗bn , v∗cn ) are generated for the three
phases, all with respect to “n” the center point of the fourth leg.
In addition, voltage feed-forward (with a Kv gain) is added to the
controller for the purpose of good reference tracking. The fourth leg
reference voltage v∗no is defined by Eq. (21) to achieve the optimum
switching sequence using an offset voltage concept [32]. Then, all
the inverter phase output terminal reference voltages (v∗ao , v∗bo , v∗co )
with respect to the virtual dc-link midpoint of the split capacitor
(“o” point) are defined in Eq. (24).
⎧ v∗
⎪
− max ,
⎪
⎪
2
⎪
⎨ ∗
i*PF
∑
+
iPF iPFn
v∗SF (t) = vS (t) − vS1+ (t)
∑
1/Vm
−
v2aa + v2ab + v2ac
in
+
X
−
Fig. 4. Block diagram of the sinusoidal load voltage calculation.
2
3
−
2
Tc delay
Vam =
1135
vS1+
Vm
∗
KP (Vdc
− vdc ) + KI
0
t
∗
(Vdc
− vdc ) dt
(25)
i∗PF (t) = in (t) − ica (t)
(26)
∗
iPFn
(27)
=
∗
−(iPFa
∗
+ iPFb
∗
+ iPFc
)
4. Simulation and experimental results
The proposed 3P4L USPAF system prototype is designed and
developed in laboratory to validate the GNAP theory. A three-phase
delta-star (-Y) step-down transformer rated at 380/110 V and
25 kVA is used to provide a 3P4W experimental system voltages. In
this system, the line-to-neutral voltage is 110 V and the frequency
Fig. 5. Carrier-based PWM scheme for the series AF.
1136
M. Ucar et al. / Electric Power Systems Research 81 (2011) 1132–1143
Fig. 7. Power circuit block diagram of the 3P4L USPAF system implementation.
is 50 Hz. The power circuit and control block diagram of the 3P4L
USPAF implementation is given in Figs. 7 and 8, respectively.
In Fig. 7, the non-linear load-1 (RL loaded three-phase half
controlled thyristor rectifier with firing angle 30◦ , RC loaded threephase diode rectifier and RC loaded single-phase diode rectifier) is
the load group that requires ideal source voltages. Also, the nonlinear load-2 (RC loaded three-phase diode rectifier) is connected to
the PCC to create source voltage distortion, and resembles the effect
of other loads on a radial network. The three-phase source voltages
with distortion are synthesized by increasing system impedance
from 59 ␮H to 4 mH and connecting the non-linear load-2 to PCC
as clearly shown in Fig. 7.
The 3P4L USPAF system has 3P4W power circuit configuration
based on the two four-leg VSI with a dc-link capacitor. The dc-link
voltage is adjusted at 350 V via parallel AF. The parallel AF is connected in parallel with the load while the series AF is connected
in series with the utility and the load through three single-phase
series injection transformers. Both AFs are digitally controlled using
a dSPACE DS1103 controller board. The dSPACE controller board
includes a real-time processor and the necessary I/O interfaces
to carry-out the control operation. This hardware supports the
real time interface (RTI) tool that allows programming via Matlab/Simulink. In this way, all the control circuit components are
implemented graphically within the Simulink environment.
In the 3P4L USPAF system, the load currents and the parallel AF currents are measured by utilizing TEG NA-50P hall-effect
current sensors, source voltages and the series AF voltages are measured by utilizing the TEG NV-25P hall-effect based isolated voltage
sensors and the dc-link voltage is measured by AD210 isolation
amplifier for control and protection purposes. All the measured
signals are scaled in the signal conditioning board which provides
the measured signals at the required voltage level for the dSPACE
analog digital converter (ADC) unit. The parallel VSI uses the variable frequency hysteresis current controller. The series VSI uses
the carrier-based PWM voltage controller. The proposed algorithm
for the USPAF system requires sampling time of 20 ␮s to execute
Fig. 8. Control block diagram of the 3P4L USPAF system implementation.
M. Ucar et al. / Electric Power Systems Research 81 (2011) 1132–1143
the Matlab/Simulink generated C-codes in real-time. The generated
switching signals are taken out of DS1103 with the help of digital
I/O channels.
The two four-leg VSI of the 3P4L USPAF system consists of eight
SEMIKRON SKM75GB128D dual-pack IGBT modules which are
driven by 6-channel CONCEPT 6SD106EI and 2-channel 2SD106AI
gate drivers. The IGBT gate drivers have analog dead time generation facility and also monitors the collector–emitter voltage for
short-circuit failure condition. The dc-link capacitance rating is proportional to the maximum energy storage variation of the capacitor.
The energy exchange is different for a given dc-link voltage variation in particular application [26]. Different capacitance values
are required to meet different compensation cases. Because the
instantaneous non-active power is zero at all times under periodic
conditions, the current flowing into or out of the dc-link capacitor
is zero. Therefore, a small capacitor can meet the requirement of
this case. Under non-periodic conditions, the average power P(t) is
time varying. The net energy flowing in the dc-link capacitor is no
longer zero over one cycle. The capacitor must have sufficient storage capacity under these conditions to be able to absorb the load
power fluctuations. In the USPAF system design presented, the dclink capacitor size needed is determined through Matlab/Simulink
simulations. The electrolytic capacitor 2350 ␮F (two 4700 ␮F, 450 V
capacitors connected in series) is connected dc-link of the 3P4L
USPAF system.
The parallel AF currents and the series AF voltages are also utilized in the overcurrent and overvoltage protection board. If a fault
occurs, all IGBT gate signals are set to zero level so that the two
VSIs are disabled. Owing to the switching of the parallel and series
VSI’s, the compensating currents and voltages have unwanted highorder harmonics. High-pass passive filters represented by RPF , CPF
for parallel AF and RSF , CSF for series AF in Fig. 7 are connected to
prevent the flow of switching harmonics into the PCC. The coupling inductances LPF and LSF are necessary to limit di/dt in the
VSI’s. Also, pre-charge resistors are utilized at the ac side of the
parallel AF to limit the inrush current during the startup and bypassed after the dc-link capacitors are charged to their steady-state
value.
The experimental waveforms were recorded by Textronix
DPO3054 digital oscilloscope and the harmonic analyses were done
by Fluke 434 power quality analyzer. Fig. 9 illustrates the photographs of the 3P4L USPAF system laboratory prototype. Table 2
shows the circuit parameters used in the simulation and experiment.
Table 2
The 3P4L USPAF system parameters.
Components
Power source
Voltage, frequency
Impedance
DC-link
Capacitors
Reference voltage
Parallel AF
Filter
Switching frequency
Series AF
Filter
Switching frequency
Injection transformer
Non-linear load-1
Three-phase thyristor rectifier
Three-phase diode rectifier
Single-phase diode rectifier
Non-linear load-2
Three-phase diode rectifier
Symbol
Parameters
VSabc , fs
LS
110 V, 50 Hz
59 ␮H
Cdc
Vdc*
2350 ␮F (2 × 4700 ␮F
connected in series)
350 V
LPF , RPF , CPF
fSWp
2.5 mH, 5 , 10 ␮F
10 kHz
LSF , RSF , CSF
fSWs
N1 /N2 , S
0.7 mH, 5 , 80 ␮F
10 kHz
2, 5.4 kVA
LL , Ldc , Rdc
LL , Cdc , Rdc
LL , Cdc , Rdc
3 mH, 5.7 mH, 22 3 mH, 100 ␮F, 30 3 mH, 330 ␮F, 45 Cdc , Rdc
8800 ␮F, 15 1137
The proposed 3P4L USPAF non-active power compensation system is simulated, and an experimental setup is also built, so that
different cases can be studied in simulations or experiments. The
first case for periodic current and voltage compensation (Section
4.1) is tested in the experimental setup and the last two cases
for (Sections 4.2 and 4.3) are simulated in Matlab/Simulink software since they are difficult to be carried out in an experimental
setup. The IEEE–519 standard limits of 5% on THD in voltage or current is set on the THD of source currents and load voltages after
compensation in this study.
4.1. Distorted source voltage and unbalanced non-linear load
current compensation
The harmonic currents will produce voltage distortion that
can affect other sensitive loads at PCC as they interact with the
impedance of an electrical distribution system. For compensation
of periodic current and voltage with fundamental period T, using
a compensation period Tc that is a multiple of T/2 is enough for
complete compensation [25]. The non-linear load-1, which requires
clean supply voltage, is connected 3P4W power system to create current unbalance and harmonics, and also the non-linear
load-2 is connected to the PCC to create supply voltage distortion as shown in Fig. 7. The three-phase distorted load voltages
before compensation are demonstrated in Fig. 10(a). After compensation choosing the period as Tc = T/2, the three-phase source
voltages with distortion is compensated to the sinusoidal waveforms shown in Fig. 10(b). The THD of the load voltages, which
averaged 9.0% before compensation, is about 2.7% after compensation, which is well within the limits specified by IEEE–519. In
Fig. 10(c) there are shown from top to bottom, phase-a source
voltage, injected voltage, compensated load voltage and dc-link
voltage. By means of the parallel AF current compensation, the THD
values of the source voltages are decreased about from 9.0% to 7.3%.
After the series AF compensation, the load voltage THD values are
decreased to about 2.7%. Also, the dc-link voltage has a desired
reference value. The three-phase unbalanced non-linear source
currents and source neutral current before compensation are presented in Fig. 10(d). After compensation choosing the period as
Tc = T/2, it is evident that the three-phase source currents are nearly
sinusoidal with constant amplitude that is shown in Fig. 10(e).
Moreover, the neutral line current is almost eliminated. The THD
of the source currents, which was about 27.8% before compensation, is about 4.2% after compensation. Fig. 10(f) illustrates from
top to bottom phase-a load current, injected current, source current and dc-link voltage waveforms during a load change. It can
be seen that phase-a load current increases by about 25% after the
load change and the parallel AF maintains the source current at
sinusoidal wave and the dc-link voltage at set reference value of
350 V.
The harmonic spectra of the phase-b load voltage before
and after compensation are shown in Fig. 11(a) and (b) respectively. The harmonic spectra of the phase-b source current before
and after compensation are shown in Fig. 12(a) and (b) respectively. The experimental compensation results are summarized in
Tables 3 and 4.
4.2. Sub-harmonic current and voltage compensation
Sub-harmonics (frequency less than the fundamental frequency) are caused by arc furnaces, cycloconverters, welders,
rectifiers feeding fluctuating or cyclic load, motors working with
cyclic load and wind generators [33]. Sub-harmonic current/voltage
compensation using the GNAP theory, when the fundamental frequency is an odd multiple of the sub-harmonic frequency, the
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M. Ucar et al. / Electric Power Systems Research 81 (2011) 1132–1143
Fig. 9. Photographs of the 3P4L USPAF experimental test setup. (a) Top view of the experiment desk. (b) Bottom view of the experiment desk.
Table 4
Summary of load current compensation.
Source current (iS )
Table 3
Summary of distorted source voltage compensation.
Load voltage (vL )
RMS (V)
Phase-a
Phase-b
Phase-c
THD (%)
phase-a
phase-b
phase-c
Before compensation
After compensation
101.2
100.8
101.6
110.3
109.5
109.7
9.6
8.4
9.2
2.8
2.6
2.7
RMS (A)
Phase-a
Phase-b
Phase-c
Neutral
THD (%)
Phase-a
Phase-b
Phase-c
Unbalance (%)
Neg. seq.
Zero seq.
Power factor
Before compensation
After compensation
12.4
16.1
12.1
5.2
16.4
16.4
16.3
1.2
29.1
26.7
27.7
4.3
4.0
4.4
9.5
9.8
0.94
0.6
0.3
0.99
M. Ucar et al. / Electric Power Systems Research 81 (2011) 1132–1143
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Fig. 10. Experimental results of distorted source voltage and unbalanced nonlinear load current compensation. (a) Load voltages before compensation. (b) Load voltages
after compensation. (c) Source, series AF, load and dc-link voltage waveforms. (d) Source currents before compensation. (e) Source currents after compensation. (f) Load,
parallel AF, source currents and dc-link voltage waveforms.
minimum Tc for complete compensation is 1/2 of the common
period of both fs and fsub . When fs is an even multiple of fsub , the
minimum Tc for complete compensation is the common period of
both fs and fsub [26]. If Tc is chosen as an integral multiple of the periods of all the frequencies in p(t), the average value P(t) is a constant.
Therefore, ia (t) is purely sinusoidal and in phase with the fundamental component of v(t). If Tc is not chosen this way, there are
still sub-harmonic components in ia (t), the non-active component
is not completely eliminated.
In this study, source voltage and load current contain subharmonic of 10 Hz frequency and 20% amplitude are given in Eqs.
(28) and (29) for phase-a. Fig. 13 shows the sub-harmonic current and voltage compensation simulation results. Three-phase
sub-harmonic source voltage and three-phase sub-harmonic load
Fig. 11. Harmonic spectra of phase-b load voltage. (a) Before compensation. (b) After compensation.
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M. Ucar et al. / Electric Power Systems Research 81 (2011) 1132–1143
Fig. 12. Harmonic spectra of phase-b source current. (a) Before compensation. (b) After compensation.
Fig. 13. Simulation results of sub-harmonic voltage and current compensation. (a) Three-phase sub-harmonic source voltage waveforms. (b) Positive sequence detector output
waveforms. (c) Three-phase load voltages after compensation. (d) Three-phase sub-harmonic load current waveforms. (e) Three-phase source currents after compensation.
(f) DC-link voltage.
M. Ucar et al. / Electric Power Systems Research 81 (2011) 1132–1143
current waveforms are shown in Fig. 13(a) and (d), respectively.
vSa = (155 + 15.5 sin(210t))sin(250t)
(28)
iLa = (21 + 2.1 sin(210t))sin(250t)
(29)
The positive sequence detector output waveforms under this
test case are shown in Fig. 13(b). The 3P4L USPAF system compensates the sub-harmonic component by choosing Tc = 2.5T. Thus,
the three-phase voltage at the load terminals and the threephase source current are almost sub-harmonic free and with
constant amplitude as presented in Fig. 13(c) and (e). Also, the
dc-link voltage which follows the reference value as shown in
Fig. 13(f).
4.3. Stochastic non-periodic current and voltage compensation
The arc furnaces may contain stochastic non-periodic currents (frequency higher than fundamental frequency but not an
integer multiple of it) because of their rapidly changing load
current characteristics [25,34]. Also, static frequency converters,
cycloconverters, sub-synchronous converter cascades, induction
machines and fluctuating loads may cause the stochastic nonperiodic current/voltage waveform [34]. Theoretically, the period
T of a non-periodic load is infinite [25]. The GNAP theory is valid
for voltage and current of any waveshape, and the non-active current can only be completely eliminated when Tc = t and t → ∞ (ia (t)
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is the shape as and in phase with vp (t) so that unity power factor is achieved). However, this is not practical in a power system,
and Tc is chosen to have a finite value (1–10 times that of the
fundamental period). Additionally, the non-active components in
these loads cannot be completely compensated by choosing Tc as
T/2 or T, or even several multiples of T. Choosing that period as
may result in an acceptable both source current and load voltage which are quite close to a sine wave. If Tc is large enough,
increasing Tc further will not typically improve the compensation results significantly [26]. In this work, phase-a source voltage
and load current components are given in Eqs. (30) and (31)
[34].
vSa = 155 sin(250t) + 11.6 sin(2104t − 120◦ )
+ 15.5 sin(2117t − 120◦ )
+ 7.7 sin(2134t) + 7.7 sin(2147t)
+ 31 sin(2250t − 120◦ )
(30)
iLa = 21 sin(250t) + 6.3 sin(2104t − 120◦ )
+ 8.4 sin(2117t − 120◦ )
+ 4.2 sin(2134t) + 4.2 sin(2147t)
+ 10.5 sin(2250t − 120◦ )
(31)
Fig. 14. Simulation results of stochastic non-periodic voltage and current compensation. (a) Three-phase stochastic non-periodic source voltage waveforms. (b) Positive
sequence detector output waveforms. (c) Three-phase load voltages after compensation. (d) Three-phase stochastic non-periodic load current waveforms. (e) Three-phase
source currents after compensation. (f) Load neutral current waveform. (g) Source neutral current after compensation. (h) DC-link voltage.
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M. Ucar et al. / Electric Power Systems Research 81 (2011) 1132–1143
Fig. 14. (Continued ).
Fig. 14 shows the stochastic non-periodic voltage and current compensation choosing the period as Tc = 5T. The three-phase
stochastic non-periodic source voltage, the three-phase stochastic
non-periodic load current and load neutral current waveforms are
shown in Fig. 14(a), (d) and (f), respectively.
The positive sequence detector output waveforms under this
test case are shown in Fig. 14(b). After compensation, load voltages
and source currents are balanced and almost sinusoidal with low
THD as clearly shown in Fig. 14(c) and (e). The source neutral current have been reduced considerably as presented in Fig. 14(g). In
addition, the dc-link voltage is maintained at the reference value
350 V as shown in Fig. 14(h).
5. Conclusion
The increasing applications of non-linear and disturbing loads
connected to the electrical power system are responsible for the
presence of periodic and non-periodic disturbances on the line
currents and voltages. In this paper, the GNAP theory, which
is applicable to sinusoidal or non-sinusoidal, periodic or nonperiodic, balanced or unbalanced electrical systems, is presented
and applied to the 3P4L USPAF system. The theory is adapted for
different compensation objectives by changing the averaging interval Tc and applied to the 3P4L USPAF experimental setup system
built and tested in the laboratory. The dSAPCE DS1103 controller
M. Ucar et al. / Electric Power Systems Research 81 (2011) 1132–1143
was used to implement the proposed approach in real-time. The
distorted source voltage with unbalanced non-linear load current
compensation was tested in the experiments. The sub-harmonic
and the stochastic non-periodic current and voltage compensations
were simulated in Matlab/Simulink. Simulation and experimental
results verify the validity of the GNAP theory for the best compensation performance of non-sinusoidal periodic and non-periodic
current/voltage disturbances with the 3P4L USPAF system.
Acknowledgement
This work is supported by TUBITAK Research Fund (no:
108E083).
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