15.1 Multistage ac-Coupled Amplifiers
1077
TABLE 15.3
Three-Stage Amplifier Summary
Voltage gain
Input signal range
Input resistance
Output resistance
Current gain
Power gain
HAND ANALYSIS
SPICE RESULTS
+998
92.7 V
1 M
60.5 +4.03 × 106
4.02 × 109
+1010
—
1 M
55.7 —
—
and a low output resistance. The current and power gains are both quite large. The input signal
must be kept below 92.7 V in order to satisfy the small-signal limitations of the transistors.
15.1.7 Improving Amplifier Voltage Gain
We know that the gain of the C-S amplifier is inversely proportional to the square root of drain
current. In this amplifier, there is no need to operate the first stage at a 5-mA bias current level, and
the voltage gain of the amplifier could be increased by reducing I D1 while maintaining a constant
voltage drop across R D1 . It should be possible to improve the signal range by increasing the current
in the output stage and the voltage drop across R E3 . Another possibility is to replace Q 3 with a
FET. Some gain loss might again occur in the third stage because the gain of a common-drain
amplifier is typically less than that of a common-collector stage, but this could be made up by
improving the gain of the first and second stages (see Probs. 15.3 and 15.7).
Exercise: (a) What would be the voltage gain of the amplifier if I D1 is reduced to 1 mA and
constant? (b) The FET gm decreases by
RD1 is increased to 3 k so that VD is maintained
5. Why did the gain not increase by a factor of
5?
Answers: 1840; although RD1 increases by a factor of 5, the total load resistance at the
drain of M1 does not.
15.1.8 The Common-Emitter Cascade
The three-stage amplifier in Fig. 15.1 uses a common-source stage in cascade with a commonemitter stage. However, we know from Chapters 13 and 14 that common-emitter stages typically
offer more voltage gain than common-source stages, and, to achieve the highest possible voltage
gain, several common-emitter stages are often cascaded, as indicated by the ac small-signal
equivalent circuit for an n-stage amplifier in Fig. 15.7. The gain can be written as the product of
the gains of the individual stages;
Av =
v 1 v2
vo
···
= Av1 Av2 · · · Avn
vi v 1
vn−1
(15.26)
1078
Chapter 15
Multistage Amplifiers
v2
v1
v n –1
Qn
Q2
Q1
RI2
RI1
vi
RL
+
vo
–
Figure 15.7 n-Stage cascade of common-emitter amplifiers.
For all but the final stage, the gain is given by
Avi = −gmi (R I i rπi+1 )
(15.27)
where gmi = transconductance of transistor i
R I i = ith interstage resistance
rπi+1 = input resistance of transistor i + 1
∼ −10VCC , where VCC is the power supply voltage.
The gain of the last stage is Avn = −gmn R L =
Two limits are of particular interest. If the gain is limited by the interstage resistances, then
each stage has a gain of approximately −10VCC , and the overall gain of the n-stage amplifier is
Avn = (−10VCC )n
(15.28)
For the second case, the gain is assumed to be limited by the input resistance of the transistors,
and the gain becomes
Avn = (−1)n
IC1
βo2 βo3 · · · βon (10VCC )
ICn
(15.29)
Normally, ICn ≥ IC1 because the signal and power levels usually increase in each successive stage
of most amplifiers. Because βo is often less than 10VCC , Eq. (15.29) is often the actual limiting
case.
The origin of Eq. (15.29) can be more readily understood from the three-stage example in
Fig. 15.8, in which the interstage resistors are assumed infinite in value. The output signal current
from the first stage is −gm1 vs . This current is amplified by the current gain of the next two stages
and produces an output current of
ic3 = βo3 βo2 gm1 vi
(15.30)
β o3 βo2 gm1vs
βo2 gm1vs
gm1vs
Q3
Q2
Q1
RL
vi
Figure 15.8 Ideal common-emitter cascade.
+
vo
–
15.2
Direct-Coupled Amplifiers
1079
which develops the output voltage across load resistance R L :
vo = −βo3 βo2 gm1 R L vi
(15.31)
The voltage gain of the overall cascade is then
Av3 =
vo
gm1
= −βo3 βo2 gm1 R L = −
βo3 βo2 (gm3 R L )
vi
gm3
(15.32)
Writing the transconductances in terms of their respective collector currents yields an equation
in the form of Eq. (15.29):
Av3 = −
Ic1
βo2 βo3 (10VCC )
Ic3
(15.33)
For a cascade of n identical stages (ICn = IC1 ), Eq. (15.33) becomes
Avn = (−1)n (βo )n−1 (10VCC )
(15.34)
Except for the last stage, the voltage gain of each stage defined by Eq. (15.34) is equal to the
current gain βo , which may be less than 10VCC .
Exercise: An amplifier is required with a gain of 140 dB. Estimate the minimum number of
amplifier stages that will be required if the design must use a 15-V supply and transistors
with β o = 75.
Answer: Five stages; although Eq. (15.28) yields an estimate of four stages, Eq. (15.34)
yields an estimate of five. (β o < 10VCC .)
15.2 DIRECT-COUPLED AMPLIFIERS
The coupling capacitors in the multistage amplifier in Fig. 15.1 limit the low-frequency response
of the amplifier and prevent its application as a dc amplifier. For the amplifier to provide gain at
dc or very low frequencies, capacitors in series with the signal path (C1 , C3 , C5 , and C6 ) must
be eliminated. Such an amplifier is called a dc-coupled, or direct-coupled, amplifier. Using
a direct-coupled design can also eliminate the additional resistors that are required to bias the
individual stages in an ac-coupled amplifier, thus producing a less expensive amplifier design.
Bypass capacitors C2 and C4 also affect the gain at low frequencies and cause the amplifier to
have a high-pass response. However, they do not inherently prevent the amplifier from operating
at dc.
15.2.1 Analysis of a dc-Coupled Amplifier
Figure 15.9 is a direct-coupled version of the three-stage amplifier in Fig. 15.1. The dc levels at
the various nodes in Fig. 15.9 have been designed to permit direct connections between the stages,
and coupling capacitors C3 and C5 have been eliminated between M1 and Q 2 , and between Q 2 and
Q 3 , respectively. Symmetrical ±7.5-V power supplies are now used so that the Q-point voltages
at both the input and output of the amplifier will be approximately zero. However, the amplifier
in Fig. 15.9 still includes bypass capacitors to enhance its ac performance (see Prob. 15.2). The
1080
Chapter 15
Multistage Amplifiers
C-S amplifier
C-E amplifier
C-C amplifier
+7.5 V
RD1
620 RE2
C4
1.4 k
22 F
Q2
RI
Q3
M1
10 k
v±
RG
1 M
RS1
C2
1.6 k
22 F
RC2
4.7 k
RE3
3.3 k
250
–7.5 V
Figure 15.9 A direct-coupled version of the three-stage amplifier in Fig. 15.2.
dc gain of the amplifier is small, but the midband ac gain exceeds 1000 due to the presence of the
two bypass capacitors. An amplifier truly designed for dc amplification will eliminate all these
capacitors, and the basic differential and operational amplifier circuits to be discussed later in this
chapter do completely eliminate the need for both coupling and bypass capacitors.
npn transistor Q 2 in Fig. 15.1 has been replaced by a pnp transistor in Fig. 15.9. Alternating
npn or n-channel with pnp or p-channel transistors from stage to stage is common in dc-coupled
designs. This is a technique developed to take maximum advantage of the available power supply
voltage.
15.2.2 dc Analysis
The dc equivalent circuit for the dc-coupled amplifier appears in Fig. 15.10. Note that the source
and load resistors, R I and R L , must now be included in the circuit. The voltage at the drain of
M1 provides bias voltage to the base of Q 2 , and the voltage developed at the collector of Q 2
establishes the base bias for Q 3 . For amplifiers, the transistors should all be operating in the active
region. Thus, the current in M1 is independent of the voltage at its drain and therefore independent
of the fact that the base of Q 2 happens to be connected to its drain. Similarly, the collector current
of Q 2 is not be affected by the presence of Q 3 attached to its collector. Because of this lack of
interaction, the dc analysis can proceed through the circuit from left to right, from M1 to Q 2
to Q 3 .
If we use the transistor parameter values in Table 15.1 and assume active-region operation
with zero gate current, then the drain current of M1 is given by
ID =
Kn
0.01
(VG S − VT N )2 =
(VG S + 2)2
2
2
where
VG S = VG − VS = 0 − (−7.5 + 1600I D )
(15.35)
Collecting terms yields a quadratic equation for I D :
2.56 × 106 I D2 − 30,600I D + 90.3 = 0
(15.36)
15.2
Direct-Coupled Amplifiers
1081
+7.5 V
RE2
620 Ω
1.4 kΩ
RD1
IE2
IB2
VD
Q2
ID
10 kΩ
M1
RG
RS1
1 MΩ
IC2
VC2
IB3
Q3
RC2
I3
4.7 kΩ
1.6 kΩ
IL
RE3
3.3 kΩ
RL
250 Ω
–7.5 V
Figure 15.10 dc Equivalent circuit for direct-coupled amplifier.
The solutions to Eq. (15.36) are I D = 5.29 mA and I D = 6.66 mA. A 6.66-mA drain-source
current would produce a voltage drop of 10.7 V across R S1 and cut off the FET. Thus, the drain
current must be I D = 5.29 mA, and the voltage at the source of M1 is VS = 0.964 V.
Applying KCL at the drain node, the drain voltage of M1 can be expressed as
VD = 7.5 − 620(I DS − I B2 )
(15.37)
VD ∼
= 7.5 − 620I D = 7.5 − 620 (5.29 mA) = 4.22 V
(15.38)
If we assume that I B2 I D , then
and the drain-source voltage of M1 is VDS = 4.22 − 0.964 = 3.26 V, which is indeed sufficient
to pinch-off M1 .
The Q-point of bipolar transistor Q 2 is controlled by the voltage at its base, which is equal
to the drain voltage of M1 . Assuming active-region operation,
VD = 7.5 − 1400I E2 − VE B2
(15.39)
and solving Eq. (15.39) for I E2 gives
I E2 =
7.5 − VD − VE B2
7.5 V − 4.22 V − 0.7 V
=
= 1.84 mA
1400 1400 (15.40)
Based on the current gain β F2 = 150 from Table 15.1,
IC2 = 1.83 mA
and
I B2 = 12.2 A
(15.41)
The results in Eq. (15.41) justify the assumption I B2 I D used in Eq. (15.38).
The voltage VC2 at the collector of Q 2 can be expressed as
VC2 = 4700(IC2 − I B3 ) − 7.5 V
(15.42)
1082
Chapter 15
Multistage Amplifiers
Assuming that I B3 IC2 ,
VC2 ∼
= 4700IC2 − 7.5 V = 1.10 V
(15.43)
Checking the collector-emitter voltage of Q 2 ,
VEC2 = VE2 − VC2 = VD1 + VE B2 − VC2 = 4.22 + 0.7 − 1.10 = 3.82 V
(15.44)
which is greater than 0.7 V. This confirms that Q 2 is operating in the active region.
The voltage at the output of the amplifier is equal to the emitter voltage of Q 3 ,
VO = VC2 − VB E3 = 1.10 V − 0.700 V = 0.400 V
(15.45)
and the emitter current of Q 3 is given by
I E3 = I3 + I L =
VO + 7.5 V
VO
0.40 + 7.5 V
0.4
+
=
+
= 3.99 mA
3300 250 3300 250 (15.46)
Using the current gain β F3 = 80,
IC3 = 3.94 mA
and
I B3 = 49.3 A
(15.47)
I B3 is less than 3 percent of IC2 , so neglecting I B3 in the calculation of VC2 in Eq. (15.43) was a
reasonable assumption.
Finally, the collector-emitter voltage of Q 3 is
VC E3 = 7.5 − VE3 = 7.5 − 0.40 = 7.10 V
(15.48)
which verifies that Q 3 is operating in the active region.
Calculation of the Q-points of the three transistors is complete. The Q-point values have been
used to determine the values of the small-signal parameters, as summarized in Table 15.4. (Be
sure to compare the Q-point values in Table 15.4 to those in Table 15.2.)
Two things should be noted here. There is an offset voltage (0.4 V) at the output of the
amplifier, and a nonzero dc current exists in the 250- load resistor. In an ideal design, the
output voltage would be zero, and no dc current would appear in R L . In this circuit, it is virtually
impossible to achieve exactly zero output voltage with standard resistor values without some form
of overall feedback around the amplifier. (Remember in Chapters 11 and 12 that we saw many
circuits in which feedback was used to set the quiescent output of an op amp to 0 V.) Also, the
TABLE 15.4
Q-Points and Small-Signal Parameters for the Transistors in Fig. 15.10
M1
Q2
Q3
Q-POINT VALUES
SPICE CALCULATIONS
Q-POINT VALUES
HAND CALCULATIONS
SMALL-SIGNAL PARAMETERS
(5.31 mA, 3.21 V)
(1.77 mA, 4.27 V)
(1.98 mA, 7.56 V)
(5.29 mA, 3.26 V)
(1.83 mA, 3.82 V)
(3.99 mA, 7.10 V)
gm = 10.4 mS, ro = 10.1 k
gm = 73.2 mS, rπ = 2.05 k, ro = 45.8 k
gm = 160 mS, rπ = 501 , ro = 16.8 k
15.2
Direct-Coupled Amplifiers
1083
results depend on the assumed values of VB E and VE B . If we simulate the circuit in SPICE using
the parameters in Table 15.1 with I S = 0.1 fA, the output voltage is found to be close to zero
(−62.7 mV). The Q-points from SPICE are given in Table 15.4. The collector current of Q 3 is
reduced since there is now only a small current in R L .
Exercise: Verify that the values of the small-signal parameters in Table 15.4 are correct.
Exercise: Use SPICE to verify the Q-points for the three transistors in the circuit in
Fig. 15.9.
Answers: See Table 15.4.
Exercise: What is the minimum value of VDS needed to saturate M1 ? Find I E2 and VD1 if
β F 2 = 10. (Assume I B2 no longer satisfies I B2 I D1 .)
Answers: +1.04 V; 1.77 mA, 4.32 V
15.2.3 ac Analysis
The ac equivalent circuit for the amplifier in Fig. 15.9 is drawn in Fig. 15.11, and is very similar
to that in Fig. 15.3. The values of the interstage resistors have increased slightly in value due
to the absence of bias resistors R1 − R4 in Fig. 15.1. Because the Q-points and small-signal
parameters of the transistors are also almost identical to those in the ac-coupled amplifier, the
overall characteristics of the amplifier should be quite similar to those of Fig. 15.1, and indeed
they are: Av = 1160, Rin = 1 M, and Rout = 47 . Details of these calculations mirror those
done in Sec. 15.1 and are left as the next exercise.
Thus, in this case we can achieve the same amplifier performance with either an ac- or
dc-coupled design. dc coupling requires fewer components, but the Q-points of the various stages
become interdependent. If the Q-point of one stage shifts, the Q-points of all the stages may also
shift (see Prob. 15.16).
v3
v2
Q2
Rin3
10 kΩ
Rin2
M1
RI
vi
Q3
RI2
RL3
4.70 kΩ
232 Ω
RI1
RG
1 MΩ
+
vo
–
620 Ω
C-S amplifier
C-E amplifier
C-C amplifier
Figure 15.11 ac Equivalent circuit valid for small-signal analysis.
1084
Chapter 15
Multistage Amplifiers
Exercise: Calculate the actual voltage gain, input resistance, and output resistance of the
direct-coupled amplifier in Fig. 15.9.
Answers: 1160, 1 M, 47 Exercise: What is the dc gain of the amplifier in Fig. 15.9? (The dc gain is the gain with the
two bypass capacitors removed from the circuit.)
Answer: 0.94. A quick estimate would be
Av = Av1 Av2 Av3 =
RD1
−
RS1
RC2
−
RE2
(1) =
620
1600
4700
1400
= 1.3
15.2.4 Compound Transistor Configurations —
The Darlington and Cascode Circuits
In this section, we will discuss the characteristics of two special dc-coupled transistor configurations, the Darlington and cascode circuits. These compound transistor circuits function in a
manner similar to a single transistor, but with improved characteristics. The Darlington stage
provides high current gain, whereas the cascode amplifier offers high output resistance and intrinsic voltage gain. In Chapter 17, we will also find that the cascode amplifier provides improved
response at high frequencies. An additional compound transistor configuration can be found in
Prob. 15.35.
The Darlington Circuit
In many circuits, it would be advantageous to have a bipolar transistor with a much higher current
gain than that of a single BJT. An FET may not be usable because it cannot provide the required
amplification factor, or a bipolar IC technology that does not realize FETs may be in use. The
circuit depicted in Fig. 15.12, called the Darlington configuration, or Darlington circuit, is an
important two-stage direct-coupled amplifier that attempts to solve this problem. The Darlington
circuit behaves in a manner similar to that of a single transistor but with a current gain equal to the
product of the current gains of the individual transistors. The dc and ac behavior of the Darlington
circuit are discussed in the next two sections.
dc Analysis
Writing an expression for the dc collector current IC at the output of the composite transistor in
Fig. 15.12(a) in terms of the input base current I B ,
IC = IC1 + IC2 = β F1 I B + β F2 I E1 = β F1 I B + β F2 (β F1 + 1)I B
(15.49)
and factoring β F1 β F2 from Eq. (15.49) gives
1
1
IC = β F1 β F2 1 +
IB ∼
+
= β F1 β F2 I B
β F1
β F2
for β F1 , β F2 1
(15.50)
iC
iC1
B
+
vBE
–
iB
+
vBE1
–
B
Q2
iB
iE
–
E
(a)
+
IC2 = βo2 I E1 ∼
= βo2 IC1
v2
gm2 ∼
= βo1 gm1
1085
C
i2
iC
+
vBE2
Direct-Coupled Amplifiers
C
iC2
Q1
15.2
i1
Q'
Q1
+
iE
v1
E
–
ve
Q2
–
(b)
Figure 15.12 (a) Darlington connection of two
Figure 15.13 Darlington
bipolar transistors. (b) Representation as a single
composite transistor Q .
circuit as a two-port.
rπ1 ∼
= βo1 rπ2
ro1 ∼
= βo1 ro2
v1
(βo1 + 1)rπ2
∼
ve = v 1
=
rπ 1 + (βo1 + 1)rπ2
2
If both current gains are much larger than 1, then the composite transistor has a current gain that
is approximately equal to the product of the current gains of the individual transistors. Also, note
that the collector currents of the two transistors are related by IC2 ∼
= β F2 IC1 ∼
= IC .
The Darlington circuit requires higher dc bias voltages than does a single transistor. The
base-emitter voltage of the composite transistor is equivalent to two diode voltage drops
VB E = VB E1 + VB E2 ∼
= 1.4 V
(15.51)
and to keep the collector-base junction of Q 1 reverse-biased, VC E must also be greater than
(VB E1 + VB E2 ).
ac Analysis
The ac behavior of the Darlington circuit can be explored by treating the configuration as the
two-port in Fig. 15.13 and calculating its y-parameters:
i1 = y11 v1 + y12 v2
i2 = y21 v1 + y22 v2
(15.52)
These parameters are easily found by replacing the transistors in Fig. 15.13 by their small-signal
models and applying the definitions of the parameters to the resulting network. Because of the
relationship between IC1 and IC2 , the small-signal parameters of the two transistors are also related
to each other by the expressions given with the circuit in Fig. 15.13. The results of this analysis
are presented in Eq. (15.53), although the detailed calculations are left for Prob. 15.26.
rπ = (y11 )−1 = rπ 1 + (βo1 + 1)rπ 2 ∼
= 2βo1rπ 2
1
∼
y12 ∼
=−
=0
(βo1 + 1)ro1
gm1
gm2 ∼ gm2
gm = y21 =
+
=
2
2
2
2
r
o1
∼
ro = (y22 )−1 ∼
= ro2
= ro2 2β
3
o2
(15.53)
1086
Chapter 15
Multistage Amplifiers
The ac current gain βo and amplification factor µf for the composite Darlington transistor are
y21 =
= gm rπ ∼
= βo1 βo2
y11 v2 =0
µf2
v2 gm2 ro2
2
=
µf =
= gm ro =
v1 i2 =0
2
3
3
βo
(15.54)
From Eqs. (15.53) and (15.54), we can see that the Darlington configuration behaves as a single
composite transistor operating with a very high, effective current gain, βo1 βo2 , but with a transconductance equal to one-half that of a single BJT operating at the collector current IC . The high
current gain results in a high input resistance; however, the amplification factor of the composite
device has been reduced by a factor of 3.
Exercise: What is the current gain of a Darlington transistor if β F 1 = 50, V A1 = 75 V,
β F 2 = 80, and V A2 = 60 V? If the operating current of the composite transistor is 500 A
and VC E = 10, what are the values of r π , gm , r o , and µf ?
Answers: 4000; 400 k, 0.01 S, 70 k, 700
The Cascode Amplifier — A C-E/C-B Cascade
Another very important direct-coupled two-transistor amplifier configuration is the cascade connection of the common-emitter and common-base amplifiers. This special amplifier configuration
is referred to as the cascode amplifier. The cascode amplifier is particularly useful in wide-band
amplifiers used in RF communications as well as high output resistance current sources and high
gain amplifiers. Although this section focuses on the C-E/C-B version of the cascode amplifier,
it can be made with any combination of C-E/C-S and C-B/C-G stages (that is, with C-E/C-B,
C-E/C-G, C-S/C-G, or C-S/C-B) — (see Probs. 15.33, 15.37, 15.40, and 15.42).
dc Considerations In Fig. 15.14, we can see that the collector current of Q 1 is the emitter current
of Q 2 , and so IC2 = α F IC1 . For typical transistors with reasonably high current gain, IC2 ∼
= IC1 .
The base of Q 2 must be biased by a voltage source VB B that is large enough to ensure that Q 1 is
operating in the forward-active region. The minimum value of VB B is
VC E1 = VB B − VB E2 ≥ VB E1
VB B ≥ 2VB E
or
and must be equal to at least 2VB E , or approximately 1.4 V.
iC1
iB1
Q1
Q2
iC2
+
vCE1
–
VBB
Figure 15.14 Cascode circuit with dc bias source VB B .
(15.55)
15.3
Differential Amplifiers
1087
Q2
i1
Q1
i2
+
+
v2
v1
–
–
Figure 15.15 Cascode circuit as a two-port.
ac Analysis The ac behavior of the cascode circuit can also be explored by treating the configuration as the two-port in Fig. 15.15 and calculating its y-parameters. As with the Darlington
circuit, these parameters can be found by replacing the transistors in Fig. 15.15 by their smallsignal models, recognizing that the transistor parameters are related through IC2 = α F2 IC1 . The
results are given in Eq. (15.56), but the detailed calculations are left for Prob. 15.33.
rπ = (y11 )−1 = rπ 1
y12 ∼
=0
gm = y21 = α o2 gm1 ∼
= gm1
−1 ∼
r = (y22 ) = ro2 (1 + gm2 (rπ 2 ro1 )) ∼
= βo2ro2
(15.56)
o
The current gain βo and amplification factor µf for the composite cascode transistor are
y21 =
= βo1 αo2 ∼
= βo1
y11 v2 =0
v2 µf = = βo2 µ f 2
v1 i2 =0
βo
(15.57)
From Eqs. (15.56) and (15.57), we can see that the cascode configuration behaves as a single
composite common-emitter transistor operating at a collector current IC ∼
= IC2 , but having an extremely high amplification factor of βo2 µ f 2 . The cascode stage is often found in high-performance
differential and operational amplifiers, where it can afford very high voltage gain and commonmode rejection. It can also be used to realize current sources with very high output resistances.
In Chapter 17, we shall find that cascode amplifiers also offer much better bandwidth than the
corresponding single-transistor C-E or C-S stages.
Exercise: Calculate the two-port parameters of the cascode amplifier in Fig. 15.15 if the
transistors are identical and Q2 has I C2 = 100 A. Use β F = β o = 100, V A = 75 V, and
VC E2 = 10. What are the current gain and amplification factor for the cascode configuration?
What would be the values of r π , gm, r o, and µ f for a single transistor operating with I C =
100 A and VC E = 10 V?
Answers: 24.8 k, 0, 0.004 S, 85 M; 99.2, 340,000; 25.0 k, 0.004 S, 85 k, 3000
15.3 DIFFERENTIAL AMPLIFIERS
The direct-coupled amplifier design in Sec. 15.2 still uses internal bypass capacitors to achieve
high ac gain as well as external coupling capacitors at the input and output. The dc-coupled