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EE 311 Electronic Devices & Circuits 2
Lecture 17 | Chapter 09 | 4/8 | 1/12
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Lecture 17 | Chapter 09 | 4/8 | 2/12
EE 311
Electronic Devices & Circuits 2
Lecture 17
9.1
MOS Differential Pair
(continue…)
Kwang W. Oh, Ph.D., Associate Professor
SMALL (Sensors & MicroActuators Learning Lab)
Department of Electrical Engineering
University at Buffalo, The State University of New York
113C Davis Hall, Buffalo, NY 14260-1920
Tel: (716) 645-1205, Fax: (716) 645-3656
kwangoh@buffalo.edu, http://www.SMALL.Buffalo.edu
9.1.6 Cascode Differential Amplifier
● Gain can be increased via
cascode configuration –
discussed in Section 8.5.
 9.38
≡
||

9.39 
9.40 Figure 9.13: (a) Cascode differential amplifier; and (b) its differential half circuit.
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Exercise 9.6
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EE 311 Electronic Devices & Circuits 2
Lecture 17 | Chapter 09 | 4/8 | 4/12
9.13(a)
. ●
●
0.1mA
2 0.18μm
●
, , ,
⇒
, , ,
⇒
2
0.4
2
.
.
.
0.1
0.2
2
0.1
, , ,
●
0.1
0.2
12.5
50
36kΩ
1mA/V
.
1
1
●
●
●
2
, , ,
●
●
0.36μm
∥
36
36
36
36
1.296 Ω
1.296 Ω
1 1296 ∥ 1296
EE 311
Electronic Devices & Circuits 2
Lecture 17
9.2
The BJT Differential Pair
648V/V
Kwang W. Oh, Ph.D., Associate Professor
SMALL (Sensors & MicroActuators Learning Lab)
Department of Electrical Engineering
University at Buffalo, The State University of New York
113C Davis Hall, Buffalo, NY 14260-1920
Tel: (716) 645-1025, Fax: (716) 645-3656
kwangoh@buffalo.edu, http://www.SMALL.Buffalo.edu
SUNY–Buffalo | Electrical Engineering
EE 311 Electronic Devices & Circuits 2
Lecture 17 | Chapter 09 | 4/8 | 5/12
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Lecture 17 | Chapter 09 | 4/8 | 6/12
The BJT Differential Pair
9.2.1 Basic Operation
● Figure 9.14 shows the basic
BJT differential-pair
configuration.
● It is similar to the MOSFET
circuit – composed of two
matched transistors biased by
a constant-current source –
and is modeled by many
similar expressions.
● To see how the BJT differential
pair works, consider the first
case of the two bases joined
together and connected to a
common-mode voltage VCM.

Figure 9.15: Different modes of operation of
the BJT differential pair: (a) the differential
pair with a common-mode input voltage VCM;
(b) the differential pair with a “large”
differential input signal; (c) the differential
pair with a large differential input signal of
polarity opposite to that in (b); (d) the
differential pair with a small differential input
signal vi. Note that we have assumed the
bias current source I to be ideal.
Figure 9.14: The basic BJT differential-pair
configuration.
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Lecture 17 | Chapter 09 | 4/8 | 8/12
Exercise 9.7
E9.7
1.
2.
3.
4.
5.
With some reasoning It can
will turn off,
be seen that
will carry all the
and
current .
0.7V
→ : ON
The common emitter will be
0.7V
at
which means that the EBJ of
will be reverse biased by
0.7 0.5 0.2V
→ : OFF
The collector voltage will be
5V
6.
5 1
0.7V
.
Illustrated in Figure 9.15(a).
● Since Q1 and Q2 are matched,
and assuming an ideal bias
current I with infinite output
resistance, this current will flow
equally through both transistors.
9.2.2 Input Common-Mode Range

0.7 0.5
0.2V
OFF

.
● Refer to the circuit in Figure 9.15(a).
● The allowable range of VCM is determined
at the upper end by Q1 and Q2 leaving the
active mode and entering saturation.
● Equations (9.41) and (9.42) define the
minimum and maximum common-mode
input voltages.
4.3mA

0.7V

0.7V

ON
0.4V

5V
α
5 1 4.3
0.7V
1
Figure E9.7
9.41 ≃
0.4
0.4
0.3V ←
1
2
9.42 ≅ 0.7
0.3V
0.4
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EE 311 Electronic Devices & Circuits 2
Lecture 17 | Chapter 09 | 4/8 | 9/12
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Exercise 9.8
9.2.4 Small-Signal Operation
●
0.4
≅
1.9V
0.4
0.4
2.5
1
.
5
● Small-signal:
●
≪ 2
2
Figure 9.18

2.5
●
0.3
0.7
1.5V
●
9.50 thru 9.58 :
2
0.4V
9.41 ≃
2

0.4
2

9.55 
9.56 2
●
9.61 1 2
●
9.63 thru 9.67 :
0.4
2
2
2
2
9.42 ≅ 0.7
●
0.4
0.3 V ←
9.68 0.3V
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Figure 9.19
Figure 9.20: A differential amplifier with
emitter resistances. Only signal
quantities are shown (in color).
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With Emitter Resistance Re
Example 9.3
● While the input differential resistance
of the MOS pair is infinite, that for
but can
the bipolar pair is only
be increased to
by including resistances
in the
two emitters. The latter action,
however, lowers .
● 9.62 1 2
2
●
● (a) The input differential resistance
● 9.69 ≅
● Voltagegain
frombasetocollector
Totalresistanceincollector
Totalresistanceinemitter

. 

0.5mA
Each transistor is biased at
1 2
50Ω
2
2 100
1 50
● (b) The overall differential voltage gain
(for simplicity neglect

0.8
50
150 ≅ 40kΩ
40V/V
)