RC and RL Circuits - EECS at UC Berkeley

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UC Berkeley, EECS Department
EECS 40
B. E. Boser
UID:
P10: RC and RL Circuits
Read Sections 6.4–7 and Chapter 7 in Alexander & Sadiku.
The assigned reading includes many examples and worked out problems. Most are not particularly interesting,
so I won’t assign them. But pay attention anyway and solve the practice problems at the end of each chapter. You
will need these skills to solve the homework.
Yes, this material will be on the exams, serving as warm-up to the design problems.
1. Capacitor C1 =
mF is used to power a model airplane modeled by resistor R L =
Ω. Initially the
capacitor is charged to vc = V. Calculate the fraction r of the initial energy remaining on the capacitor and
the voltage vc across the capacitor after i L has decreased to
percent of its initial value. After what time T
is this condition reached?
r=
vc =
T=
3 pts.
0
3 pts.
1
4 pts.
2
2. The capacitor is initially discharged (vo = 0 V). Plot the value of vo (t) for the source voltage shown below
for R1 =
MΩ and C1 =
pF.
vo (1 µs) =
vo (2 µs) =
vo (6 µs) =
1 pt.
3
1 pt.
4
1 pt.
5
vc1/Vref
1
0.5
0
0
0.5
1
1.5
2
2.5
3
Vs [V]
5
0
−5
0
2
4
t [ms]
6
8
Ignore the top plot in the figure (Vc1 /Vre f ). The unit of the horizontal axis is µs.
3. The digital CMOS circuits used in present computer chips communicate with binary signals with values 0 V
and Vdd . The maximum operating speed is limited by how fast signals transition between these values.
The circuit below shows a typical situation of two digital circuits X1 and X2 connected by a wire. The capacitor C1 is a model for the wire capacitance and the input capacitance of X2 . Resistance Ro models the finite
output resistance of X1 . It is in reality part of X1 but shown here separately to calculate the communication
delay.
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If v1 transitions abruptly from 0 V to Vdd this change propagates to v2 only gradually because of Ro and
C1 , limiting the maximum operation speed. Faster operation requires reducing Ro (or C1 ). Since doing so
increases the power dissipation of X1 , it is important to determine the maximum allowable value Ro,max that
still ensures proper operation.
Find the Ro,max that results in v2 reaching 90 % of its final value within
numbers for microcomputer CPUs).
ps with C1 =
fF (typical
3 pts.
Ro,max =
6
4. In this problem, you design a timer. The switch in the diagram shown below is initially in position a. When
the capacitor voltage v1 reaches VH = 34 V1 , the switch changes to position b. It reverts back to position a
when v1 drops below VL = 14 V1 and the cycle repeats.
For C1 =
mF Determine the values of R1 and R2 such that the switch remains in position a for
s and
position b for
s. Timer circuits such as the popular “555 IC” operating on this principle use an electronic
switch (consisting of transistors) that also controls an associated device, e.g. a light.
Note that initially v1 starts from 0 V (or whatever voltage was stored on C1 when the circuit was powered
on). Because of this, the first cycle may be longer than later ones, which will all be of equal duration. Ignore
this initial transient (the first cycle) when determining the resistor values.
R1 =
R2 =
2 pts.
7
2 pts.
8
5. Calculate the inductance between nodes (a,b) for L1 =
L ab =
µH, L2 =
µH, L3 =
µH, L4 =
µH.
1 pt.
9
6. The voltage across the inductor is as follows:
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vs
vs
vs
vs
=0
= At
= At1
= Bt + At1 − Bt2
t<0
0 ≤ t < t1
t1 ≤ t < t2
t ≥ t2
Find the current i1 (t) and energy w1 (t) stored on the inductor for L1 =
A=
V/µs, and B =
V/µs.
i (t1 /2)
w(t1 /2)
i ( t2 )
w ( t2 )
i ( t1 + t2 )
w ( t1 + t2 )
mH, t1 =
µs, t2 =
µs,
1 pt.
=
=
=
=
=
=
10
1 pt.
11
1 pt.
12
1 pt.
13
1 pt.
14
1 pt.
15
7. The current through the inductor is initially zero. Plot the value of vo (t) for the source voltage shown below
for R1 =
kΩ and L1 =
mH.
vo (1 µs) =
vo (2 µs) =
vo (6 µs) =
1 pt.
16
1 pt.
17
1 pt.
18
vc1/Vref
1
0.5
0
0
0.5
1
1.5
2
2.5
3
Vs [V]
5
0
−5
0
2
4
t [ms]
6
8
Ignore the top plot in the figure (Vc1 /Vre f ). The unit of the horizontal axis is µs.
8. In this problem we design a “step down converter” (Buck converter) to efficiently convert the input voltage
Vs =110 V to a lower value vo =
V. Such circuits are employed in the familiar “power bricks” used
to power laptops and gadgets from the grid. In the diagram below the switch is controlled by a periodic
waveform. It is closed for a period T1 , followed by a period T2 = T − T1 during which it is open. The diode
D1 acts like a “valve”: current passes for vd ≥ 0 V; for vd < 0 V the diode behaves like an open circuit.
To simplify the analysis, assume that the output voltage vo is constant and equal to the design value. This
leads to minimal errors when the ripple is small. In practice we would verify the ciruit with SPICE to check
if all assumptions are valid and we have not made design errors.
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a) Assuming that the circuit behaves as intended, i.e. vo has the desired value, draw a simplified circuit
when the switch is closed.
b) Repeat (a) when the switch is open.
c) Derive expressions for the change of the current ∆i L through the inductor when the switch is opened and
closed. These expressions are functions of Vs , vo , L1 , T1 , and T2 .
d) In steady state, the change of the inductor current ∆i L when the switch is closed and the change when the
vo
as a function of T1 and
switch is opened must be equal. Use this condition to derive an expression for V
s
T2 .
e) Find T1 and T2 for T = T1 + T2 =
µs.
1 pt.
T1 =
19
1 pt.
T2 =
20
f) Find the value of L1 that results in ∆i L =
mA. In practice these supplies are designed for the maximum
acceptable ripple ∆i L to minimize the size of the inductor required, thus minimizing cost.
1 pt.
L1 =
21
g) What is the efficiency η of this circuit, defined as the ratio of power dissipated by the load X L divided by
the power delivered by the source Vs ? Hint: determine which elements dissipate power.
1 pt.
η=
22
h) The efficiency of actual realizations of this circuit is 80 . . . 95 %. What nonidealities in the circuit are responsible for dissipation?
Practical realizations contain additional circuitry to dynamically adjust the duty cycle T1 /T2 to keep vo constant despite of variations of Vs or the current drawn by the load.
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