Systems Design & Programming
80x86 Architecture
CMPE 310
Basic Architecture
Basic components
Microprocessor
Memory
DRAM
SRAM
Cache
ROM
Flash
EEPROM
Memory
Bus
8086
through
Pentium IV
I/O System
VESA
PCI
EISA
ISA
Bus
Serial
Plotter
Keyboard
Floppy
Tape
Hard Drive
Mouse
Scanner
DVD
CDROM
Monitor
Printer
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80x86 Architecture
Systems Design & Programming
CMPE 310
Basic Architecture
Bus Architecture:
Address bus
Microprocessor
Data bus
MWTC
MRDC
IORC
IOWC
ROM
DRAM
Keyboard
Printer
The Pentium bus architecture is not this simple.
We will elaborate on this later.
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Systems Design & Programming
80x86 Architecture
CMPE 310
Basic Bus Architecture
Bus Architecture:- Three buses:
P Address:
If I/O, a value between 0000H and FFFFH is issued.
If memory, it depends on the architecture:
20-bits (8086/8088)
24-bits (80286/80386SX)
25-bits (80386SL/SLC/EX)
32-bits (80386DX/80486/Pentium)
36-bits (Pentium Pro/II/III)
P Data:
8-bits (8088)
16-bits (8086/80286/80386SX/SL/SLC/EX)
32-bits (80386DX/80486/Pentium)
64-bits (Pentium/Pro/II/III)
P Control:
Most systems have at least 4 control bus connections (active low).
MRDC (Memory ReaD Control), MWRC, IORC (I/O Read Control), IOWC.
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Systems Design & Programming
80x86 Architecture
CMPE 310
Basic Bus Architecture
Bus Standards:
P ISA (Industry Standard Architecture): 8 MHz
8-bit (8086/8088)
16-bit (80286-Pentium)
P EISA: 8 MHz
32-bit (older 386 and 486 machines).
P PCI (Peripheral Component Interconnect): 33 MHz
32-bit or 64-bit (Pentiums)
New: PCI Express and PCI-X 533 MTS
P VESA (Video Electronic Standards Association): Runs at processor speed.
32-bit or 64-bit (Pentiums)
Only disk and video. Competes with the PCI but is not popular.
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Systems Design & Programming
80x86 Architecture
CMPE 310
Basic Bus Architecture
Bus Standards:
P USB (Universal Serial Bus): 1.5 Mbps,12 Mbps and now 480 Mbps.
Newest systems.
Serial connection to microprocessor.
For keyboards, the mouse, modems and sound cards.
To reduce system cost through fewer wires.
P AGP (Advanced Graphics Port): 66MHz
Newest systems.
Fast parallel connection: Across 64-bits for 533MB/sec.
For video cards.
To accommodate the new DVD (Digital Versatile Disk) players.
Latest AGP 3.0 with peak bandwidth of 2.1GB/s.
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Systems Design & Programming
80x86 Architecture
CMPE 310
Basic Memory Architecture
Bank layout
FFFFF
FFFFE
FFFFFF
FFFFFD
8 bits
1 MB
00002
00001
00000
g
8 bits
8 bits
Odd bytes
Even bytes
8 MB
8 MB
000005
000003
000001
D7-D0
8088
FFFFFE
FFFFFC
000004
000002
000000
D15-D8
D7-D0
8086 (1MB only), 80286, 80386SX
80386SL/SLC(32MB)
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80x86 Architecture
Systems Design & Programming
CMPE 310
Basic Memory Architecture
Bank layout
Bank 3
Bank 2
FFFFFFFE
FFFFFFFA
FFFFFFFF
FFFFFFFB
Bank 1
Bank 0
FFFFFFFC
FFFFFFF8
FFFFFFFD
FFFFFFF9
8 bits
8 bits
8 bits
8 bits
1 GB
1 GB
1 GB
1 GB
0000000A
00000006
00000002
0000000B
00000007
00000003
D31-D24
00000009
00000005
00000001
D23-D16
D15-D8
80386DX, 80486
00000008
00000004
00000000
D7-D0
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80x86 Architecture
Systems Design & Programming
CMPE 310
Basic Memory Architecture
Bank layout
FFFFFFFF
FFFFFFF7
00000017
0000000F
00000007
FFFFFFFB
FFFFFFF3
00000013
0000000B
00000003
Bank 7
FFFFFFFE
FFFFFFF6
Bank 6
FFFFFFFD
FFFFFFF5
Bank 5
FFFFFFFC
FFFFFFF4
Bank 4
8 bits
8 bits
8 bits
8 bits
512 MB
512 MB
512 MB
512 MB
D63-D56
Bank 3
00000016
0000000E
00000006
FFFFFFFA
FFFFFFF2
D55-D48
Bank 2
00000015
0000000D
00000005
FFFFFFF9
FFFFFFF1
D47-D40
Bank 1
00000014
0000000C
00000004
FFFFFFF8
FFFFFFF0
D39-D32
Bank 0
8 bits
8 bits
8 bits
8 bits
512 MB
512 MB
512 MB
512 MB
D31-D24
00000012
0000000A
00000002
D23-D16
00000011
00000009
00000001
D15-D8
Pentium/Pro/II/III
00000010
00000008
00000000
D7-D0
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80x86 Architecture
Systems Design & Programming
CMPE 310
Basic I/O Architecture
DRAM (Main Memory)
Active
Processes
ISR NIC
ISR sound
Other OS code
NIC
I/O Space
Interrupt Vectors
FFFF
0000
Ports
Mem
Bus
Data/Address Bus
Bus
Micro
IRQs
processor INTR
0 1 2 ... 7
PIC
Sound card
Ports
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80x86 Architecture
Systems Design & Programming
CMPE 310
Interrupt Vectors (DOS PC)
BIOS Data area
Available Int. vectors
(DOS int #s 20H-3FH)
Interrupt Vectors
DRAM (Main Memory)
00500H
64 long words
00400H
224 long words
00080H
32 long words
00000H
Interrupt #
Video Graphic Chars
Diskette Parameters
Video Initialization
Timer Tick (18.2/sec)
Keyboard Break
Time of Day
Bootstrap
Resident BASIC
Printer
Keyboard
Cassette
Communications
Diskette/Disk
Memory
Equipment Check
Video
Printer
Diskette
Disk
Communications
Communications
Reserved
Keyboard
Time of Day
Reserved
Reserved
Print Screen
Overflow
Breakpoint
Non-maskable
Single Step
Divide by zero
(CPU)
(CPU)
(8087)
(CPU)
(CPU)
Pts to
Data
7C-7F
78-7B
74-77
70-73
6C-6F
68-6B
64-67
60-63
5C-5F
58-5B
54-57
50-53
4C-4F
48-4B
44-47
40-43
3C-3F
38-3B
34-37
30-33
2C-2F
28-2B
24-27
20-23
1D-1F
18-1B
14-17
10-13
C-F
8-B
4-7
0-3
Software Interrupts
Synchronous
Read-Only Memory
Address
1FH
1EH
1DH
1CH
1BH
1AH
19H
18H
17H
16H
15H
14H
13H
12H
11H
10H
FH
EH
DH
CH
BH
AH
9H
8H
7H
6H
5H
4H
3H
2H
1H
0H
Hardware Interrupts
Asynchronous
Microprocessor
Interrupts
8259A
BIOS Program Area
FFFFFH
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Systems Design & Programming
80x86 Architecture
CMPE 310
I/O Space
It is important to notice that these I/O addresses are NOT memory-mapped addresses on the
80x86 machines.
I/O Device Space
FFFF
I/O Expansion Area
COM1
Floppy Disk Controller
CGA Adapter
64K 8-bit I/O devices
LPT1
Hard Disk Controller
COM2
8255 (PIA)
Timer (8253)
Interrupt Controller
DMA Controller
03F8
03F0
03D0
0378
0320
02F8
0060
0040
0020
0000
Special instructions (IN/OUT) are used to communicate to the I/O devices.
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