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ASIC Development
IDEAS is specialized in the development of digital, analogue and mixed analogue-digital full custom designed integrated circuits,
such as application specific integrated circuits (ASIC). The ASIC development process includes all activities beginning with
definition of initial requirements and ending with the validation and release of prototype devices. The detailed work includes
technology selection, circuit design, synthesis and simulation, layout and design validation in a schedule compatible with
requirements in a cost-efficient way. IDEAS is familiar with the responsibilities and risks in developing custom made devices for
many applications. IDEAS tailors and manages the risks and responsibilities depending on the customers needs and possibilities.
The following items are important for successful ASIC development
Quality and product assurance
Quality and Product Assurance
For the management, engineering and product assurance in space projects and applications, IDEAS tailors the ASIC Development
Standard of the European Cooperation for Space Standardization, ECSS-Q-ST-60-02C. This standard aims at ensuring that the
custom designed ASIC meets their requirements in terms of functionality, quality, reliability, schedule and cost. The IDEAS ASIC
development process includes
- ASIC program management: control plan, development plan, verification plan, design validation plan
- ASIC engineering: definition, architectural design, detailed design, layout, manufacture, design validation
- ASIC quality assurance: review meetings, risk assessment and risk management, documentation.
Schedule and milestones from definition to release of devices
Schedule and Milestones from Definition to Release of Devices
The time needed for the development of an ASIC depends on the design complexity and the status of existing circuits. The
development time can be as short as 6 months for ASICs that are based on existing design heritage. New designs can require more
than a year development time. The milestones are achieved upon closure of review items, which are documented inputs to the
following reviews
- Beginning of the ASIC definition and kick-off meeting (KOM) and review of the statement-of-work (SOW) in the
development contract
- SRR - system requirements review of ASIC requirements and ASIC development plan
- PDR ? preliminary design review of the ASIC architecture and the preliminary design, feasibility study and risk assessment
- DDR ? detailed design review of ASIC netlist generation and verification documents
- CDR ? critical design review of ASIC layout generation and verification documents
- Tapeout and MRR ? manufacturing readiness review of verification results of the foundry
- Release of untested prototype devices
- TRR ? rest readiness review of the ASIC design validation plan
- QR/AR- Quality review and acceptance review of test results
- Release of tested prototype devices
Following the ASIC development is wafer production, wafer qualification and lot acceptance tests (LAT), die packaging and tests
for known-good dice, packaged chip or hybrid assemblies.
Design complexity and existing circuits
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Design Complexity and Existing Circuits
The design complexity depends on the device requirements in terms of functionality and performance. Circuits with only analogue
functions are of relatively low complexity, for example IDEAS ASIC IDE1180. Circuits with many functions and large number of
gates are of high complexity, for example IDEAS ASIC NIRCA.
Technology readiness and model philosophy
Technology Readiness and Model Philosophy
At the beginning of an ASIC development IDEAS and the Customer discuss and agree upon the goal and objectives of the ASIC
development activity. It is useful to define the goal in terms of the technology readiness level (TRL) and the objectives in terms of
models:
- TRL assesses the maturity of the ASIC design. Entirely new designs might aim at TRL4, that is ASIC validation in
laboratory environment. Further designs might aim at TRL6, that is demonstration in a relevant ground or space environment.
- Models are of type engineering model, qualification model, proto-flight model, or flight model.
The model philosophy combines programmatic constraints, verification strategies and the integration and test program, taking into
account the development status of the candidate ASIC design.
- Programmatic constraints are defined by cost and risk, schedule, review methods and review details, need for compatibility
with existing interfaces, and other customer requirements.
- Verification strategies are defined in verification requirements, methods and level of verification, and the number of
verification stages.
- Integration and tests include the test requirements, test sequence, test configurations and test facilities.
Development status defines new or existing technologies, the design qualification, heritage, and possible need for 3rd party
designs or services.
The model philosophy is defined as part of the overall verification plan. The purpose is to achieve confidence in the product
verification with the shortest planning and a suitable weighing of costs and risks.
Outputs and deliverables
Outputs and Deliverables
The outputs of the ASIC development process and deliverables to the customer are
- Documents: data sheet, etc.
- Prototype devices (hardware): bare dice or packaged devices
- Qualified devices: wafer scale dice and packaged devices
Resources ? Team, Tools and Fabs
Resources - Team, Tools and Fabs
IDEAS uses global foundries and chooses the technology and process giving the best fit with the requirements. IDEAS uses
state-of-the art ASIC design and verification tools. IDEAS holds a team of experts in analog and digital circuit (mixed signal)
design. The IDEAS ASIC design team has accumulated more than 100 years of integrated circuit design and holds experts in
radiation hard, micro-power, cryogenic temperature electronics. The IDEAS staff includes experimental physicists, and offers a
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complete ASIC development from definition to release of prototype devices.
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