Universal Operational Amplifier
Single, Dual, Quad (SOIC)
Evaluation Module
With Shutdown
User’s Guide
April 2001
Mixed-Signal Products
SLOU061A
IMPORTANT NOTICE
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Copyright  2001, Texas Instruments Incorporated
Preface
Related Documentation From Texas Instruments
J
J
Amplifiers and Comparators Data Book (literature number
SLOD002). This data book contains data sheets and other
information on the TI operational amplifiers that can be used with this
evaluation module.
Power Supply Circuits Data Book (literature number SLVD002).
This data book contains data sheets and other information on the TI
shunt regulators that can be used with this evaluation module.
FCC Warning
This equipment is intended for use in a laboratory test environment only. It
generates, uses, and can radiate radio frequency energy and has not been
tested for compliance with the limits of computing devices pursuant to subpart
J of part 15 of FCC rules, which are designed to provide reasonable protection
against radio frequency interference. Operation of this equipment in other
environments may cause interference with radio communications, in which
case the user at his own expense will be required to take whatever measures
may be required to correct this interference.
Trademarks
PowerPAD is a trademark of Texas Instruments.
Chapter Title—Attribute Reference
iii
iv
Running Title—Attribute Reference
Contents
1
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1
1.1
Design Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2
1.2
Power Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2
2
Evaluation Module Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.1
Physical Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.2
Area 100—Single Device SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.3
Area 200—Dual Device SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.4
Area 300—Quad Device SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.5
General Power Dissipation Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.6
EVM Component Placement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.7
EVM Board Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3
Example Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-1
3.1
Schematic Conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-2
3.2
Inverting Amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-2
3.3
Noninverting Amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-3
3.4
Differential Amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-4
3.5
Sallen-Key Low-Pass Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-5
3.6
Sallen-Key High-Pass Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-6
3.7
Two Operational Amplifier Instrumentation Amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-8
3.8
Quad Operational Amplifier Instrumentation Amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-10
Chapter Title—Attribute Reference
2-1
2-2
2-3
2-4
2-5
2-7
2-8
2-9
v
Running Title—Attribute Reference
Figures
2–1
2–2
2–3
2–4
2–5
2–6
2–7
Area 100 Schematic—Single Device, SOIC (8-pin) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-3
Area 200 Schematic—Dual Device, SOIC (14-pin) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-4
Area 300 Schematic—Quad Device, SOIC (16-pin) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-6
Maximum Power Dissipation vs Free-Air Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-7
EVM Component Placement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-8
EVM Board Layout—Top . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-9
EVM Board Layout—Bottom . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-10
3–1
3–2
3–3
3–4
3–5
3–6
3–7
Inverting Amplifier with Dual Supply Using Area 100 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-2
Noninverting Amplifier with Single Supply Using Area 100 . . . . . . . . . . . . . . . . . . . . . . . . . . 3-3
Single Operational Amplifier Differential Amplifier With Single Supply Using Area 100 . . 3-4
Sallen-Key Low-Pass Filter With Dual Supply Using Area 200 . . . . . . . . . . . . . . . . . . . . . . . 3-5
Sallen-Key High-Pass Filter With Single Supply Using Area 200 . . . . . . . . . . . . . . . . . . . . . 3-7
Two Operational Amplifier Instrumentation Amplifier With Single Supply Using Area 200 3-9
Quad Operational Amplifier Instrumentation Amplifier With Dual Supply Using Area 300 3-11
Table
2–1
vi
Dissipation Rating Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-7
Chapter 1
Introduction
This user’s guide describes the universal operational amplifier single, dual,
quad (SOIC) evaluation module (EVM) with shutdown (SLOP248). The EVM
simplifies evaluation of Texas Instruments surface-mount op amps with or
without shutdown feature.
Topic
Page
1.1
Design Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–2
1.2
Power Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–2
Introduction
1-1
Design Features
1.1 Design Features
The EVM board design allows many circuits to be constructed easily and
quickly. There are three circuit development areas on the board, and each
uses IC amplifiers in the SOIC package. Area 100 is for a single operational
amplifier (op amp), with or without shutdown. It also features offset nulling pin
pads. Area 200 is for a dual op amp, with or without shutdown. Area 300 is for
a quad op amp, with or without shutdown. A few possible circuits include:
-
Voltage follower
Noninverting amplifier
Inverting amplifier
Simple or algebraic summing amplifier
Difference amplifier
Current to voltage converter
Voltage to current converter
Integrator/low-pass filter
Differentiator/high-pass filter
Instrumentation amplifier
Sallen-Key filter
The EVM PCB is of two-layer construction, with a ground plane on the solder
side. Circuit performance should be comparable to final production designs.
1.2 Power Requirements
The devices and designs that are used dictate the input power requirements.
Three input terminals are provided for each area of the board:
Vx+
GNDx
Vx–
Positive input power for area x00 i.e., V1+ ⇒ area 100
Ground reference for area x00
i.e., GND2 ⇒ area 200
Negative input power for area x00 i.e., V3– ⇒ area 300
Each area has four bypass capacitors – two for the positive supply, and two
for the negative supply. Each supply should have a 1-µF to 10-µF capacitor for
low-frequency bypassing and a 0.01-µF to 0.1-µF capacitor for high-frequency
bypassing.
When using single-supply circuits, the negative supply is shorted to ground by
bridging C104 or C105 in area 100, C209 or C210 in area 200, or C311 or C312
in area 300. Power input is between Vx+ and GNDx. The voltage reference
circuitry is provided for single-supply applications that require a reference
voltage to be generated.
1-2
Introduction
Chapter 2
Evaluation Module Layout
This chapter shows the universal operational amplifier single, dual, quad
(SOIC) evaluation module (EVM) with shutdown board layout, schematics of
each area, and describes the relationships between the three areas.
Topic
Page
2.1
Physical Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–2
2.2
Area 100—Single Device SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–3
2.3
Area 200—Dual Device SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–4
2.4
Area 300—Quad Device SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–5
2.5
General Power Dissipation Considerations . . . . . . . . . . . . . . . . . . . . . . 2–7
2.6
Component Placement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–8
2.7
Board Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–9
Evaluation Module Layout
2-1
Physical Considerations
2.1 Physical Considerations
The EVM board has three circuit development areas. Each area can be
separated from the others by breaking along the score lines. The circuit layout
in each area supports an op amp package, voltage reference, and ancillary
devices. The op amp package is unique to each area as described in the
following paragraphs. The voltage reference and supporting devices are the
same for all areas. Surface-mount or through-hole components can be used
for all capacitors and resistors on the board.
The voltage reference can be either surface-mount or through-hole. If
surface-mount is desired, the TLV431ACDBV5 or TLV431AIDBV5 adjustable
shunt regulators can be used. If through hole is desired, the TLV431ACLP,
TLV431AILP, TL431CLP, TL431ACLP, TL431ILP, or TL431AILP adjustable
shunt regulators can be used. Refer to Texas Instruments’ Power Supply
Circuits Data Book (literature number SLVD002) for details on usage of these
shunt regulators.
Each passive component (resistor or capacitor) has a surface mount 1206
footprint with through holes at 0.2″ spacing on the outside of the 1206 pads.
C105, C106, C107, C207, C208, C209, C312, C314, and C315 have a surface
mount 1210 footprint with through holes at 0.2″ spacing on the outside of the
1210 pads. Therefore, either surface-mount or through-hole parts can be
used. The potentiometer for the offset nulling feature in area 100 can also be
either a surface-mount or a through-hole unit.
Figures 2–1 through 2–3 show schematics for each of the board areas. The
schematics show all components that the board layout can accommodate.
These should only be used as reference, since not all components will be used
at any one time.
2-2
Evaluation Module Layout
Physical Considerations
2.2 Area 100—Single Device SOIC
Area 100 uses 1xx reference designators, and is compatible with a single op
amp, with or without shutdown, packaged as an 8-pin SOIC. This
surface-mount package is designated by a D suffix in TI part numbers, as in
TxxxxCD, TxxxxID, etc.
Offset nulling can be extremely important in some applications. The EVM
accommodates TI IC op amps that provide this feature. The input offset can
be adjusted by connecting a 100-kΩ potentiometer between terminals 1 and
5 of the device and connecting the wiper to VCC– via a resistor (R101) as
shown below. This resistor is used to fine tune the offset adjustment. For
example, when using the TLC070 or TLC071 device and a 100-kΩ nulling
potentiometer, the offset voltage adjustment is ±10 mV when R101 is 5.6 kΩ
and ±3 mV when R101 is 20 kΩ.
When using the nonshutdown version of the device, pin 8 of the IC is a no
connect.
Figure 2–1 shows the area 100 schematic.
Figure 2–1. Area 100 Schematic—Single Device, SOIC (8 pin)
V1+
C110
R114
V1+
C107
R110
C108
R112
C109
A101–
V1+
GND1
R109
C105
C104
A102–
V1–
R103
R104
3 +
A103+
Power Supply Bypass
1
A104+
V1–
7
– 8
2
U101
4
SD
6
5
V1–
R102
OUT
R106
R107
R108
V1+
VREF1
U102
C101
R111
R105
R101
C102
C106
A1 FLT
C103
V1–
R113
Voltage Reference
Evaluation Module Layout
2-3
Physical Considerations
2.3 Area 200—Dual Device SOIC
Area 200 uses 2xx reference designators, and is compatible with dual op
amps, with or without shutdown, packaged as an 8-pin (without shutdown) or
14-pin (with shutdown) SOIC. This package is designated by a D suffix in TI
part numbers, as in TxxxxCD.
When using the nonshutdown version of the device, ensure that the IC is
aligned at the top of the IC pad array—the last six PCB pads (three on each
side—pins 5, 6, 7, 8, 9, and 10) will not be used.
Figure 2–2 shows the area 200 schematic.
Figure 2–2. Area 200 Schematic—Dual Device, SOIC (14 pin)
C211
R216
V2+
R221
R212
C215
A201–
V2+
C206
V2+
R220
C207
A202–
GND2
R219
R218
A203+
C209
14
2
–
3 +
C210
A204+
V2–
V2–
1
4
U201a
A2/SD
A2OUT
1/2 Dual Op Amp
V2–
R217
Power Supply Bypass
6
R214
C212
R215
A2 FLT
C214
C213
R210
V2+
U202
C203
R207
VREF2
R211
R204
R206
C202
B201–
9
C208
R213
R203
B202–
R201
12
R205
B203+
11
B2/SD
–
13
+
U201b
Voltage Reference
B2OUT
1/2 Dual Op Amp
B204+
R202
R208
R209
C204
B2 FLT
C205
C201
2-4
Evaluation Module Layout
Physical Considerations
2.4 Area 300—Quad Device SOIC
Area 300 uses 3xx reference designators, and is compatible with quad op
amps, with or without shutdown, packaged in a 14-pin (without shutdown) or
16-pin (with shutdown) SOIC. This surface-mount package is designated by
a D suffix in TI part numbers, as in TxxxxID.
When using the nonshutdown version of the device, ensure that the IC is
aligned at the top of the IC pad array—the last two PCB pads (one on each
side—pins 8 and 9) will not be used.
Figure 2–3 shows the area 300 schematic.
Evaluation Module Layout
2-5
Physical Considerations
Figure 2–3. Area 300 Schematic—Quad Device SOIC (16 pin)
V3+
C302
R304
V3+
C313
C314
R301
R302
C301
A301–
GND3
C311
V3+
R303
C312
2
A302–
V3–
R306
A303+
V3–
Power Supply Bypass
R305
4
– 8
3 +
A304+
U301A
13
R309
C310
R314
A3 FLT
R307
C304
C305
R318
C308
B301–
C303
R312
6
B302–
B303+
A3 OUT
V3–
R308
R310
AB3/SD
1
R313
R317
–
5 +
7
B3 OUT
U301B
B304+
R315
R316
B3 FLT
R311
C307
C306
C309
R322
C317
R323
R325
C316
C301–
R324
11
C302–
R327
R326
C303+
C324
R331
–
12 +
CD3/SD
9
10
C3 OUT
U301C
C304+
R332
R329
R339
C321
R330
C3 FLT
D301–
C318
R333
15
D302–
R335
R334
D303+
–
14 +
16
D3 OUT
R328
C320
C319
U301D
D304+
R336
R338
R321
D3 FLT
C322
R337
V1+
VREF3
C323
U302
R320
C325
C315
R319
Voltage Reference
2-6
Evaluation Module Layout
General Power Dissipation Considerations
2.5 General Power Dissipation Considerations
ǒ Ǔ
For a given θJA, the maximum power dissipation is shown in Figure 2–4 and is calculated by the
following formula:
P
+
D
Where:
T
–T
MAX A
q JA
PD = Maximum power dissipation of Txxxx IC (watts)
TMAX = Absolute maximum junction temperature (150°C)
TA
= Free-air temperature (°C)
θJA = θJC + θCA
θJC = Thermal coefficient from junction to case
θCA = Thermal coefficient from case to ambient air (°C/W)
Figure 2–4. Maximum Power Dissipation vs Free-Air Temperature
MAXIMUM POWER DISSIPATION
vs
FREE-AIR TEMPERATURE
Maximum Power Dissipation – W
2
SOIC (16-pin)
Package
Low-K Test PCB
θJA = 114.7°C/W
TJ = 150°C
1.5
SOIC (8-pin)
Package
Low-K Test PCB
1
0.5
0
–55
SOIC (14-pin)
Package
Low-K Test PCB
–25
5
35
65
95
TA – Free-Air Temperature – °C
125
NOTE A: Results are with no air flow and using JEDEC Standard Low-K test PCB.
Table 2–1. Dissipation Rating Table
PACKAGE
θJC
(°C/W)
θJA
(°C/W)
TA ≤ 25°C
POWER RATING
D (8)
38.3
176
710 mW
D (14)
26.9
122.3
1022 mW
D (16)
25.7
114.7
1090 mW
Evaluation Module Layout
2-7
EVM Component Placement
2.6 EVM Component Placement
Figure 2–5 shows component placement for the EVM board.
Figure 2–5. EVM Component Placement
2-8
Evaluation Module Layout
EVM Board Layout
2.7 EVM Board Layout
Figures 2–6 and 2–7 show the EVM top and bottom board layouts,
respectively.
Figure 2–6. EVM Board Layout—Top
Evaluation Module Layout
2-9
EVM Board Layout
Figure 2–7. EVM Board Layout—Bottom
2-10
Evaluation Module Layout
Chapter 3
Example Circuits
This chapter shows and discusses several example circuits that can be
constructed using the universal operational amplifier EVM. The circuits are all
classic designs that can be found in most operational amplifier design books.
Topic
Page
3.1
Schematic Conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–2
3.2
Inverting Amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–2
3.3
Noninverting Amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–3
3.4
Differential Amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–4
3.5
Sallen-Key Low-Pass Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–5
3.6
Sallen-Key High-Pass Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–6
3.7
Two Operational Amplifier Instrumentation Amplifier . . . . . . . . . . . . 3–8
3.8
Quad Operational Amplifier Instrumentation Amplifier . . . . . . . . . 3–10
Example Circuits
3-1
Schematic Conventions
3.1 Schematic Conventions
Figures 3–1 through 3–6 show schematic examples of circuits that can be
constructed using the universal operational amplifier EVM with shutdown. The
components that are placed on the board are shown in bold. Unused
components are blanked out. Jumpers and other changes are noted. These
examples are only a few of the many circuits that can be built.
3.2 Inverting Amplifier
Figure 3–1 shows area 100 equipped with a single operational amplifier
configured as an inverting amplifier using dual power supplies.
Basic setup is done by choice of input and feedback resistors. The transfer
function for the circuit as shown is:
V OUT
+ * VIN R112
R109
To cancel the effects of input bias current, set R105 = R112 || R109, or use a
0-Ω jumper for R105 if the operational amplifier is a low input bias operational
amplifier.
Figure 3–1. Inverting Amplifier With Dual Supply Using Area 100
C110
R114
V1+
R110
R112
VOUT = –VIN
R109
A101–
V1+
C107
0.1 µF
V1+
C108
10 µF
R109
A102–
GND1
V1–
R112
C109
C105
0.1 µF
R103
2
R104
3 +
A103+
C104
10 µF
–
R102
+ A104–
7
8
SD
6
4
A OUT
U101
R105 = R112 II R109,
or Short if Using Low
Input Bias Op Amp
V1–
Vin
Power Supply Bypass
V1–
–
R105
C101
R106
A1 FLT
V1+
R108
2
–
3 +
VREF1
R111
R
6
5
1
C
U102
C106
Optional
R107
100 k
A
R113
Voltage Reference
Not Used
3-2
C103
C102
R101
5.6 k
V1–
Example Circuits
Noninverting Amplifier
3.3 Noninverting Amplifier
Figure 3–2 shows area 100 equipped with a single operational amplifier
configured as a noninverting amplifier with single-supply power input.
Basic setup is done by choice of input and feedback resistors. The transfer
function for the circuit as shown is:
V
OUT
ǒ
Ǔ
+ VIN 1 ) R112
) VREF1
R109
The input signal must be referenced to VREF1.
To cancel the effects of input bias current, set R102 = R112 || R109, or use a
0-Ω jumper for R102 if the operational amplifier is a low input bias operational
amplifier.
The TL431 adjustable precision shunt regulator, configured as shown,
provides a low impedance reference for the circuit at about 1/2 V1+ in a 3 V
system. Another option is to adjust resistors R113 and R111 for the desired
VREF1 voltage. The formula for calculating VREF1 is:
VREF1
ǒ
) R113
+ 1.24 V R111R113
Ǔ
Figure 3–2. Noninverting Amplifier With Single Supply Using Area 100
V1+
R114
C110
V1+
C107
0.1 µF
V1–
R110
C105
C109
A101+
C104
R109
A102–
R103
A103+
R104
(
7
2
–
3 +
VOUT = VIN 1 +
8
6
R112
R109
) + VREF4
SD
1 OUT
U101
4
R102
Power Supply Bypass V1–
R112
V1+
Jumper 102 – to VREF1
Jumper
GND1
C108
10 µF
A104–
V1–
V1+
+
C101
R105
Vin
R108
2.2 kΩ
R106
–
1 FLT
Jumper
VREF1 = 1.24 V
C102
C
R
C103
C106
10 µF
R111
U102 = TLV431ACDBV5
A
Input Signal With
Reference to VREF1
R102 = R112 II R109,
or Short if Using Low Input
Bias Op Amp
2
–
3 +
R113
6
5
1
Voltage Reference
Optional
R107
100 k
R101
5.6 k
V1–
Example Circuits
3-3
Differential Amplifier
3.4 Differential Amplifier
Figure 3–3 shows area 100 equipped with a single operational amplifier
configured as a differential amplifier using a voltage reference and single
power supply.
Basic setup is done by choice of input and feedback resistors. The transfer
function for the circuit as shown is:
V
OUT
Where:
R112
R109
ǒ Ǔ)
+ VIN
R112
R109
VREF1
+ R102
R103
The TLV431 adjustable precision shunt regulator, configured as shown,
provides a low impedance reference for the circuit at about 1/2 V1+ in a 3-V
system. Another option is to adjust resistors R111 and R113 for the desired
VREF1 voltage. The formula for calculating VREF1 is:
VREF1
ǒ
) R113
+ 1.24 V R111R113
Ǔ
Figure 3–3. Single Operational Amplifier Differential Amplifier With Single Supply Using
Area 100
R114
C110
V1+
R112
R110
101–
V1+
Jumper
C107
0.1 µF
GND1
C109
C108
10 µF
C105
C104
R112
Vout = Vin
V1+
R109
7
8
2
1/SD
–
6
1OUT
3 +
U101
4
(
+
R109
102–
Vin
103+
–
R103
R104
R102
Jumper
104+
V1–
Power Supply Bypass
) + VREF1
V1–
R112
R102
=
R109
R103
V1–
C101
V1+
R105
R106
A1 FLT
R108
2.2 kΩ
C102
VREF1 = 1.24 V
R111
R
C106
10 µF
C
A
C103
Jumper 104+ to VREF1
U102
TLV431ACDBV5
R113
Voltage Reference
3-4
Example Circuits
Sallen-Key Low-Pass Filter
3.5 Sallen-Key Low-Pass Filter
Figure 3–4 shows area 200 equipped with a dual operational amplifier
configured as a second-order Sallen-Key low-pass filter using dual-power
supplies.
Basic setup is done by proper choice of resistors R and mR, and capacitors
C and nC. The transfer function is:
V OUT
V IN
+
1
Where:
ǒ Ǔ ) ǒ Ǔǒ Ǔ
1
*
2
j
Q
f
fo
fo
+ 2p Ǹm1 n RC
Q
+ mǸm) n1
And
f
fo
Figure 3–4. Sallen-Key Low-Pass Filter Wwith Dual Supply Using Area 200
R216
C211
R212
R221
V2+
C215
Jumper
A201–
V2+
C206
0.1 µ F
C207
10 µ F
R220
A202–
GND2
C209
0.1 µ F
A203+
C210
10 µ F
R219
R218
mR
R
A204+
V2–
1
3 +
4
U201A
V2–
R217
Power Supply Bypass
6
14
–
2
=
1
1– (f/fo)2 + (j/Q)(f/fo)
A2/SD
A2OUT
1/2 Dual Op Amp
fo =
1
2π √mn RC
Q=
√mn
m+1
+
C212
Vin
R215
–
R214
A2 FLT
C213
C214
nC
V2+
R207
C203
R210
R206
VREF2
R204
C202
B201–
R211
R
C
U202
A
C208
R203
B202–
B203+
R213
R201
Jumper
12
R205
9
B2/SD
–
11 +
13
U201B
R202
B2OUT
1/2 Dual Op Amp
B204+
Voltage Reference
Not Used
Jumper
V2–
Vout
Vin
V2+
Not Used
R209
C204
R208
B2 FLT
C205
C201
Example Circuits
3-5
Sallen-Key High-Pass Filter
3.6 Sallen-Key High-Pass Filter
Figure 3–5 shows area 200 equipped with a dual operational amplifier
configured as a second-order Sallen-Key high-pass filter using single-supply
power input.
Basic setup is done by proper choice of resistors R and mR, and capacitors
C and nC. Note that capacitors should be used for components R201 and
R205, and a resistor for C201. The transfer function for the circuit as shown
is:
ȡȧ * ǒ Ǔ ȣȧ
ȧȧ ǒ Ǔǒ Ǔ ǒ Ǔ ȧȧ)
Ȣ) * Ȥ
2
V OUT
+V
f
fo
IN
1
Where:
fo
+ 2p Ǹm1 n RC
Q
+ nǸm) n1
And
j
Q
2
f
fo
VREF2
f
fo
The TL431 adjustable precision shunt regulator, configured as shown,
provides a low impedance reference for the circuit at about 1/2 V2+ in a 5 V
system. Another option is to adjust resistors R211 and R213 for the desired
VREF2 voltage. The formula for calculating VREF2 is:
VREF2
3-6
ǒ
) R213
+ 2.50 V R211R213
Ǔ
Example Circuits
Sallen-Key High-Pass Filter
Figure 3–5. Sallen-Key High-Pass Filter With Single Supply Using Area 200
R216
C211
V2+
R212
R221
Jumper
C206
0.1 µF
C207
10 µF
R220
A202–
R219
R218
A203+
C209
C210
R217
A204+
Power Supply Bypass
V2–
Jumper
V2–
Jumper
V2+
6
14
2
–
1
3 +
U201A
4
A201–
V2+
GND2
C215
V2–
C212
A2/SD
A2OUT
1/2 Dual Op Amp
Not Used
R215
R214
A2 FLT
C213
C214
R207
R206
VREF2 = 2.5 V
R204
C202
R203
R210
Jumper
2.2 kΩ
B202–
12
R202
11
B204+
R211
R
C208
10 µF B203+
C
A
U202
TL431ACLP
mR
R201
C
+
R213
Vin
Jumper B204 + to VREF2
VOUT = VIN
9
–
13
+
U201B
1+(j/Q)(f/fo) – (f/fo)2
+ VREF2
B2/SD
B2OUT
1/2 Dual Op Amp
R205
fo =
1
2π √mn RC
Q=
√mn
m+1
nC
C204
R209
R208
–
Voltage Reference
–(f/fo)2
Jumper
B201–
V2+
C203
B2 FLT
C201
C205
R
Example Circuits
3-7
Two Operational Amplifier Instrumentation Amplifier
3.7 Two Operational Amplifier Instrumentation Amplifier
Figure 3–6 shows area 200 equipped with a dual operational amplifier
configured as a two-operational-amplifier instrumentation amplifier using a
voltage reference and single power supply.
Basic setup is done by choice of input and feedback resistors. The transfer
function for the circuit as shown is:
V
OUT
Where:
ǒ
Ǔ
) R212
) VREF2
+ VIN 1 ) 2R212
R220
R221
R212 = R206 and R221 = R203
To cancel the effects of input bias current, set R217 = R212 || R220 and set
R202 = R206 ||R203, or use a 0-Ω jumper for R217 and R202 if the operational
amplifier is a low input bias operational amplifier.
The TLV431 adjustable precision shunt regulator, configured as shown,
provides a low impedance reference for the circuit at about 1/2 V2+ in a 3 V
system. Another option is to adjust resistors R211 and R213 for the desired
VREF2 voltage. The formula for calculating VREF2 is:
VREF2
3-8
ǒ
) R213
+ 1.24 V R211R213
Ǔ
Example Circuits
Two Operational Amplifier Instrumentation Amplifier
Figure 3–6. Two Operational Amplifier Instrumentation Amplifier Wwith Single Supply
Using
Area 200
C211
R216
Jumper A201 – to B2OUT
R212
R221
R217 = R212 II R220
or Short if Using Low Input
Bias Op Amp
C215
A201–
Jumper
R220
A202–
V2+
R219
R218
A203+
R217
V2+
A204+
V2–
Jumper
C206
0.1 µF
GND2
(
2R212
R212
VOUT = Vin 1+ R220 + R221
V2+
14
6
2
A2/SD
–
1
A2OUT
3 +
U201A
1/2 Dual Op Amp
4
C209
V2–
R212 = R206
R221 = R203
C207
10 µF
C212
Jumper
A202– to B201–
C210
R215
V2–
C203
R207
Jumper VREF2 to B202–
R204
Jumper
R210
2.2 kΩ
VREF2 = 1.24 V
B201–
Jumper
B202–
C
R
U202
A
C208
10 µF
B203+
TLV431ACDBV5
R213
Voltage Reference
R206
C202
Jumper
R203
R211
C214
C213
Vin
–
V2+
R214
A2 FLT
+
Power Supply Bypass
)+ VREF2
R201
12
R205
11
9
–
+
B2/SD
13
U201B
B2OUT
1/2 Dual Op Amp
R202
B204+
R202 = R206 II R203
or Short if Using Low Input
Bias Op Amp
R209
C204
R208
B2 FLT
C201
C205
Example Circuits
3-9
Quad Operational Amplifier Instrumentation Amplifier
3.8 Quad Operational Amplifier Instrumentation Amplifier
Figure 3–7 shows area 300 equipped with a quad operational amplifier
configured as a quad-operational-amplifier instrumentation amplifier using a
dual power supply.
Basic setup is done by choice of input and feedback resistors. The transfer
function for the circuit as shown is:
V OUT
Where:
+ ǒVINB * VINAǓ
ǒ
ǒ ) Ǔ)
Ǔ) +
R303
2(R302)
R303
R325
R309
R302 = R318, R309 = R316, and R325 = R329
AV
+
R303
)
2(R302)
R303
R325
R309
101 as shown
To cancel the effects of offset errors, adjust Vadj (D304+) by applying an extra
signal.
3-10
Example Circuits
Quad Operational Amplifier Instrumentation Amplifier
Figure 3–7. Quad Operational Amplifier Instrumentation Amplifier With Dual Supply Using
Area 300
R304
C302
V3+
2.5 = V3+
R302
R301
C301
A301–
V3+
4
2
– 8
3 +
R303
100 Ω
A302–
Jumpers
A303+
R306
10 µF
5 kΩ
A304+
C314
GND3
1
0.1 µF
10 µF
AB3/SD
A3 OUT
C311
C312
2.5 = V3–
U301A
13
R305
0.1 µF
C313
Power Supply Bypass
V3–
V3–
R308
R309 A3 FLT
+
R307
C304
10 kΩ
VINA
C305
–
C317
R323
C303
R325
R322
C316
C301–
10 kΩ
R324
C302–
10 kΩ
C304+
R318
R310
R329
C308
B301–
R328
C318
R312
C320
6
Jumpers
R313
–
7
5 +
B303+
C3 OUT
R330 C3 FLT
5 kΩ
B302–
CD3/SD
11
9
–
10
12 +
U301C
R326
C303+
C310
R314
Jumpers
R327
B3 OUT
C319
U301B
R317
B304+
B3 FLT
R316
R315
+
VINB
R311
C307
10 kΩ
C306
–
C309
R321
V3+
VREF3
C324
R331
U302
R320
R339
R332
C321
C315
Jumper
D301–
R319
R333
15
D302–
R335
R334
D303+
–
14 +
16
D3 OUT
Voltage Reference
U301D
D304+
R336
Jumper
+
R338
D3 FLT
C322
R337
C323
Vadj
–
C325
Example Circuits
3-11
3-12
Example Circuits