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Chapter 11
Output Stages
EE 3120 Microelectronics II
Suketu Naik
Operational Amplifier Circuit Components
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1. Ch 7: Current Mirrors and Biasing
2. Ch 9: Frequency Response
3. Ch 8: Active-Loaded Differential Pair
4. Ch 10: Feedback
5. Ch 11: Output Stages
EE 3120 Microelectronics II
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Learning Objectives
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1) The classification of amplifier output stages on the basis of
the fraction of the cycle of an input sine wave during which
the transistor conducts.
2) Analysis and design of a variety of output-stage types ranging
from the simple but power-inefficient emitter follower class
(class A) to the popular push-pull class AB circuit in both
bipolar and CMOS technologies.
3) Thermal considerations in the design and fabrication of highoutput power circuits.
4) Useful and interesting circuit techniques employed in the
design of power amplifiers.
5) Optional: special types of MOS transistors optimized for
high-power applications.
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Introduction
 One important aspect of an amplifier is output resistance
 This affects its ability to deliver a load without loss of gain (or
significant loss)
 Large signals are of interest and small-signal models cannot be
applied
 Total harmonic distortion is good measure of linearity of
output stage
 Most challenging aspect of output stage design is efficiency
 Power dissipation is highly correlated to internal junction
temperature
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Commonly Used Output Stages
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11.1 Classification of Output Stages
Class A
Class AB
Class B
Class C
 Output stages are
classified according
to collector (drain)
current waveform
that results when
input signal is
applied
Figure 11.1: Collector current waveforms for
transistors operating in (a) class A, (b) class B, (c) class
AB, and (d) class C amplifier stages.
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11.2 Class A Output Stage
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(eq11.1) output voltage:
vO  vI  vBE 1
(eq11.2) maximum output voltage:
max  vO   VCC  VCE 1 sat
(eq11.3/4) minimum output voltage:
min  vO   VCC  VCE 2 sat  IRL
(eq11.5) bias current:
I
VCC  VCE 2 sat
RL
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11.2 Class A Output Stage
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11.2 Class A Output Stage
Figure 11.3 Transfer characteristic of the emitter follower in Fig. 11.2. This linear characteristic is obtained by neglecting the
change in v BE1 with iL. The maximum positive output is determined by the saturation of Q1. In the negative direction, the limit of
the linear region is determined either by Q1 turning off or by Q2 saturating, depending on the values of I and RL.
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11.2.3 Power Dissipation
 Maximum instantaneous power dissipation in Q1 is VCCI.
 It is equal to power dissipation in Q1 with no signal
applied (quiescent power dissipation)
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 Emitter-follower transistor dissipates the largest amount
of power when vO = 0
 Since this condition (no input signal) may be maintained
or long periods of time, transistor Q1 must be able to
withstand a continuous power dissipation of VCCI.
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Class A: Signal Waveforms
Figure 11.4: Maximum signal waveforms in the class A output stage of Fig. 11.2
under the condition I = VCC /RL or, equivalently, RL = VCC/I. Note that the
transistor saturation voltages have been neglected.
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11.2.4 Power Conversion Efficiency
(eq11.7) power conversion efficiency:  

(eq11.8) load power: P 
L
Vˆo / 2
RL
(eq11.9) supply power: PS  2VCC I

2
load power  PL 
supply power  PS 
1 Vˆo2

2 RL
1  Vˆo  Vˆo 
(eq11.10) supply power:   


4  IRL  VCC 
(eq11.11) peak output voltage: Vˆo  VCC  IRL
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11.3 Class B Output Stage
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Figure 11.5: A class B output stage.
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11.3 Class B Output Stage
Figure 11.6: Transfer characteristic for the class B output stage in Fig. 11.5.
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11.3 Class B Output Stage
1 Vˆo2
(eq11.12) load power: PL 
2 RL
1 Vˆo2
(eq11.13) power drawn from supplies: PS  PS 
VCC
 RL
total equals PS 
1 Vˆo2   RL 1
(eq11.15) efficiency:  

2 RL  2 Vˆo VCC
(eq11.16) maximum efficiency: max 
1 Vˆo2
VCC
 RL
  Vˆo

 4 VCC

4
 78.5%
1 VCC2
(eq11.17) maximum load power: max  PL  
2 RL
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11.3.4 Power Dissipation
(eq11.18) average power dissipation: PD  PS  PL
2 Vˆo
1 Vˆo2
(eq11.19) average power dissipation: PD 
VCC 
 RL
2 RL
value of Vˆo which corresponds to ˆ
2
(eq11.20)
: Vo
 VCC
PD max

max average power dissipation
(eq11.21) max average power dissipation: PD max
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2VCC2

 RL
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11.3 Class B Output Stage
Figure 11.8: Power dissipation of the class B output stage versus amplitude of the
output sinusoid.
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11.3.5 Reducing Crossover Distortion
 Crossover distortion of class B output stage may be reduced
substantially:
 Employing High-gain Op-amp
 Overall Negative Feedback
 0.7V deadband is reduced to 0.7/A0
 Slew-rate limitation of op-amp will cause alternate turning
on and off of output transistors to be noticeable
 More practical solution is class AB stage.
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Figure 11.9: Class B circuit with an op amp connected in a negative-feedback
loop to reduce crossover distortion.
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Figure 11.10: Class B output stage operated with a single power supply
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11.4 Class AB Output Stage
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 Crossover distortion can
be virtually eliminated
by biasing the
complementary output
transistor with small
nonzero current
 A bias voltage VBB is
applied between QN and
QP
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11.4 Class AB Output Stage
(eq11.24) output voltage: vO  vI 
(eq11.25) current iN : iN  iP  iL
VBB
 vBEN
2
(eq11.25) current IQ : IQ2  iP iN
Figure 11.12: Transfer characteristic of the class AB stage in Fig. 11.11.
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11.4.2 Output Resistance
(eq11.28) output resistance: Rout  reN || reP
VT
(eq11.29) small-signal emitter resistance N: reN 
iN
VT
(eq11.30) small-signal emitter resistance P: reP 
iP
VT VT
VT
(eq11.31) output resistance: Rout  || 
iN iP iP  iN
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Figure 11.13: Determining the small-signal output resistance of the class AB
circuit of Fig. 11.11
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11.5 Biasing the Class AB Circuit
 Figure 11.14 shows class AB circuit with bias voltage
VBB.
 Constant current IBIAS is passed through pair of diodes D1
and D2.
 In circuits that supply large amounts of power, the output
transistors are large-geometry devices.
 Biasing diodes, however, need not be large.
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11.5 Biasing the Class AB Circuit
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Figure 11.14: A class AB output stage utilizing diodes for biasing. If the junction
area of the output devices, QN and QP, is n-times that of the biasing devices D1 and
D2, a quiescent current IQ = nIBIAS flows in the output devices.
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11.5.2 Biasing Using the VBE Multiplier
Figure 11.15: A class AB output stage
utilizing a VBE multiplier for biasing.
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Figure 11.16: A discrete-circuit class AB
output stage with a potentiometer used in
the VBE multiplier.
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11.5.2 Biasing Using the VBE Multiplier
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VBE 1
(eq11.32) current IR : IR 
R1

(eq11.33) bias voltage: VBB  IR  R1  R2 

R2 
(eq11.33) bias voltage: VBB  VBE 1  1  
R1 


(eq11.34) current IC 1 : IC 1  IBIAS  IR

 IC 1 
(eq11.35) base-emitter voltage: VBE  VTln  
 IS 1 
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Power Amplifiers
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11.7 Power BJTs
 11.7.1. Junction Temperature
 150OC to 200OC
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 11.7.2. Thermal Resistance
 (eq11.69) TJ – TA = qJAPD
 11.7.3. Power Dissipation Versus Temperature
 One must examine power-derating curve
 11.7.4. Transistor Case and Heat Sink
 (eq11.72) qJA = qJC + qCA
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11.7.4 Transistor Case and Heat Sink
TO3 Package
TO3 Package: Top View
Figure 11.25 The popular TO3
package for power transistors: The
case is metal with a diameter of about
2.2 cm; the outside dimension of the
“seating plane” is about 4 cm. The
seating plane has two holes for
screws to bolt it to a heat sink. The
collector is electrically connected to
the case. Therefore an electrically
insulating but thermally conducting
spacer is used between the transistor
case and the “heat sink.”
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TO3 with Heat Sink
T220 Package
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11.7.4 Transistor Case and Heat Sink
Figure 11.26: Electrical analog of the
thermal conduction process when a
heat sink is utilized.
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Figure 11.27: Maximum allowable
power dissipation versus transistor-case
temperature.
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11.7.5 The BJT Safe Operating Area
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 The maximum allowable current
ICMax. Exceeding this current on
a continuous basis can result in
melting the wires that bond the
device to the package terminals
 The maximum power dissipation
hyperbola. This is the locus of
the points for which vCEiC =
PDmax (at TC0). For temperatures
TC > TC0, the power derating
curves described in Section
Figure 11.29: Safe operating area (SOA) of a BJT.
11.7.4 should be used to obtain
the applicable PDmax and thus a
correspondingly lower hyperbola
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11.7.5 The BJT Safe Operating Area
Figure 11.29: Safe operating area (SOA) of a BJT.
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 The second-breakdown limit:
Second breakdown is a
phenomenon that results
because current flow across
the emitter-base junction is
not uniform. Rather, the
current density is greatest
near the periphery of the
junction.
 Hot Spots
 Thermal Runaway
 The collector-to-emitter
breakdown voltage (BVCEO).
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11.7.6 Parameter Values of Power Transistors
 At high currents, the exponential iC-vBE relationship exhibits
a factor of 2 reduction in the exponent
 b is low, typically 30 to 80 (but can be as low as 5). It is
important to note that b has a positive temperature
coefficient
 At high currents r becomes very small (a few ohms) and rx
becomes important
 fT is low (a few MHz), Cm is large, C is even larger.
 ICBO is large, BVCEO is typically 50 to 100V.
 ICmax is typically in ampere range, as high as 100A.
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11.9 IC Power Amplifiers
 High-gain, small-signal amplifier followed by class AB
output stage.
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 Overall negative feedback is already applied
 Output current-driving capability of any general-purpose
op-amp may be increased by cascading it with class B or
class AB output stage
 Hybrid IC
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11.8.4 Thermal Shutdown
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Figure 11.35:
Thermal-shutdown circuit
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11.8.2 Use of Compound Devices
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Darlington Pair
Compound pnp
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11.8.2 Use of Compound Devices
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Biasing
Darlington
Pair
Class AB output stage
with Darlington npn and
compound pnp and VBE
multiplier for biasing
Compound pnp
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IC Power Amp: Example
Figure 11.36 The simplified internal circuit of the LM380 IC power amplifier. (Courtesy:
National Semiconductor Corporation.)
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IC Power Amp: Analysis
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Figure 11.37: Small-signal analysis of the circuit in Fig. 11.36. The circled
numbers indicate the order of the analysis steps.
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Summary
 Output stages are classified according to the transistor
conduction angle: class A (360O), class AB (slightly more
than 180O), class B (180O), and class C (less than 180O)
 The most common class A output stage is the emitterfollower. It is biased at a current greater than the peak load
current
 The class A output stage dissipates its maximum power
under quiescent conditions (vO = 0). It achieves a maximum
power conversion efficiency of 25%,
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Summary
 The class B stage is biased at zero current, and thus
dissipates no power in quiescence
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 The class B stage can achieve a power conversion efficiency
as high as 78.5%
 The class B stage suffers from crossover distortion
 The class AB output stage is biased at a small current; thus
both transistors conduct for small input signals, and
crossover distortion is virtually eliminated.
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Summary
 Except for an additional small quiescent power dissipation,
the power relationships of the class AB stage are similar to
those in class B
 To guard against the possibility of thermal runaway, the
bias voltage of the class AB circuit is made to vary with
temperature in the same manner as does VBE of the output
transistors
 The classical CMOS class AB output stage suffers from
reducing output signal-swing. This problem may be
overcome by replacing the source-follower output transistor
with a pair of complementary devices.
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