Development of nickel silicide for integrated circuit technology

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2-2006
Development of nickel silicide for integrated circuit
technology
Phu H. Do
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Development of Nickel Silicide for Integrated
Circuit Technology
A thesis submitted in
partial fulfillment of the requirements for the degree of
Master of Science in
Materials Science & Engineering
By
PhuDo
Materials Science & Engineering Department
Rochester Institute of Technology
February 2006
Sean L. Rommel
Dr. Sean L. Rommel
(Thesis Advisor)
Dr. Santosh Kurinec
(Committee Member)
Santosh K. Kurinec
Dr. Surendra K. Gupta
(Committee Member)
Dr. K.S.V. Santhanam
(Department Head)
Date:
Date: 0$
S. K. Gupta
Date:
Santhanam KSV
Date:
,
(J2f 10 ,
C.3 I ~2/0-6
!i~i ~
a
MS Thesis
PhuDo
Development of Nickel Silicide for Integrated
Circuit Technology
By
PhuH. Do
I, Phu H. Do, hereby grant pennission to the Wallace Memorial Library of the Rochester
Institute of Technology to reproduce this document in whole or in part that any
reproduction will not be for commercial use or profit.
Phu H. Do
March 23, 2006
First M. Last
Month Day, Year
11
MS Thesis
Phu Do
Acknowledgement
to thank my thesis advisor, Dr. Sean
First, I like
thesis study. His determination
The
research.
numerous
Rommel, for his
focus have kept
and
enlightening discussions
with
me
Dr. Rommel have
expected"
data,
and
and
planning/structuring
this thesis. In addition, his
helping
me
finalize
on
also
for
all
additional experiment
persistence and patience
this thesis
hours in editing my work, this thesis
I
the entire
aided me
in
all
to
help
have been
documentation. Without his
would not
me achieve
crucial
guidance and
have been successfully
the
in editing
long
completed.
like to thank Dr. Santosh Kurinec, thesis committee member and department head,
her help in coordinating the external RBS and SIMS analyses. She has been a
crucial
contributor
successfully
to the success
of
this thesis. Through
comprehend and analyzed
the
RBS, XRD,
initially suggested using the
way to finding the thickness of nickel
the one that
was
during
this study such as redefining the thesis research, comprehending the "not as
aspects of
goals of
throughout the
guidance
track
on
inexpensive
suggestion was crucial
in the
her guidance, I was able to
SIMS data. In addition, she
and
grooving technique as a quick
silicide. as evident in this thesis,
and
such
successful analysis of this study.
In addition, I also like to thank Dr. Surendra Gupta, thesis committee member, for all his
assistance in training me how to use the AFM and XRD tools. Through many long
discussions and trainings, he has taught me the importance of such tools and their
corresponding data
thesis
analyses.
In addition, he has
spent
many
long
hours in editing this
the
University of Central
document.
Thank
you to Dr. Gabriel Braunstein, Department
Florida, for performing the RBS analysis.
of
Physics
at
Lambers, University of Florida, for performing the SIMS
Thank
you
to Dr.
Thank
you
to Mrs. Anita
Thank
you
to Lance
Madam, IBM, for performing the
Barron, fellow
student, for his
help
additional
in training
analysis.
XRD
analysis.
me on the
AFM
and
XRD tool.
Thank
the
you
to Reinaldo
course of
Vega, fellow
student, for
data, formulating
electrical
testing. He played a crucial role
and
current external studies related
to this thesis. Since
and
intriguing discussions throughout
helping me analyze numerous
Reinaldo'
study in his processing, he has played
focus in advancing this thesis research to
nickel silicide
track
the
fine tuning the thesis experiments, wafer processing,
in getting updating my awareness in recent
puzzling
this
all
this thesis study. Reinaldo has contributed in
s
and
and
thesis study involves using
a major role
completion.
in
keeping
me on
In addition, his
preliminary thesis results have confirmed the successful implementation of nickel silicide
into RIT device fabrication and proven the relevance of this thesis research to MOSFET
device fabrication. His
contributions
have been invaluable to this thesis
in
study.
Phu Do
MS Thesis
Thank
Fabrication
for
to
you
through
the
and
and
financial
generous
Department
at
RIT Semiconductor & Microsystems
Microelectronic
the
Engineering
Department
at
RIT
improving
you
contribution
the
SMFL
Microelectronic
and
my writing
this thesis
Emily Brandon,
writing.
Through her
for
all
editorial
her
in
proof
she
helped
proper
format
work,
putting this thesis writing into the
skills and
help
style.
to my parents
and all
my
family members for their loving supports financially
emotionally throughout my time
encouragements through all
primary
of
RIT.
and editorial work of
writing
Thank
and
of
to my dear friend from high school,
you
reading
in
staffs/managements
Laboratory (SMFL)
Engineering
me
the
their processing supports. All processing and electrical analyses were possible
all
Thank
all
reason
for my
the
at
ups and
RIT. Thank
downs
of
for
you
my life
at
all
RIT.
their
They
cheers
and
have been the
educational success.
fiance, Thy Do, for her endless supports, understandings,
Thy has been the primary driving force for me since my initial
In addition, I like to thank my
and encouragements.
on
sign-
to this master of science
been there for me, taken
comforted me
through
while
I
was
you
too
busy
study.
with
very
much
for giving
me
given me and
She has
always
this research,
and
guided me
iv
done for
me
throughout
the opportunity to come to this country,
through the
outstanding education,
given me employment in this difficult times.
afforded me an
and
of me
this thesis
my difficult times. Most importantly, her persistence oversight
has been crucial in pushing me to finishing this research.
to thank God for all the things He has
my life. Thank
study,
care
completion of
all
of my research progress
Lastly, I like
degree to the
completion of
this thesis
Phu Do
MS Thesis
Phu Do
MS Thesis
Abstract
Continuous
integrated
circuits with smaller
The complementary
of
this
success.
several
in devices,
advancements
materials
device dimensions, higher
metal oxide semiconductor
The MOS transistor is shrinking
decades. As the device dimensions
capacitance
resistance,
and
and
inductance
are
functionality
and
(CMOS) technology has
following the
approaching
beginning
are
have
processes
to
higher
been the
Moore's Law
nanometer
resulted
over
regime,
influence the
in
speed.
engine
the
last
parasitic
performance
significantly.
Self-aligned
gate
and
contact resistance
process also enabled
TiSi2
CoSi2
comparable
no
line
delayed
serious
as
low resistivity
as
is
Titanium
modern
reduction of
materials.
The
of
linewidth
nickel
single
thermal
Rapid thermal
The
(TiSi2)
and
Cobalt
effect and excessive silicon
monosilicide
and
less
silicon
relatively
NiSi into future
(NiSi).
NiSi
has
during formation,
planar silicide-silicon
generation
devices has been
thermal instability.
in this thesis,
carried out on
nickel silicide.
of
treatment,
silicide
devices. With devices shrinking,
traditional silicides yet consumes
presented
Silicidation has been
studied and
alternative
by limited knowledge of its
into
silicides
limitations
However, implementation
silicon regions.
metal
extensively
attractive
dependence,
In the study
metal
finding
resistivity
width
interface.
are
One
consumption.
using
been implemented into
(CoSi2) have
and
by
that allowed
mid eighties
higher packing density.
Many silicides have been
silicide
developed in
silicide process was
silicidation of nickel metal
doped
has been investigated.
and non-doped polycrystalline and crystalline
process was used
for the
silicidation of sputtered nickel
electrical and material properties of nickel silicide were
vi
Phu Do
MS Thesis
characterized,
and
silicidation conditions
have been
Electrical resistivity
using the four-point
was used
to
The
silicide surface
and
XRD technique
The
the
topography
condition
Such
topography
in
condition yield a
silicide was
NiSi
695C
study
correlation
and
SIMS
between
and phase composition.
It is
resistivity
concluded
using the AFM
done to
A
nickel silicide's electrical
multiple phases mixture
that the
500C for 20sec
resistivity
at
695c for 60
of -1.6 x
for obtaining the lowest
or more.
resistivity
(Poly).
vn
of-
Such
1.6
sec.
10"
(Si), 3.3
x
multi-phase mixture
condition yielded a
IO"5
x
temperature
most optimal silicidation
10"5
with an electrical
phase mixture with an electrical
calculation.
analysis were
single-phase nickel monosilicide was
most optimal silicidation
at
electrical
crystalline silicon and polysilicon regions at
NiSi film
found to be
resistivity measurements
of nickel silicide.
strong
respectively.
for obtaining the
H-cm (Poly). The
uses of sheet
Furthermore, RBS
material properties
and
and
properties,
and phase composition were analyzed
respectively.
composition was observed
less than 573C
through the
the silicide's thickness necessary for
with surface
material
technique and the grooving technique. The grooving technique
experimental result showed
resistivity
data,
electrical
made.
was calculated
probe
measure
complement
between
correlations
(Si), 2.5
NixSi
IO"5
x
+
2-cm
Phu Do
MS Thesis
Table
of
Content
Acknowledgement
Table
of
List
of
Figures
List
of
Tables
1.
iii
Content
viii
x
xii
1
Introduction/Motivation
1.1. Integrated Circuit
Technology
Overview
3
1.3. IC
6
Technology
Challenges
9
1.4. Rationale
2.
7.5. Silicide
13
1.6. Conclusion
14
Reference
16
Background: Silicide
17
Technology
2.1. Titanium Silicide
19
2.2. Cobalt Silicide
22
26
2.3. Nickel Silicide
2.4. Silicidation Kinetics
2.5. Material
and
and
Electrical
Transformation
30
Property
31
2.7. Conclusion
32
34
Experimental
and
3.1. Atomic Force
3.2.
37
Microscopy
X-Ray Diffraction
40
42
Resistivity
3.4. Conclusion
45
Reference
46
Electrical Characterization
4.1. Sheet Resistivity
5.
35
Analytical Technique
3.3. Four-Point Probe: Sheet
4.
28
2.6. Transition to NiSi
Reference
3.
2
1.2. MOSFET Fundamentals
47
Four-Point Probe
(Rs) by
by Grooving
Electrical Resistivity ofNickel Silicide
47
4.2. Depth Profile
51
4.3.
55
4.4. Discussions
60
4.5. Conclusion
62
Reference
64
Material Characterization
5.1. Surface Morphology
65
by AFM
65
5.1.1.
Reference Regions
5.1.2.
Near Critical Temperature
5.1.3.
Silicidation Temperature Effect
68
5.1.4.
Silicidation Time Effect
69
5.2. Phase Identification
5.3. Phase Composition
66
and
by XRD
Constant Time
67
70
by RBS
74
vm
Phu Do
MS Thesis
5.4. Elemental Concentration
6.
by SIMS
78
5.5. Discussions
82
5.6. Conclusion
84
Reference
86
87
Closing Summary
Future Work
90
APPENDIX
91
1.
Fabrication Process Procedures
91
2.
Fabrication Process Cross-Sectional Diagram
92
3.
Design of Experiment
Raw AFM Data
92
4.
5.
Raw XRD Data
95
6.
Raw RBS Data
93
105
Ill
References
IX
Phu Do
MS Thesis
List
Figure
Description
1.1
Cross-section
1.2.
MOS Capacitor
1.3
NMOS transistor
1.4.
Schematic
Figures
of
Page
model of a
of a
NMOSFET
apply
gate
voltage,
Vg
section
3
5
NMOSFET
cross-section prior
cross
with no
10
to salicidation
showing
various
series
11
flow from
12
contributions
to
resistance
1.5
Channel
channel
MOSFET
to
salicidation
with
showing
current
silicide
2.1
TiSi2
silicidation process.
2.2
Sheet
resistance of
2.3
General
2.4
Poly
CoSi2
Co
Not to
20
scale
function
silicide as a
23
of temperature.
24
silicidation process
N+
sheet resistance vs.
length for TiSi2, CoSi2,
gate
and
NiSi
25
silicides
3.1
Experimental
3.2
General
3.3
Schematic
3.4
Typical XRD
3.5
Four-Point Probe Schematic
4.1
Sheet resistivity
4.2
Top-down diagram
wafer quadrant
37
AFM
38
X-Ray Diffraction
41
Setup
of
division
of an
plot of
of
29
intensity vs.
four
42
angle
43
50
regions
of groove
(a)
and cross sectional view of groove
52
and wheel
4.3
Calculated junction depth
4.4
depth
4.5
Calculated
4.6
Resistivity as
profile as a
function
electrical
a
of
four regions
of temperature at
resistivity
function
plotted
of RTP
time
X
53
20sec
and
60sec time
by regions
at
695 C
and
54
57
573 C
57
MS Thesis
Phu Do
Page
Figure
Description
4.7
Resistivity as
4.8
Electrical resistivity
5.1
Reference AFM
and nickel on
5.2
Surface
a
function
of
doped
roughness
temperature
of RTP
of D3
58
temperature
implanted
2nd
regions after
doped polysilicon,
nickel
on
60
RTP
doped polysilicon,
66
silicon regions
of
surface
silicide's
known
around
critical
67
valued
5.3
RMS
roughness as a
function
of temperature at
5.4
RMS
roughness as a
function
of time at
5.5
XRD
intensity plot D3
5.6
General
prior
to and
573C
68
60sec
and
69
695C
71
after metal wet etch
observed nickel silicide phase
transition in
doped
crystalline
74
silicon and polysilicon
for RBS
75
5.7
Cross
5.8
Summary of RBS
5.9
SIMS
result
for
sample
D15-Poly_P+.
79
5.10
SIMS
result
for
sample
D15-Si_P+.
79
5.11
SIMS
result
for
sample
D14-Poly_P+.
80
sectional view of samples sent
analysis
result with elemental ratio and
XI
RBS thicknesses
76
Phu Do
MS Thesis
List
Tables
of
Table
Description
2.1
Desired Properties
2.2
Comparison
2.3
Phase Formation Temperature
2.4
Crystal Parameters
2.5
Mechanical Properties
2.6
Electrical Properties
2.7
Characteristic
3.1
composition of experimental wafer quadrants
36
4.1
Sheet
48
4.2
Average
4.3
Calculated junction depth
4.4
Calculated
4.5
Measured junction
5.1
Nickel
5.2
Page
of
Silicides for Integrated Circuits
of Noble and
and
Refractory Metal
and
18
Silicides
19
29
Kinetics
density for IC Technology
30
Silicide
of bulk silicides: compressive stress at
293K
of bulk silicides
30
31
of semiconductor silicides
Resistivity of samples prior to processing
sheet
electrical
silicide
Calculated
resistivity
measured
of four regions
depth, Rs,
and
phase(s) detected
silicide
by CD
resistivity based
Detected film layer from
6.1
Result
6.2
Conclusion
surface
based
Rs
by XRD
thickness based
5.3
on
ResMapper
resistivity
thickness compared to thicknesses
and
on
grooving technique
junction depth data
D3
regions
groove
49
53
56
60
72
analysis
on single-phase
from
after wet etch
of implanted
density
and
RBS
77
technique.
down through SIMS
analysis
81
88
Summary
Summary
30
and
Optimal Condition
Xll
89
Phu Do
1.
MS Thesis
Introduction/Motivation
Metal
has been
silicidation
industry. This thesis
semiconductor
this chapter, the author
presents a
to explain the rationale and
An integrated
and
and
circuit
is
fabricated
are
resistors)
material"
[1]. The IC
will
focus
"circuit in
a
(computers)
most evident
(shrinking)
of
faster
the
continuation of
circuit
most obvious
of
negligible
characteristics.
begin
many
Such
circuits and
on
a
elements
single
growth of
transistors
(transistors, diodes,
chip
of semiconductor
of communication
has
industry
this
is
given
live
people
of
rise to
and work.
(mobile phones),
maintained
dimensions. The benefits
take
Future IC
features that
at smaller
the
examples can
be
transistor
are
education
at
role
continued
or
in
However,
numerous challenges.
lithography
system and
advances
beyond the capability
many
phenomena
influencing
in the transistor
scaling
transistor size reduction
technology
dimensions,
dominant
seen
of
the
technology presents
modern
resistance.
by
higher packing density.
of the conventional optical
series
sharper
to
In
particular.
material.
power consumption and
is the limitation
Moreover,
NiSi in
tremendous growth since the invention
industry
transistor scaling in
of smaller and
system.
the IC
smaller
speed, lower
increase in the transistor
once
formation
(DVDs).
growth of
transistors to
are
imaging
important technology in the
the integrated
which
experienced
in the fields
and entertainment
The continuing
imaging
of
an
technological advances that have influenced the way
Such impact is
The
the
interconnected
and
industry has
for this
the first bipolar transistor in 1947 [10]. The
numerous
on
brief overview
requirements
(IC)
to be
continues
the
the
require
of
that
the
were
transistor's
series resistance where
the
Phu Do
MS Thesis
importance
geometry
The
with
property begins to be
the
device's
chapter will provide a quick synopsis of the semiconductor
industry.
the
of
materials
more
following
operation of a metal
oxide semiconductor
transistor (MOSFET). The chapter will also introduce several
industry
in the fabrication
of
down. Specifically, this chapter,
issues
related
fabricating
dissimilar
(near
perfect
by Russel
electrical
0.5
capable of producing
the
In
first 3 -terminal
point-contact
the
point-contact
would
each
the
other.
semiconductor
with
to
by
scale
focus mainly
on
challenges
in
the development
are
to
light due to the
and
Shockley
device
resistance"
since
its
at
of
materials
in intimate
The PN junction developed
transistor. The transistor
contact
the time was
recombination-generation
at
Bell Labs
was
operation
[10] invented
initially known
is nothing
more
as
a
than a
terminal to the others. Due to the complexity in producing
transistor, in 1951
telephone, radio,
will
faced
continue
coverage of all
charges, that
such as electron
junction transistor quickly became the
as
since
chapters,
technology began in 1940
volts when exposed
one
its dimensions
Bell Labs [10]. The PN junction is merely two
property,
from
major challenges
effect
Overview
circuit
at
as
field
be impractical.
1947, Bardeen, Brittain,
"transfer
transfer of resistance
Ohl
with
contact)
of charge carriers.
series resistance
Technology
integrated
origin of the
device
as well as all subsequent
down MOSFET
a scaled
the PN junction
with
the MOSFET
to the transistor's
1.1. Integrated Circuit
The
than
decreasing transistor size.
This includes the fundamental
the
crucial
Shockley developed
the junction transistor. The
essential component of all electronic
and other electronics.
devices
such
Phu Do
MS Thesis
In 1955, Bell Labs successfully fabricated the first field
FET
the birth
sparked
successfully built
a
Fairchild [10]. Noyce
[2],
by
in 1959
layer
with a process of
layer
metal
then
was
oscillator
produced
a
into
Kilby, from Texas Instruments,
5 integrated
by
pattern
components.
to
of metal over
create
method of
by
Further
technology"
combining the P
dioxide (Si02), developed
thin layer
a
evaporating
of
transistor (FET). The
Noyce introduced "planar
the integrated circuit
of silicon
etched
consisting
when
processing technique is the primary
circuits seen
when
IC"
"simple
advancements were made
silicon separated
IC technology in 1958
of the
effect
and
Hoerni
N junctions
and
the circuit. The
from
Lehovec
evaporated
the integrated circuitry. This idea
fabricating
complex
and
MOSFET integrated
today.
1.2. MOSFET Fundamentals
A
MOSFET,
metal-oxide-semiconductor
device in today's
active
regions,
electronic circuits.
a source and a
drain,
or p-type semiconductor material.
gate,
and
drain,
are
labeled
as
Typically,
that
are
a
MOSFET
selectively
consists of
connected
by
building
block
two electrically
a channel of n-type
Refer to Fig. 1.1 for detail. The three terminals, source,
S, G,
and
D
respectively.
(b)
(a)
Fig. 1.1. Cross-section
gate
field-effect transistor, is the
voltage,
induced
when
Vg,
the
model of a
NMOSFET
equals to the threshold
Vg
=
Vt in (b). Image
apply gate voltage, Vg, (a) and with an apply
Vt, (b). An electrically conductive channel is
with no
voltage,
adopted
from [4].
Phu Do
The
MS Thesis
source and
drain
are
highly doped regions
altering the conductivity
Certain impurities
of a
doped
with a
donor
such as
the
use of
referred
or
to
as a
drain
PMOSFET,
with one
uses p-type
depends
on
n-type
(polysilicon,
capacitor.
drain
source and
and
polysilicon
is
a
thin
a "p-
dopant. Similarly,
to the Si
as a positive charge and
the
p-type
of
by
semiconductor wafer
dopant implanted into the
has been fabricated. A
whereas
electrical
of metal
is
dopant for Si. The
a
p-channel
regions are separated
for the
stack
"donors"; A Si lattice
by
n-
MOSFET,
a region of
isolation. On top
of
the
(typically heavily doped
dioxide layer. Together, the three layers
stack
forms the metal-oxide-semiconductor, MOS,
gate
isolating silicon
silicon)
drain
Si.
valence structure of
is normally doped
with
the
same
dopant type
as
the source and
regions.
The
operation of
the MOSFET
gate
capacitor, Vg.
In
NMOS transistor, the
a
silicon
above an
oxide,
The
used as
dopant
impurities.
valence electron relative
the type of MOSFET that
uses
dopant. The
semiconductor
polysilicon) layer
n-type
ion implantation technique. The type
regions
a method of
temperature contribute these
mathematically behaves
normal semiconductor silicon which provides
isolating
less
hole. Typically, Boron is
MOSFET, NMOSFET,
channel
to the
phosphorus, are usually ion implanted into the
high-energy
source and
impurities
Doping is
the additions of
termed
are
Phosphorus is termed to be
absence of an electron
dopants, boron
by
and at room
energy
to current transport. These impurities
semiconductor contains
commonly
semiconductor material
activation
type"
lattice. This
silicon wafer.
contain an extra valence electron relative
These impurities have low
excess electrons
in the
Assuming
a
is
controlled
by the
application of voltage on
NMOSFET device in Fig.
silicon semiconductor
1.1, its
layer below the
operation
gate
is
is
the MOS
as
follows.
p-type which
is
MS Thesis
Phu Do
rich in
holes,
excess
positive voltage
is
the polysilicon
applied on
thin oxide layer. A
electrons near
while
the
polysilicon
positive voltage on
the interface
the
oxide-silicon
depletion
silicon
of
holes
interface,
interface in
near
as
a condition
the
much
the interface
as
Vg
forms in the
positive voltage on
connection
inversion
stage
where
MOSFET
applied
where
which removes
an
induced
Vt
where
defined
as
electrical
region
opposite
the
concentration of
p-type silicon
up
direction
established
an electrical current
of electrons
regions.
flow)
The inversion
to
oxide
if a
can
dm
oxide
99999
t-SUBSTKAH
2E2EHS
j-SUBSmA3t
MM_m
DEPLETION
Fig. 1.2. MOS Capacitor
INVERSION
of a
direct
provide a
can
voltage
known
as
the
flow from the
bias (Vd
defines the
be turned
the induced channel connecting the source to the drain.
rnkm
inversion
flow from the drain to the
stage
Vt. Refer to Fig. 1.2. The MOSFET
oxide-
the transistor. With higher
the drain regions. This condition is
set
the
the threshold voltage. The
carriers, electrons for n-channel,
to
holes
layer. The
gate voltage where an
is
the
concentration of
n-type channel near
of
a
the holes away from the
the
Vt is
the
a well-defined n-channel
between the two
Vg
=
of
When
created across
induces the
stage since
(semiconductor silicon)
source and
to the drain
(current flow in
voltage) is
Vt
the gate,
between the
source region
source
substrate
in
field is
all
pushing
lower than that
threshold voltage of a MOSFET is usually
region
by
n-type.
electron,
an electric
gate,
depletion
results
defined
excess
the polysilicon gate
of oxide-silicon
interface. This is commonly known
near
is rich in
NMOSFET [4].
or
drain
on-state of a
off when
Vg <
Phu Do
MS Thesis
1.3. IC
Technology Challenges
Over the
decades,
past
the MOSFET device has continually been
to fulfill Moore's Law. Typical MOSFET channel lengths 20
MOSFET
micrometers whereas modern
The
the
origin of
Moore's Law
number of
every
year.
transistors
came
per
ever since and
Why do
doubles
IC increases
about
has been known
MOSFET
need
as
like
a resistor.
resistance
induced
channel
MOSFET
and
MOSFET has
flow
current
and
less
length
effect
smaller
observation
operation speed of
most
channel.
resistor
and
thereby
thus
more
smaller
chip
has
higher
a
shorter
to
number of
size or chips with
a
for
reason
MOSFETs to fit in
a
length
smaller
speed and
for scaling down is to
cost.
a
The
the higher
Therefore,
higher processing
lower fabrication
higher processing
channel
flow. In addition,
current
MOSFET. Another important
and
reason
the drain through the
smaller gate capacitance.
density
important
as a current source.
shorter
of
and smaller gate capacitance contribute
size allows a
has been true
In the linear mode, MOSFET is
to the source. A
of a
number of
the transistor. Smaller MOSFETs
traveling from
and
about
Moore's Law.
current
gate,
in 1965 that
function, doubling
the
path
higher MOSFET packing
is
This final
to be scaled down in size? The
resistance
lower switching time
obtain
years.
to pass through the induced
along the
of nanometers.
observation made
as an exponential
size
ago were several
in the tens
are
In saturation, on-state, the MOSFETs behaves
arises
years
the observation in 1975 stating that the
every two
MOSFET scaling is to increase the
enable more current
lengths
from Gordon Moore's
However, he later modified
transistors per IC
channel
down in
scaled
Reducing
fixed
power on
area.
the channel
The resulting
the same chip area.
MS Thesis
Phu Do
Therefore,
the cost of fabrication is lower
chips with
higher processing power
Since the invention
of
been in the fabrication
difficulty
decreasing the
size of
lengths
with channel
However,
MOSFET,
tools and
Currently,
as small as
the fabrication
faced
gate
with material related
oxide
increase in
material
resistance of
must
the ideal material;
silicon.
With
such
meet
the criteria
with size
to limit
to substitute
the
for
capable of
issue is
series
less
work
metals
the
them to continue
density per
fabricating
IC
and
MOSFET
have high
induce
a channel
since
power consumption and
Highly doped
the
The primary
work
a
of
of
the
in IC technology is
of
in the
the ultra thin
source/drain
and
transistor,
metal gate was
compared
gate voltage must
silicon substrate.
be
polysilicon
same chemical composition and similar work
is
This does
not
down
a polysilicon gate was used
an acceptable conductor since
function
to
applied
the applied voltage must also scale
heating. Therefore,
the
requirement of a gate
function differences
higher
in
for
more of a concern
advancement
At the birth
function differences,
and
with
of a major challenge
becoming
resistance
polysilicon gate.
for MOSFET scaling
metal.
the MOSFET
becoming
Continuing
a good conductor.
difference
to overcome the
is
would enable
battling
issues ranging from the dielectric breakdown
however,
high
that
industry
capability is
advances.
the doped
be
is constantly
industry
90nm.
insulator to the increase in
is that it
The
material related
in further scaling
industry
same wafer or
difficulties in satisfying Moore's Law have
processes
the IC
process
today's MOSFET scaling. The
the
the
MOSFET, thereby increasing
the
Moore's Law.
fulfilling
new
fit into the
and price.
process capability.
developing
of
the
since more chips can
as silicon.
it has
Phu Do
MS Thesis
Polysilicon is
highly resistive
levels, its
concern
(about 1000X
sheet resistance
in
previous
is
more
IC technology
fact that geometry
polysilicon,
also
known
line
dependence
width
In addition,
resistance
drain
is
present
the
as
components
greater
source and
regions
(S/D)
drain
metals.
This
different
a
subsequent
resistance,
stacking
up the
of
material
it
section.
a pronounced
doping
was not a major
size
is
needed
a
such
as
continues
to
thereby amplifying
the
to control the
altogether.
polysilicon
overall
nature of silicon
S/D
gate, the increase in
source/drain
consists
different
overall
high
the MOSFET. Since the source and
The
exists.
with
is relatively large. It is
smaller
replace
to that of the
also
Rational
to
However, it is
a material's resistance
is getting
region of
series
and
components that make
drain regions, there is
of
material
several
increase in the
resistive
layers in the
series resistance will
However, it is
resistance,
clear
that
be
region.
covered
with smaller
series resistance of the
two
that significantly affects the overall operation of the MOSFET.
The two
introduction
transition
silicon
source/drain
depth in the
Even
metals.
to the geometry dependence
silicon similar
due to the geometry
The different
in
Therefore,
source and
essentially
in
a major role
of the polysilicon gate or
in the
to
polysilicon gate
polysilicon gate
due to MOSFET scaling
resistance
the
a similar challenge related
regions are
known
of
where
plays
the material.
property
compared
line-width dependence. As MOSFET
as
the geometry of the
resistance
resistive)
IC technology.
previous
significantly higher than
still
well-known
decrease,
in
an acceptable gate material
major
challenges
addressed
above
of a new material: metal silicide.
metal with silicon.
surface, is heated to a
A
can
resolved
metal silicide
The alloy is easily formed
specific
be
when a
temperature. The heat
is
an
together
alloy
metal, in
allows
by
the
mixture of a
contact with a
the two materials to
Phu Do
MS Thesis
intermix to form the alloy, commonly
material properties similar
Silicide
of a metal.
to
withstand
retains
the various
found in metal,
and
dependence. This
makes
to that
fabrication
it
as silicide.
Metal
silicide possesses
of silicon as well as electrical properties similar
the high melting
some
to
referred
point and
It
processes.
have low
silicides
hardness
sheet
resistance
for the
a suitable substitute material
of silicon which allows
has the low
also
to that
resistance
with
no
it
property
line
width
polysilicon gate.
1.4. Rationale
Metal
silicidation
semiconductor
referred
only
it
to
has been
industry. The
in
regions where
a self-aligned process
isolated
The
over
metal
beneficial
a
the
thick silicon dioxide
between the
regions.
gate and
silicidation process.
(oxide)
As
Once the
seen
important technique in the
it is its self-aligning nature,
(salicide). The
contact with
fabrication,
Several in-between
the
silicon surface.
the only
This
metal-silicon
the
formation
steps are needed to
of
makes
interface
prevents
spacers are
sidewall spacers
isolation
during
the
the silicidation on the two sides of the polysilicon gate
device. The
in place, the
in Fig. 1.3, the only
scale).
the polysilicon gate
form the
the S/D to provide the necessary electrical
This
often
process of metal silicidation
layer. Refer to Fig. 1.3 for detail (not to
several steps after
that may create a short of the entire
oxide.
is in
an
the gate regions. All other areas of the MOSFET are normally
is normally deposited
the S/D
metal
to be
aspect of
because in MOSFET
source/drain and
by
most
continues
as silicide-self aligned silicidation
occurs
is in the
and
metal
areas where
sidewall spacers are
layer is deposited to
the
metal
is in direct
usually
cover
made of
the entire wafer.
contact with a silicon
Phu Do
MS Thesis
surface are
in the S/D
regions and
the
regions where metal silicidation can occur which makes
Split 1
it
Fig. 1.3. NMOS transistor
essential role
to
reduce
continuing technology
behavior
with
low
(Rac)
resistance of
spreading
(Rsh)
the
from overlap
of
the
increasing
the
Source-drain
the
drain
in the
surface
the S/D region, and the
layer
to
S/D
it
metal
also
across
the depth
contact resistance
10
(S/D)
to
gate
associated
the
S/D,
(Rc0) between
on
regions.
an
The
maintain ohmic
drive
accumulation
of
takes
degrades the
degrades the
resistance
progresses with
silicidation
and gate contacts
is due to the
S/D,
Fig. 1.4.
salicidation.
(CMOS) technology
series resistance
region
gate
to
gate and source/drain
source region as
source or
region
(Rsp) from
the
advancement requires
on
a salicide process.
cross-section prior
devices number,
resistance of
resistance.
MOSFET, particularly
total
and
the only
Implant
metal oxide semiconductor
dimensions
are
Oxide Spacer
N+
decreasing
these
NiSi S/D Contact
-
Deposited Metal
As complementary
Hence,
polysilicon gate region.
current.
layer
with
the
current of a
The
resistance
the current
sheet resistance
metal and silicon.
See
Phu Do
MS Thesis
Metal
*c
Metallurgical
junction
-
Fig. 1.4. Schematic
Both
Rac
and
Rsp
cross section
are not
easily
for
accounted
contact edge
and
spacing,
(1.1)
by
Rs
equation
[Cl/a]
pscj
=
1.1
is the
doping
where w
sheet
series resistance
Rac is incorporated into
place
The
in
of the
the
a region with non
sheet resistance can
is the device width,
resistivity
[5].
s
is the
be
gate and
S/D diffusion [5].
w
\Ps__
w
(1.3)
gradient.
to
Psd
R=2___Hco I
(1.2)
practice since
spreading usually takes
resistivity due to the lateral S/D
accurately
in
measurable
active channel resistance and current
uniform
various contributions
showing
Pc
RC0=^S icJpTp.
sd
wl
R
(1.4)
=
^'"".
w
Equation 1.2 depicts the
[H-cm2] is
and
pc
1
and
.3
1
.4
case
resistance,
Rc0,
N
where
lc is
the interfacial contact resistivity between
represent
short contact case
contact
k4p~JfZ
the
short contact and
is driven
is driven mostly
by
long
the contact window width,
metal and silicon.
contact cases of
Rc0
respectively.
the interfacial contact resistance while the
by the current flowing into
11
Equations
long
the front edge of the contact.
The
contact
MS Thesis
Phu Do
As
from the
evident
resistance
and
contact
be
resistances can
NiSi. An
highly
conductive silicide thin
resistance,
This
constraint
sheet
Rc0, is
in
film
resistance,
less than that
RSh is
for the
1
equation
under
the
the
interfacial
/
contact
Isolation
resistivity is
edge
/
'
isolation
^/
to a
between
around
H
^
silicon.
minimum so
In addition, the
lc, is
now
two
and
is
The
that the
contact
the entire S/D
long
silicide and metal
contact
is typically
10"
i--cm
-
.
[5]
Spacers
\^)iitiiiumiih>ti<>m_*^
/>f\
oxide
^
spacer region.
<
/
Local
drain
source and
10"
negligible since
these
TiSi2, CoSi2,
the contact width to satisfy the
contact resistance
the sheet
sheet resistance of silicide
the contact window width,
variation of
The
.4.
of
by
However,
respectively.
the edge spacing
reduces
also reduced since
allows
Rco
mainly driven
a minimum with metal silicide such as
orders of magnitude
only contributing
region.
to
and
resistances are
this is illustrated in Fig. 1.5. The
example of
typically 1-2
Rsh
resistance,
reduced
S/D
discussion,
above
NiSi
\
V}>'\,ni>"!'"'li"""~>!">i Tt/JJ/Trffr.
m
"
\^\S
"
a"
"
"~
Equipotentkil
Fig. 1.5. N-Channel MOSFET
Silicide is
gate as well as
dimension
also
with salicidation
implemented
reducing the
continues
gate
the
flow from
polysilicon gate
with advances
of nucleation sites.
RC
current
contact resistance with metal
to decrease
to increase due to lack
to the increase in
over
showing
to
12
to silicide [5].
provide ohmic contact
interconnects. However,
in technology,
The increase in
delay of the MOSFET.
channel
silicide
silicide
to the
as gate
resistivity begins
resistivity
contributes
MS Thesis
Phu Do
1.5. Silicide
Traditionally,
and
CoSi2 due
the standard
to their low resistivity
dimension decreases
to lack
with advances
of nucleation sites caused
resistivity C54
CoSi2
silicide materials of choice
since
phase
it
Unfortunately,
the use of
junction leakage. The
with shallow
most
junction, is
low resistivity
of about
forming
of
The ITRS
by
the
node
report
global
universities.
NiSi
[6].
The
future
of
sole purpose of
technology
Despite the benefits
of
the
thermal
(Ni2Si, NiSi, NiSi2),
about
International
anticipated
the
no
line
width
and a single
lnm
report
width.
and
by
of
to be mainly
step
a
silicidation
previous silicides.
Ni to 1.84nm
over
of
Si,
in the >32nm IC
the S/D regions.
technology. It is published
industry leaders,
is to assess,
dependence,
Technology Roadmap for
semiconductor
the semiconductor
the
line
consumption
used of nickel silicide material
a global assessment of
semiconductor
known issue
2005
[7]. Its incorporation is
is
silicon
in
of
for future CMOS advances, especially
due to NiSi formation is
collaboration
The
alternative
its high
by
the introduction
decrease
a
two steps silicidation required
Semiconductor, ITRS, has identified
technology
limited
with
14 uI2-cm, low Si consumption,
consumption rate
2.22nm
phased out with
monosilicide, NiSi. NiSi has
of a
device
the incomplete phase transformation to the low
also
promising
temperature treatment instead
The Si
by
CoSi2 is
nickel
as
TiSi2
in technology, TiSi2 resistivity begins to increase due
increase in resistivity
no
were
high thermal stability [9]. However,
Therefore, TiSi2 has been
[11].
suffers
and
for CMOS device
identify,
researchers,
and
and predict current and
and associated challenges.
of NiSi as stated
instability
above, the
[8]. There
each of which
is
are
main concern of Ni silicidation
mainly three
characterized
13
is the
phases of nickel silicide
by dramatic differences in
sheet
Phu Do
MS Thesis
The
resistance.
thermal
silicidation process
processes
(RTP). The
250-300C followed
by
a
which
silicidation
for
has
is
to better
nickel monosilicide
composition
for
above
phase
obtain
the
NiSi
that
to
three
identify the
phases,
temperature
agglomerate and
between
transform
into
of nickel
required silicidation conditions
is
used
to
Microscopy (AFM)
and
rapid
to be between
[9]. A thorough investigation
of NiSi
Atomic Force
silicide
reported
phase at
X-Ray Diffraction (XRD)
identification,
structure associated with the
Ni2Si formation is
(~14(iQ-cm)
understand and
formation.
thermal energy treatment through
550C, NiSi begins
sheet resistance twice
needed
by
highly resistive
low resistivity
400-550C. At temperatures
NiSi2
is driven
the four
obtain
the
silicide
to study the grain
technique to
point probe
sheet resistance of the phase(s).
1.6. Conclusion
This
chapter presented
included
was
a
brief
history
discussed to
of
provide
subsequent chapters.
a
quick
synopsis
of
the IC technology. The
MOSFET scaling
was also
discussed
critical
silicide
the
advancement
since
they
challenges
was
covered,
discussed in this
the
nickel
rational
monosilicide
for the
and
to
is the
(NiSi),
not
need
for
MOSFET
the reading of
for
such
scaling
industry must
face to
all
challenges
general consensus
in
were
facing
a new material.
A
the
metal
that potentially can address such
metal silicide was also presented.
14
ease
the rational
However,
to this thesis. The
chapter
needed
that
technology
operation of a
the semiconductor
the IC technology.
are not relevant
proposed,
challenges and
of
basic
most
the fundamental understating
was presented as well as some critical challenges
continue
the integrated circuit
Phu Do
MS Thesis
The focus
silicide.
this thesis is to investigate and characterize the formation
of
In addition,
compatible with
formation
RIT
a
nickel
current
condition needed
Furthermore, its primary
RBS,
and
The
the IC
AFM
fundamentals
cover
and
the
of silicide
processes.
to form thin film
process
The
will
objective
main
nickel silicide with
topography
will
be developed to be
is to define the
the lowest
resistivity.
be identified through XRD,
techniques.
chapter will
technology in
CMOS
fabrication
phase and surface
analytical
following
silicide
of nickel
discuss the different
past as well as
the
formations
be
will
silicides
current and
covered
for
future
that
are of most
advances.
nickel silicide.
interest to
In particular, the
Chapter 2
will also
the current knowledge of the morphology, phase composition, electrical properties,
the material properties of these silicides in more detail.
15
Phu Do
MS Thesis
Reference
[1]
P.
Van Zant, Microchip Fabrication: A Practical Guide to Semiconductor
Processing,
Edition, McGraw-Hill, 2000.
IC Knowledge LCC, URL: http://www.icknowledge.com/history/history.html.
Wikipedia-The Free Encylopedia, URL: http://en.wikipedia.org/wiki/MOSFET.
Electronic Devices and Circuits Engineering Sciences, Harvard University, URL:
4th
[2]
[3]
[4]
http://people.deas.harvard.edu/~jones/esl54/lectures/lecture_4/mosfet/mos_model
s/mos_cap/mos_cap.html.
[5]
[6]
Y.
Taur, T. Ning, Fundamentals of Modern VLSI Devices, Cambridge University
Press, 1998.
P. Lee, D. Mangelinck, Nickel Silicide Formation on Si (100) and Poly-Si with a
Presilicide
Implantation, Journals of Electronic Materials, 30(12), 1554-1559,
N2+
(2001).
[7]
International
Technology
Roadmap
for
Semiconductor
(ITRS),
http://www.itrs.net/Common/2005ITRS/Home2005.htm.
[8]
F.
Zhao, J. Zheng, "Thermal Stability Study of NiSi and NiSi2 Thin Films",
Engineering Journal, 71, pp. 104-1 11, (2004).
B. Froment, M. Muller, "Nickel vs. Cobalt Silicide Integration for Sub-50nm
ESSDERC, pp.2 15-2 18, (2003).
W. Brinkman, D. Haggan, W. Troutman, "A History of the Invention of the
Transistor and Where It Will Lead
IEEE Journal of Solid-State Circuits,
(1997).
32(12), 1858-1865,
Microelectronic
[9]
CMOS,"
[10]
Us,"
[11]
R. Mann
et
al., "Silicides
and
Local Interconnections for High-Performance VLSI
Applications, IBM J. Res. Development. Vol. 39(4), (1995).
16
Phu Do
2.
MS Thesis
Background: Silicide
The investigation
temperature stability,
Schottky barriers
metallization
trend
for
Technology
of metal silicides can
physical properties
and
ohmic
reasons
More than half of the known
not all are suitable
undesirable properties.
high
diffusivity
melting
points
interaction
suited
VIA)
(Al
and
stability,
as seen
and noble metals
depends
Ni
on
as
discussed
many
other
the
discussed in the
include low
have high
Most
metals
(group
earlier.
VIII). The
The
most
have
oxidation rates
handful
most of which are
of desirable properties of silicides suited
17
the
(Mg
for VLSI
(Au
and
of silicides.
one or more
Pd)
and
Fe)
and
450C, interaction
and contact
metals
commonly
resistivity.
low
with
Si02,
spiking due to
that
are
(group IVA, VA,
and
Ti, Co,
and
used metals are
Table 2.1
application.
and
application are the
of metals with properties
refractory
for VLSI
least
at
usefulness of such metal silicides
factors besides their low
form
some
eutectic temperature
etchability, electromigration,
are a
technology
current
silicide metallization
to form
undesirable properties
there
silicide
previous chapter.
temperatures less than
However,
structure,
low resistivity
and
high
major categories:
electronic and crystal
the low resistivity
application.
properties
[3]. Other
for VLSI application,
perhaps
for VLSI
poor
in Al [1].
made
while others
Mg)
of
metals react with silicon
of metal with silicon at
poor chemical
diffusion
Such
in silicon,
in terms
in IC technology,
contacts
faster devices has
primary development focus for
However,
into four
grouped
interconnects in IC technology [1]. The
gates and
of smaller and
be
for IC technology
shows a
summary
Phu Do
MS Thesis
Table 2.1. Desired Properties
1
Low resistivity
2
3
Easy to form
Easy to etch for pattern
4
Should be
5
Mechanical stability;
Surface smoothness
6
stable
good
Should
reaction with
Good device
11
For
metals.
final
metal
not contaminate
10
devices,
contacts
-
low
contact
most metals
there
are
suitable
for VLSI
minimal
application are noble or
distinct differences between
Refractory
contacts metallization
silicides
formed from
metal silicides are more suitable
and
stability
for
gate
whereas noble metal
due to their low temperature formation
mainstream
IC technology has successfully implemented two
into full-scale device fabrication. The
CoSi2; TiSi2 belongs
formation temperature
and
exhibit
observed
line
to
earlier metal silicide was
to the refractory
the dominant diffuser
the noble metal silicide group with metal
width
resistance,
and
Schottky barrier height.
Until now, the
recent
tools
penetration
However,
better for
or
lifetime
characteristics and
window
wafers,
due to their high formation temperature
relatively higher
[7]. Line
stress
No
silicides are
has been
adherence, low
8
metallization
known to
oxidizable
9
the two groups as seen in Table 2.2.
more
generation
in oxidizing ambient;
Stability throughout processing, including high-temperature
sinter, dry or wet oxidation, gettering, metallization
As previously mentioned,
silicides
for Integrated Circuits [1].
7
junction
refractory
of Silicides
width
being
being
metal
silicon whereas
dependence is
degree
an
of line width
increase in
18
group
200nm,
and
with
the
high
CoSi2 belongs
the primary diffuser.
dependence for features below
show some
silicide
TiSi2
metal
and
to
TiSi2 has been
recently,
CoSi2
dependence for feature below 50nm
silicide's
resistivity due to insufficient
Phu Do
MS Thesis
nucleation sites with
the attention
observable
of
line
line
decreasing
the IC
technology industry
dependence,
width
Further
width.
Table 2.2. Comparison
as
of Noble and
reduction
NiSi,
toward
being the next
size
has
attracted
a noble metal silicide with no
silicide replacement
for CoSi2.
Refractory Metal Silicides [1].
Noble Metal
Property
Resistivity of metal
in device
Nearly
Refractory Metal
the same for all
metals:
7.5
2.5
Decreases
|jf2-cm
with atomic
in
number
a
group
and
in
a period
Resistivity of silicide
Crystal
Nearly the same:
structure of
25 10
Increases
number
with atomic number
period
No
Same for
silicide
correlation with
atomic number or
group;
group
with atomic
in
|j.Q-cm. no correlation
a
group
metals
in
and
one
changes with
atomic number of metal
Schottky barrier height
(n-type Si)
Greater than half the
All have
band gap energy;
increases with atomic
0.55
silicon
similar
0.05
value,
eV
number
Formation temperature
200-600C
>600C
Dominant diffuser
Metal
Silicon
Interatomic distances
Dm-M
Dm-m
<
Dm-Si
Dsi-si
Dm-m
Dm-m
>
>
Dm-sj
Dsi-si
Good
Poor
High temperature
(>1000C)
<
stability
2.1. Titanium Silicide
Titanium
silicide
The
to
silicide
utilize
metal silicide group.
IC technology for low resistivity
well-established
process.
belongs to the refractory
thin film formation
The thermal annealing
process of
process
gate and
TiSi2 is
may be done in
a
a
It
was
interconnects
two-step
thermal furnace or a rapid
known
deposited
sputtering technique. Silicon dioxide
onto
the
silicon wafer via
and/or silicon nitride
(Si3N4
-
nitride)
are
RTA
usually
19
or
RTP.
utilized
applications.
thermal annealing
thermal anneal chamber, commonly
as
the first metal
Typically,
titanium
(Si02
metal
-
is
oxide)
for isolation between different
Phu Do
MS Thesis
silicon
regions
and
interaction/reaction
anneal
process
the
causes
moderately low resistivity
of
C54-TiSi2
RTP
a
during
Fig. 2.1.
phase
minutes
A
1st
are not
avoid
easily
circuit short
phase
~1
[6]. The
1.0
is
wet
RTP
N2
ambient.
to form the
metal
and a
2M
nd
thin
RTP
C54-TiSi?
Si Substrate
Si Substrate
by
all un-reacted
of
H2SO4
part
at
a
However,
TiOx,
or
regions.
which
2
and
reacts
phase
metal
parts
is
removed
H202
at a
~750C
by the use
temperature
to pure metals and
completely into
is
leaves the
needed
to
a more stable
the RTP temperature should be below
over
This
the
could
The resistivity
equilibrium
spacer regions
potentially
of
C54-TiSi2
is desirable for IC device
20
scale.
temperature of
TiN
standard wet chemistry.
4 times higher than the
293K,
1
Not to
titanium
chemistry only
phase.
between the device's
[i-_-cm at
500C in
C49-TiSi2
process
the formation of TiSi,
etchable
about
The first thermal
After
low resistivity C49-TiSi2
lower resistivity C54-TiSi2
775C to
RTP
silicidation process.
formed,
second
transform the moderately
and
is
TiSi2
etching chemistry consisting
silicide untouched.
no
C54-TiSi2
Si Substrate
for 1-2
above
or
the surface [2]. Refer to Fig. 2.1 for detail.
Ti Metal
of ~90C
anneal.
little
the silicon-titanium interface
phase at
After
of a wet
the thermal
to diffuse into the titanium
silicon
Before RTP
Once the C49-TiSi2
has
generally
temperature
chamber at
C49-TiSi2
phase on
titanium
since
with oxide or nitride
step is usually done in
The RTP
layer
isolation
gate
because they
create a parasitic
the metastable
phase with
metallization
[3].
C49-TiSi2
resistivity
of
Phu Do
MS Thesis
TiSi2 has previously been
used
in IC device fabrication for
to its low resistivity, low contact resistivity to both
relatively high thermal stability
Moreover, TiSi2 is
[4].
silicides
since
TiSi2 is
relatively insensitive to
Therefore, it is best
suited
implementation into traditional CMOS
scale
for
device's'
laterally
across a
the
devices,
an effect
atmospheric
isolation
"bridging."
the thermal annealing is done in
N2
The
TiSi2 in devices
phase
Since titanium
200nm
inherently have
transformation
to
pure
is
less
energy
a nucleation-limited
to increase the
complete
the
One way to
2nd
compensate
described
as
and
silicide.
to
other
its
and makes
devices
continue
to
is the
TiSi2
previously.
21
this
which
as
TiSi2 layer
thin
a
effect can
case
for
be
suppressed
RTP
most
and short
anneals
if
[2].
than 200nm is the incomplete
transformation from the
phase
of ~5.7eV on
This
lightly doped
result
an
[5].
features less than
with
in
silicon
incomplete
phase
leads to higher resistivity
compared
dependence
effect as
the line
for the line
However,
oxide or nitride spacer can
process, devices
RTP annealing temperature to
the transformation [2].
spacer as
to form
available nucleation sites.
from the C49 to the C54 phase,
earlier.
RTP processing
in the
smaller
phase.
C54-TiSi2. This is commonly known
discussed
across
phase requires an activation
silicidation
titanium
phase of
However,
However,
which
ambient,
transformation from the C49 to C54
C49 to the C54
silicon
regions
as
more critical problem with
silicon,
due
show certain undesirable characteristics.
known
out
n-type
and
oxygen contamination compared
During the initial C49-TiSi2 phase formation,
diffuse
p-type
the final stable
process an ease.
down below 200nm, TiSi2 begins to
contact metallization
width
width
dependence
create more
C54
effect of
TiSi2 is
nucleation sites and
the higher temperature will lead to shorts
Phu Do
MS Thesis
The
TiSi2 for further IC technology
use of
requires additional
onto
a
new
dependence. The
disilicide,
cobalt
and
low temperature. Therefore,
the C54 phase at
focus
time,
steps, strategies,
that has
silicide
more
(smaller device
advancement
labor to increase the
promising benefits
new and more recent silicide of choice
density
nucleation
industries have
researchers and
dimension)
their
shifted
line
minimal
and
for the IC technology
of
width
industry
is
CoSi2.
2.2. Cobalt Silicide
Cobalt
the IC
with
silicide
technology
the
shown
belongs to the
the
resistance
to HF cleaning
formation
of cobalt silicide
metal etch
in between. The
500C to 675C
phase at
and
1
and plasma
involves
metal
at
H2O2
the CoSi [9]. A
convert all
the
TiSi2
to
where
350C
and
RTP
metastable
is
possible reactions of
with
low resistivity
Moreover,
compare
to
the
device isolations. The first RTP
immediately
used
transforms to the
to selectively
anneal at
CoSi
diffuses into the
beyond [3, 9]. A
phase
the ability to
has better
to
TiSi2,
the
wafers with oxide and/or
anneal condition
silicon
is between
to quickly form the
metastable crystalline
wet etch
consisting
Co
of
3
CoSi2
CoSi
parts
HC1
leaving behind
between 875C to 1000C is
to its final equilibrium
22
and
has been
process with a selective
remove all un-reacted
temperatures
silicide
TiSi2 [8]. Similar
sputtered onto
the Ti metal
cobalt silicide
two-step RTP annealing
the amorphous Co
mixture
2nd
etching
a
It has been introduced into
dependence behavior. Cobalt
is normally
temperatures of 500C and
part
width
selective etch of un-reacted metal.
nitride sidewall spacers and
phase
its line
comparable properties
withstand
Co2Si
for TiSi2 due to
as a replacement
sidewall spacers and
to have
noble metal silicide group.
phase with
needed
to
resistivity
Phu Do
of
14.5
MS Thesis
pft-cm
(bulk
of cobalt metal as
single crystal
CoSi2)
[9].
Fig,
2.2
shows the sheet resistance profile
it transforms to CoSi2.
700 V Co FILM
ANNEALED FOP 10s
30
r
(111) B IMPLANTED
O
25
O
(111) UNtMPLAMTEO
X
J100) B IMPLANTED
A
(100)
UNPIANTED
C5
LU
O
20
CA)
07
UJ
rc
15
-
t_i
UJ
X
07
10
AMORPHOUS
5
-
CoSi.,
a^jjT
TEMPERATURE
Fig. 2.2. Sheet
during
It has been
of
time
observed
that the
at a specific
temperatures
resistance of Co silicide as a
the two-steps anneals
(700C)
CoSi2 has been widely
benefits overwhelmingly
process.
and
enough
used
resolve
as
900
(C)
function
of temperature
Adopted from [9].
sheet resistance of the
temperature,
giving
SOO
700
600
500
25
the final
initial CoSi
CoSi2
phase
phase can
be
is
a
strong function
achieved at
lower
time (-120 seconds) [9].
a replacement
many issues
23
for TiSi2 for many
associated with
its
years
predecessor.
since
its
However,
Phu Do
MS Thesis
these benefits
Co
metal.
are
only
realized with
Fig. 2.3 depicts the
Before RTP
Ti
Ti
use of a
Ti capping layer
top
on
of
the deposited
general cobalt silicidation process.
After
Capping
the
1st
RTP
After Etch
After
2nd
RTP
Capping
Co Metal
CoSi
Co Metal
Si Substrate
Si Substrate
Fig. 2.3. General
With the
during
Co
Ti capping
use of a
the annealing
C0S12
silicidation process.
layer,
steps since
a
the transformation
use of a
TiN capping layer
first RTP annealing
layer
the interfacial
during
native oxide
presence
oxide
of
the
layer
in
a
of
CoSi2 is very
layer
the
native oxide
sensitive
growth of oxide on
layer
as
width
width
dependence
also observed
silicide-silicon
The interfacial
chamber
to traces
top
path of
Si along the
dependence
interface
of
of
02
as
the
layer
reduces
desorbed
layer may be the inherent
or
may be from the
silicidation
process.
The
[10]. The Ti capping
as well as
the growing CoSi underneath raises
24
early
and captures
and moisture
the Co surface
associated
the use of Ti capping
deposition
the
to
K. Maex that the
that a Ti capping
oxide
during
by
observed as
whereas
the silicon surface prior to Co
O-elements in the RTP
prevents
line
for temperature below 550C
silicidation process.
top
the line
to CoSi2. It has been found
layer between the Co
on
silicidation observable
self-aligned silicidation process compared
eliminates
behavior [10]. Maex
silicidation of
any
metal
resulted
process
showed no such
elements
from Co
lateral
minimal or no
better
TiSi2- In addition, the Ti capping layer
with
scale.
Ti sufficiently blocks the diffusion
[10]. This leads to
metal surface
there is
Not to
further
it to the
growth of
surface.
If the
Phu Do
oxide
MS Thesis
layer is
oxide and
the
allowed
into the Si
to
the RTP process, the diffusion
during
grow
may be partially
substrate
completely blocked
or
Co through the
thereby affecting
overall silicidation process.
CoSi2 undoubtedly
advances
and
CD
in IC technology
within
dependence
still
the
devices
Recent
years.
with
to the
device
next generation
I
|
3 30
I
I
generation
device
I
I
|
4Ji
I
]
have
by
20 4
1
15
I
Poly N+,
m
10 Nfr>
(65nm
CD),
I
o
I
I
|
I
'''
0,05
I
I
I
reach
reaches
width
a new metal silicide
is
usage
is
needed
to
|
As doped
t.:::ir=?:^
NiSi
width
0,25
silicides.
width
beyond 200nm. Similar behavior
however,
length
Adopted from
dependence
earlier, the line
below 50nm. Note
6nm
9nm
CoSnm
-Ni
(pm)
sheet resistance vs. gate
and
i
i-1 -Co
i
N+
Poly
Fig. 2.4 demonstrated the line
CD
to have line
'
0,15
Gate Length
for TiSi2, CoSi2,
[7]-
stated
P
+
I
I
*
Fig. 2.4.
beyond 45nm. As
IC
45nm
2005
CD below 50nm [7]. Although its
-
ft
,m
1g
as the
and
end of
CoSi2
shown
to 45nm
Ti 20nm
&
5
its limit
reach
the
25
1
(CD) down
45nm CD.
at
I
65nm CD
studies
on polysilicon gate region with
current
dimensions
to
However, further
TiSi2.
with
CoSi2 is beginning
usefulness of
5-10
associated
continue to push the critical
manufacture
next
tolerable for
advance
to
prepares
many issues
resolves
below. Today, the
industry
as
of
of
TiSi2
dependence
can
be
seen
and
of
as
CD decreases
starts
to be apparent
CoSi2
TiSi2
for CoSi2
as
CD
continues
to
that no such behavior was observed for nickel
25
Phu Do
MS Thesis
monosilicide
future
(NiSi). B. Froment has demonstrated that the
devices
generation
turned to NiSi as the
with
CD beyond 45nm [7].
next metal silicide replacement
use of NiSi can accommodate
Therefore, many
have
researchers
for the IC technology.
2.3. Nickel Silicide
Similar to
Ni
metal
critical
cobalt
the primary diffuser. Since the
being
dimensions
above
50nm,
the next metal silicide that
knowledge base
predecessors,
years.
TiSi2
understood prior
process
nickel
general
based
is
the
will enable
and
around
devices.
of smaller
sparked within
there
remain
many
application
ambiguous
to its successful integration
experts
with
to be
However,
the
that of its two
the
past several
properties
to
be
into future IC devices.
silicidation process of nickel
on recent publication
and
phenomena
with
group
to devices
by many
CoSi2. Its interest has only been
silicide
involves
[7]. Similar to Ti
RTP annealing
one
into the di-nickel
cobalt
silicide,
silicide
third and
750C
(NiSi)
around
equilibrium
and a
(Ni2Si)
resistivity
NiSi2
at around
and
a
Co
one-step RTP
silicidation
325C
phase
has
and
for
of 34 (xQ-cm
anneal
processes,
an
of about
intermediate
resistivity
required
to transform
then quickly transforms into
resistivity
of
24
nickel silicide with
[3, 1 1, 12].
26
450C is
phase which
phase with
nickel silicide also
formation temperatures
exists a
suggested
not as vast as
metastable nickel monosilicide
with
has been
is
However, only
metal
Similar to
for IC
CoSi2 is limited
use of
development
noble metal silicide
sputtered onto silicon wafers with oxide and/or nitride sidewall spacers and
isolations.
the Ni
nickel silicide
of nickel silicide
Therefore,
The
belongs to the
nickel silicide
silicide,
10.5
metal-rich
\xi--cm
|j.fi-cm
Ni2Si
[3].
phase
[3]. There
also
formation temperature
Phu Do
MS Thesis
Since the NiSi
the lowest resistivity
previously, NiSi
mentioned
phase-out of
TiSi2
and
other electrical properties
shows no signs of line width
CoSi2 in IC device
(refer to Electrical Properties
nickel monosilicide phase and
delayed its interest
NiSi is its thermal
sensitive
extremely
subsequent
subsequent
sintering
thermal
steps.
circuitry.
annealing
steps
were
technological
requirements
It is
not
history
fact that the
for
the last phase
implemented in
advances
in
major
in back-end
interconnects
processing.
are
deposited
traditionally involve
and
previous
processes
implementation into future devices
but the severity is
much
has
major problem with
nickel
silicide, it is
processes
normally
Back-end processing
and patterned
one
of
current
or more
IC technology.
technology
metallization
obstacle
to its
during
contain
temperatures at or above 700C found in the metal
for many back-end processing
the
has
maintaining the
its formation temperature
above
Previous device fabrication
steps
difficulty in
also
superior
to
steps.
thermal
Such
of
TiSi2
However,
the
the
and
recent
thermal
thermal requirements
NiSi
and
made
The thermal stability is
with prior metallization processes.
27
to
high temperature
lowered
reduced
stability
a viable possibility.
less than
have
refers
complete
that are detrimental to the underlying NiSi. For this reason,
alleviated
concern
the
for
main reason
that are
Section)
However,
a well-known
Since NiSi is
process steps with
These
the
its integration into device fabrication
to any temperature
steps where metal
necessary
have
stability.
or metal reflow steps
processing
CoSi2
until recently.
processing
dependence,
advances, for CD beyond 45nm. It
two predecessors in term of device operations.
desired
the three phases, it is
out of
that this is the phase of choice for integration into future IC devices. As
obvious
the
phase possesses
its
still a
Phu Do
MS Thesis
Since
its
interest,
renewed
concerning NiSi thermal
impurity
and/or
and
Ti [13].
silicon
implementation
closer
to
by
formation temperature
of
has been
established
The remaining
Ti, Co,
Ni
and
comparison
will
be
made
the three
for
all
2.4. Silicidation Kinetics
and
between
reaction
dominant
For
TiSi2,
diffusers
are
phases
2
on
for
of
NiSi
impurities
of a
higher
to
such as
Pt, Pd,
Ti capping layer has
to
up
formation
on
NiSi
700C
making
its
process of nickel silicide
exist
to the
as
the methods used,
specific
a relative
[3, 4, 7, 9, 11, 12].
compare the material and electrical properties of
previous
and
recent
data is
published
phase
works.
composition,
A brief
and
other
available.
metal silicide
fall into two
main categories: diffusion-
kinetics. In diffusion-controlled
to form a
new phase
is limited
by the
kinetics,
diffusion
of
the
the
toward the interface.
metal species.
reach
phase
silicides whenever
metal and silicon
primary diffuser to
of
depending
phases
the dominant diffuser is Si
the
that the use
shown
and nucleation-controlled
diffusing species
other
implantation
use of
stability
available
made
Transformation
of reactions
kinetics
for
concerning the morphology,
three
controlled
thermal
stability
three
based
material properties of the
The kinetics
that the
many studies; though differences
sections of chapter
silicides
the
[14]. The
have been
N2+
shown
were reported
thermal
realization
confirmed
range
increase
can
the
publications
It has been
Furthermore, it has been
increased
successfully
have been
stability.
[11, 12]. Similar findings
temperatures
F,
in
numerous
the
Initially,
reaction
whereas
the
for CoSi2
growth rate
interface. As the
28
is high
and
NiSi,
since
it is
silicide continues
the dominant
easier
for the
to grow, the
Phu Do
MS Thesis
primary diffuser
reaction
Such
being
interface,
thus the silicide
the two variables [3].
enough
of new phases.
time, but
adversely
by
However,
It is
of
is
with
not
Ti2Si, Co2Si,
and
"the
grain
temperature and time
in the
lower temperatures
favorable in IC fabrication
given
since
most reproducible
of metal-rich
Ni2Si.
in free energy
the
shows
such as
the
NiSi
and
associated
associated with
produced
additional
phases are also
found in
section
CoSi,
kinetics
formation temperature. Other known
to
by the
high temperatures. Such
formation
interfacial energy
of
silicon-rich
the
of the new phase
associated with phase
such as
silicide phases
and
NiSi2
and
Phase
Temp fC]
Ti
TiSi2
425
Co
Co2Si
350
CoSi
350
CoSi2
400
Ni2Si
200
NiSi
275
NiSi2
350
29
Kinetics [3].
Nucleation-Limited
Phase
TiSi2
Temp [C]
-
-
-
-
-
CoSi2
500
-
-
-
-
NiSi2
and
of
CoSi2.
the corresponding
2.5 below.
Diffusion-Limited
Ni
phase,
mechanical and electrical properties of
Table 2.3. Phase Formation Temperature
Metal
the
thickness.
most critical variable
new phases at
is generally
reach
[3]. Nucleation-controlled kinetics usually dictates the transformation
intermediate phase,
Table 2.3
function
increasing
the two categories and usually dictates the formation
small and cannot compensate
formation"
with
temperature is the
Nucleation-controlled kinetics is typically
occur when
film thickness to
throughput. Diffusion-controlled kinetics is the
affects
silicide phases such as
kinetics
silicide
is decreased
a parabolic
to form
possible
extended reaction time
formation kinetics
increasing
growth rate
is best described
growth pattern
formation
i*
travel through the
must
800
the
silicide
Phu Do
MS Thesis
2.5. Material
and
Electrical
Table 2.4. Crystal Parameters
Property
density for IC Technology
and
Silicide
Crystal
Compound
System
Ti
Hexagonal
2.950
TiSi
Orthorhombic
6.544
Orthorhombic
3.62
Orthorhombic
8.2687
C49-TiSi2
C54-TiSi2
Lattice Constant
[A]
c
Density
[g/cm3l
4.686
4.504
3.638
4.997
4.24
13.76
3.61
3.85
8.5534
4.7983
4.07
3.737
7.109
a/b/c
b
a
-
Co
Cubic
3.5446
Co2Si
Orthorhombic
4.918
CoSi
Cubic
4.447
CoSi2
Cubic
5.3640
Ni
Cubic
3.541
Ni2Si
Orthorhombic
7.060
4.990
3.720
NiSi
Orthorhombic
5.233
3.258
5.659
NiSi2
Cubic
5.406
Table 2.5. Mechanical Properties
point,
Silicide. Adopted from [3].
and
thermal
linear
Silicide Phase
of
bulk
silicides:
expansion coefficient
7.42
-
-
6.65
-
-
4.95
-
-
8.91
-
compressive
7.40
6.56
4.859
-
stress at
293K,
melting
(a). Adopted from [3].
Compressive Stress
Wcomo
8.789
Melting Point
[C]
[MPal
Si
a
[IO6
K"1]
1414
2.6
TiSi2
117.9
1500
18.89 0.55
CoSi
38
1460
11.1 1.0
CoSi2
100
1326
9.469 0.18
Ni2Si
316
1306
16.5
NiSi
158
992
Table 2.6. Electrical Properties
Silicide
Compound
C49-TiSi2
C54-TiSi2
of bulk silicides.
Adopted from [3].
Resistivity
[fill-cm]
60
15
Co2Si
110
CoSi
147
CoSi2
15
Ni2Si
24
NiSi
10.5
NiSi2
34
30
-
Phu Do
MS Thesis
2. 6. Transition to NiSi
As discussed earlier, the three
have
numerous similarities and
favorable
while
the
possess
most
most crucial
silicides
resistivity
device
three
favorable
fact that
have
are not
many
reached
in terms
NiSi
most
characteristics.
of process
its
semiconductor
Some
predecessors:
favorable is because the
these traditional
silicides
and
use of
seems
CoSi2. The
the other two
The benefit
longer be
of semiconductor silicides
the
[1-15].
Cobalt
Nickel
Silicide
Silicide
Silicide
( TiSi2 )
(CoSi2 )
( NiSi )
900
900
500
2-Steps Anneal
Yes
Yes
No
Resistivity (jiQ-cm)
13-16
16-20
14-20
Primary Diffuser
Si
Co
Ni
Yes
Yes
No
Line Width dependence
Yes
Yes*
No
Silicon Consumption
High
High
Low
Good
Good
Poor
High
High
Low
Formation Temperature
Prone to
(C)
Bridging Effect
Thermal
Stability
Junction Current Leakage (Interface
*For dimension
<
50nm
Spike)
[15]
31
low
some major characteristics of
Titanium
Characteristics
of
as
no
silicides of interest.
Table: 2.7. Characteristic
to
maintained
can
decreases beyond 50nm. Table 2.7 details
TiSi2
advances.
industry
characteristics are
integration. Overall, NiSi
their limits due to technological
associated with
size
differences in
characteristics over
makes
interest to the
metal silicides of
Phu Do
MS Thesis
As
from Table 2.7, NiSi
evident
enabling further device
capable of
as well as
energy
lower junction
the line
lacked,
are resistance
width
and
However,
to the
dependence
the
reasons
single
Its formation
step
the
requires much
its resistivity is
most crucial characteristics of
bridging
effect.
and
effect, low
These
are
silicon
the three
the
of
three,
less thermal
Furthermore, NiSi has
annealing.
leakage due to interface spike,
that of its predecessors.
usability
scale-down.
less time due to its
current
to be the only silicide, out
seems
characteristics
comparable
that
to
enable
its
and resistance
to
NiSi that
consumption,
much
TiSi2
and
CoSi2
industry's interest in NiSi.
that sparked the
2.7. Conclusion
Numerous
Based
are useable.
have far
silicide
enable
exist,
yet not all are well suited
the current knowledgebase
on
industry
metal silicides
as
In addition, these
further
useable silicides
the limit of
Therefore,
further
or require
further
to be the
and contribute
have
current and
to its
while
current
a short
a
handful
of metal silicides
lifespan in the IC technology
closely approaching the limit
to
research
Based
on
the
of
studies,
experiments
characteristics are not
have
fully
to
nickel
shown
current
comprehended
the intention of this thesis study to verify
attempting to
gain a
better understanding
knowledgebase. In addition,
32
today's
next metal silicide
previous
Preliminary
advances
future IC technology. However, the
Many of its
NiSi
only
to their limit. The technological
an urgent need
Therefore, it is
some reported characteristics of
its behavior
industry,
optimal candidate.
NiSi is limited.
verification.
and are
advancement.
its capability to be beneficial to
on
TiSi2
there is
technological
monosilicide appears
knowledgebase
the IC
advances push the silicides
surpassed
(CoSi2).
of
for IC device fabrication.
another
intention
of
of
Phu Do
MS Thesis
this study is to
establish
Microsystems Fabrication
processing
on
silicides
will
the two
will
on
RIT
be
used
following
to investigate the
given wherever
current
processing tool
will
set.
in
previous researches:
silicidation
chapter will cover the experimental and
silicidation process of nickel silicide.
necessary to
experiment.
33
include
silicidation process of nickel silicide
most critical parameters reported
technique
discussions
based
RIT. Such knowledgebase
at
systematically investigate the
temperature and silicidation time. The
analytical
knowledgebase for the Semiconductor &
Laboratory (SMFL)
conditions of nickel silicides
This study
based
a nickel
provide a
Detailed
better understanding
of
the
Phu Do
MS Thesis
Reference
[1]
S.P.
Murarka, Silicides for VLSI Applications,
Academic
Press, Inc., Orlando, FL,
(1983).
[2]
R. Mann
et
al., "Silicides
and
Local Interconnections for High-Performance VLSI
IBM J. Res. Development. Vol.
[3]
[4]
[5]
Applications,
39(4), (1995).
K. Maex, M. Rossum, Properties of Metal Silicides, Datareviews Series No. 4,
INPSEC, London, United Kingdom, (1995).
J. Seger, "Interaction of Ni with SiGe for Electrical Contacts in CMOS
Technology", Doctoral Thesis,IMIT, Royal Institute of Technology, Stockholm,
Sweden, (2005).
R. W. Mannet et AL., "The C49 to C54-TiSi2 Transformation in Self-Aligned
Silicide
Journal of Applied Physics. Vol. 73(3566), (1993).
S. Jones, S. Walsh, Wet Etching for Semiconductor Fabrication, Unpublished.
B. Froment, M. Muller, "Nickel vs. Cobalt Silicide Integration for Sub-50nm
ESSDERC, pp.2 15-218, (2003).
L. Van Den Hove et AL., "A Self-Aligned CoSi2 Interconnection and Contact
IEEE Transaction on Electronic Devices,
Technology for VLSI
Vol. 34(3), (1987).
M. Tabasky et AL., "Direct Silicidation of Co on Si by Rapid Thermal
IEEE Transactions on Electronic Devices, Vol. 34(3), (1987).
IEEE Transactions
K. Maex et AL., "Self-Aligned CoSi2 for 0. 1 8mn and
on Electronic Devices, Vol. 46(7), (1999).
L.W. Cheng et AL., "Formation of Nickel Silicide on Nitrogen Ion Implanted
International
1998
Ion Implantation Technology Proceedings,
Conference, Vol. 2, (1 999).
P.S. Lee et AL., "Nickel Silicide Formation on Si(100) and Poly-Si with a
Presilicide
Journal of Electronic Materials, Vol. 30(12), (2001).
D.Z. Chi et AL., "Addressing Materials and Process-Integration Issues of NiSi
Silicide Process Using Impurity
Junction Technology, The Fourth
International Technology Workshop on Junction Technology, (2004).
S. J. Park et AL., "Thermal Stability of Ni Monosilicide formed with Ti Capping
Electron Devices and Solid-State Circuits, 2003 IEEE Conference, (2003).
B. Froment, M. Muller, "Nickel vs. Cobalt Silicide Integration for Sub-50nm
ESSDERC, pp.21 5-21 8, (2003).
Applications,"
[6]
[7]
CMOS,"
[8]
Applications,"
[9]
Annealing,"
[10]
[11]
Below,"
Silicon,"
[12]
N2+
[13]
Implantation,"
Engineering,"
[14]
Layer,"
[15]
CMOS,"
34
Phu Do
3.
MS Thesis
Experimental
The study
and gain
of nickel silicide
150mm
resistivity in the
average wafer
range of
composition.
p-type
25-45
(boron
-.-cm
dopant)
Table 3.1
(sheet resistivity
shows
the
of a
and
it
general regions could
200nm
represents
be
dioxide
layer,
gate of a
region.
on
the
wafer was
atoms/cm2.
This
top
of a
41nm
stack
This
to
semiconductor
on
blanket
silicon wafers.
initial
electrical
382-687 QJn based
on an
oxide was used
Looking
at
thickness
mimic
the
heavily
the transistor. The lower half of the
wafer
different
in detail. With the
equals
silicon
wafer
material
wafer
flat
to the thickness of the
dioxide layer,
on
region consisted
top
the poly MOS
regions was a
of the single
(metal
between the
from top to bottom, the
P+31
at
with
75KeV
not receive
any
and
and
additional
oxide
1200nm thick
as a separation region
doped source, poly-gate,
did
a
transistor. The right
primarily
the
having
going from left to right. The left
represented
doped, by ion implantation,
was
each
transistor. In between these two
silicon and polysilicon regions.
of
seen
silicon source/drain of a
This 3 -region
wafer.
semiconductor)
silicon
the
polysilicon
silicon
crystal
of
content of each quadrant
region consisted of single crystal silicon with a
wafer,
in
silicon wafers with an
divided into four primary quadrants,
top, three
oriented on
done
all experiments were
confirm
of 655(im).
thickness
wafer was
development study to
a process
silicidation process of nickel metal
Therefore,
conditions.
are standard
Each
is intended to be
better insight into the
processing
These
Analytical Technique
and
upper
dose
drain
of
half
2E15
regions of
doping. See Fig.
3.1 for details.
The
establishment of
chemical clean
these quadrants and separation regions was
process, Radio Corporation
of
35
America
(RCA)
Clean
followed
Process,
by
a wet
to remove
Phu Do
any
MS Thesis
and polysilicon
nickel
metal
deposited
regions,
section.
onto
Any
the wafers
surface
probe
by
DC sputtering,
nickel
by wet
335nm
of
on
metal
chemistry; 1
the design
not
part
resistance.
This
These
the
for secondary ion
"in-house"
analytical
Table 3.1. Material
Quadrant
mass
99.9% purity
of
the
consumed
H2S04 : 2
during
part
H202
silicide
cover
AFM, XRD,
conditions,
spectroscopy
as
(SIMS)
at
metal
was
RTP
annealed
at a
in the Appendix
RTP
anneal
was
90C.
Force
Microscopy (AFM)
composition,
and
four-point
taken before and
after
the
the fundamental principles of
and
four-point
identified
and
the
silicon
seconds prior to
nickel
experiment
by Atomic
briefly
chapter will
samples with crucial silicidation
done for 10-15
measurements were
the three analytical techniques used at RIT:
sent out
of
topography, X-Ray Diffraction (XRD) for
nickel silicidation process.
Several
was
and each wafer was
quadrants of each wafer were analyzed
technique for sheet
the
ensure proper removal of oxide on
HF immersion
average
time based
and
un-reacted
selectively removed
All four
an additional
deposition. An
different temperature
for
To
organic/inorganic contaminations.
RBS
probe
by literature,
analysis
to
technique.
were also
complement
techniques.
composition of experimental wafer quadrants.
Material
Avg. Thickness
Additional Implant
Composition
(nm)
Dose
ID
Upper Left
Si P+
Si
Substrate
2E15cm"2P+jl,75KeV
Lower Left
Si N
Si
Substrate
N/A
Lower Right
Poly N
Poly P+
Poly/Oxide/Si
200/41 /Substrate
N/A
Poly/Oxide/Si
200/41 /Substrate
2E15cm"2P+J1,75KeV
Upper Right
36
Phu Do
MS Thesis
Oxide
Implant
No Implant
Fig. 3.1. Experimental
wafer quadrant
division.
3. 1. Atomic Force Microscopy
The
atomic
microscopes.
force
This
to measure the
Since scanned-proximity
optical microscope and
in the
scanning
to the
class of
attractive or repulsive
probe
electron
microscopes
scanned-proximity probe
tip
placed
very
force between the
do
microscope, the
not utilize
close
probe and
lenses
major resolution
to the
as
seen
the
in
limitation lies
size of the probe.
Atomic force microscopy is
sample.
Unlike
other
typically
microscopy, AFM
sample's surface with atomic
level
grain sizes and shapes as well as
5
(AFM) belongs
class of microscopes utilizes a probe or a
surface of a sample
sample.
microscope
the
detector,
and a
data
to investigate the surface
gives
resolution.
the
Such
tip
attached
processor unit.
37
topography
of a
most accurate representation of
resolution
is
capable of resolving
surface roughness of a sample.
essential components: a microscopic
photodiode
used
An AFM
the
consists of
to the cantilever, a scanner, a
Refer to Fig. 3.2 for details.
the
laser,
a
Phu Do
MS Thesis
Fig. 3.2. General
There
are
mechanism
sample's
two
and
one
without.
surface with
height
to
obtain
above
the
A
feedback
the
driver to
maintain
the
cantilever
angular
sample's surface
measures
optical
it is
detection
of the
be
enable
of
be
the
and
data
force
controlled
force information
or
Si,
is normally
interaction
two side
one with a
by
to
used
data
a
or a
the sample's
maintain a constant
to the
sample-
down from the
downward
by the
end
movement of
intensities
processor
an
position-sensitive
The detector
the information is converted to
38
over
to measure any changes in
side photodiodes.
The
scan
the sample's surface causes
photodiodes signal
processor.
feedback
scanner
above
associated
and extends
upward or
with
is
a piezoelectric
at a constant
the sample. The
the difference between the two
by
AFM:
laser beam. This deflection is detected
detector consisting
processed
tip
from Si3N4
system
contour or
the deflection of the cantilever,
can
made
that
can also
to back out
scanned across
due to the
deflection
photodiode
the
height information. The tip
An
cantilever as
AFM [1].
tip-cantilever assembly
microscopic
mechanisms
tip interactions. The tip is usually
of a cantilever.
of an
major modes of analysis possible on an
piezoelectric cantilever
surface
Setup
which
system
indicates
a voltage signal
provides
that
feedback
Phu Do
MS Thesis
information to the
deflections
maintain
surface
typical
use
of
the
of a sample such as
and surface roughness.
grain
polymer
detection
surface
blends
and
in
sample's
hardness through the
modes of operation exist
the
most
can
height
be
basic
contact mode.
and
grain
of
the cantilever-tip
based
constructed
maintain
of
that can be
also
be
used
the
on
the constant
porosity,
surface
analyze
to study different
friction,
More
in
the
and
viscoelasticity, and
Many
tapping
mode,
other
Three
material properties.
on the
a
advanced
components
imaging.
(PCM)
mode,
for discussions
differences in
Microscopy (LFM),
Phase Contrast Mode
section
surface
transitions between different
used modes are contact
See the Appendix
surface
to
the
analyze
and magnetism.
composition, adhesion,
used
is to
structure,
elasticity, charges,
used of
commonly
microscope
through Lateral Force
composites
of variations
size,
In addition, it may
the tool include identification
of
force
atomic
material's surface properties such as
uses
topology
or
of the cantilever.
most
morphology
the constant force
the cantilever and the feedback changes necessary to
of
force/height
height,
to
The three dimensional
assembly.
The
scanner
and
of
non-
many different AFM
modes of operation.
For this study, the AFM
using the tapping
of
mode.
was used
morphology
force microscopy
measure
surface
samples prior
analysis.
(AFM)
and
analysis.
All
was
Scanning
the surface
in the
No
topography
of
the sample
surface roughness and grain size
Probe Microscope
The Dimension 3000 SPM
scanning
characteristics.
to the
measure
The primary interest
the film. A Veeco Dimension 3000
all surface
to
(SPM)
for
was used
utilizes automated atomic
tunneling microscopy (STM) techniques
special
surface
preparations
samples were air cleaned
39
using
were
done
a commercial
on
to
any
nitrogen-
Phu Do
based
of
MS Thesis
duster
air
7nm,
product.
was used
for
A Veeco OTESPA
all measurements
Refer to Chapter 5 for AFM
3.2.
probe-tip assembly,
temperature
room
with a
tip
radius
at atmospheric conditions
[5].
results and analysis.
X-Ray Diffraction
X-rays
are short wavelength electromagnetic radiations produced
charged particles such as electrons.
a monochromatic
target. The
metal
to their
a
high
incoming
higher energy band for
return
condition
x-rays
are
is known
constructively.
and eliminate
as
represents
incident angle,
have
unique
and
Bragg
in
=
all
generally
and a
target
condition
the
that give them
Ao
40
data
in
which
anode
to the
its
cathode
electrons
these
Most
unique
then
scattered x-rays
occur when
atomic planes.
reflected
rays
the crystal, 0
characteristic x-ray.
to
electrons
In this
is the x-ray
Different
x-ray diffraction
This
interfere
which satisfies such a condition.
of
In the
emitted x-rays are
from
the
corsists of
processor.
generated when
scattering.
decelerating
typically
However, diffraction does
Bragg law
wavelength of
due to
and excite
directions. The
causes
themselves.
shows the
structures
2dsin0
metal
tool
from the
electrons
time. X-rays are
patterns.
(3.1)
detector,
the lattice interplanar spacing
X is the
atomic
(XRD)
phase with other scattered rays
the
Equation 3.1
"d"
equation,
in
x-ray
draws
normal states and are radiated
destructively
scattered
an
bombard the
short period of
which
Diffraction
X-Ray
voltage
electrons
directed toward the sample,
interfere
A
x-ray generating source,
x-ray generating source,
the
in
silicon
materials
characteristic
Phu Do
To
MS Thesis
capture all possible
graduated
circle
radiations are
ray
with
x-ray detector
sample, the
a
situated
limited from the x-ray detector
source and
background
diffractions from
the
sample as well as
noise and collimate
the
from the
the use
sample
s,S
V
';.XU
/O7SCHEMATIC
into
proportions,
electrical
and
currents
from the
information
obtained
information
shows peaks
reference
sources,
phases
can
of
OF X-R
X-Ray Diffraction
recorded
processor will
due to
be
or
an
sent
[2].
a pulse-height analyzer scaled
to the linear
analyzed
intensity
relative phase
identified. Refer to Fig. 3.4 below.
41
ratemeter
to
to convert
[2]. Typically, the final
vs.
one or more crystalline phases.
(and the
reduce
Vt
typically filtered by
be
to the detector. This is to
x-
J//
the filtered signals are
that
between the
slits
IHFFSACrOMf.TER
Fig. 3.3. Schematic
measurable
divergent
XL
....,,....
';_
are
Non-diffracted
circumference.
of
center of a
rft
/';:*>
Signals from the x-ray detector
in the
"-'ll''
urs
..y'
i--j'
placed
DIVUlUSxAl
KlW
H*tiNlN
SSS.
is
Refer to Fig. 3.3 for details.
radiation.
W
the
on
by
sample
20
plot.
This
From this
composition) in the
processed
plot and other
silicide
film
can
be
MS Thesis
Phu Do
ISK-PVMjCiSFNiSiFroniPft/Do
ISO
10 0
so
LjKkj
^
n<ra
Fig. 3.4. Typical XRD
The Rigaku DMAX-IIB XRD
plot of
system
i Ua_
intensity
was
vs.
29
angle
[3].
to analyze all samples at room
used
temperature and in atmospheric pressure. All measurements were taken using a Cu
(Ka,
radiation source
angle varied
Refer to
from
=
30
1.540562
A,
Ka2
120
20
with a
20 to
5 for XRD
chapter
"j,
"
aligned
across
film,
step
A)
size of
at
0.01
four
contact
drops
film
occur
are measured
the
by
and measured on probe
due to the internal
probe
film thickness
along
with
based
on equation
and
35
mA.
The
and at a rate of
needles,
linearly. Refer to Fig. 3.5 for detail. A direct
potential
40 kV
scan
1.57min.
Resistivity
probe system consists of
the substrate or
differences
1.544390
results and analysis.
3.3. Four-Point Probe: Sheet
A four-point
=
2
and
and probe
resistance of
spacing
3.2 through 3.5 below.
42
current
4. As the
3. From the
separated
by
a
is apply to
current
travels
distance
probe
across
1
the
the film. These potential
voltage and current measurements
(s),
the resistivity can be calculated
Phu Do
MS Thesis
s*
*
s
s
*
W
D
Fig. 3.5. Four-Point Probe Schematic.
*
(3.2)
p
All
units
2ttS
=
in (Q
are
W
-
cm)
D
S,
S
(thick
film)
fy^
2nS
v
(3.3
P
j-
J
0.01
W
<
s
K
(3.4)
(moderately
<10
K
=
2nW
\ +
22
4Y_
thick
film)
->o
f_nW
+
S
,
7
w\v-
(3.5)
I
ln(2)
Equations 3.2 through 3.5
range
(W)
and sample
[4]. For thick
film,
much greater
than the
zero since
was
based
the
3.2
(D)
at constant probe
assumes
(thin
S
film)
spacing (S
=
0.0625"
=
0.15875cm)
that the film thickness and sample diameter are
Ideally,
of a material should
assumptions
D
S,
the resistivity relationship for different film thickness
probe spacing.
the resistivity
on
show
diameter
equation
W
J
the
be
constant.
that the diameter
43
slope of a
and
resistivity
However,
thickness
curve should
be
this ideal resistivity
were
infinitely
wide
to
Phu Do
MS Thesis
for the hemispherical
account
to
case
finite diameter
a
Equation 3.3
account
for the
thickness'
for this
thickness
resistivity
would
Finally,
the
geometric correction
to the
equation
diameter
correction
3.5
condition the
factor is
correction
factor K is
3.2. Since thickness in
probe
shows
much
factor
under such extreme
ideal
necessary.
probe
spacing
of
spacing,
equation
the resistivity
less than the
by
was replaced
boundary. All
probe
in this
use
equation
3.2
can no
equation
3.3 is
a
longer be
formula for thin film
spacing
of
finite
used
with
0.15875cm. For this
the thickness itself to better
measurements were
to
represent
done for this study in
regime.
The four-point
of
spacing
known
as
property
probe system used was a
0.15875cm. The
sheet
of a
and
resistivity)
material,
is
system
whereas
the
material's
resistance
point
thickness, assuming
does
probe
not.
system
measurements were
chapter
Since the
done in
5 for four-point
room
outputting both
The
electrical
(Q/n) is
resistivity
all
thickness
was not
measurements
temperature
the
exist,
each
(sheet
needs
whereas
(also
electrical
of a
to know
the sheet
foursample, the
resistance).
at standard atmospheric pressure.
probe results and analysis.
44
Q/n
unique
only the resistivity
known for
in
a
requires
a single phase composition
with a probe
sheet resistance
Resistivity (Q-cm) is
sheet resistance
silicide
reported
CD Automatic ResMapper
capable of
resistivity.
material per square centimeter area.
the
geometric
To
.
be between 15.88|J.m to 15,880|im. Due to its
non-ideal case of equation
and sample
equation, the
this
thick film
with value comparable
case.
a
1
probe
resistivity for moderately thick film. With
boundary conditions,
modified
thickness,
and
represented the
1587.5um, moderately
distribution from
current
All
Refer to
Phu Do
MS Thesis
3.4. Conclusion
This
chapter covered
the study of
Appendix
study.
nickel
section.
Chapter 4
process.
experimental procedures and
silicidation.
The
will
Chapter 5
the
following
cover
will
The
complete
two chapters
the
electrical
provide
detailed
characteristics of nickel silicidation.
45
the
processing
will cover
analytical analyses used
steps
the
characterization
analysis
and
can
be found in the
results and analysis of
of
the nickel
discussion
for
of
the
silicidation
the
material
MS Thesis
Phu Do
Reference
[1]
N.
McGuire, "Window
on a
Small
World,"
Today's Chemist
at
Work, 1 1(5),
pp.21-
24, (2002).
[2]
U. S. Geological
Survey
Open-File Report 01-041 , U.S. Department
of the
Interior,
(2001).
[3]
Introduction to
[4]
M.
[5]
Veeco AFM OTESPA Silicon Probe Specification.
X-Ray Diffraction,
California, Santa Barbara.
Jackson, "RIT SESM 707
Material Science
and
Material Research Laboratory,
Spectroscopy"
Microscopy and
Engineering Department, Spring 2003.
-
46
University of
lecture notes, RIT
Phu Do
4.
MS Thesis
Electrical Characterization
The
electrical
characterization
technique to investigate the
material
under
of
deposition
end
This information
resistivity.
the
point probe
nickel
the
sheet
This
the
were used
silicide.
process.
film
for
phase
sheet
As
to
before the
(fi-cm/cm
was
The CD
nickel
earlier, the
mentioned
of a
thickness
calculated.
per square unit
or
sheet
Q/n).
to phase comparison of the silicide's
resistivity
profile
indirectly
probe
Resistivity
silicide's
of all samples
from the grooving technique
chapter presents
information
be
resistivity
silicidation
technique and the silicide depth
pieces of
must
resistance of the silicide
profile
of nickel
its thickness. Since the
alone was not sufficient
The depth
comparison.
measures
the
after
represents
resistivity
to
was used
done through four-point
was
resistivity
investigation in this study, its resistivity
ResMapper
two
electrical
knowledge
requires prior
this study
of
was also needed
to
enable such
from the
results collected
four-
from the grooving technique. These
of
the silicide
taken at several steps of the
fabrication
calculate
the electrical resistivity
film.
4.1. Sheet
The
process.
Resistivity (Rs) by Four-Point Probe
sheet
resistivity
Measurements
resistivity value,
anneal,
sheet
post
and post wet
resistivity
electrical
of
resistivity
550pm. The
(Rs)
were
of all samples was
taken prior to any processing to obtain the
dopant
activation
etching
of un-reacted nickel metal.
the bulk
post nickel metal
silicon wafer prior
was also calculated
average
anneal,
resistivity
was
base
on
silicon sheet
deposition,
Table 4.1
shows
post
RTP
the average
to any processing. The corresponding
the measured thickness
30.3826 il-cm
47
bulk
which
is
within
of
the wafer at
the manufacturer
Phu Do
MS Thesis
25
specification of
sample
D12
after
anneal process.
-
45 2-cm. Table 4.1
the removal
This step
samples at this part of the
each region of
unknown value
measurable
D12
limit
any
addition,
This
thermally
immediately
fabrication
before the
average sheet
during
for
maximum
and
limit
non-doped
polysilicon
was
no meaningful measurements were obtained
highly doped with
P+31
dopant
Table 4.1. Sheet
Resistivity
and nickel metal
deposition.
Region
values were
beyond the
the Poly-N
region was
of
at
known to be
for the Si_P+
not
insulator. In
015
2x1
atoms/cm2.
of samples prior
to processing
Std. Dev.
Avg. p
{ilia)
(Q/n)
(2-cm)
Prior to
an
did
region on all samples.
Avg. Rs
Bulk Si
Notice the
tool. This was expected since the region
of the
all
resistivity in
all samples respectively.
The dashes indicate the
region.
sheet
of
activation
deposition. Since
identical processing, the
same
resistivity
the dopant
nickel metal
the CD ResMapper. The sheet resistivity
of
doping,
region was
the
shows
grown oxide
received
taken to be the
was
for the Poly-N
too high above the
receive
was
of
also
=lrocessing
30.4
3
552
Post Dopant Activation Anneal
Poly
P+
532
Poly-N
Si-N
region.
Each
of
These
calculated
H2SO4
and
60mL
dark discolored
of
for the different
base
measurements were
sample was etched
-
-
average sheet resistivities
average value was
-
9
638
Si P+
The
7
-
on
six
cloud above
measurement points
in Table 4.2. The
in
each respective
taken after the wet etching of un-reacted nickel metal.
individually for 60
H202. It
(6)
regions are shown
seconds at
was observed
the sample's
consisted of
30mL
that the etching of sample D3 showed a
surface.
48
90C. The bath
This
seemed
to indicate there was
un-
Phu Do
MS Thesis
reacted nickel metal
XRD
and
RBS
discolorations
after
remaining
analysis
the silicidation process. This
techniques in
sheet
resistivity
measured
Wafer ID
Time
Temp [C]
[sec]
Si-N
Poly-N
Poly_P+
1.1
746
60
0.28
0.31
1.3
60
8.4
14
27
18
D4
450
45
0.41
0.47
0.69
0.78
D5
450
75
0.35
0.45
0.63
0.72
D6
573
39
0.21
0.29
1.06
0.85
D7
573
81
0.26
0.76
D8
573
60
0.26
0.30
0.88
0.82
0.82
-
-
D9
573
60
0.25
0.29
0.70
D10
695
60
0.23
0.32
0.59
0.70
D11
695
45
0.25
0.30
0.66
0.86
D12
695
75
0.26
0.30
0.69
0.87
D14
520
20
0.35
0.39
0.58
0.61
D15
500
20
0.40
0.41
0.57
0.61
480
20
0.43
0.46
0.59
0.60
resistivity
values
The only
sheet
process condition
first
other samples should result
or more of the
for
metastable phase of nickel
on
D3
sample
silicide,
compared
D3
was
Ni2Si,
to
its low RTP
was
known to
Table 2.3. The RTP temperature
one or more of three phases:
NiSi, NiSi2,
other
of all
or a mixture of
three known phases.
statistical analysis of
the only
in
of sample
that was different
closely below this temperature based
Design
Si P+
400
temperature at 400C. The
was
Resistivity (11)
D3
Notice the remarkably high
A
other samples showed no visible
D1
D16
two
by
by CD ResMapper after wet etch.
Average Sheet
occur
was confirmed
during wet etch.
Table 4.2. Average
samples.
5. All
chapter
fact
significant
the
average
factor in
Rs data
influencing
of experiment, see appendix section
3,
software.
49
showed
that the silicidation temperature
the silicide's Rs. The Central Composite
was analyzed
using the
statistical
JMP IN
Phu Do
MS Thesis
Figure 4.1
the plot of the Rs for the four different
shows
(doped silicon), Si-N (non-doped silicon), Poly-N (non-doped polysilicon),
(doped
polysilicon).
Notice
sample
D3
was plotted on
whereas all other samples were plotted on
the visibility
Rs
of
of
as compared
dopant
non-doped regions.
effect
interface
[1]. Such
silicide and
electrical
to the
showed
This
"snowplowing"
silicide/silicon
material
the plot. The general trend
the primary
as
the
silicidation
an effect would aid
was similar
process
the
and
Poly_P+
y-axis on
the right
left. This is to
to Zimmerman's
were
down
pushed
the
consumed
aid
in
have slightly lower
regions
in reducing the interfacial
the underlying layer. This lower Rs
resistivity data in the
the doped
dopants
where
the secondary
y-axis on
Si_P+
sample regions:
observation
toward
the
silicon/polysilicon
resistance
between the
observation was also confirmed
by
the
next section.
Sheet
(10"1
O/Sqr)
Resistivity
30
D3
on
2nd
axis
A
D1
X
D4
D5
-t-
D6
-
D7
o
D8
D
D9
D10
-
?
D11
D12
A
D14
D15
O
D16
-D3
Si
Fig. 4.1. Sheet resistivity
varied for each sample.
In addition, it
was observable
non-doped silicon regions
are
polycrystalline
than in
silicon
of
Poly_P+
Poly-N
Si-N
P+
four
regions.
RTP processing
conditions were
that the Rs was generally much
polysilicon respectively.
whereas
the
silicon
50
regions
lower in doped
Since the
are
and
polysilicon regions
crystalline
silicon, this
Phu Do
MS Thesis
suggested that nickel silicidation was preferential to more ordered crystal structure.
observation was also confirmed
data. Refer to the
section
4.2. Depth Profile
Each
and actual
captured
using
"D"
where
of
RBS
was used
n"
were
factor
technique more
(4.1)
resistivity
to
actual
calculate
of the groove wheel
junction
done to
needed
accurately.
to
inches.
.560
Fig. 4.2
the
shows
was
measurements of
depth, Xq,
were not
of
n,"
and
the silicide
of the
100%
"m
grooving
accurate.
film
and
These
the actual silicide depth since precise measurements
such
validate
to be 1
diamond
light. Measurements for
[2]. Due to limitations
the junction depths obtained
impossibly with
was
the
With the
with a
top down image
the groove. From the groove, a
software.
techniques,
analyses were
correction
was measured
seconds under constant pressure.
values provided a good estimate of
of "m and
diameter
using Image Pro
is the diameter
measurement
groove wheel
an optical microscope equipped with polarized
were made
4.1
done using the Signatone grooving tool
for 15
images
"n"
equation
was
The
groove wheel.
diagram
and
profile and electrical
by Grooving
sample was grooved
"m"
the silicide's depth
4.4 for further detail.
The grooving technique
impregnated
by
Such
technique. The junction
depth through SIMS
and
this technique. Based on SIMS and RBS analyses, a
represent
the
This is illustrated in
m x n
Xo=_5~
r
51
actual
section
n
silicide
5.3
and
depth using the
5.4.
groove
Phu Do
MS Thesis
M
N
Film Layer
(a)
Fig. 4.2. Top-down diagram
groove
image
Engineering
The
of non-doped
Department
calculated
at
poly
RIT.
consumed
silicon
(d).
Courtesy
were reported
of Dr.
regions.
This
and plotted
from 397nm to 867nm
silicidation process.
Notice
except
the deposited
sample
was
due to insufficient
D3
was
Actual
Gupta, Mechanical
in Table 4.3
observation was expected since
D7 does
sample size
for
in Fig. 4.3.
sample
D3
nickel was not
not
have depth
to accommodate
groove.
Similar to the Rs plot,
visibility.
A
was similar
had
and cross sectional view of groove and wheel.
doped
depths, XD,
the
during
data for the two doped
the
(c)
(a)
and
of all samples ranged
(176nm to 215nm). This
fully
of groove
junction
The junction depth
(b)
much
closer
look
in both
sample
at sample
D3
showed
silicon and polysilicon.
higher depth
profile
than the
also plotted
on
its
that the junction depth
However,
axis
of the
to improve
doped
regions
the non-doped polysilicon region
non-doped silicon region.
52
own
For
all other samples
Phu Do
where
MS Thesis
the deposited nickel was
were
higher in
depth
profile
polysilicon,
seen
doped
in doped
D7 doped
that the junction depths
to polysilicon despite doping. The highest
followed
silicon
showed
by
non-doped
silicon,
non-doped
polysilicon.
Table 4.3. Calculated junction depth
of sample
consumed, the trend
silicon regions as compared
was
and
fully
of
four
regions was unavailable
regions
based
on
grooving technique.
due to insufficient
Grooving
sample size.
XD(102nm)
Wafer ID
Temp [C]
Time
[sec]
Si P+
Si-N
Poly-N
Poly
D1
746
60
5.8
5.8
5.8
4.4
D3
400
60
2.0
1.8
2.2
1.9
D4
450
45
5.8
7.2
4.9
5.6
D5
450
75
6.2
5.6
4.7
4.9
D6
573
39
7.0
5.4
4.9
4.4
7.7
5.8
__
D7
573
D8
573
60
7.9
8.7
4.0
5.5
D9
573
60
9.0
6.5
5.1
5.6
D10
695
60
6.9
7.3
5.4
4.7
D11
695
45
7.8
6.6
6.1
4.4
D12
695
75
7.4
7.0
6.2
4.1
D14
520
20
6.0
5.2
6.3
5.3
D15
500
20
4.0
5.1
5.0
4.0
D16
480
20
5.6
5.8
4.2
3.8
81
-
-
Junction Depth (10 nm)
A
D1
X
D4
D5
+
D6
D7
-
?
D8
D9
D10
-
o
D11
O
D12
?
D14
X
D15
D
D16
H*-D3
Si P+
Fig. 4.3. Calculated junction depth
secondary
Poly_P+
Poly-N
Si-N
of
four
regions.
y-axis whereas all other samples are on
53
Sample D3 is
the primary.
on a
P+
Phu Do
MS Thesis
Silicide XDvs
Time
=
20
Temp
sec
7
65
6
_.
5 5
5
-;-
-:
5
4
3.5
470
350
480
400
450
550
500
600
650
700
750
Temp{ C)
Fig. 4.4. Silicide depth profile
Fig. 4.4
the depth
shows
function
as a
of temperature at
of nickel
profile
silicide
20sec
as
a
and
60sec time.
function
of silicidation
temperature at two different silicidation times. For silicidation time of 60sec, the
junction
was seen at temperature around
implanted
of
the
polysilicon.
drastically
similar.
At 500
400nm for
C,
was one small
silicon regions
range of
the silicide's depth
above
was
500 C for the
500 C. This fact
silicidation
silicidation condition
temperatures
of
time of 20sec.
to verify
range where
silicidation rate
and
non-
the silicidation rate
and silicon were around
the
of non-implanted
silicidation
However,
500nm
and
In addition, the junction
silicon region
such observation
54
non-
and non-implanted regions were
deeper than that
corresponding
the
for both implanted
regions respectively.
suggested
C,
the
the silicide's depth profile was
20sec,
for polysilicon
implanted
higher than that
of
all regions except
400-750
the same
in both implanted
of non-implanted polysilicon was
polysilicon
this
and
time
at silicidation
non-implanted and
temperature
at
However,
different. There
of polysilicon
above
Within the temperatures
polysilicon and silicon regions were never
implanted films.
depth
550 C to 600 C in
deepest
rate
only
the SIMS data
silicon at
of non-doped
at
temperatures
was
incomplete
due to limited SIMS
analysis.
Phu Do
MS Thesis
Similar
analysis was
However,
technique did
by
(correction
offset value can
accuracy
of
the
be
to
each
mentioned
to the
SIMS
factor)
seen
other
that the junction depth
are
RBS
analysis
these
match
next chapter.
valid
function
and
calculated
techniques
of
by this
time.
grooving
suggested
the need for
calculated values with actual value.
However,
the qualitative
still
a
junction depth 100%. Limited junction
factor derived from the
Nonetheless,
profile as
found.
actual silicide
and
to
in the
correction
SIMS data.
relative
be
not correlates
profiles obtained
offset value
and
should
depth
silicide's
correlates
no relevant correlations were
Once again, it
depth
done to
next chapter
analysis
could
be
low
there was
and
confidence
Such
in the
due to insufficient RBS
comparison
valuable
an
of all
samples
in understanding
nickel
silicidation.
4. 3. Electrical Resistivity ofNickel Silicide
The
Rs
data,
electrical
and
Table 4.4
resistivity
junction depth information. The
and plotted
generally lower for
regions.
in Fig. 4.5. The
silicides
Once again, this
previously
suggested
by
lower resistivity in both
the snowplowing
that the
of each silicide samples were calculated
formed in
confirmed
the
plot showed
resistivity data
crystalline regions compared
the
Rs data. In
silicidation preference
term
of
dopants
as seen
to be
4.2,
are shown
in
doping
in
to polycrystalline
crystalline region as
effect, doped
regions showed
This further
confirmed
in the Rs data. The lower resistivity indicated
silicide phase composition was closer
likely
equation
that the electrical resistivity was
crystalline and polycrystalline materials.
effect of
composition was most
calculated
using
to the NiSi phase.
a mixture of
55
two or
However,
such phase
more metastable phase since all
Phu Do
MS Thesis
higher than that
calculated resistivities were
of
the published NiSi
value
(1.05
10"5
x
Q-
cm) [3].
(4.2)
p
Table 4.4. Calculated
=
[Cl -cm]
RsxXj
electrical
resistivity based
Resistivity
Wafer ID
Temp [C]
Time
(10s
and
junction depth data.
l-cm)
Si P+
Si-N
Poly-N
P+
Poly
746
60
1.6
1.8
7.3
D3
400
60
16
25
58
33
D4
450
45
2.3
3.4
3.4
4.3
D5
450
75
2.2
2.5
2.9
3.5
D6
573
39
1.5
1.6
5.2
3.8
D7
573
81
2.0
4.4
D8
573
60
2.0
2.6
3.5
4.5
4.6
-
4.8
-
D9
573
60
2.3
1.9
3.6
D10
695
60
1.6
2.4
3.2
3.2
D11
695
45
2.0
2.0
4.0
3.8
D12
695
75
1.9
2.1
4.3
3.6
D14
520
20
2.1
2.0
3.7
3.2
D15
500
20
1.6
2.1
2.9
2.5
higher in resistivity
data
Rs
D1
Sample D3 followed the
point
[sec]
on
values.
same
It
trend
as all other wafers
was plotted with a
toward the secondary axis on the right
showed
the lowest
resistivities
that doped
electrical
in
for
dotted line
nickel silicide.
polysilicon regions were
at one order of magnitude
and
ease of visibility.
silicon and polysilicon were
resistivity for
but
the
Overall,
was used
Similar to the Rs
data,
to
the resistivity
most optimal material
distinctly higher than the
56
indicator
to obtain
the electrical
silicon regions.
Phu Do
MS Thesis
Resistivity (10
Si P+
Si-N
Fig. 4.5. Calculated
D3 is
Fig
4.6
indicated that
resistivity
of
45
range of
the
electrical
electrical
silicidation
resistivity
anneal
to 75
differences between
in
sec
all
four
by regions.
Note that
function
regions.
variation
However,
time. The plots
of silicidation
time) had insignificant
little
sample
value.
as a
resistivity
time (RTP
plotted
to its high
the silicide. There was very
sec
Poly_P+
Poly-N
plotted on a separate axis
shows
O. -cm)
effect on
in resistivity
the overall
over a wide
the plots did show the resistivity
crystalline and polycrystalline regions as
previously
seen.
-Si_P.
Resisitivity vs. Time
Temp = 695C
1.0E+01
1
-Si-I
Resistivity
Temp
-Si-N
=
vs.
Time
-Si-N
S73C
-Poly-N
-Poly_P
-Poly-N
+
40
45
55
50
60
Time
electrical
-Poly -I
1 OE+00
.OE+00
Fig. 4.6.
time
Resistivity as
resistivity
a
65
70
75
80
30
(sec)
function
40
50
60
70
80
90
Time (sec)
of RTP
and silicidation
time
at
695 C
time.
57
and
573 C. There is little
or no correlation
between
MS Thesis
Phu Do
Resistivity vs. Temp
Time
=
20-60
sec
-1.0E+01
Temp(C)
Fig. 4.7.
Resistivity
while all other
data
while an up-tick
is
Although the
shows
A time
seen
the
were at
regions
60sec
time
and silicidation
20-60
visible.
sec was plotted since
The first
region
existed
746 C
to
with an
published
other
two
region
second
-
increase in
resistivity
composition of all samples at
the
Based
between 450
published
process was
on
and silicidation
Fig. 4.6
Fig.
being
region
695
C,
were at
seen at
20sec RTP time
400 C RTP temperature
4.7, it
was
was
the DOE
by
temperature at
was apparent
400 C
analysis.
variable
beginning
Comparing
phases,
time.
impact
was
characteristic
lowest
by
of
Fig.
that three distinct
with
characterized
and the
silicide
450 to 746 C
was significant correlation
suggested no significant
around
resistivity.
of nickel
the third
of
observed
region was
the resistivity value of each
it
mainly Ni2Si
seemed
like the
phase
or a mixture of Ni2Si with
phases.
In the first region, the resistivity
the
correlation, there
temperature as suggested
between resistivity
extremely high resistivity, the
resistivity that
at
dramatic increase in resistivity is
showed no
silicidation variable.
were
visible at
RTP temperature. Data
of
time. A
750 C.
silicidation
correlation
range of
for this
function
visible at
between resistivity
4.7
as a
450C to 550C
resistivity
of
D3
was over one order of magnitude
of all nickel silicide phases.
incomplete for the
given condition.
58
This
This
suggested
was evident
higher than
that the silicidation
by
the fact that there
Phu Do
MS Thesis
was un-reacted nickel metal on this sample and not on
received much
higher temperature treatment for
(75 sec) time. Yet
no samples showed
complete nickel silicidation
In the
second
However,
phases.
into the known
region, the resistivity hovered
or
other possible mixture combinations
to
were possible
based
Previous
there
was
use as references.
on
SIMS
and
published works
for
has the
shallowest
suggested
an
incomplete
for the two-step
process at
the junction
depth,
a
in the decrease
a
of
measured silicide
resistivity for
phase
not
silicidation process
necessary, the
sample was
depth. Relative to
After
all
for
two-step
the only sample that
all other
samples, D3
measured resistivity.
silicidation process
As
stated
therefore making it the
un-reacted
nickel
best
metal
was
polysilicon and silicon regions underwent a second
RTP
silicidation
dramatic
its
the
5 for further detail.
chapter
two-step RTP
the highest
study.
NiSi2
and/or
confirmation of such phase mixtures
D3. This
500 C for 60sec. Inspection
yet
silicide
[4, 5]. Although
silicide's
profile as well as
from D3, the implanted
annealing
resulted
depth
the
a
Ni2Si/NiSi, NiSi/NiSi2,
exist within
Refer to
analyses.
have implemented
reasonable control over
earlier, this
removed
the
approach was also studied on sample
allowed
candidate
that may
However,
previous metal silicide such as cobalt silicide
annealing
the RTP
after
resistivity may be the
observed
no published nickel
XRD
over
longer
insufficient to trigger
was
a mixture of multiple silicide phases such as
Unfortunately,
and much
that of the NiiSi
around
is that the
another possible condition
combinations
400 C
left
other samples
stable phase.
resistivity for
thickness.
at
All
(20 sec)
un-reacted nickel
any
overall
any
much shorter
Despite the RTP time, the RTP temperature
anneal.
others.
any
drop
electrical
of the grooves showed
in the
resistivity
59
sheet
by
resistivity
was
little
seen.
variation
Such
in
drop
about one order of magnitude.
See
MS Thesis
Phu Do
Table 4.5
and
Fig. 4.8 for detail. The final
regions was on the mid
to high
However, its junction depth
samples.
Similar
However,
there were
electrical
side yet comparable
remained
fairly
insignificant
Table 4.5. Measured junction
Wafer Region
changes
depth, Rs,
Temp
[C]
and
Time
[sec]
similar regions
the same and much
RTP processing step
second
to
of
resistivity
in the
was
sheet
resistivity
done
of implanted
xD
[nm]
Rs
[n/a]
D3
from
other samples.
less than any
several
on
resistivity
the implanted D3
other
samples.
junction depth.
and
regions.
Rs Std.
Dev
[Q/d]
P
[Q-cm]
D3 Si P+
400
60
195.1
8.4195
0.3730
1.6425E-04
D3 Si P+ 2nd RTP
500
60
187.2
2.0960
0.0203
3.9235E-05
400
60
185.5
17.7650
0.3249
3.2946E-04
500
60
172.6
4.1157
0.0787
7.1039E-05
Poly P+
Poly P+ 2nd
D3
D3
RTP
Two-
Step
RTP
other
-^D3Si
P+
--D3Poly_P+
1.0E+02
-|
1st RTP
o
i
E
_z
1
.0E+01
i
*^\
^^\
>
<n
CC
2nd RTP
-
1. OE+00
1
500
400
RTP
Fig. 4.8. Electrical resistivity
of D3
Temp ( C)
implanted
2nd
regions after
RTP.
4.4. Discussions
The
result.
observations
Doped
regions
made
in
section
4.1
were
supported
by
the electrical resistivity
generally have lower resistivity than that
60
of non-doped
regions,
Phu Do
MS Thesis
although
this was
more
and electrical
resistivity
discussed
effect
done through SIMS
SIMS
did
analysis
The depth
thickness
not
An
due to
resources and
than in
diffusion
coefficient
budgetary
silicide's
in the two
was
regions
constraints.
for
profile needed
thickness
was
This
polycrystalline silicon regions.
The difference in thickness
4.5
and
respectively.
for
external
a given nickel
generally thicker in the
was apparent
mainly due to the difference in
[6]. Kuznetsov has
The
be
such confirmation.
technique revealed that
groove
annealing condition, the
and
in Fig. 4.1
sheet
absolute confirmation of this claim could not
actively study the dopant
the
Similar
region.
believed to be partly due to the dopant
regions was
by
polysilicon
were observed
earlier.
profile obtained
crystalline silicon
above.
analysis
than in
silicon
resistivity trends
Such lower resistivity in doped
snowplowing
in
apparent
reported
in Fig. 4.3
nickel atomic
that the diffusion
10"
coefficient of nickel
six
in polysilicon, 2.9
exp{-1.30(eV)/kT} [cm
x
to eight orders of magnitude lower than in crystalline silicon
range
of
270 C to 435 C. Nickel
crystalline
silicon.
However,
reported
to be
a
the presence of high concentration
consequently the thinner
silicide
film in
was about
for the temperatures
fast interstitial diffuser in
the interstitial diffuser [6]. This caused the
polysilicon retarded
coefficient and
was
/sec],
of
dramatic
intrinsic traps in
drop in diffusion
polysilicon region as seen
in Fig.
4.3.
In addition, Fig. 4.1
silicon
the
than in
conclusion
polysilicon
was
4.5
also showed
polysilicon regions
that
significantly lower resistivity in
despite implant
effect.
nickel silicidation was preferential
in terms
higher in
and
of
both formation
This
observation contributed
61
to
to crystalline silicon compared to
rate and silicide's property.
crystalline regions as confirmed
crystalline
The
silicidation rate
by thicker junction depth result
seen
in Fig.
Phu Do
MS Thesis
4.3. The higher
of the
silicidation rate allowed
three known
stable phases.
known through
were not
silicon regions suggested
phases, Ni2Si
discussion
section
Although the
electrical
phase
transformation into one or more
exact silicide's phase or mixture of phases
measurements, the lower resistivity
that the silicide composition consisted primarily
NiSi, due
and
for faster
of crystalline
of
the
to their lower resistivity. Refer to the XRD
first two
and
SIMS
in Chapter 5 for further detail.
4.5. Conclusion
The
sheet
electrical
resistivity
resistivity data
and silicide's
grooving techniques. The
of
the entire
Material
silicide
any
for
junction depth
layer
without regards
these silicide
Therefore,
is successfully
measurements
calculated electrical
characterization of
phase compositions.
of nickel silicide
resistivity
to any
films
based
calculated
on
through four-point
probe and
the
resistivity
represents
overall
composition mixture of silicide phases.
shows the existence of multiple silicide
the calculated resistivity is
not and should not correlate
to
published single-phase nickel silicide values.
Furthermore,
the accuracy
a correction
factor
factor is
expected
resistivity data.
to
of
of
electrical
the depth data
modulate
However,
the
is
much
nickel silicide
information is
crucial
in the
depth
and
not absolute
section
still
valid.
polysilicon regions.
The
62
and
4.2. The
need
correction
electrical
four different regions,
silicidation rate
This consequently
in
crystalline
results
in thicker
of a
MOSFET. This
fabrication if shallow
source/drain and
crystalline silicon source/drain regions
future MOSFET design
due to the
consequently the
the qualitative analysis between the
higher than in the
film in the
mentioned
the junction
doped/non-doped silicon/polysilicon, is
silicon
resistivity is
MS Thesis
Phu Do
fully
silicide poly-gate are
is moderately higher in
considered
in
such
desire. Furthermore, the
polysilicon compared
device design.
63
electrical
to crystalline
resistivity
of nickel silicide
silicon regions and should
be
Phu Do
MS Thesis
Reference
[1]
M.
Zimmerman, "Investigation of Contact Resistance
NiSi Nickel Mono-Silicide
during
Columbus,
[2]
[3]
[4]
Dr. Lynn
Formation,"
and
Ohio State
Aluminum
Spiking
University Thesis,
Ohio.
Details,"
Department of Microelectronic
Fuller, "RIT PMOS Process
Engineering at RIT, Rochester, NY(2002).
K. Maex, M. Rossum, Properties of Metal Silicides, Datareviews Series No. 4,
INPSEC, London, United Kingdom, (1995).
S.P. Murarka, Silicides for VLSI Applications, Academic Press, Inc., Orlando, FL,
(1983).
[5]
B.
Froment, M. Muller, "Nickel vs. Cobalt Silicide Integration for Sub-50nm
ESSDERC, pp.2 15-2 18, (2003).
A. Yu. Kuznetsov, B. G. Svensson, "Nickel atomic diffusion in amorphous
Applied Physics Letters, 66 (17), pp.2229-2231, (1995).
CMOS,"
[6]
silicon,"
64
Phu Do
5.
MS Thesis
Material Characterization
Various
analytical
Atomic force
silicidation.
of
Rutherford
mass
determination
electrical
were
data
and
tapping
phase
the
actual
RTP annealing
for
silicide's phase
phase
topography
identification,
composition,
and
silicide elemental concentration
of
surface
other
surface
AFM
analysis was
topography
three
with
techniques
depth,
and
to determine
the silicide's
were
used
identification
of
to
the
condition.
to
and
analyze
the
grain
size
of
chapter
the
utilized
root mean square
was used
automated
(STM)
preparations were
for
The
(RMS)
the sample using the basic
surface
was
roughness
value, and the
morphology
force microscopy
in the
grain size was
analysis.
(AFM)
surface
characterized
was
A Veeco Dimension 3000
all surface
atomic
of
3. The primary interest
film.
through visual inspection.
(SPM)
topography
surface
characterized
using
for
composition, junction
by the
microscopy
The
to study the
determine
was used
between
quantitatively
SPM
to
used
composition.
described in
as
mode
Microscope
was used
characteristics of nickel
Morphology by AFM
was used
roughness
correlations
any
silicide phase at specific
AFM
was
was used
junction depth. The intention
complement and validate
5.7. Surface
(XRD)
(SIMS)
spectroscopy
as well as
there
(AFM)
microscope
backscattering (RBS)
secondary ion
to study the material
were used
x-ray diffraction
films,
the silicide
whether
techniques
qualitatively
Scanning
Probe
The Dimension 3000
and
scanning tunneling
techniques to measure surface characteristics. No special surface
done
on
any
samples prior
a commercial nitrogen-based air
to the analysis. All samples were air cleaned
duster
65
product.
A Veeco OTESPA
silicon
probe-
Phu Do
tip
MS Thesis
with
assembly,
temperature
5.1.1.
tip
of
radius
Fig. 5.1
was
used
for
room
at
measurements
all
and atmospheric condition.
analysis was
the
shows
polysilicon,
done
grain
apparent
on several reference samples prior
structure and root mean square
doped polysilicon,
nickel metal on
from left to right
respectively.
that
nickel
No information
grain
crystalline silicon compared
to
structure
Although there
the
mimic
';-
limited data, this
were
surface
very
morphology
of the
(RMS)
was available
and
similar
seemed
to any
and nickel me+al on
roughness
polysilicon region.
roughness of deposited nickel were
%
7nm,
Reference Regions
AFM
was
a
roughness
doped
for doped
were
Furthermore,
the
suggest
that
of
doped
silicon regions
silicon region.
much
It
less in doped
grain structure and
to that of the underlying
to
silicide analysis.
polysilicon
sputtered nickel
film.
tends to
underlying film.
'
-#*>.
.
'
*
f,,
#-.
Wt_f
'-f
"
":
"<
"
-'
;
Fig. 5.1. Reference AFM
regions
from left to
Mechanical
-J
of
doped polysilicon, nickel on doped polysilicon,
Fixed scan size at 2.5um x 2.5|im.
right respectively.
Engineering Department,
RIT.
66
and nickel on
Courtesy
of
doped
Dr. V.
silicon
Gupta,
Phu Do
5.1.2.
MS Thesis
Near Critical Temperature
Based
at
on
literature references, the
RTP annealing temperature
Due to limitation
of
the RTP
400C. Fig. 5.2
shows
400C, 573C,
and
whereas
were
were
of around
350C, 500C,
tool, the lowest
possible
and
were
polysilicon
Fixed
scan size at
crystalline silicon regions.
Engineering Department,
regions
2.5um
RIT.
67
x
2.5nm.
was
were
[1, 2].
limited to
roughness of nickel silicide at
regions.
It
polysilicon
regions
was apparent
that the
were visible at
known
whereas
NiSi2
700C respectively
taken in doped
the lowest RMS roughness
from doped
and
and
temperature setting
RMS
taken in the doped silicon
roughness of silicide's surface around
taken
for Ni2Si, NiSi,
critical conditions
746C. The top images
the bottoms
Fig. 5.2. Surface
Constant Time
the surface morphology
smallest grain structure and
images
and
critical
temperature valued. The
the bottoms
Courtesy
400C.
of
were
top
taken from doped
Dr. V. Gupta, Mechanical
Phu Do
The
MS Thesis
surface
573C than
morphology (grain
at
746C. This
region, the
polysilicon
structure and
was
most
grain structure at
RMS roughness)
visible
746C
in
crystalline
seemed
to be a
the spherical and cylindrical grains found at 573C. The
seen
in
in
region.
at
In the
result of agglomerations of
same agglomeration effect was
rate of agglomeration appeared
to be
much
were
faster
higher.
Silicidation Temperature Effect
Similar to the
strong
the
silicon
the overall grain structure and RMS roughness
crystalline silicon since
5.7.3.
correlation
correlation.
to
However,
crystalline region.
slightly higher
was
700C,
increasing
electrical
with
The RMS
and
resistivity characteristic, the RMS
silicidation
roughness
began to
drop
temperature.
increased
off at
linearly
in
previous works
Time
roughness as a
shows
temperature increased
function
=
and
eventually
was
vs.
as
of temperature at
68
60sec.
a
from 400C
expected since
agglomeration
-A
Si_P+
-
Poly_P+
Temp
60s
exhibited
the plot for such
[1,3].
RMS Roughness
Fig. 5.3. RMS
as
5.3
higher temperature. This
temperature leads to the merging
silicide grains as observed
Fig.
roughness
of nickel
Phu Do
MS Thesis
The
correlation of such observation with
higher RMS
roughness
leads to lower
400C,
resistive silicide value at
the
the electrical resistivity
Refer to Fig. 4.7. Note the
resistivity.
drop
results showed
in resistivity in the
range of
that
highly
450C to
700C,
the increase in resistivity at higher temperature. Fig. 5.3 also showed that such
and
changes
doped
in RMS
roughness
This
polysilicon regions.
faster in
was much
5.7.4.
were more pronounced
seemed
crystalline
to support earlier reasoning that
due to higher
crystalline regions
in doped
nickel
diffusion
silicon than
silicidation rate
coefficient.
Silicidation Time Effect
Unlike
roughness
silicidation
temperature,
of silicide
silicidation
time
film. Fig. 5.4 depicts the
showed moderate effect on
effect
time
of
on
the RMS
silicide's
surface
roughness.
Si_P+
-
RMS Roughness
Temp
=
vs.
Time
*
573C
RMS Roughness
Poly_P-.
Temp
30
25
-
\^
S. 20
-
-
^*~"~
20
Si_P+
Time
-*
Poly_P+
-
^.
-
^--^
E
-
ID
a,
15
_
vs.
695C
?
25
^""\
e
=
_
15
_
10
-
-
o>
=1
10
_
-
CO
_
5
-
CO
A
_
5-
-
_
0
45
35
85
75
65
55
-
35
45
Fig. 5.4. RMS
roughness as a
As observed, the
regions.
that
This
effect
function
of
55
65
Time
Time (sec)
of time at
573C
and
75
85
(sec)
695C.
time was more pronounced in crystalline than polysilicon
was consistent with previous observations and
silicidation rate was much
faster in
crystalline regions.
69
further
supported the
fact
Phu Do
MS Thesis
Surface
695C
roughness
for both
regions.
to lower
silicide
between 573C
time
This
respectively.
Thus the
15sec
another
at
data
point
on
60sec for temperature
there
longer time
in relating higher
the calculated values in
in temperature
The lowest
However,
at
and
of
573C
and
to the lowest electrical resistivity found in Fig. 4.6
695C, increased
695C.
40sec
observation was consistent
resistivity based
and
at
corresponded
on surface roughness.
about
highest
was
was
was
low
found
confidence
needed
4. In
chapter
seemed to
surface roughness
surface roughness
comparison
delay/shift the
at
level in
573C
was
effect of
delayed
by
such conclusion since
in the lateral temperature
plot
for
completeness.
5.2. Phase Identification
by XRD
X-ray diffraction (XRD)
film. Doped
analyzed,
crystalline
and
samples prior
the
etch
confirmed
of
silicon
and
results were shown
D3
sample
was
by RBS
D3
at
indeed
analysis.
29
=
to
polysilicon
identify
the phase(s)
regions
from
in Table 5.1. XRD
to and after the wet etch of
detected only in
wet
analysis was used
un-reacted
selected
analysis was
un-reacted nickel metal.
44.6. This
confirmed
nickel
metal.
Refer to Fig. 5.5 for detail.
70
of nickel silicide
that the dark
Such
samples
done
Nickel
on
these
metal was
cloud seen
observation
were
was
during
also
be
Phu Do
MS Thesis
Fig. 5.5. XRD
intensity
44.6.
of Dr.
Courtesy
Besides
plot of
D3
to and after metal
prior
D15,
sample
(Kdi
size of
was set with a
step
20 for
DI, D3,
20
sample
since no useful
=
1
.93604
A)
at
0.01
step
size of
critical variations
As
evident
silicide phases
with a
D3
trace
was
0.01
and
at
A,
Ka2
and
the
A)
be
seen
at
beyond
IBM. The tool
35 kV
scan angle varied
at
20sec/pt. The difference in XRD tools
in the
is
presence at
29
and
taken using a Cu
35
30
from
from
35
Fe
The
scan
20 to
120
mA.
30
In addition,
utilized a
Lab
Engineering
at an angle of
such range.
at
35mA. The
40 kV
done
Siemens DMAX XRD
and
peak
angle was varied
other samples were
could
Nickel
RIT.
measurements were
1.544390
=
1.57min,
D6. All
information
was analyzed on a
(k
1.540562
=
All
system.
at
RIT Mechanical
all samples were analyzed at
using the Rigaku DMAX-IIB XRD
radiation source
wet etch.
Gupta, Mechanical Engineering Department
20 to
sample
68
D15
radiation source
20 to
75
was not expected
to
20
with a
cause
any
analysis.
from Table 5.1, the majority
(primarily
presence of
of Ni2Si and
NiSi
peak.
significantly less than
silicidation condition of
D3 (400C
the
samples contained mixture of nickel
NiSi). Sample D3
The
all
of
intensity
other
and
of
samples.
60sec)
71
consisted
the one NiSi
mostly
signature peak seen
Consequently,
was close
of Ni2Si phase
in
this suggested the
to the transition condition of
Phu Do
MS Thesis
Ni2Si into NiSi. Such
in both doped
evident
observation was
crystalline
silicon
and
polysilicon regions.
Table 5.1. Nickel
silicide
phase(s) detected
radiation
from the Siemens DMAX XRD
radiation
from the Rigaku DMAX-IIB XRD
Madam
at
IBM,
RIT.
at
Sample D15
analysis.
and all
other samples
Courtesy
Dr. V. Gupta
of
Temp
PC]
Time
D3
400
60
at
RIT
using Cu
Mrs. A.
and
Poly_P+
Detected
Phase(s)
Ni2Si,
Ni2Si,
slightly NiSi
Ni2Si,
NiSi
NiSi
NiSi
Ni2Si, NiSi
NiSi
Ni2Si
D4
450
45
500
20
D14
520
20
NizSi,
Ni2Si,
D6
573
39
NiSi
D7
573
81
NiSi
Ni2Si,
Ni2Si,
D11
695
45
NiSi
NiSi
D1
746
60
Ni2S,
on
phases.
higher than that
respectively.
NiSi
the silicidation temperature in the
temperature ranges
from 450C to 520C
However,
of
NiSi
The two
near
the
doped
and at
intensity
of
silicon region.
and
peak
intensities
695C,
the
NiSi
presence
silicon region.
The
showed
strong
phase.
presence of
NiaSi
peaks
was
silicide phase mixtures were seen
single phase
Once again, this
NiSi
to agree
72
were
as
Ni2Si
in doped
before the
695C
746C
Within the
completely
gone
crystalline
polysilicon regions.
NiSi
complete
compare
and
temperature
only true in the
mixture of Ni2Si and
was seen at
seemed
comparable
regime respectively.
Note that this
Table 5.1. In general, the
alone, the
peaks were an order of magnitude
were more
of
wider temperature range on polysilicon region
phase was seen.
NiSi
the lower and higher temperature range, 450C
signals of
Different
Refer to Fig. 5.6
Ni31Si12
phases'
temperature of 573C to
only strong
NiSi
crystalline silicon region
746C
Ni2Si
Phase(s)
slightly NiSi
Ni2Si,
increased/decreased from the lower/higher temperature
leaving
analyzed
Si_P+
Detected
[sec]
D15
NiSi
using Fe
was analyzed
were
IBM.
Wafer ID
Based
and
XRD
by
at
occurred
for
a
transition to NiSi
to 573C in crystalline
and support earlier observations
that the
Phu Do
MS Thesis
faster in
silicidation was much
it
be
should
Zhang's
silicide
phase
that the
noted
experimental
[4]. His
observed
polysilicon regions.
However,
during
In
at
of Ni2Si phase
Ni3iSii2 is
in
sample
rich
confirmed
and
D7. D14
Ni3iSii2,
a
One
distinct
samples.
that
746C in
was seen at such
have
nickel
multiple
crystalline silicon than
D4
phase
peaks of
showed a
was
not
sample
the
single phase
not seen.
the
beginning
accounting
phase.
This
the
phase
highly
such
was
DI. The reasoning is
NiSi,
of
Ni2Si
understood
the final
73
in
generally
where
analysis.
and
presence
high temperature
mixture with
clearly
strong
observable
quite
in
polysilicon
occurrences were seen
come at
without
in
of Ni2Si was
into the first
observed
phenomenon
to be the primary, if not in
by RBS
for
the two primary
highly unstable phase that is
trend
mixture at
Similar
showed
lower temperature
generalized
NiSi
to why Ni2Si
was expected
D14
transform
Ni2Si
as
detected NiSi
samples.
instantaneously
presence of
NiSi
defined in
the analysis clearly
that would
occurrences.
as
and
silicide phase
improbable
and
Furthermore,
phase mixture was consistent with
intuitively unlikely since the presence
mixture with
Therefore, Fig. 5.6
known
Ni2Si
four higher temperature
silicidation process and
[4].
D4,
was seen at
a metal
polysilicon regions.
silicidation.
polysilicon region of samples
NiSi
NiSi
was more apparent and well
this was
strongly identified
whereas
and
than in
results where multiple phase growth were observed
The transition trend
Ni2Si
Ni2Si
experimental results showed
that coexisted
region.
crystalline silicon
the
not yet
NiSi2
phase
observation was
Phu Do
MS Thesis
400 C
450 C
520 C
573 C
695 C
746 C
Doped Crystalline Silicon
M2Si+NiSi
400 C
NiSHNi2Si
450 C
520 C
573 C
695 C
746 C
Doped Polysilicon
Fig. 5.6. General
The
observed nickel silicide phase transition
effect of silicidation
not well understood.
intensity
regions.
of
NiSi
This
Based
on
peaks was
seemed
to
time
higher
with
to draw such
conclusion was supported
time
higher
yielded
by
surface
External Rutherford
would reveal
was
its
the
inability
earlier
in
and
D7, it
of
allowed
lower
silicon
for thorough
Ni2Si. The inclination
results where
and
that the
was apparent
time in crystalline
NiSi instead
AFM
mixture was
it
was observed
electrical
that
resistivity,
a
earlier chapter.
detecting
capable of
interest
were
Ni
and
overall nickel silicide phase
to
case
backscattering (RBS)
XRD data. RBS is
elemental ratios of
in
by RBS
5.3. Phase Composition
the
D6
silicidation
roughness
characteristic of NiSi phase as concluded
validate
longer
phase, in this
to the
longer
data,
that the longer silicidation time
transitioning
more stable
crystalline silicon and polysilicon.
on phase presence and concentration
the limited XRD
suggest
in doped
distinguish
and
was
done to
complement and
elemental ratios of a material.
Si in the
silicide
film. The
in the film. One limitation
identify
74
analysis
the
presence
In this case,
ratios obtained
of
RBS
of multi-phases
analysis
such
as
Phu Do
MS Thesis
Ni2Si/NiSi. In addition, the
there is
one
undoubtedly
such as
uniform
result
grooving
in
and
thicknesses based
calculated phase
throughout
phase
thickness
some
=
Such
assumed that
assumption
would
was used
to calculate the
and single silicide phase
from K. Maex
obtained
overall silicides phase
reference
density. The
[5].
__Z____FJ_
PNA
(5.1)
t
=
T
thickness
(cm)
(atoms/cm2)
atomic weight (g/mol)
real
RBS thickness
=
Mj
Fj fraction
=
=
p
=
NA
Doped
sent
layer.
entire
RBS thicknesses
density was
't
the
RBS data
on
variations when compared with other technique
SIMS. Equation 5.1
on measured
single silicide phase
thickness based
of material
compound
=
6.025
in
compound
density (g/cm3)
1023
x
atoms/mol
crystalline silicon and polysilicon regions of samples
to the
University
Department
of
of
Florida for RBS
Physics, University
all samples sent
of
analysis.
Central
(Courtesy
Florida.)
of
DI, D3,
and
Dr. Gabriel
D6
were
Braunstein,
Fig. 5.7 depicts the film
stacks of
for RBS.
Doped Si
Doped
334.6nm Ni
334.6nmNi
2500nm
N+
Poly
200nm
Si
N+
Polysilicon
41.5nm Oxide
P-type Si
Fig. 5.7. Cross
Fig. 5.8
summarizes
other
two
sectional view of samples sent
the RBS results
crystalline silicon region of
D6
P-type Si
consisted
of all samples.
purely
crystalline silicon samples showed
75
of NiSi
slightly
for RBS
It
analysis.
was apparent
phase, Ni/Si
uneven
that the
ratio of
distribution
doped
0.5/0.5. The
of
Ni/Si ratio,
Phu Do
with
but
MS Thesis
Si
not
ratio
slightly higher. This tended to
being
entirely NiSi
possibility.
However,
phase as
in D6
seen
this technique did
that the
suggest
that some
and
not give sufficient
silicide was
primarily
multi-phase mixture was
a
information to determine the
content of such multi-phase.
746C, 60sec
400C, 60sec
Sample IP
Ni
The
Si 35%
65%,
3600xl015
Si02415A
Si
Si
has been
Ni
100%, 2500 A
Si
415AofSi02
consumed and
Sample 6P
A
Ni 100%, 2800
atoms/cm2
polysilicon
573C, 39sec
Sample 3P
Sample did
65%, Si 35%
3525xl015atoms/cm2
415AofSi02
Si
The
not change
Ni2Si has
polysilicon
consumed and
formed.
formed.
Sample IS
Ni
Sample 3S
49%, Si 51%
4850xl015
Ni
interface
between the top layer
second
layer,
and the
or a rough
There is
48% Ni
a thin
and
Ni top layer
Summary
There is
of
RBS
Si, between
and the
a rough
second
the
layer,
In the doped
of
surface.
Si
result with elemental ratio and
RBS thicknesses.
Dr.
polysilicon
regions,
0.65/0.35. The significantly higher Ni
phase
was
a metal
ratio (~
2:1)
and
the
ratio suggested
This
the XRD detection
D6
of
showed
suggested
rich phase, Ni2Si. Similar to the
disproportional
confirmed
DI
samples
and the
or a rough
Braunstein, Department of Physics, University
Florida. Sample 1P=D1 Poly_P+, 1S=D1 Si_P+.
Courtesy
interface
between the top layer
layer of about
52%
atoms/cm2
Si
atoms/cm2
Si
surface.
Fig. 5.8.
Ni 50%, Si 50%
4900xl015
48%, Si 52%
450xl015
a rough
Sample 6S
100%, 2800 A
Ni
atoms/cm2
Si
There is
has been
Ni2Si has
Central
a
Ni/Si
ratio
that the primary silicide
crystalline
region, the slightly
presence of multi-phase silicide composition as well.
of
Ni2Si
and
NiSi
mixture
in DI
at
746C. Although
not
anticipated, Fig. 5.6 was valid with the presence of Ni2Si/NiSi mixture at the
and
higher temperature
was
completely
range where single-phase
consumed
during
of
the
NiSi
existed.
silicidation process
76
Notice that the
for both DI
and
lower
polysilicon
D6
samples.
Phu Do
The
MS Thesis
difference in the RBS thickness
slight
Unlike the two
undoubtedly the
presence of
that the
the
region
by
changed
an
order
Furthermore, XRD
process.
also
with
a
to Table 5.2 for the actual silicide thickness
Table 5.2. Calculated
compared
Dl-S
=
silicide
Ni/Si
layer
This
the sample
ratio of
highly
from before
strong
presence of
calculated
Density
after silicidation.
crystalline
for
resistivity
Ni2Si in the
region.
density
RBS thickness
and
Dl-Poly_P+,
=
D1-Si P+etc.
Groove
RTP
Ni
Si
Sample
Temp
(C)
Time
(sec)
Ratio
Ratio
D1-P
746
60
0.65
0.35
D1-S
746
60
0.49
0.51
D3-P
400
60
D3-S
400
60
0.48
0.52
NiSi
4.50E+17
49
195
D6-P
573
39
0.65
0.35
Ni2Si
3.53E+18
379
442
D6-S
573
39
0.50
0.50
NiSi
4.90E+18
538
700
Table 5.2
shows
RBS
-
-
the
calculated
thicknesses and
single-phase silicide
for the primary
phase
the
Refer
each region.
RTP
could
of
after the silicidation
and
from [5]. Dl-P
adopted
lower
presence of nickel silicide
since the sheet
unlikely
was
observation
0.48/0.52 in the
detectable
thickness based on single-phase
to thicknesses from groove technique.
to the
There
was about an order of magnitude
was no
of magnitude
detected
related
differently.
yielded
metal was present on
the polysilicon region at 400C. This is
on
D3
sample
of this silicide
be
and could
process.
In addition, there
samples.
insignificant
of nickel metal on the surface.
that nickel
The thickness
two
other
280nm
thin layer of silicide
was a
silicon region.
discussed,
samples
validated earlier conclusion
Notice there
deposition
of the polysilicon
non-uniformity
was
be
made
for the
silicide was
in the
Thickness
Thickness
Thickness
Phase
(atoms/cm2)
(nm)
(nm)
Ni2Si
3.60E+18
387
439
NiSi
4.85E+18
529
581
-
-
silicide
density
reference
Based
in
crystalline silicon
on
based
on
the measured
[5]. Notice that the
silicide mixture was used
minor silicide mixture.
thicker
thickness
119
-
in the
this
calculation.
information,
than polysilicon regions
77
phase
it
No
RBS
density
account
was clear
that
by 36%-42%.
The
Phu Do
MS Thesis
significant of this
is that it further
confirmed
silicon as concluded earlier.
Furthermore, it
in D3
expected silicide
crystalline
region would
be
region, the
about
the higher
showed
that
in
silicidation rate
with a
49nm thick
silicide
thickness in the corresponding
34nm thick. Such thickness
crystalline
polysilicon
have been detectable
should
film
by
the
RBS tool in Florida.
5.4. Elemental Concentration
To
done
complement
RBS analysis, secondary ion
on selected samples.
D14 doped
Due to
SIMS
polysilicon
budgetary
by SIMS
Three
region)
samples
were sent
constraints and
(D15 doped
to the
limitation
analysis was used as an alternative
information. It
was
also
a more
mass
spectroscopy
the
of
Florida for SIMS
number of samples sent
to obtaining the necessary
analysis.
for RBS,
phase composition
technique in obtaining the
accurate
analysis was
silicon and polysilicon regions and
University
on
(SIMS)
actual
silicide
The detected layers
of each
thicknesses.
Table 5.3
sample are
shows
the SIMS
results
listed from top to bottom
showed an ultra
was not picked
up
and polycrystalline structure.
the
pad
oxide
polysilicon
the
with
#1
samples.
being the
layer. Notice
surface
thin layer of native oxide on the surface. This native oxide
all silicon and silicide surfaces
This layer
for the three
grown
from the
in
atmospheric conditions
by the RBS
The last
during
technique perhaps
oxide
processing.
silicon substrate.
in both
oxide
layer
Fig. 5.9 through 5.11
University of Florida.
78
layer
shipping
due to its
seen
layer
This
during
ultra
all samples
grew on
and storage.
thin thickness
polysilicon samples was
was
shows
used
to isolate the
the SIMS results from
Phu Do
MS Thesis
SIMS: Poly_P+
Min: 0
20sec
( 500C,
)
Max: 41820
CsSiO(177)
D15-P: RTP
Ulf
=
500C,20sec.
Red
5keVrCs, 205nA, 4v0um
}L
CsStfldl)
-j V
-
frtWt
r
f
L\
(342,0,7,35)
Positive
Acquisition^
0
=
Blue
=
SiO
Green
=
Purple
=
Si
Ni
J-l
-
Cs'Ni(191)
h^MYft>
Cps
A
j
V''
i
LLl
I
;V0
SiOj ~5nm
NiSi-
isO(149)
385nm
NlSij ~91nm
iflSD
Si02
I III
Si
j
gag^agzL,
Fig. 5.9. SIMS
result
for
sample
640
j
800
(nm)
D15-Poly_P+.
SIMS: Si_P+
Min:0
csaas?!
__i
480
Depth
~46nm
Courtesy of Dr. Lambers, University of Florida
20sec
( 500C,
)
Max: 141530
CsSiO(177)
D15-S: RTP
=
Red
|
5uC, 20sec.
Blue
5keV
Cs, 205nA,l400pm
J34^,0,7,35} Positive Acquisition
!
i
Cps
,-,
=
Green
SiO
=
Purple
=
Si
Ni
!
l_
_)
i.f\
0
=
i
^
-,
/Vvv^-v /VV<
/
>v
; "V.
i
'I
'
_.
-,.1
CsNifl-91)
I
\
i
*
:
V(
'-J
I
;sNi(i9i)
\
!
CsSiO(177)
Depth
Fig. 5.10. SIMS
result
for
sample
-V^fVWVvlk
Si02
<
Nij.Si
-
NiSix
~
5nm
200nm
360nm
""---_ I
|
640
480
160
-J
Si
CsSi|161)
sO(149(
WvWvv*^
,
(nm)
D15-Si_P+.
Courtesy of Dr. Lambers, University of Florida
79
Phu Do
MS Thesis
SIMS: Poly_P+
Min: 0
20sec
( 520C,
)
Max: 41148
'
D14-P: RTP
=
52-C, 20sec.
Red
1
5keV
Cs, 205nA; 400|jm
Blue
\
(342,0,7,35} Positive Acquisition
=
Purple
i
I
I
I
1
CsNi(191)
}.--r-^-
^^lX'>Tj.'
.
"atvs"-
_iO$_
/ i/
\.
i
[ j.\gsSj(161J
j
i
fS
,AJ
jfff''\f\
*s~_.-\ V.r
_
SsSiO(177)
I
SiO
=
Green
iXXX
Cps
0
=
'
CsN|(J9?)-,
'l v
l;
-
i
=
Si
Ni
.-".',
i/|
"Ti
I
i
i
j
i
i
SiO;
ill
i
i
i
i
i
i
i
i
i
i
i
i
i
i
j
NiSi,
;y)(i49)
i
_:_
i/
_
ipfflSf]
X
J
I
Q$mkm^._.
240
Based
similar
three
based
on
result
sample
D14-Poly_P+.
between 500C to
was
XRD data. In the
phase near
the
surface
was present toward
Courtesy of Dr. Lambers, University of Florida
520C,
polysilicon
the bottom
of
results.
Since the temperature
range of all
such multi-phase results were
expected
region, D15-Poly_P+ showed primarily NiSi
that accounted for about
the layer
80%
near
of the entire silicide
the
pad oxide
thickness.
interface. The
NiSi2
overall
thickness was about 476nm. D14-Poly_P+ also showed similar result with the
existence of multi-phase silicide
not clear.
silicide
(nm)
to those seen in XRD and possibly RBS
on
48nm
Si
i
-
320nm
-
the SIMS results, multi-phase silicides were visible in all three samples
samples
silicide
for
Si02
-
320
Depth
Fig. 5.11. SIMS
B^agsmiX-
~3nm
NiSi-280nm
(
1
In addition, the bottom NiSix
layer. This
the NiSi
film. However, the
phase
suggested
into
exact ratio of
phase accounted
for
that the additional 20C allowed
more silicon
rich
silicide phase.
80
The
the bottom film was
about
53%
for further
overall silicide
of
the overall
conversion of
thickness
was
Phu Do
MS Thesis
600nm. Silicide
about
the three commonly known
within
"x"
labeled
phase
with
nickel silicide phases:
Table 5.3. Detected film layer from
indicates
subscript
NiiSi, NiSi,
down through SIMS
surface
ratio
that did
and
not
fell
NiSi2.
analysis.
Courtesy of Dr. Lambers, University of Florida.
Sample
RTP
RTP Time
Temp (C)
(sec)
D15-Poly_P+
500
20
Silicide Thickness
P+
D15-Si
Detected
Layer
-
476
560
-5
2. NiSi
-385
NiSi2
4. Si02
1.Si02
-91
2. NixSi
-200
3.
NiSi2
1 Si02
-360
2. NiSi
-280
20
-
(nm)
1.Si02
3.
nm
500
Silicide Thickness
Thickness
nm
-46
<5
-5
.
D14-Poly_P+
520
Silicide Thickness
In the
surface, NixSi
phase was
its
for
debatably present
thickness was
was
about
region,
rely
on
near
physically
sputter
acquired
damaging
through
of
point
in the
between NixSi
polysilicon region.
silicide
seen with
SIMS
percentage since
assumption
made
technique where
sample material.
As
a
NiSi2. Near the
and
the overall thickness. The monosilicide,
the transition
as
to be NixSi
thickness
18% thicker than the corresponding
density
away the
-48
phases seemed
36%
about
-320
D15-Si_P+ also showed the presence of
sample
560nm. Notice that the
in the SIMS
the
NiSix
4. Si02
the two
significantly less than the 36-42%
entrusted
3.
nm
clearly defined
not
about
600
However,
accounted
presence was
region
~
silicon
crystalline
multi-phase silicide.
20
with
ions
the RBS
analysis
RBS
are
result,
polysilicon
analysis.
is
more
bombard
is
81
However,
overall
silicide
crystalline silicon
region.
More
This
was
be
merit should
accurate,
against
and
it does
not
SIMS technique is
a
the sample surface to
created and
profilometer measurements of this crater.
NiSi2.
The
in this
calculation.
a crater
and
NiSi,
the depth profile is
Phu Do
MS Thesis
The thicker
silicide
silicidation was much
silicide
layer
compare
thinner
was
sample at
thinner
crystalline silicon also supported previous conclusion
faster in this
to polysilicon.
also showed
aided
layer in
and
the bottom layer
Similarly,
top
and
thicker
was
region.
Notice the top
on crystalline silicon sample
the polysilicon sample at higher temperature
thicker bottom silicide thickness
500C. Higher temperature
in the
to polysilicon
region compare
seemed
conversion of the silicide mixture
to
into
enhance
that
(520C)
to corresponding
compare
the silicidation process and
more stable silicide
phase,
silicon
rich
phase.
5.5. Discussions
As previously mentioned, the
technique required an offset factor to
represent
the depth information obtained
by
factor
regions and
seemed
range of
to vary between
400C to
573C,
RBS
70nm in
was
52nm in both crystalline silicon
were
polysilicon region.
Ni
metal yielded
silicide
based
on
be
was
SIMS
optical microscope
more closely.
grooving
Based
on
the correction
Within the temperature
157nm in crystalline region
the average correction
than at
from RBS
of nickel silicide
results.
746C,
by
The dramatic
drop
factor
in the
due mainly to the fact that the boundaries
calculated and compared
1.389nm
range.
was
obtained
techniques,
and polysilicon regions.
more accurate silicide thicknesses
silicide ratio could
analysis
temperature
at
depth
actual
SIMS
In addition,
higher temperature
visually more defined in the
With
and
the
the average correction factor
and
correction value at
depth information
silicide
to
based
Due to the
82
and
lower temperature.
SIMS techniques, the
reference works.
on
RBS
unavoidable
metal
to
On average, lnm
of
results and
limitation
1.65nm
of
of nickel
RBS technique,
Phu Do
SIMS
MS Thesis
results are more accurate since no assumption was made
thickness. In comparison
below the
were
confirmed the
was
for
pure
this study
referenced value of
law
of
NiSi
INi
in both
should not
be the
2.2NiSi [1].
However,
same as
region, it
of
RTP
was evident
phase.
Notice the
On the
that at
followed
[6]. This
hand,
other
"x"
this was clearly
Therefore,
by Ni2Si, NiSi,
silicon substrate
in
at
520C,
and
was
seen
NiSi2 layer. Such
For this study, it is
silicide
film
upper
was part of
NixSi
and
by
sequence
a nickel
local
NiSi
the case for this
not
from
NiSi2
formed
83
formed
at
NiSi2.
being the
of nickel
IO"6
x
Ni2Si
related
NiSi2
NiSi2,
silicidation
D15
received
polysilicon
thicker than the NiSi phase.
silicide as
epitaxial growth of
phase
the
Zhang
and
direct depositions to be
during
less than 2
that the
phase,
significantly thinner than the
phase was
rich
notice
regions of sample
direct deposition
highly possibly
phases were
such referenced value
520C for 20sec. In the
this group could be
the initial
obtained
experimental results
nickel silicide
as characteristic of
a vacuum environment of
results seen
values
the value obtained
"2"
during
experimental results showed
third
phase was
NiSix
of
formation
finally to
the
Both
received
NiSi2
the
less than that
ratio was
observation
500C,
Muller
D15. In addition,
samples.
D14
while sample
and
the silicide
referenced value.
three SIMS
all
observed nickel silicide
study.
the
calculate
experimental
Keep in mind that
results showed evidence of the
time of
and
500C for 20sec
the
=
.84Si
silicon and polysilicon regions of sample
temperature
their
1
+
2.2nm [1]. Froment
phase silicide only.
Recall that the SIMS
have
literature reference, both
since all results showed multi-phase silicide.
study
NiSi
with
to
first
metal
torr. Most
and
NiSi
Ivey
NiSi2,
stable phase
onto
heated
importantly,
on
the
initial
to the SIMS results of this
phase seen at
the bottom of the
the start of the silicidation, and
as observed
by
Zhang's
experiment.
Since
Phu Do
MS Thesis
the silicidation time
of
NiSi2
was
detected
was still
Notice that NiSi2
There
are
primary
three
in the XRD
analysis.
detected
could
47.5
by
and
most
XRD
NiSi
analysis
than
for NiSi2
for these three
dominant
analysis.
time could allow
for the
and/or
in
phase
Ni2Si primary
a multi-phase mixture
silicidation
complete
time
detecting
Si.
in
transformation
of the
initial NiSi2
by
of
NiSi2
the only single
to be sufficiently
NiSi2 in the XRD
of all samples analyzed
the
the strong
the detection
order
and
peak,
Therefore,
NiSi2 be
analysis.
However, its
signature
out
signature peaks requires
not
XRD
range scanned.
have possibly drown
Other possibility for
presence
samples.
samples through
the 20
within
coincides with one of
phases could
(20 sec), the
all other samples
detected in these three
Such similarity in
be due to the longer
phases, Ni2Si
shorter
signature peaks of coincide with that of NiSi and
N^Si
the
SIMS
signature peaks
presence of
phase or
by
was not
peak at about
remaining two
significantly
analysis
XRD. The longer
phase
into the
stable
NiSi.
5.6. Conclusion
The
material analytical
characteristics
morphology
resistivity
of
of the silicide
complement
Such
film. XRD
analysis
composition as well as
analytical
silicidation.
nickel
of nickel silicide.
phase(s), RBS
to
techniques are
is
the
used
overall
AFM
to
analysis
results are
analysis
extend
is
is
in characterizing the
used
successfully
used
to
to
obtain
correlated
identify the most
material
the
successful
in
surface
to the electrical
dominant
silicide
the characterization and obtain the phase
thickness of nickel silicide, and SIMS analysis
the RBS technique
techniques are
used successful
obtained
the stated information.
in obtaining the information
84
of
is
Overall,
used
these
interest. In addition,
Phu Do
the information
MS Thesis
obtained
from
characteristics of the silicide
each
technique is successfully
films.
85
used
to validate
common
MS Thesis
Phu Do
Reference
[1]
Froment, M. Muller, "Nickel vs. Cobalt Silicide Integration for Sub-50nm
ESSDERC, pp.2 15-2 18, (2003).
K. Maex, M. Rossum, Properties of Metal Silicides, Datareviews Series No. 4,
INPSEC, London, United Kingdom, (1995).
J. Seger, "Interaction of Ni with SiGe for Electrical Contacts in CMOS
Technology", Doctoral ThesisJMIT, Royal Institute of Technology, Stockholm,
Sweden, (2005).
L. Zhang, D. Ivey, "Prediction of Silicide Formation Sequence from the Principle of
the Largest Free Energy Degradation
Mat. Res. Soc. Symp. Proc. Vol. 311,
pp 299-304, (1993).
K. Maex, M. Rossum, Properties of Metal Silicides, Datareviews Series No. 4,
INPSEC, London, United Kingdom, (1995).
L. Zhang, D. Ivey, "Direct Deposition Reactions Between Nickel and Silicon
Mat. Res. Soc. Symp. Proc. Vol. 31 1, pp 335-340, (1993).
B.
CMOS,"
[2]
[3]
[4]
Rate,"
[5]
[6]
Substrates,"
86
Phu Do
6.
MS Thesis
Closing Summary
Various
characteristics of nickel silicide at
strong
correlation
The
properties.
between the
that low
by
resistivity
silicide's surface roughness.
400C to 695C
addition, the
roughness
yields
continued
higher
and
reason
for
such
This
such reoccurrence
region
The
is
regions
and
is
observation
in
746C,
be
of
In addition, it is
is
observation
NiSi. XRD
correction
polysilicon
the
much
be
results
a
region
and
NiSi, is
strongly
It is
higher degree
resistivity.
in lower
result
of
In
surface
of multi-phase
suggest
the primary
the earlier Ni2Si phase in the
RBS
analysis.
The reasoning for
this time.
thickness
silicide's
way to
estimate
through
for the temperature
factor
silicide
reduces
by
crystalline silicon
87
of
400C to 573C. At
in both
optical microscope.
all utilized analytical
than in
the
crystalline silicon
to an average of 52nm
boundaries in the
observed and confirmed
grooving,
the thickness of nickel
factor is found to be 157nm in
correction
faster in
by
electrical
temperature from
silicidation
could
reformation
as a quick
used
by
consequently lower
results
also confirmed
obtaining
due to visually more defined
silicidation
the increased in
not well understood at
average
of
Ni2Si
the method
and 70nm
temperature
Such
its
as well as published works.
characterized
surface roughness and
resistivity.
technique works and can
silicides.
generally
increase in resistivity is due to
silicide mixture.
Concerning
techniques
overall
temperature. There is a
silicide, predominantly Ni2Si
increase in temperature beyond 695C
involving
silicide mixture
was
Furthermore,
higher
to study the
material characteristics of nickel silicide and
several analytical
electrical
are utilized
silicidation time and
varying
existence of multi-phase nickel
observed and confirmed
observed
techniques
electrical and material analytical
techniques that the
polysilicon regions.
As
observed
Phu Do
in
MS Thesis
previous work, the reason
coefficient
in
Furthermore,
phase was
by
polysilicon
is believed to be due to the
six
orders of magnitude
range where
the
most
NiSi is identified to be between 573C to 695C
the optimal
summary
and
thickness
without
has
eight
the silicidation temperature
Table 6.1
and
nickel silicidation conditions
that
silicon and polysilicon regions
electrical
to
reduction of nickel
substantial
respectively.
sacrifice
of electrical
resistivity that is best for IC device integration.
significant
impact
formation. However, the
composition of
the
overall electrical
silicidation
time does
multi-phase silicide
resistivity
Table 6.1. Result
film but
of the silicide
seem
not
to
dominant
nickel silicide
695C for
6.2
show
the
crystalline
conclusion
the thinnest silicide
yield
Only
the overall silicide's resistivity as
on
due to interstial traps.
and
resistivity
diffusion
as
well
as
the lowest
silicidation temperature
well as
its primary
influence the
significantly
enough
overall
to
phase
phase
change
the
film.
Summary
Surface Roughness RMS
@ fix temp, longer time
@ fix time, higher temp
=
=
moderately higher RMS
higher RMS
Lower p
higher RMS
Phase Composition
=
-
-
Ni2S
+
NiSi
mixture
higher temp
Single phase NiSi
in temp 400C
-
573C, NiSi
ratio
695C for both poly & Si regions
Reoccurrence of Ni2Si + NiSi mixture at 746C
at
Silicide Thickness
-
-
temp 400C
(Si), ~450nm (Poly)
< 1 OOnm at
~625nm
=
at
temp
>400C
Resistivity
-
@ 400C
Si
-
@
450C
Si
~
-
~
1
.6
x
1
0"4
fi-cm, Poly
~
3.3
x
1
~
6. 1
x
1
(T4
ii-cm
0s
fi-cm
750C
3. 1
x
1
0"5
n-cm, Poly
88
increase
with
Phu Do
MS Thesis
Table 6.2. Conclusion
Summary and
Optimal Condition
Temp : 400C
-
-
-
Temp
-
p
~9xlO"5to3xlO"tn-cm
Phase
~
RMS
Ni2Si
450C
P
Phase
-
~
700C
2xlO"5to4xlO~5Q-cm
~
Ni2Si
-
Temp
-
-
-
RMS
NiSi
+
(more NiSi
-
3.1nm(Poly)
[RBS]
~2.6nm(Si),
Thickness
:
NiSi mixture, mostly Ni2Si
+
at
mixture
higher temperature)
8.0-28.0nm (Si), 5.5-1 0.Onm (Poly)
Thickness
549nm (Si), 485nm (Poly) [RBS,
~
~
:
SIMS]
750C
P
Phase
RMS
2xlO"5to8xlO"5Q-cm
~
~
Ni2Si
NiSi
+
16.1nm
Thickness
mixture
(Si), 6.5nm (Poly)
(Si), 387nm (Poly) [RBS]
529nm
~
Optimal Condition:
Lowest p:500C,
1.6 x
P
>
IO"5
Phase
~
RMS
~
NixSi
8.9nm
Thickness
-
_
-
-
+
NiSi
(Si),
~
20sec
(Si), 2.5
ft-cm
(Poly)
mixture
7.1nm
560nm
Optimal Silicide:
IO"5
x
(Poly) at 20sec
(Si), 576nm (Poly) [SIMS]
695C, 60sec
p
~1.6xlO"5(Si),3.3xlO"5n-cm(Poly)
Phase NiSi
~
RMS
~
26.6nm
(Si), 8.6nm (Poly)
89
Phu Do
MS Thesis
Future Work
Additional
order
work
is
needed
to
the silicidation temperature
extend
to observe the most dominant silicide phase in the
It is believed that
silicidation
within
dominant
such
temperature.
the
silicidation
understanding
of
necessary
electrical
process
in
a
temperature
observable and
detectable
more experimental samples should
range
in
of
573C to 746C to
of nickel silicide and
developing
temperature/time to
However, further
CMOS
be
multi-phase mixture
to
study in
be NiSi2.
with
be
obtain
higher
processed
a
clearer
the reasoning for the
746C.
successful
resistivity.
Nonetheless,
useful
was
silicidation
into
Furthermore,
the phase(s) composition
reoccurrences of Ni2Si at
This study
phase should
range of this
transistor
this study was
of
fabrication
achieve
work
is
fabrication
successful
future implementation
the
nickel
fabrications.
90
significantly low
needed
process
in meeting the
process and
obtaining the
nickel
silicide's
to implement the developed
to
determine
compatibility.
proposed objectives and should
silicide
into RIT
CMOS
designs
be
and
Phu Do
MS Thesis
APPENDIX
1.
Fabrication Process Procedures
Process
Step
1
Measure
2
RCA
3
Grow thin thermal
4
Grow
5
Etch
polysilicon
6
Coat
and
7
Comments
sheet resistance
clean
polysilicon
Target
oxide
film
Target
by
chemistry
develop resist to cover
~
~
500A
2000A
wet
non-
RIT
6"
WaferTrac,
doped half of wafers.
and
S/D dopant implantation
P31Dose-2E15
develop
Energy
8
Strip
9
RCA Clean
10
Thermal S/D
off photo resist
in
wet
standard coat
recipes.
75 KeV
-
chemistry
BRUCE 01 TUBE 02
anneal
846 1000C S/D ANNEAL
11
Coat
and
develop resist to
middle of wafer over
poly
cover
This is to
and silicon
center of the wafer
intersection.
etch off.
protect
This
the oxide at the
will
from
being
form the
necessary divider between
polysilicon and silicon regions
12
Etch
off
any
oxide on polysilicon and
deposition
silicon substrate
13
Measure
14
Deposit
15
RTP
16
Remove any un-reacted Ni
17
Data
during silicidation.
HF dip immediately prior to metal
sheet resistance
Target
nickel metal
Vary
anneal
collection.
Measure
metal
sheet
resistance.
91
~
3 000 A
temperature & time
Wet chemistry; 90C for 60sec in
1 part H2S04 : 2 part H202
Phu Do
2.
MS Thesis
Fabrication Process Cross-Sectional Diagram
/
I I I I I I I I
N-type implant
N"*
NiMeta
Poiy-Si
|
)
Oxide
^^^__w_w
14
P-type Si
Ni Metal
Oxide (thermal activation)
Polysittcon
RTP
Oxide
NiSi
i
I
)
Oxide
4
15
P-type Si
^
NlSi
P-type Si
Polysilcon
N*
\
Poly-Si
j
Oxide
Ni Etch
wet
etch
Oxide
Oxide
^^^^
5
12
P-type Si
P-tvpe Si
3.
Design of Experiment
Central Composite Design
Wafer
Pattern
(CCD)
Temp
(C)
Time
ID
D4
450
45
(s)
D5
450
75
+-
D11
695
45
++
D12
695
75
aO
D3
400
60
AO
D1
746
60
Oa
D6
573
39
OA
D7
573
81
0
D8
573
60
0
D9
573
60
-+
92
MS Thesis
Phu Do
4.
Raw AFM Data
Constant Time: Poly-I & Si Region
Temp (C)
Poly
Si
93
Phu Do
MS Thesis
Constant Temp: Poly-I & Si Region
Time
(sec)
Poly
Si
94
Phu Do
5.
MS Thesis
Raw XRD Data
Sample D15 Si_P+
(IBM)
[D15-S.MDI) D15-S NiSi From Phu Do
25.0-
20.0-
Ni2Si
+
NiSi
15.0"
10.0-
5.0
A
xlO^
,
A
A.J
U_J-^-
^__
4&-1339> Ni2Si
1
1
1
I.
.
-
NicWel Silicon
.
38-D344> fJiSt- Nick*! Silicon
,
\
1
I
,1
2-ThetaO
95
i
il
Phu Do
MS Thesis
Sample D15 Poly_P+
(IBM)
[01 5-P.MDI1 01 5-P NiSi From Phu Do
Ni2Si
<t8-1339>
2-Thetaf)
96
N12SI
-
Nicket Silica
Phu Do
MS Thesis
fDlPOLTlEWDI] 01-Polp
Boh
<P si=D.0>
3M-
250-
2ft)-
g
a.
O
'CO
(a
)
100-
012)
(220)
50-
1
-xi
D
A X,
i*
A
1
T
1
I
?
1
r
a
EC^.'.v
HCII-HO-ICiaa-'i
5>:ir->
mcc-
7?
|
uwn:mv:i
|
:^_?:c-zi-.\_x.-i
.
0
s
1
,
-
,
,
,,;",,,.,,
,
Two-Theta (deg)
^:\OATASCT'XiATA0-5\PHUDO>DO&1>
01-Si-
FDI-'jI-IE-WDH
E
Saturday, Jut C#, 2005 07
57p
iMJI/JADBS)
COD)
-Psi=0IiJ
300-
-
250-
2D-
O
(112)
"CO
100-
(101)
50-
172
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nesi-HKteicibni
HI
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1
|
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1
|
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|
0
(deg)
cADATASCAN\OAT;MH\PHIJDO\D0&1 >
97
Saturday. Jul 09. 2105 07 5Sp fMOLUADB)
Phu Do
MS Thesis
fmPOLYIE.MOl] 05-Poly
I Bch
<Pl=0.P>
Two-
Theta (deg)
<o:\DATASC.AN\DATA05\PHUOmDO&1
fDLt-SIIEMDI) DLJ-Si I Bch
>
Saturday, Jul 00. 2005 07 54p
fluDWADBB)
<4001
tPi*=O.0>
(112)
j
|
(220)
(101)
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,
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(deg)
<c:\0ATASCAmDATAO5\PHUDO\DOE-l>
.RlT
98
Saturttey. Jul 09, 2005 07 55p (MDWADBSJ
Phu Do
MS Thesis
ID4P0UJ.MDI]
04Pdy_l (Pa=0 D>
4000-
-
~
3500
3000-
-
S
2500o
-o
".& 2000m
15D0.
"
1000-
f*
"*'*W\*M
J
D
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tie
If
iir.
e
i
't
i
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1
MCI-
HOSISBteu
1 1
%
1
T2-1C6- 3l-3B1Ct
T
|
i
Two- Theta
1
r
1
(deg)
<c:>D/MASCAWDArA-05y,HUDO\OOE3>
T
-
Friday. Dec OS. 2005 05.p iMDWADE6j
|
60DD-
-
5000
-j
4000-
"o
O
^& 3000
-c
-2
2D00-
L
1Q0D-
0
r
(
"-2SC-
-
V
a
1
If
P
f
f 1
1
1
1
1
r
.
.
mxi-m.1;r.iii-.:i
.
r
if
fl?
f
3
1
1
l
Two- Theta
I
5 a
m
.
f
,.
1 !
(deg)
'.C'.\DATASCArt\DATA[l5\PHUDO\D0E3>
'RIT
99
Friday. Dec 00. 2005 D7:0Tp ifcBDfJADE6)
Phu Do
MS Thesis
<*>}
fDP0LYIEM01] De-PoJv-l-E <Psi-C j
300-
-
250'
_*
o
O
(2li)
"CO
100-
(112)
(221 '
50-,
(101)
vJH
~J
i
4
0
1
i
X
9
i
f
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HCL-HlICII1,DI
Hrt.
HI
i
a
i
!
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|
f
i
I
Twd- Theta
a
(deg)
Rrr
<c;\DATASCAmDATAO5\PHUDO\0O-1>
Jl
HC-I-
v
i
[De.SI-IE.MDI]
^V2LS>
p
m
Saturday. Jul 09, 2O05 D8:0lp (MDI/JADE8)
DfrSi-l-EiPsiO.0>
t
en
-vie,-,-.
ui^i-ur*titnic/>i
Stussi.syi-Sl
Two-ThetaCdeg)
<o:XOATASCAN\DATA05\PHUOO\D0E-1>
.RfT
100
Saturday. Jul . 2005 03:02p
ijud l/J^JD
E6)
Phu Do
MS Thesis
[D7POI.YJ.MDt]
<Psi=0_0>_____/_
MOD
-C
-O
.^2000
w
^
1500
1000
""WW
/
U L-y.^
7I-OS3B" UDtSH2- KtJstSltC
n
_1_L
7S-1C&S1-
9
Two-Theta (de
RfT
Friday. Dec 09, 2005
<c:\D/tfASCAmDATA05\PHUDO\DOE3>
07:13p IMDWADB5)
150-
_t
o
i
ig.o-
j
5.0-
JJ
.
.
aJl_
.
._.
f
I
A
/v
TH- HIS-
HEtclSHOH
=
a
i
i
=
-
a
r
I
r
J
f I
a
,
P J,
Two-Theta (de
:\DATASCAK\DATA05\PHiJD0UJ0E2>
RfT
101
Friday. Dec 06. 2005 O4:02p i'MDt/JADE6')
Phu Do
MS Thesis
[011POLJMQI]
011Pdy_l
<Pg^0.0>
f*t
<V******,W1*^\w--L^^^J
I'l^^H^1^
3S-XJI--
tj-:^-A
ua-rm?i:ui:vi
ncc-nid*ic-BicM
Two-Theta (deg)
RfT
<o:\OArASCAH\DATAW\PHUD0\D0E3>
[D11SI
IUDIJ
011 Si I
Friday. Dec 09. 2006 05:59p (WDVJADE6)
<Ps)=DJ)>
7S30
5000-
2500-
I
-^
\..VJL
-jl..
T
,,
___j
L>
-
.
^ \
0
A
,
,,
J
L r
&:eu- hq-
i
i i
I
i
f
i
it
i
HttglSikx
1
1
13439ft iir_t:-nii-i"[ii'.i
?
Two-Theta (deg)
RIT
c.\DATASCAfADATA05\PHUDO'XiOE3>
102
Friday. Dec 09. 2006 06:00? (MD1/JADE6)
Phu Do
MS Thesis
!
[014P0LYIMDI]
.......
,
D14P&iy_l
~'**m#*****^^
n^m^mkmJ
e5-t5Di=-
UCSI-Nfc)
%%
Two-Theta (deg)
<o:\DATASCA)J\DATA05\PHUOO\DOE3>
I
[DI4SI 1
1.401] DI4SI
'
->-
i
.......
Friday. Dec 09. 2006 04.-57p (MDVJADE0)
'
i
,
I
1 <Pri=0 0>
1
J
J"
~^wj
ffi-taP- BE3l-BI0al3!Itl
4
-
1
f
.-
r
1 a
1 1
1.
1
1
1
?
r
r
,
1
3"
Iff
i
g
j
1
l!
f
?
3&isil>
f
M
i
net-
i
B
f
hhsiubm
i ii
Two-Theta (deg)
c;UJATA";CAmDATA05VHiJDO\DOE3;
RfT
103
Fnday, Dm 03, 2005 05 2i>p iVIDI/J^OBj
Phu Do
MS Thesis
Reference Ni Metal Sample
[013SHM3I]
D13Si-tJ'to_RTP
without
RTP Anneal
Psi=D.O
Two-Theta (deg)
'RIT
G:\DATASCAmDArA05\PHU
104
DO\O0E2>
Friday. Dee 09. 2005 04:39p (MOI/JADE8)
Phu Do
6.
MS Thesis
Raw RBS Data
1) Sample D6Poly_P+
Energy (MeV)
0.5
35
i
1.0
r
"i
1
1
r
1.5
"i
1
1
2.0
r
-i
1
1
r
30
25
2
20
xi
N
.
I
15
o
10
5
-
-
Si
0
~\
i
i
i
i
i
i
i
i
200
100
i
i
i
i
i
300
i
i
400
i
i
i
i
i
i
i
500
i
i
i
600
i
i
i "i
700
i
i
i
r
800
Channel
V
M:
XRump
FSe/Plot
Beam
*
1
2
3
Window
me
up
Scott
le!
Variables
311
Help
sho?
Sublayers
Thickness
3525.00
415.00
40000.00
SIM Command:
File:
RBS
Identif ier :
ITCT Text:
Date:
Beam:
Geometry:
MCA:
Detector:
Correction:
Go f or i 1 1
The
Edit
Layout
/CM2
auto
Si02
auto
Composition
Hi
0.650
Si
1.000
Si
1.000
/CM2
Si
0
0.35C
2.00C
active
c:\rumpdata\octl005\0029_0
HIT
Hot
2n.rbs
6P
implemented
10/10. 09:45:33
m 13.55 nA
4He++
20.00
0 uCoul
2.250 MeV
8.00
Phi:
15.00
Psi :
Theta:
615.00
IBM
First chan:
c
0.0
29.320
HPT: 1024
2.509
Econv:
10.0
Tau :
FHM : 18.0 keV
Omeg
0.9800
polysilicon
has been
consumed and
Ni2Si has formed.
105
Phu Do
2)
MS Thesis
Sample D3 Poly_P+
Energy (MeV)
0.5
50
t
r
1.0
"i
1
1
r
1.5
-i
1
1
2.0
-i
r
1
r
40
X
13
30
x
<D
N
a
20
o
10
N
0
"T"
i
i
i
i
|
i
i
i
i
i
i
300
200
100
i
|
i
j i
400
i
i
f\
500
i
i
i
600
Channel
SXRump
f Be/Plot
Layout
Window
Edit
Variables
Help
Thickness
A
2800.00
A
2500.00
Si02
415.00
/CM2
40000.00
iSIM
Command:
RBS
File:
Identifier:
LTCT Text:
Date:
Beam:
Geometry :
MCA:
Detector:
Correction:
Sublayers
auto
auto
auto
auto
Composition
Hi
Si
Si
Si
1.000
1.000
1.000
1.000
active
cNrunpdataNoct 1005\00 2 9_03n.rbs
RIT 3P
Hot implemented
lO/lO. 10:15:43
9 11.09 nA
20.00
0 uCoul
4He++
2.250 MeV
15.00
Psi :
630.00
8.00
Phi:
Theta:
IBM
HPT: 1024
29.320
First chan:
c
0.0
2.509
Econv:
Tau: 10.0
FHM:
18.0 keV
Omeg
1.0000
(Next?
This
sample remained similar
to the
as-prepared condition.
106
i
i
i
r*T
i
700
i
i
r
800
Phu Do
MS Thesis
3) Sample DI
Poly_P+
Energy (MeV)
0.5
40
t
0
r
i
i
1.0
1
i
i
i
|
i
1
i
i
1
i
i
i
i
i
i
|
1
i
400
i
1
i
|
r
i
500
i
i
i
i
600
XRump
Fte;'Plot
Window
Layout
Edit
Variables
Help
Sublayers
Thickness
/CM2
3600.00
Si02
415.00
/CM2
40000.00
ilM Command:
File:
RBS
Identifier:
ITCT Text :
Date:
Beam
Geometry:
MCA
Detector:
Correction:
auto
auto
auto
Composition
Hi
Si
Si
0.650
1.000
1.000
active
c:\rumpdataNoctl005\0029_32n.rbs
RIT
Hot
IP
implemented
08:34:53
4He++
2.250 MeV
10/17.
Theta:
IBM
2.509
Econv:
FHM: 18.0 keV
1.0000
20.00 uCoul
e 25.69 nA
Phi:
15.00
Psi
8.00
1065.00
chan :
0.0
29.320
First c
HPT: 1024
Tau: 10.0
Omega:
4.000
Omeg
[Your isli?_L_
The
polysilicon
has been
consumed and
Ni2Si has formed.
107
i
i
i
r
1
t
Channel
-
2.0
1.5
n
1
300
200
100
|
1
i
i
700
i
i
l
I
800
Phu Do
4)
MS Thesis
Sample D6 Si_P+
Energy (MeV)
2.0
35
30
T3
-
25
11
20
N
I
I
15
o
10
Si
0
-
i
i
i
i
i
i
200
100
i
i
i
i
i
i
i
i
i
i
i
400
300
i
|
i
i
500
i
i
i
i
i
600
i
i
i
i
700
i
i
r
800
Channel
JjlIXR-urnp
Layout
Window
file/Plot
Ecft
Variables
Help
Thickness
/CM2
4900.00
/CM2
40000.00
SIM Command
RBS
I
LTCT Text:
Date:
Beam:
Geometry:
MCA:
Detector:
Correction:
Your
Composition
Hi
0.500
Si
1.000
auto
auto
:
File:
Identifier:
I
Sublayers
1005\0029_04n rbs
6S
implemented
10/10. 10:37:37
20.00 uCoul
<
15.34 nA
4He++
2 250 MeV
15.00
8.00
Phi:
15.
Psi:
645.00
Theta:
IBM
29.320
First chan
han:
0.0
HPT: 1024
2.509
Econv:
Tau:
Omega: 4.000
FHH: 18.0 keV
1.0000
c : \ruipdata\oct
.
RIT
Not
_
wish?
The top layer is about 50% Si and 50% Ni. There is
layer and the second layer, or a rough surface.
108
a rough
interface between the top
Phu Do
MS Thesis
5) Sample
D3 Si_P+
Energy (MeV)
0.5
1.0
50
1
1.5
2.0
~
1
1
r
i
i
t
r
i
r
i
40
13
30
x
<D
N
<3
20
O
10
0
i
i
|
i
200
100
i
i
i
|
i
i
300
rp*n
i
400
t
[
i
i
500
i
i
i
]
i
i
600
i
i
700
i
I
I
800
Channel
BUS!
Hi
ISxRiimp
Window
Layout
uram!
sis
'lot
Edit
Variables
show
Thickness
2800.00
A
/CM2
450.00
/CM2
40000.00
ISIM
Command:
File:
RBS
|
Identifier:
LTCT Text:
Date:
Beam :
Geometry:
MCA:
Detector:
Correction:
[Heat? I
There is
Help
Composi t ion
Hi
1.000
Hi
0.480
Si
1.000
Sublayers
auto
auto
auto
Si
0.520
active
c\rumpdata\octl005\0029_30n.rbs
3S
implemented
07:40:45
20.00
0 uCoul
9 25.44 nA
4He++
2.250 MeV
Phi:
Theta:
8.00
15.00
Psi : 1035.00
IBM
29.320
First chan:
c.
0.0
2.509
HPT: 1024
Econv:
Omeg.
10-0
keV
Tau:
FVHM: 18.0
1.0000
RIT
Hot
10^17.
.
a
layer (can
52% Si, between the Ni top layer
distinguish between N-type and P-type Si).
thin layer of about 48% Ni
not
and
109
and
the Si
Phu Do
MS Thesis
6) Sample
DI Si_P+
Energy (MeV)
0.5
1.0
2.0
1.5
35
30
25
2
13
20
N
S 15
o
10
Si
0
i
i
i
i
i
i
i
i
i
300
200
100
i
i
i
i
i
i
i
i
400
i
i
N
i
i
500
i
i
i
i
600
i
r
700
800
Channel
The
top layer is
layer
and
the
about
second
51% Si
layer,
and
49% Ni. There is
or a rough surface.
110
a rough
interface between the top
Phu Do
MS Thesis
References
[1]
D.
Baselt, "The
tip-sample
implications for biological
Technology, (1993).
[2]
[3]
[4]
T.R.
interaction in
applications
",
force microscopy and its
Thesis, California Institute of
atomic
Ph.D.
Albrecht, P. Grutter, D. Home, D. Rugar, J. Appl. Phys. 69, 668 (1991).
Tutorial, Pacific Nanotechnology, URL: http://www.pacificnanotech.com,
AFM
Access Date: 05/04/05.
Veeco AFM product
description,
URL:
05/04/05.
Ill
http://www.veeco.com. Access Date:
Download