AN-106
AAT115X Application Note
Output Capacitor Selection for the AAT115X Series Buck Converter
Regardless of the application—from cell phones to wireless LAN cards—height, size, and efficiency are important features for components used with AAT115X converters. With this in mind, the recommended output capacitor for the AAT115X family of buck converters is presented in this Application Note. The design procedure for determining the capacitor value and calculating stresses is also examined.
V
IN
M1 VLX
M2
L
V
O
C R
Figure 1: Buck Converter.
Surface mount ceramic X5R or X7R capacitors are ideally suited for AnalogicTech's buck converter (Figure 1).
X5R ceramic capacitors have a CV product with a temperature and voltage coefficient that is ideal for low voltage, high frequency, and high density switching regulators. Figure 2 shows the voltage and temperature characteristics for a 22µF, 6.3V, 0805, X5R ceramic capacitor. The graph illustrates the strong voltage coefficient typical of an X5R capacitor. From the graph, it can be seen that the applied voltage must be considered when determining the actual capacitor value. The impedance and equivalent series resistance (ESR) characteristics shown in Figure 3 are both typical of an X5R ceramic capacitor and ideal for achieving low output ripple at a high switching frequency.
25
20
15
0.8V
1.5V
1.2V
1.8V
2.5V
10
3.3V
5
0
-75
GRM21B R60J226ME 39
-50 -25 0 25
Temperature (
°°
C)
50 75 100
Figure 2: Capacitance vs. Voltage Bias and Temperature
(22µF, 6.3V, 0805, X5R).
AN-106.2005.01.1.0
1
2
AN-106
AAT115X Application Note
1
0.1
GRM21B R60J226ME 39
Impedance
ESR
0.01
0.001
0.01
ESL = 0.57nH
Fres = 1.98 MHz
0.1
1
Frequency (MHz)
10
Figure 3: ESR and Impedance vs. Frequency
(22µF, 6.3V, 0805, X5R).
Voltage loop stability is the main consideration when selecting an output capacitor for the AAT115X family of
DC/DC converters. A simplified schematic of the AAT115X feedback control loop is shown in Figure 4. The inner peak current mode loop is modeled as a current-controlled current source which is programmed by an output voltage error amplifier. The crossover frequency, phase, and gain margin of the voltage loop vary with the output capacitor size. As the output capacitor is increased, the voltage loop crossover frequency decreases and the phase and gain margin increases. Appendix A (page 7) displays a table and Bode plots with the suggested ceramic output capacitor for various AAT1156 output voltages.
The X5R ceramic capacitor has a sufficiently low ESR that the capacitor does not present an ESR zero to the voltage loop. It simply adds a single pole roll off. The use of an alternate high-ESR capacitor, such as a tantalum or organic electrolyte, will not produce the same phase and gain margin results given the same capacitor value. For these types of capacitors, the ESR zero will occur before the loop crossover frequency.
Therefore, it must not be assumed that the ceramic output capacitor can be substituted with another type without affecting stability, crossover frequency, phase, and gain margin.
Rb
FB
V
CC
Peak Current
Mode Control
Gm=50k
Ra
V
REF
Voltage Error Amp
Gu=500 µ S
V
OUT
Co
2 x 22 µ F
RL
ESR
Figure 4: AAT115X Feedback Control Loop.
AN-106.2005.01.1.0
AN-106
AAT115X Application Note
After selecting a ceramic capacitor which provides the desired phase and gain margin, the output capacitor value must be examined to insure that it meets the load transient demands. For applications with large instantaneous load transitions, the output capacitor size must be sufficient to limit the output voltage excursion during load transient recovery. For a step increase in load current, the output capacitor supplies the change in load current while the converter recovers and responds to the new load level. The feedback control loop typically requires three switching cycles to increase the inductor current to match the increased load demand. The capacity required to limit the output voltage droop to a specific level (V
DROOP
) is:
C ≈
3 · (
∆
I
O
)
F
SW
· V
DROOP
For an instantaneous step decrease in load current, the output capacity required to limit the output voltage overshoot (V
OS
) during a full load to no load transient must be determined. This transient requires the excess energy stored in the output inductor to be absorbed by the output capacitor with a limited overshoot in the output voltage.
C
≈
L · I
O
2
(V
O
+ V
OS
) 2 - V
O
2
If necessary, the capacitor size should be increased beyond that selected for stability to meet the load transient requirement.
Because the ESR of ceramic capacitors is low, the capacitor temperature rise due to ripple current dissipation is usually negligible. Good design practice dictates that we always confirm this and verify that the output capacitor RMS current and temperature rise are within the manufacturer's suggested limit. The maximum RMS ripple current seen by the output capacitor occurs at the maximum input voltage. The capacitor ripple current consists of the AC portion of the inductor current. The DC component of the inductor current is passed on to the load as shown in Figure 5. The typical ceramic X5R ripple current rating corresponds to the amount of ripple sufficient to raise the capacitor temperature by 20°C above the ambient temperature. Figure 6 graphs the temperature rise vs. the applied ripple current for the recommended capacitor. It shows that the current required to reach a 20°C rise above ambient is in excess of 1A RMS, much higher than the ripple current seen in any AAT115X application.
AN-106.2005.01.1.0
3
4
VLX
I
DC
+I
RIPPLE
Lo
I
RIPPLE
V
OUT
Co R
LOAD
I
DC
AN-106
AAT115X Application Note
I
RMS
=
1
2 · 3
·
V
OUT
· (V
INMAX
- V
OUT
)
L · F · V
IN
VLX
V
IN
I
DC
I
DC
-I
PK
I
DC
+I
PK
+I
PK
I
RIPPLE
-I
PK
Inductor Current = I
DC
Load Current + Capacitor AC Ripple Current
Figure 5: Ripple Current.
90
80
70
60
50
40
30
20
10
0
0.0
GRM21B R60J226ME 39
0.5
1.0
25
°
C
70 ° C
1.5
RMS Current (A)
0805
22 µF
X5R
1MHz
1.8V
θ = 207 ° C/W
2.0
2.5
Figure 6: Temperature Rise vs. Ripple Current.
If the ESR and thermal resistance specifications are available, the power dissipation and temperature rise can also be calculated. The thermal resistance ( Θ ) for the 0805 size capacitor is 207°C/W. The power dissipated in the output capacitor is the RMS current squared multiplied by the capacitor ESR (2.2m
Ω @ 1MHz from the plot in Figure 3). As seen in Figure 3, the capacitor ESR varies with frequency and must be evaluated at the converter switching frequency. The temperature rise is calculated by multiplying the power dissipated (P
CAP by the thermal resistance ( Θ ).
)
AN-106.2005.01.1.0
AN-106
AAT115X Application Note
P
CAP
= I
RMS
2 · ESR
∆
T = P
CAP
·
Θ
The ceramic capacitor can be modeled as an ideal capacitor in series with a resistor and inductor, with all three components contributing to the effective output voltage ripple. The capacitor resonant frequency is the frequency at which the capacitor impedance is equal to the series resistance. Above this frequency, the inductive reactance dominates over the capacitive reactance, and the impedance vs. frequency has a positive slope.
It is desirable to select a ceramic capacitor whose resonant frequency is close to the converter switching frequency. X5R and X7R ceramic capacitors have extremely low ESR with typical values less than 5m Ω .
Consequently, the output voltage ripple due to ESR is small.
A simulation which includes the parasitic elements of the suggested capacitor is shown in Figure 7. For this simulation, the input to the output filter (LX node) is replaced with an ideal square wave with an amplitude equal to the maximum input voltage. The extremely low ripple associated with a low ESR/ESL ceramic output capacitor can be seen.
DCR
50m
VLX
Lo
2.2uH
Co
22
µ
V
OUT
= 1.0V
Co
22
µ
ESR
2.2m
ESR
2.2m
Road
1.42
ESL
0.57n
ESL
0.57n
Output Ripple 0.5mV/div
LX Switch (1V/div)
Time (1
µ sec/div)
Figure 7: Simulated Output Voltage Ripple (V
IN
= 4.2V).
X5R or X7R surface mount ceramic capacitors are ideal output capacitor solutions for the AAT115X series buck converters. They are available with voltage, ESR, and capacity characteristics that are ideal for high frequency, high density, switch mode power supplies. The control loop stability (gain and phase margin) generally dictates the capacity required, while applications with large instantaneous load transitions may require increased capacity. Once the correct value of X5R capacitor has been selected, the ripple current, temperature rise, and output voltage ripple can be examined.
AN-106.2005.01.1.0
5
AN-106
AAT115X Application Note
Specifications:
V
O
= 1.0V
I
O
= 700mA
V
IN
= 2.7V to 3.6V
L
O
= 2.2µH
V
DROOP
= V
OS
= 50mV for Load Transient
1.
Determine capacitance from Appendix A, Table 1.
C
O
= 2 x 22µF for a 41° phase margin and 11 dB gain margin.
2.
Calculate the minimum capacitance needed to meet the transient response requirements.
The capacitance selected for stability is larger than that required for the transient response; therefore, the capacity need not be increased.
C
F
3 · (
SW
∆
· V
I
O
)
DROOP
3 · 0.7A
1.0MHz · 50mV
µ F
C ≈
(V
O
L · I
+ V
OS
O
2
) 2 - V
O
2
2.2
µ H · 0.7A
1.05V
2 - 1V 2
2
µ F
3.
Calculate ripple current and temperature rise.
I
RMS
=
1
2 · 3
·
V
OUT
· (V
IN
- V
L F V
IN
OUT
) 1
=
3.5
1.0V · (4.2V - 1.0V)
· = 98mA
2.2
µ H · 1MHz · 4.2V
P
CAP
= I
RMS
2 · ESR = 100mA 2 · 2.2m
Ω = 22 µ W
∆ T = P
CAP
· Θ = 22 µ W · 207°C/W << 1°C
AnalogicTech cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in an AnalogicTech product. No circuit patent licenses, copyrights, mask work rights, or other intellectual property rights are implied.
AnalogicTech reserves the right to make changes to their products or specifications or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability.
AnalogicTech warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with AnalogicTech’s standard warranty. Testing and other quality control techniques are utilized to the extent AnalogicTech deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed.
Advanced Analogic Technologies, Inc.
830 E. Arques Avenue, Sunnyvale, CA 94085
Phone (408) 737-4600
Fax (408) 737-4611
6 AN-106.2005.01.1.0
AN-106
AAT115X Application Note
Appendix A
Table 1: AAT1156 Output Filter Values and Loop Characteristics
V
OUT
(V)
0.8
0.8
3.3
3.3
3.3
3.3
1.8
1.8
2.5
2.5
3.3
3.3
1.2
1.5
1.5
1.5
1.0
1.0
1.0
1.2
L
OUT
(µH)
1.5
2.2
2.2
2.2
3.3
3.3
3.3
4.7
3.3
4.7
4.7
4.7
3.3
2.2
3.3
4.7
1.5
2.2
3.3
2.2
C
OUT
(µF)
3 x 22
3 x 22
2 x 22
2 x 22
2 x 22
2 x 22
22
2 x 22
22
2 x 22
22
2 x 22
2 x 22
2 x 22
2 x 22
2 x 22
2 x 22
2 x 22
2 x 22
2 x 22
Crossover
Frequency (kHz)
134
150
150
140
129
126
190
100
140
134
168
171
164
179
147
157
210
100
205
100
Phase
Margin (°)
60
60
54
75
44
40
51
47
43
73
41
72
33
38
35
54
45
38
46
41
Gain
Margin (dB)
11
12
8
14
11
10
11
10
8
16
7
15
9
8
9
11
12
11
12
11
0.8V; 0.7A; 1.5
µ H; 3 x 22 µ F
20
15
10
5
0
-5
-10
-15
Fc = 140 kHz
Φ m = 45 °
Gm = 12 dB
-20
0.01
Gain
0.10
Phase
Frequency (MHz)
0
-45
-90
-135
-180
1.00
180
135
90
45
0.8V; 0.7A; 2.2
µ H; 3 x 22 µ F
20
15
10
5
0
-5
-10
-15
-20
0.01
Fc = 134 kHz
Φ m = 38 °
Gm = 11 dB
Gain
0.10
Phase
Frequency (MHz)
180
135
90
45
0
-45
-90
-135
-180
1.00
AN-106.2005.01.1.0
7
8
1.0V; 0.7A; 1.5
µ
H; 2 x 22
µ
F
20
15
10
5
0
-5
-10
-15
-20
0.01
Fc = 168 kHz
Φ m = 46 °
Gm = 12 dB
Gain
0.10
Phase
180
135
-180
1.00
90
45
0
-45
-90
-135
Frequency (MHz)
1.0V; 0.7A; 3.3
µ
H; 2 x 22
µ
F
20
15
10
5
0
-5
-10
-15
-20
0.01
Fc = 168 kHz
Φ m = 33 °
Gm = 9 dB
Gain
0.10
Phase
180
135
90
45
0
-45
-90
-135
-180
1.00
Frequency (MHz)
1.2V; 0.7A; 3.3
µ
H; 2 x 22
µ
F
20
15
10
5
0
-5
-10
-15
-20
0.01
Fc = 147 kHz
Φ m = 35 °
Gm = 9 dB
Gain
0.10
Phase
0
-45
-90
-135
-180
1.00
180
135
90
45
Frequency (MHz)
AN-106
AAT115X Application Note
1.0V; 0.7A; 1.5
µ
H; 2 x 22
µ
F
20
15
10
5
0
-5
-10
-15
-20
0.01
Fc = 168 kHz
Φ m = 46 °
Gm = 12 dB
Gain
0.10
Phase
Frequency (MHz)
180
135
90
45
0
-45
-90
-135
-180
1.00
1.2V; 0.7A; 2.2
µ
H; 2 x 22
µ
F
20
15
10
5
0
-5
-10
-15
-20
0.01
Fc = 179 kHz
Φ m = 38
°
Gm = 8 dB
0.10
Gain
Phase
180
135
90
45
0
-45
-90
-135
-180
1.00
Frequency (MHz)
1.5V; 0.7A; 2.2
µ
H; 2 x 22
µ
F
20
15
10
5
0
-5
-10
-15
-20
0.01
Fc = 157 kHz
Φ m = 54 °
Gm = 11 dB
Gain
0.10
Phase
180
135
90
45
0
-45
-90
-135
-180
1.00
Frequency (MHz)
AN-106.2005.01.1.0
1.5V; 0.7A; 3.3
µ
H; 2 x 22
µ
F
20
15
10
5
0
-5
-10
-15
-20
0.01
Fc = 134 kHz
Φ m = 44 °
Gm = 11 dB
Gain
0.10
Phase
180
135
90
45
0
-45
-90
-135
-180
1.00
Frequency (MHz)
1.8V; 0.7A; 3.3
µ
H; 2 x 22
µ
F
20
15
10
5
0
-5
-10
-15
-20
0.01
Fc = 150 kHz
Φ m = 51 °
Gm = 11 dB
Gain
0.10
Phase
180
-45
-90
-135
-180
1.00
135
90
45
0
Frequency (MHz)
2.5V; 0.7A; 3.3
µ
H; 2 x 22
µ
F
20
15
10
5
0
-5
-10
-15
-20
0.01
Fc = 129 kHz
Φ m = 60 °
Gm = 11 dB
Gain
0.10
Phase
Frequency (MHz)
-45
-90
-135
-180
1.00
180
135
90
45
0
AN-106
AAT115X Application Note
1.5V; 0.7A; 4.7
µ
H; 2 x 22
µ
F
20
15
10
5
0
-5
-10
-15
-20
0.01
Fc = 150 kHz
Φ m = 40 °
Gm = 10 dB
Gain
0.10
Phase
0
-45
-90
-135
-180
1.00
180
135
90
45
Frequency (MHz)
1.8V; 0.7A; 4.7
µ
H; 2 x 22
µ
F
20
15
10
5
0
-5
-10
-15
Fc = 140 kHz
Φ m = 47 °
Gm = 10 dB
-20
0.01
Gain
0.10
Phase
Frequency (MHz)
180
135
90
45
0
-45
-90
-135
-180
1.00
2.5V; 0.7A; 4.7
µ
H; 2 x 22
µ
F
20
15
10
5
0
-5
-10
-15
Fc = 126 kHz
Φ m = 60 °
Gm = 12 dB
-20
0.01
Gain
0.10
Phase
180
-135
-180
1.00
135
90
45
0
-45
-90
Frequency (MHz)
AN-106.2005.01.1.0
9
10
3.3V; 0.7A; 2.2
µ
H; 22
µ
F
20
15
10
5
0
-5
-10
-15
-20
0.01
Fc = 190 kHz
Φ m = 54 °
Gm = 8 dB
Gain
0.10
Phase
Frequency (MHz)
0
-45
-90
-135
-180
1.00
180
135
90
45
3.3V; 0.7A; 3.3
µ
H; 22
µ
F
20
15
10
5
0
-5
-10
-15
-20
0.01
Fc = 210 kHz
Φ m = 43 °
Gm = 8 dB
Gain
0.10
Phase
Frequency (MHz)
180
135
90
45
0
-45
-90
-135
-180
1.00
3.3V; 0.7A; 4.7
µ
H; 22
µ
F
20
15
10
5
0
-5
-10
-15
-20
0.01
Fc = 205 kHz
Φ m = 41 °
Gm = 7 dB
0.10
Gain
Phase
Frequency (MHz)
180
135
90
45
0
-45
-90
-135
-180
1.00
AN-106
AAT115X Application Note
3.3V; 0.7A; 2.2
µ
H; 2 x 22
µ
F
20
15
10
5
0
-5
-10
-15
Fc = 100 kHz
Φ m = 75 °
Gm = 14 dB
-20
0.01
Gain
0.10
Phase
Frequency (MHz)
0
-45
-90
-135
-180
1.00
180
135
90
45
3.3V; 0.7A; 3.3
µ
H; 2 x 22
µ
F
20
15
10
5
0
-5
-10
-15
-20
0.01
Fc = 100 kHz
Φ m = 73 °
Gm = 16 dB
Gain
0.10
Phase
180
135
90
45
0
-45
-90
-135
-180
1.00
Frequency (MHz)
3.3V; 0.7A; 4.7
µ
H; 2 x 22
µ
F
20
15
10
5
0
-5
-10
-15
-20
0.01
Fc = 100 kHz
Φ m = 72 °
Gm = 15 dB
Gain
0.10
Phase
180
135
90
45
0
-45
-90
-135
-180
1.00
Frequency (MHz)
AN-106.2005.01.1.0
AN-106
AAT115X Application Note
In order to measure the loop gain, the feedback loop must be broken and an AC source inserted.
The schematic shown in Figure A-1 illustrates the method used for measuring the loop gain and phase for the
AAT115X series converters. When measuring the loop gain, monitor the switching waveform and the output ripple to verify that the injected signal magnitude is appropriate. Excessive signal injection can cause the loop to enter into a non-linear region due to clipping at a supply rail or exceeding the dynamic range of a stage within the loop. A non-sinusoidal output, clipped signal, or erratic switching waveforms is an indication of excessive injected source magnitude. Insufficient injected signal magnitude reduces the measured signal below the noise floor and can cause errors in measurement. In order to avoid this, it may be necessary to narrow the frequency sweep range so that the injected signal is never either too large or too small. Of course, the area of greatest concern is near the crossover frequency.
Operational amplifiers U2A and U2B are inserted into the loop in order to guarantee that the impedance requirements at each side of Rs are met. Receiver Channel A side of Rs must be high impedance, while the
Channel B side Rs should be low impedance for accurate results. The opamps must be unity gain with no phase delay across all frequencies of interest.
AP Instruments INC.
Model 102B Source Reciever Uint
15 MHz Analog Network Analyzer
Source Out
Reciever
Channel A Vsource
Reciever
Channel B
+5
T1
1
U2A
2
3
Zi = infinity Zo = 0
7
U2B
6
5
Rs
51
-5
INPUT
Bode Plot Loop Gain Test Circuit
R1
100
C1
10
µ
F
C2
0.1
µ F
7
9
6
8
5
12
11
10
U1
AAT1156
Vp FB
Vp
Vp
Lx
Lx
EN Lx
Vcc
LL nc
Pgnd nc Pgnd
Sgnd Pgnd
2
1
16
3
4
15
14
13
L1
3.3
µ H
R4
59k
C1 Murata 10 µ F 6.3V X5R GRM42-6X5R106K6.3
C3,C4 MuRata 22 µ F 6.3V GRM21BR60J226ME39L X5R 0805
L1 Sumida CDRH3D16-4R7NC
R3
187k
C3,C4
2x 22
µ
F
Vout
Bypass Feedback for Loop Gain Test Circuit
Figure A-1: Test Circuit for Loop Gain and Phase.
AN-106.2005.01.1.0
11
AN-106
AAT115X Application Note
AnalogicTech cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in an AnalogicTech product. No circuit patent licenses, copyrights, mask work rights, or other intellectual property rights are implied.
AnalogicTech reserves the right to make changes to their products or specifications or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability.
AnalogicTech warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with AnalogicTech’s standard warranty. Testing and other quality control techniques are utilized to the extent AnalogicTech deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed.
Advanced Analogic Technologies, Inc.
830 E. Arques Avenue, Sunnyvale, CA 94085
Phone (408) 737-4600
Fax (408) 737-4611
12 AN-106.2005.01.1.0